ipsec: update MAX_AH_AUTH_LEN to support sha512
[deliverable/linux.git] / drivers / staging / sbe-2t3e3 / exar7300.c
CommitLineData
921a86e0
KH
1/*
2 * SBE 2T3E3 synchronous serial card driver for Linux
3 *
4 * Copyright (C) 2009-2010 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * This code is based on a driver written by SBE Inc.
11 */
12
13#include "2t3e3.h"
14#include "ctrl.h"
15
16void exar7300_init(struct channel *sc)
17{
18 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG1, 0);
19
20 /* enable line decodeer and encoder */
21 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG2, 0);
22 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG3, 0);
23 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4,
24 SBE_2T3E3_LIU_VAL_T3_MODE_SELECT |
25 SBE_2T3E3_LIU_VAL_LOOPBACK_OFF);
26}
27
28void exar7300_set_loopback(struct channel *sc, u32 mode)
29{
30 u32 val;
31
32 switch (mode) {
33 case SBE_2T3E3_LIU_VAL_LOOPBACK_OFF:
34 case SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE:
35 case SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG:
36 case SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL:
37 break;
38 default:
39 return;
40 }
41
42 val = exar7300_read(sc, SBE_2T3E3_LIU_REG_REG4);
43 val &= ~(SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK | SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK);
44 val |= mode;
45 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
46
47#if 0
48 /* TODO - is it necessary? idea from 2T3E3_HW_Test_code */
49 switch (mode) {
50 case SBE_2T3E3_LIU_VAL_LOOPBACK_OFF:
51 break;
52 case SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE:
53 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
54 break;
55 case SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG:
56 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_OFF);
57 break;
58 case SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL:
59 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
60 break;
61 }
62#endif
63}
64
65void exar7300_set_frame_type(struct channel *sc, u32 type)
66{
67 u32 val;
68
69 switch (type) {
70 case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
71 case SBE_2T3E3_FRAME_TYPE_T3_M13:
72 case SBE_2T3E3_FRAME_TYPE_E3_G751:
73 case SBE_2T3E3_FRAME_TYPE_E3_G832:
74 break;
75 default:
76 return;
77 }
78
79 val = exar7300_read(sc, SBE_2T3E3_LIU_REG_REG4);
80 val &= ~(SBE_2T3E3_LIU_VAL_T3_MODE_SELECT |
81 SBE_2T3E3_LIU_VAL_E3_MODE_SELECT);
82
83 switch (type) {
84 case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
85 case SBE_2T3E3_FRAME_TYPE_T3_M13:
86 val |= SBE_2T3E3_LIU_VAL_T3_MODE_SELECT;
87 break;
88 case SBE_2T3E3_FRAME_TYPE_E3_G751:
89 case SBE_2T3E3_FRAME_TYPE_E3_G832:
90 val |= SBE_2T3E3_LIU_VAL_E3_MODE_SELECT;
91 break;
92 default:
93 return;
94 }
95
96 exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
97}
98
99
100void exar7300_transmit_all_ones_onoff(struct channel *sc, u32 mode)
101{
102 if (sc->p.transmit_all_ones == mode)
103 return;
104
105 switch (mode) {
106 case SBE_2T3E3_ON:
107 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
108 SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES);
109 break;
110 case SBE_2T3E3_OFF:
111 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
112 SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES);
113 break;
114 default:
115 return;
116 }
117
118 sc->p.transmit_all_ones = mode;
119}
120
121void exar7300_receive_equalization_onoff(struct channel *sc, u32 mode)
122{
123 if (sc->p.receive_equalization == mode)
124 return;
125
126 switch (mode) {
127 case SBE_2T3E3_OFF:
128 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG2,
129 SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE);
130 break;
131 case SBE_2T3E3_ON:
132 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG2,
133 SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE);
134 break;
135 default:
136 return;
137 }
138
139 sc->p.receive_equalization = mode;
140}
141
142void exar7300_line_build_out_onoff(struct channel *sc, u32 mode)
143{
144 if (sc->p.line_build_out == mode)
145 return;
146
147 switch (mode) {
148 case SBE_2T3E3_OFF:
149 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
150 SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT);
151 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_OFF);
152 break;
153 case SBE_2T3E3_ON:
154 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
155 SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT);
156 exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
157 break;
158 default:
159 return;
160 }
161
162 sc->p.line_build_out = mode;
163}
164
165/* TODO - what about encoder in raw mode??? disable it too? */
166void exar7300_unipolar_onoff(struct channel *sc, u32 mode)
167{
168 switch (mode) {
169 case SBE_2T3E3_OFF:
170 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG3,
171 SBE_2T3E3_LIU_VAL_DECODER_DISABLE);
172 exar7300_clear_bit(sc, SBE_2T3E3_LIU_REG_REG1,
173 SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA);
174 break;
175 case SBE_2T3E3_ON:
176 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG3,
177 SBE_2T3E3_LIU_VAL_DECODER_DISABLE);
178 exar7300_set_bit(sc, SBE_2T3E3_LIU_REG_REG1,
179 SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA);
180 break;
181 }
182}
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