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staging: ti dspbridge: use _DEBUG for debug trace
[deliverable/linux.git] / drivers / staging / tidspbridge / include / dspbridge / io_sm.h
CommitLineData
6280238c
ORL		 1/*
2 * io_sm.h
3 *
4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
5 *
6 * IO dispatcher for a shared memory channel driver.
7 * Also, includes macros to simulate shm via port io calls.
8 *
9 * Copyright (C) 2005-2006 Texas Instruments, Inc.
10 *
11 * This package is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
17 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
18 */
19
20#ifndef IOSM_
21#define IOSM_
22
23#include <dspbridge/_chnl_sm.h>
24#include <dspbridge/host_os.h>
25
26#include <dspbridge/iodefs.h>
27
28#define IO_INPUT 0
29#define IO_OUTPUT 1
30#define IO_SERVICE 2
31#define IO_MAXSERVICE IO_SERVICE
32
33#define DSP_FIELD_ADDR(type, field, base, wordsize) \
34 ((((s32)&(((type *)0)->field)) / wordsize) + (u32)base)
35
36/* Access can be different SM access word size (e.g. 16/32 bit words) */
37#define IO_SET_VALUE(pContext, type, base, field, value) (base->field = value)
38#define IO_GET_VALUE(pContext, type, base, field) (base->field)
39#define IO_OR_VALUE(pContext, type, base, field, value) (base->field |= value)
40#define IO_AND_VALUE(pContext, type, base, field, value) (base->field &= value)
41#define IO_SET_LONG(pContext, type, base, field, value) (base->field = value)
42#define IO_GET_LONG(pContext, type, base, field) (base->field)
43
b3d23688 44#ifdef CONFIG_TIDSPBRIDGE_DVFS
6280238c
ORL		 45/* The maximum number of OPPs that are supported */
46extern s32 dsp_max_opps;
47/* The Vdd1 opp table information */
48extern u32 vdd1_dsp_freq[6][4];
49#endif
50
51/*
52 * ======== io_cancel_chnl ========
53 * Purpose:
54 * Cancel IO on a given channel.
55 * Parameters:
56 * hio_mgr: IO Manager.
57 * ulChnl: Index of channel to cancel IO on.
58 * Returns:
59 * Requires:
60 * Valid hio_mgr.
61 * Ensures:
62 */
63extern void io_cancel_chnl(struct io_mgr *hio_mgr, u32 ulChnl);
64
65/*
66 * ======== io_dpc ========
67 * Purpose:
68 * Deferred procedure call for shared memory channel driver ISR. Carries
69 * out the dispatch of I/O.
70 * Parameters:
71 * pRefData: Pointer to reference data registered via a call to
72 * DPC_Create().
73 * Returns:
74 * Requires:
75 * Must not block.
76 * Must not acquire resources.
77 * All data touched must be locked in memory if running in kernel mode.
78 * Ensures:
79 * Non-preemptible (but interruptible).
80 */
81extern void io_dpc(IN OUT unsigned long pRefData);
82
83/*
84 * ======== io_mbox_msg ========
85 * Purpose:
86 * Main interrupt handler for the shared memory Bridge channel manager.
87 * Calls the Bridge's chnlsm_isr to determine if this interrupt is ours,
88 * then schedules a DPC to dispatch I/O.
89 * Parameters:
90 * pRefData: Pointer to the channel manager object for this board.
91 * Set in an initial call to ISR_Install().
92 * Returns:
93 * TRUE if interrupt handled; FALSE otherwise.
94 * Requires:
95 * Must be in locked memory if executing in kernel mode.
96 * Must only call functions which are in locked memory if Kernel mode.
97 * Must only call asynchronous services.
98 * Interrupts are disabled and EOI for this interrupt has been sent.
99 * Ensures:
100 */
101void io_mbox_msg(u32 msg);
102
103/*
104 * ======== io_request_chnl ========
105 * Purpose:
106 * Request I/O from the DSP. Sets flags in shared memory, then interrupts
107 * the DSP.
108 * Parameters:
109 * hio_mgr: IO manager handle.
110 * pchnl: Ptr to the channel requesting I/O.
111 * iMode: Mode of channel: {IO_INPUT | IO_OUTPUT}.
112 * Returns:
113 * Requires:
114 * pchnl != NULL
115 * Ensures:
116 */
117extern void io_request_chnl(struct io_mgr *hio_mgr,
118 struct chnl_object *pchnl,
119 u8 iMode, OUT u16 *pwMbVal);
120
121/*
122 * ======== iosm_schedule ========
123 * Purpose:
124 * Schedule DPC for IO.
125 * Parameters:
126 * pio_mgr: Ptr to a I/O manager.
127 * Returns:
128 * Requires:
129 * pchnl != NULL
130 * Ensures:
131 */
132extern void iosm_schedule(struct io_mgr *hio_mgr);
133
134/*
135 * DSP-DMA IO functions
136 */
137
138/*
139 * ======== io_ddma_init_chnl_desc ========
140 * Purpose:
141 * Initialize DSP DMA channel descriptor.
142 * Parameters:
143 * hio_mgr: Handle to a I/O manager.
144 * uDDMAChnlId: DDMA channel identifier.
145 * uNumDesc: Number of buffer descriptors(equals # of IOReqs &
146 * Chirps)
147 * pDsp: Dsp address;
148 * Returns:
149 * Requires:
150 * uDDMAChnlId < DDMA_MAXDDMACHNLS
151 * uNumDesc > 0
152 * pVa != NULL
153 * pDspPa != NULL
154 *
155 * Ensures:
156 */
157extern void io_ddma_init_chnl_desc(struct io_mgr *hio_mgr, u32 uDDMAChnlId,
158 u32 uNumDesc, void *pDsp);
159
160/*
161 * ======== io_ddma_clear_chnl_desc ========
162 * Purpose:
163 * Clear DSP DMA channel descriptor.
164 * Parameters:
165 * hio_mgr: Handle to a I/O manager.
166 * uDDMAChnlId: DDMA channel identifier.
167 * Returns:
168 * Requires:
169 * uDDMAChnlId < DDMA_MAXDDMACHNLS
170 * Ensures:
171 */
172extern void io_ddma_clear_chnl_desc(struct io_mgr *hio_mgr, u32 uDDMAChnlId);
173
174/*
175 * ======== io_ddma_request_chnl ========
176 * Purpose:
177 * Request channel DSP-DMA from the DSP. Sets up SM descriptors and
178 * control fields in shared memory.
179 * Parameters:
180 * hio_mgr: Handle to a I/O manager.
181 * pchnl: Ptr to channel object
182 * chnl_packet_obj: Ptr to channel i/o request packet.
183 * Returns:
184 * Requires:
185 * pchnl != NULL
186 * pchnl->cio_reqs > 0
187 * chnl_packet_obj != NULL
188 * Ensures:
189 */
190extern void io_ddma_request_chnl(struct io_mgr *hio_mgr,
191 struct chnl_object *pchnl,
192 struct chnl_irp *chnl_packet_obj,
193 OUT u16 *pwMbVal);
194
195/*
196 * Zero-copy IO functions
197 */
198
199/*
200 * ======== io_ddzc_init_chnl_desc ========
201 * Purpose:
202 * Initialize ZCPY channel descriptor.
203 * Parameters:
204 * hio_mgr: Handle to a I/O manager.
205 * uZId: zero-copy channel identifier.
206 * Returns:
207 * Requires:
208 * uDDMAChnlId < DDMA_MAXZCPYCHNLS
209 * hio_mgr != Null
210 * Ensures:
211 */
212extern void io_ddzc_init_chnl_desc(struct io_mgr *hio_mgr, u32 uZId);
213
214/*
215 * ======== io_ddzc_clear_chnl_desc ========
216 * Purpose:
217 * Clear DSP ZC channel descriptor.
218 * Parameters:
219 * hio_mgr: Handle to a I/O manager.
220 * uChnlId: ZC channel identifier.
221 * Returns:
222 * Requires:
223 * hio_mgr is valid
224 * uChnlId < DDMA_MAXZCPYCHNLS
225 * Ensures:
226 */
227extern void io_ddzc_clear_chnl_desc(struct io_mgr *hio_mgr, u32 uChnlId);
228
229/*
230 * ======== io_ddzc_request_chnl ========
231 * Purpose:
232 * Request zero-copy channel transfer. Sets up SM descriptors and
233 * control fields in shared memory.
234 * Parameters:
235 * hio_mgr: Handle to a I/O manager.
236 * pchnl: Ptr to channel object
237 * chnl_packet_obj: Ptr to channel i/o request packet.
238 * Returns:
239 * Requires:
240 * pchnl != NULL
241 * pchnl->cio_reqs > 0
242 * chnl_packet_obj != NULL
243 * Ensures:
244 */
245extern void io_ddzc_request_chnl(struct io_mgr *hio_mgr,
246 struct chnl_object *pchnl,
247 struct chnl_irp *chnl_packet_obj,
248 OUT u16 *pwMbVal);
249
250/*
251 * ======== io_sh_msetting ========
252 * Purpose:
253 * Sets the shared memory setting
254 * Parameters:
255 * hio_mgr: Handle to a I/O manager.
256 * desc: Shared memory type
257 * pargs: Ptr to shm setting
258 * Returns:
259 * Requires:
260 * hio_mgr != NULL
261 * pargs != NULL
262 * Ensures:
263 */
264extern int io_sh_msetting(struct io_mgr *hio_mgr, u8 desc, void *pargs);
265
266/*
267 * Misc functions for the CHNL_IO shared memory library:
268 */
269
270/* Maximum channel bufsize that can be used. */
271extern u32 io_buf_size(struct io_mgr *hio_mgr);
272
273extern u32 io_read_value(struct bridge_dev_context *hDevContext, u32 dwDSPAddr);
274
275extern void io_write_value(struct bridge_dev_context *hDevContext,
276 u32 dwDSPAddr, u32 dwValue);
277
278extern u32 io_read_value_long(struct bridge_dev_context *hDevContext,
279 u32 dwDSPAddr);
280
281extern void io_write_value_long(struct bridge_dev_context *hDevContext,
282 u32 dwDSPAddr, u32 dwValue);
283
284extern void io_or_set_value(struct bridge_dev_context *hDevContext,
285 u32 dwDSPAddr, u32 dwValue);
286
287extern void io_and_set_value(struct bridge_dev_context *hDevContext,
288 u32 dwDSPAddr, u32 dwValue);
289
290extern void io_intr_dsp2(IN struct io_mgr *pio_mgr, IN u16 mb_val);
291
292extern void io_sm_init(void);
293
294/*
295 * ========print_dsp_trace_buffer ========
296 * Print DSP tracebuffer.
297 */
298extern int print_dsp_trace_buffer(struct bridge_dev_context
299 *hbridge_context);
300
301int dump_dsp_stack(struct bridge_dev_context *bridge_context);
302
303void dump_dl_modules(struct bridge_dev_context *bridge_context);
304
1ceea253 305#ifdef CONFIG_TIDSPBRIDGE_DEBUG
6280238c
ORL		 306void print_dsp_debug_trace(struct io_mgr *hio_mgr);
307#endif
308
309#endif /* IOSM_ */
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