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Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...
[deliverable/linux.git] / drivers / staging / vt6655 / device_main.c
CommitLineData
5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device_main.c
20 *
21 * Purpose: driver entry for initial, open, close, tx and rx.
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Jan 8, 2003
26 *
27 * Functions:
28 *
013a468c
CC		 29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
5449c685
FB		 32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
5449c685 35 * device_intr - interrupt handle function
5449c685 36 * device_rx_srv - rx service function
5449c685 37 * device_alloc_rx_buf - rx buffer pre-allocated function
5449c685 38 * device_free_tx_buf - free tx buffer function
5449c685
FB		 39 * device_init_rd0_ring- initial rd dma0 ring
40 * device_init_rd1_ring- initial rd dma1 ring
41 * device_init_td0_ring- initial tx dma0 ring buffer
42 * device_init_td1_ring- initial tx dma1 ring buffer
43 * device_init_registers- initial MAC & BBP & RF internal registers.
44 * device_init_rings- initial tx/rx ring buffer
5449c685
FB		 45 * device_free_rings- free all allocated ring buffer
46 * device_tx_srv- tx interrupt service function
47 *
48 * Revision History:
49 */
50#undef __NO_VERSION__
51
f805442e 52#include <linux/file.h>
5449c685 53#include "device.h"
5449c685 54#include "card.h"
79566eb2 55#include "channel.h"
5449c685 56#include "baseband.h"
5449c685 57#include "mac.h"
5449c685 58#include "power.h"
5449c685 59#include "rxtx.h"
5449c685 60#include "dpc.h"
5449c685 61#include "rf.h"
5449c685
FB		 62#include <linux/delay.h>
63#include <linux/kthread.h>
5a0e3ad6 64#include <linux/slab.h>
5449c685 65
5449c685 66/*--------------------- Static Definitions -------------------------*/
5449c685
FB		 67//
68// Define module options
69//
5449c685
FB		 70MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
71MODULE_LICENSE("GPL");
72MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
5449c685 73
915006cd 74#define DEVICE_PARAM(N, D)
5449c685
FB		 75
76#define RX_DESC_MIN0 16
77#define RX_DESC_MAX0 128
78#define RX_DESC_DEF0 32
915006cd 79DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
5449c685
FB		 80
81#define RX_DESC_MIN1 16
82#define RX_DESC_MAX1 128
83#define RX_DESC_DEF1 32
915006cd 84DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
5449c685
FB		 85
86#define TX_DESC_MIN0 16
87#define TX_DESC_MAX0 128
88#define TX_DESC_DEF0 32
915006cd 89DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
5449c685
FB		 90
91#define TX_DESC_MIN1 16
92#define TX_DESC_MAX1 128
93#define TX_DESC_DEF1 64
915006cd 94DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
5449c685 95
5449c685
FB		 96#define INT_WORKS_DEF 20
97#define INT_WORKS_MIN 10
98#define INT_WORKS_MAX 64
99
915006cd 100DEVICE_PARAM(int_works, "Number of packets per interrupt services");
5449c685 101
5449c685
FB		 102#define RTS_THRESH_DEF 2347
103
5449c685
FB		 104#define FRAG_THRESH_DEF 2346
105
5449c685
FB		 106#define SHORT_RETRY_MIN 0
107#define SHORT_RETRY_MAX 31
108#define SHORT_RETRY_DEF 8
109
5449c685
FB		 110DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
111
112#define LONG_RETRY_MIN 0
113#define LONG_RETRY_MAX 15
114#define LONG_RETRY_DEF 4
115
5449c685
FB		 116DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
117
5449c685
FB		 118/* BasebandType[] baseband type selected
119 0: indicate 802.11a type
120 1: indicate 802.11b type
121 2: indicate 802.11g type
122*/
123#define BBP_TYPE_MIN 0
124#define BBP_TYPE_MAX 2
125#define BBP_TYPE_DEF 2
126
127DEVICE_PARAM(BasebandType, "baseband type");
128
5449c685
FB		 129//
130// Static vars definitions
131//
915006cd
JP		 132static CHIP_INFO chip_info_table[] = {
133 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
134 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
135 {0, NULL}
5449c685
FB		 136};
137
9e4c5c28 138static const struct pci_device_id vt6655_pci_id_table[] = {
db6cb903
JL		 139 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
140 { 0, }
5449c685 141};
5449c685
FB		 142
143/*--------------------- Static Functions --------------------------*/
144
013a468c 145static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
3f8597f4
MP		 146static void vt6655_init_info(struct pci_dev *pcid,
147 struct vnt_private **ppDevice, PCHIP_INFO);
148static void device_free_info(struct vnt_private *pDevice);
149static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
150static void device_print_info(struct vnt_private *pDevice);
915006cd 151static irqreturn_t device_intr(int irq, void *dev_instance);
5449c685 152
5449c685
FB		 153#ifdef CONFIG_PM
154static int device_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
9e4c5c28 155static struct notifier_block device_notifier = {
34381c22
PH		 156 .notifier_call = device_notify_reboot,
157 .next = NULL,
158 .priority = 0,
5449c685
FB		 159};
160#endif
5449c685 161
3f8597f4
MP		 162static void device_init_rd0_ring(struct vnt_private *pDevice);
163static void device_init_rd1_ring(struct vnt_private *pDevice);
3f8597f4
MP		 164static void device_init_td0_ring(struct vnt_private *pDevice);
165static void device_init_td1_ring(struct vnt_private *pDevice);
5449c685 166
3f8597f4
MP		 167static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
168static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
169static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
170static void device_init_registers(struct vnt_private *pDevice);
171static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc);
172static void device_free_td0_ring(struct vnt_private *pDevice);
173static void device_free_td1_ring(struct vnt_private *pDevice);
174static void device_free_rd0_ring(struct vnt_private *pDevice);
175static void device_free_rd1_ring(struct vnt_private *pDevice);
176static void device_free_rings(struct vnt_private *pDevice);
5449c685 177
5449c685
FB		 178/*--------------------- Export Variables --------------------------*/
179
180/*--------------------- Export Functions --------------------------*/
181
915006cd 182static char *get_chip_name(int chip_id)
3ac9e0fd
DN		 183{
184 int i;
6b711271 185
3ac9e0fd
DN		 186 for (i = 0; chip_info_table[i].name != NULL; i++)
187 if (chip_info_table[i].chip_id == chip_id)
188 break;
189 return chip_info_table[i].name;
5449c685
FB		 190}
191
f4e1b7c8 192static void vt6655_remove(struct pci_dev *pcid)
5449c685 193{
3f8597f4 194 struct vnt_private *pDevice = pci_get_drvdata(pcid);
5449c685 195
3ac9e0fd
DN		 196 if (pDevice == NULL)
197 return;
198 device_free_info(pDevice);
5449c685
FB		 199}
200
46fa0ec0 201static void device_get_options(struct vnt_private *pDevice)
bf76ebd9
DN		 202{
203 POPTIONS pOpts = &(pDevice->sOpts);
204
205 pOpts->nRxDescs0 = RX_DESC_DEF0;
206 pOpts->nRxDescs1 = RX_DESC_DEF1;
207 pOpts->nTxDescs[0] = TX_DESC_DEF0;
208 pOpts->nTxDescs[1] = TX_DESC_DEF1;
bf76ebd9 209 pOpts->int_works = INT_WORKS_DEF;
bf76ebd9 210
bf76ebd9
DN		 211 pOpts->short_retry = SHORT_RETRY_DEF;
212 pOpts->long_retry = LONG_RETRY_DEF;
213 pOpts->bbp_type = BBP_TYPE_DEF;
5449c685
FB		 214}
215
216static void
3f8597f4
MP		 217device_set_options(struct vnt_private *pDevice)
218{
915006cd
JP		 219 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
220 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
915006cd 221 pDevice->byBBType = pDevice->sOpts.bbp_type;
bf8918de 222 pDevice->byPacketType = pDevice->byBBType;
5449c685 223 pDevice->byAutoFBCtrl = AUTO_FB_0;
915006cd 224 pDevice->bUpdateBBVGA = true;
915006cd
JP		 225 pDevice->byPreambleType = 0;
226
48caf5a0
JP		 227 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
228 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
229 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
230 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
48caf5a0 231 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
5449c685
FB		 232}
233
5449c685 234//
789d1aef 235// Initialisation of MAC & BBP registers
5449c685
FB		 236//
237
3f8597f4 238static void device_init_registers(struct vnt_private *pDevice)
5449c685 239{
10d6f1b7 240 unsigned long flags;
915006cd
JP		 241 unsigned int ii;
242 unsigned char byValue;
915006cd
JP		 243 unsigned char byCCKPwrdBm = 0;
244 unsigned char byOFDMPwrdBm = 0;
6b711271 245
915006cd 246 MACbShutdown(pDevice->PortOffset);
a5f0eef3 247 BBvSoftwareReset(pDevice);
915006cd 248
9f34de35
MP		 249 /* Do MACbSoftwareReset in MACvInitialize */
250 MACbSoftwareReset(pDevice->PortOffset);
915006cd 251
9f34de35 252 pDevice->bAES = false;
915006cd 253
9f34de35
MP		 254 /* Only used in 11g type, sync with ERP IE */
255 pDevice->bProtectMode = false;
915006cd 256
9f34de35
MP		 257 pDevice->bNonERPPresent = false;
258 pDevice->bBarkerPreambleMd = false;
259 pDevice->wCurrentRate = RATE_1M;
260 pDevice->byTopOFDMBasicRate = RATE_24M;
261 pDevice->byTopCCKBasicRate = RATE_1M;
915006cd 262
9f34de35
MP		 263 /* Target to IF pin while programming to RF chip. */
264 pDevice->byRevId = 0;
915006cd 265
9f34de35
MP		 266 /* init MAC */
267 MACvInitialize(pDevice->PortOffset);
268
269 /* Get Local ID */
270 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
915006cd 271
10d6f1b7 272 spin_lock_irqsave(&pDevice->lock, flags);
915006cd 273
9f34de35 274 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
915006cd 275
10d6f1b7 276 spin_unlock_irqrestore(&pDevice->lock, flags);
915006cd 277
9f34de35
MP		 278 /* Get Channel range */
279 pDevice->byMinChannel = 1;
280 pDevice->byMaxChannel = CB_MAX_CHANNEL;
915006cd 281
9f34de35
MP		 282 /* Get Antena */
283 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
284 if (byValue & EEP_ANTINV)
285 pDevice->bTxRxAntInv = true;
286 else
287 pDevice->bTxRxAntInv = false;
288
289 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
290 /* if not set default is All */
291 if (byValue == 0)
292 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
293
9f34de35
MP		 294 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
295 pDevice->byAntennaCount = 2;
296 pDevice->byTxAntennaMode = ANT_B;
297 pDevice->dwTxAntennaSel = 1;
298 pDevice->dwRxAntennaSel = 1;
299
300 if (pDevice->bTxRxAntInv)
301 pDevice->byRxAntennaMode = ANT_A;
915006cd 302 else
9f34de35 303 pDevice->byRxAntennaMode = ANT_B;
9f34de35 304 } else {
9f34de35
MP		 305 pDevice->byAntennaCount = 1;
306 pDevice->dwTxAntennaSel = 0;
307 pDevice->dwRxAntennaSel = 0;
915006cd 308
9f34de35
MP		 309 if (byValue & EEP_ANTENNA_AUX) {
310 pDevice->byTxAntennaMode = ANT_A;
915006cd 311
9f34de35
MP		 312 if (pDevice->bTxRxAntInv)
313 pDevice->byRxAntennaMode = ANT_B;
314 else
315 pDevice->byRxAntennaMode = ANT_A;
316 } else {
915006cd 317 pDevice->byTxAntennaMode = ANT_B;
9f34de35 318
1208f14a 319 if (pDevice->bTxRxAntInv)
915006cd
JP		 320 pDevice->byRxAntennaMode = ANT_A;
321 else
322 pDevice->byRxAntennaMode = ANT_B;
915006cd 323 }
9f34de35 324 }
5449c685 325
918185f6
MP		 326 /* Set initial antenna mode */
327 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
328 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
329
9f34de35
MP		 330 /* zonetype initial */
331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
915006cd 332
9f34de35
MP		 333 if (!pDevice->bZoneRegExist)
334 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
bc5cf656 335
48caf5a0 336 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
915006cd 337
9f34de35
MP		 338 /* Init RF module */
339 RFbInit(pDevice);
915006cd 340
9f34de35
MP		 341 /* Get Desire Power Value */
342 pDevice->byCurPwr = 0xFF;
343 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
344 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
f2046f93 345
9f34de35
MP		 346 /* Load power Table */
347 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
348 pDevice->abyCCKPwrTbl[ii + 1] =
349 SROMbyReadEmbedded(pDevice->PortOffset,
350 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
351 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
352 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
5449c685 353
9f34de35
MP		 354 pDevice->abyOFDMPwrTbl[ii + 1] =
355 SROMbyReadEmbedded(pDevice->PortOffset,
356 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
357 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
358 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
bc5cf656 359
9f34de35
MP		 360 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
361 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
362 }
bc5cf656 363
9f34de35 364 /* recover 12,13 ,14channel for EUROPE by 11 channel */
f4cf678f
MP		 365 for (ii = 11; ii < 14; ii++) {
366 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
367 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
9f34de35 368 }
5449c685 369
9f34de35
MP		 370 /* Load OFDM A Power Table */
371 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
372 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
373 SROMbyReadEmbedded(pDevice->PortOffset,
374 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
5449c685 375
9f34de35
MP		 376 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
377 SROMbyReadEmbedded(pDevice->PortOffset,
378 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
379 }
5449c685 380
9f34de35
MP		 381 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
382 MACvSelectPage1(pDevice->PortOffset);
5449c685 383
9f34de35
MP		 384 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
385 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
5449c685 386
9f34de35
MP		 387 MACvSelectPage0(pDevice->PortOffset);
388 }
5449c685 389
9f34de35
MP		 390 /* use relative tx timeout and 802.11i D4 */
391 MACvWordRegBitsOn(pDevice->PortOffset,
392 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
5449c685 393
9f34de35
MP		 394 /* set performance parameter by registry */
395 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
396 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
5449c685 397
9f34de35
MP		 398 /* reset TSF counter */
399 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
400 /* enable TSF counter */
401 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
5449c685 402
9f34de35
MP		 403 /* initialize BBP registers */
404 BBbVT3253Init(pDevice);
5449c685 405
9f34de35
MP		 406 if (pDevice->bUpdateBBVGA) {
407 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
408 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
409 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
410 }
5449c685 411
a5f0eef3
MP		 412 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
413 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
5449c685 414
9f34de35
MP		 415 /* Set BB and packet type at the same time. */
416 /* Set Short Slot Time, xIFS, and RSPINF. */
bfa4b0fe 417 pDevice->wCurrentRate = RATE_54M;
bc5cf656 418
9f34de35 419 pDevice->bRadioOff = false;
5449c685 420
9f34de35
MP		 421 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
422 EEP_OFS_RADIOCTL);
423 pDevice->bHWRadioOff = false;
5449c685 424
9f34de35
MP		 425 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
426 /* Get GPIO */
427 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
428
429 if (((pDevice->byGPIO & GPIO0_DATA) &&
430 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
431 (!(pDevice->byGPIO & GPIO0_DATA) &&
432 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
915006cd 433 pDevice->bHWRadioOff = true;
915006cd 434 }
9f34de35 435
bc5cf656 436 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
915006cd 437 CARDbRadioPowerOff(pDevice);
5449c685 438
3500a1da
MP		 439 /* get Permanent network address */
440 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
48caf5a0 441 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
915006cd 442
3500a1da
MP		 443 /* reset Tx pointer */
444 CARDvSafeResetRx(pDevice);
445 /* reset Rx pointer */
446 CARDvSafeResetTx(pDevice);
5449c685 447
3500a1da
MP		 448 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
449 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
5449c685 450
3500a1da
MP		 451 /* Turn On Rx DMA */
452 MACvReceive0(pDevice->PortOffset);
453 MACvReceive1(pDevice->PortOffset);
5449c685 454
3500a1da
MP		 455 /* start the adapter */
456 MACvStart(pDevice->PortOffset);
5449c685
FB		 457}
458
3f8597f4 459static void device_print_info(struct vnt_private *pDevice)
5449c685 460{
bc5d431c 461 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
5449c685 462
bc5d431c
MP		 463 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
464 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
465 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
5449c685
FB		 466}
467
3f8597f4
MP		 468static void vt6655_init_info(struct pci_dev *pcid,
469 struct vnt_private **ppDevice,
470 PCHIP_INFO pChip_info)
471{
1bd63757 472 memset(*ppDevice, 0, sizeof(**ppDevice));
5449c685 473
915006cd
JP		 474 (*ppDevice)->pcid = pcid;
475 (*ppDevice)->chip_id = pChip_info->chip_id;
476 (*ppDevice)->io_size = pChip_info->io_size;
477 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
478 (*ppDevice)->multicast_limit = 32;
5449c685 479
915006cd 480 spin_lock_init(&((*ppDevice)->lock));
5449c685
FB		 481}
482
3f8597f4
MP		 483static bool device_get_pci_info(struct vnt_private *pDevice,
484 struct pci_dev *pcid)
84b50762 485{
915006cd
JP		 486 u16 pci_cmd;
487 u8 b;
488 unsigned int cis_addr;
5449c685 489
915006cd
JP		 490 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
491 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
492 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
493 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
5449c685 494
915006cd 495 pci_set_master(pcid);
5449c685 496
915006cd
JP		 497 pDevice->memaddr = pci_resource_start(pcid, 0);
498 pDevice->ioaddr = pci_resource_start(pcid, 1);
5449c685 499
915006cd 500 cis_addr = pci_resource_start(pcid, 2);
5449c685 501
915006cd 502 pDevice->pcid = pcid;
5449c685 503
915006cd
JP		 504 pci_read_config_byte(pcid, PCI_COMMAND, &b);
505 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
5449c685 506
915006cd 507 return true;
5449c685
FB		 508}
509
3f8597f4 510static void device_free_info(struct vnt_private *pDevice)
84b50762 511{
14e53006
MP		 512 if (!pDevice)
513 return;
5449c685 514
14e53006
MP		 515 if (pDevice->mac_hw)
516 ieee80211_unregister_hw(pDevice->hw);
5449c685 517
915006cd 518 if (pDevice->PortOffset)
16834405 519 iounmap(pDevice->PortOffset);
5449c685 520
915006cd
JP		 521 if (pDevice->pcid)
522 pci_release_regions(pDevice->pcid);
14e53006
MP		 523
524 if (pDevice->hw)
525 ieee80211_free_hw(pDevice->hw);
5449c685 526}
5449c685 527
3f8597f4 528static bool device_init_rings(struct vnt_private *pDevice)
84b50762 529{
915006cd 530 void *vir_pool;
5449c685 531
915006cd 532 /*allocate all RD/TD rings a single pool*/
8b983be5
JP		 533 vir_pool = pci_zalloc_consistent(pDevice->pcid,
534 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
535 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
536 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
537 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
538 &pDevice->pool_dma);
915006cd 539 if (vir_pool == NULL) {
42f709ef 540 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
915006cd
JP		 541 return false;
542 }
5449c685 543
915006cd
JP		 544 pDevice->aRD0Ring = vir_pool;
545 pDevice->aRD1Ring = vir_pool +
546 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
547
915006cd
JP		 548 pDevice->rd0_pool_dma = pDevice->pool_dma;
549 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
550 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
551
8b983be5
JP		 552 pDevice->tx0_bufs = pci_zalloc_consistent(pDevice->pcid,
553 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
554 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
555 CB_BEACON_BUF_SIZE +
556 CB_MAX_BUF_SIZE,
557 &pDevice->tx_bufs_dma0);
915006cd 558 if (pDevice->tx0_bufs == NULL) {
42f709ef
MP		 559 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
560
915006cd
JP		 561 pci_free_consistent(pDevice->pcid,
562 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
563 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
564 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
565 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
566 vir_pool, pDevice->pool_dma
567 );
568 return false;
569 }
5449c685 570
915006cd
JP		 571 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
572 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 573
915006cd
JP		 574 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
575 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 576
915006cd
JP		 577 // vir_pool: pvoid type
578 pDevice->apTD0Rings = vir_pool
579 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
580 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
5449c685 581
915006cd
JP		 582 pDevice->apTD1Rings = vir_pool
583 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
584 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
585 + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
5449c685 586
915006cd
JP		 587 pDevice->tx1_bufs = pDevice->tx0_bufs +
588 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 589
915006cd
JP		 590 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
591 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 592
915006cd
JP		 593 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
594 CB_BEACON_BUF_SIZE;
5449c685 595
915006cd
JP		 596 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
597 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
5449c685 598
915006cd
JP		 599 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
600 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
5449c685 601
915006cd 602 return true;
5449c685
FB		 603}
604
3f8597f4 605static void device_free_rings(struct vnt_private *pDevice)
84b50762 606{
915006cd
JP		 607 pci_free_consistent(pDevice->pcid,
608 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
609 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
610 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
611 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc)
612 ,
613 pDevice->aRD0Ring, pDevice->pool_dma
614 );
615
616 if (pDevice->tx0_bufs)
617 pci_free_consistent(pDevice->pcid,
618 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
619 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
620 CB_BEACON_BUF_SIZE +
621 CB_MAX_BUF_SIZE,
622 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
623 );
5449c685
FB		 624}
625
3f8597f4 626static void device_init_rd0_ring(struct vnt_private *pDevice)
84b50762 627{
915006cd
JP		 628 int i;
629 dma_addr_t curr = pDevice->rd0_pool_dma;
630 PSRxDesc pDesc;
631
632 /* Init the RD0 ring entries */
633 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
634 pDesc = &(pDevice->aRD0Ring[i]);
635 pDesc->pRDInfo = alloc_rd_info();
636 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 637 if (!device_alloc_rx_buf(pDevice, pDesc))
638 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
639
915006cd
JP		 640 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
641 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
642 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
643 }
644
645 if (i > 0)
646 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
647 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
5449c685
FB		 648}
649
3f8597f4 650static void device_init_rd1_ring(struct vnt_private *pDevice)
84b50762 651{
915006cd
JP		 652 int i;
653 dma_addr_t curr = pDevice->rd1_pool_dma;
654 PSRxDesc pDesc;
655
656 /* Init the RD1 ring entries */
657 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
658 pDesc = &(pDevice->aRD1Ring[i]);
659 pDesc->pRDInfo = alloc_rd_info();
660 ASSERT(pDesc->pRDInfo);
42f709ef
MP		 661 if (!device_alloc_rx_buf(pDevice, pDesc))
662 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
663
915006cd
JP		 664 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
665 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
666 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
667 }
668
669 if (i > 0)
670 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
671 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
5449c685
FB		 672}
673
3f8597f4 674static void device_free_rd0_ring(struct vnt_private *pDevice)
84b50762 675{
915006cd 676 int i;
5449c685 677
915006cd
JP		 678 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
679 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
680 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 681
915006cd
JP		 682 pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
683 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
5449c685 684
915006cd 685 dev_kfree_skb(pRDInfo->skb);
5449c685 686
61d566a5 687 kfree(pDesc->pRDInfo);
915006cd 688 }
5449c685
FB		 689}
690
3f8597f4 691static void device_free_rd1_ring(struct vnt_private *pDevice)
84b50762 692{
915006cd 693 int i;
5449c685 694
915006cd
JP		 695 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
696 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
697 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
5449c685 698
915006cd
JP		 699 pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
700 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
5449c685 701
915006cd 702 dev_kfree_skb(pRDInfo->skb);
5449c685 703
61d566a5 704 kfree(pDesc->pRDInfo);
915006cd 705 }
5449c685
FB		 706}
707
3f8597f4 708static void device_init_td0_ring(struct vnt_private *pDevice)
84b50762 709{
915006cd
JP		 710 int i;
711 dma_addr_t curr;
712 PSTxDesc pDesc;
713
714 curr = pDevice->td0_pool_dma;
715 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) {
716 pDesc = &(pDevice->apTD0Rings[i]);
717 pDesc->pTDInfo = alloc_td_info();
718 ASSERT(pDesc->pTDInfo);
719 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
720 pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
721 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
722 }
723 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
724 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
725 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
726 }
727
728 if (i > 0)
729 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
730 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
5449c685
FB		 731}
732
3f8597f4 733static void device_init_td1_ring(struct vnt_private *pDevice)
84b50762 734{
915006cd
JP		 735 int i;
736 dma_addr_t curr;
737 PSTxDesc pDesc;
738
739 /* Init the TD ring entries */
740 curr = pDevice->td1_pool_dma;
741 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) {
742 pDesc = &(pDevice->apTD1Rings[i]);
743 pDesc->pTDInfo = alloc_td_info();
744 ASSERT(pDesc->pTDInfo);
745 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
746 pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
747 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
748 }
749 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
750 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
751 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
752 }
753
754 if (i > 0)
755 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
756 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
5449c685
FB		 757}
758
3f8597f4 759static void device_free_td0_ring(struct vnt_private *pDevice)
84b50762 760{
915006cd 761 int i;
6b711271 762
915006cd
JP		 763 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
764 PSTxDesc pDesc = &(pDevice->apTD0Rings[i]);
765 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 766
915006cd
JP		 767 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
768 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
769 pTDInfo->skb->len, PCI_DMA_TODEVICE);
5449c685 770
915006cd
JP		 771 if (pTDInfo->skb)
772 dev_kfree_skb(pTDInfo->skb);
5449c685 773
61d566a5 774 kfree(pDesc->pTDInfo);
915006cd 775 }
5449c685
FB		 776}
777
3f8597f4 778static void device_free_td1_ring(struct vnt_private *pDevice)
84b50762 779{
915006cd 780 int i;
5449c685 781
915006cd
JP		 782 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
783 PSTxDesc pDesc = &(pDevice->apTD1Rings[i]);
784 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
5449c685 785
915006cd
JP		 786 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
787 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
788 pTDInfo->skb->len, PCI_DMA_TODEVICE);
5449c685 789
915006cd
JP		 790 if (pTDInfo->skb)
791 dev_kfree_skb(pTDInfo->skb);
5449c685 792
61d566a5 793 kfree(pDesc->pTDInfo);
915006cd 794 }
5449c685
FB		 795}
796
5449c685
FB		 797/*-----------------------------------------------------------------*/
798
3f8597f4 799static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 800{
915006cd
JP		 801 PSRxDesc pRD;
802 int works = 0;
5449c685 803
915006cd
JP		 804 for (pRD = pDevice->pCurrRD[uIdx];
805 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
806 pRD = pRD->next) {
915006cd
JP		 807 if (works++ > 15)
808 break;
33b1c8c1 809 if (vnt_receive_frame(pDevice, pRD)) {
915006cd 810 if (!device_alloc_rx_buf(pDevice, pRD)) {
42f709ef
MP		 811 dev_err(&pDevice->pcid->dev,
812 "can not allocate rx buf\n");
915006cd
JP		 813 break;
814 }
815 }
816 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
915006cd
JP		 817 }
818
819 pDevice->pCurrRD[uIdx] = pRD;
820
821 return works;
5449c685
FB		 822}
823
3f8597f4 824static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
84b50762 825{
915006cd 826 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
5449c685 827
915006cd 828 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
915006cd
JP		 829 if (pRDInfo->skb == NULL)
830 return false;
831 ASSERT(pRDInfo->skb);
33b1c8c1
MP		 832
833 pRDInfo->skb_dma =
834 pci_map_single(pDevice->pcid,
835 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
836 pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
837
915006cd
JP		 838 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
839
840 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
841 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
842 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
843 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
844
845 return true;
5449c685
FB		 846}
847
59918bea
MP		 848static const u8 fallback_rate0[5][5] = {
849 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
850 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
851 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
852 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
853 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
854};
855
856static const u8 fallback_rate1[5][5] = {
857 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
858 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
859 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
860 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
861 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
862};
863
864static int vnt_int_report_rate(struct vnt_private *priv,
865 PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1)
866{
867 struct vnt_tx_fifo_head *fifo_head;
868 struct ieee80211_tx_info *info;
869 struct ieee80211_rate *rate;
870 u16 fb_option;
871 u8 tx_retry = (tsr0 & TSR0_NCR);
872 s8 idx;
873
874 if (!context)
875 return -ENOMEM;
876
877 if (!context->skb)
878 return -EINVAL;
879
880 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
881 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
882 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
883
884 info = IEEE80211_SKB_CB(context->skb);
885 idx = info->control.rates[0].idx;
886
887 if (fb_option && !(tsr1 & TSR1_TERR)) {
888 u8 tx_rate;
889 u8 retry = tx_retry;
890
891 rate = ieee80211_get_tx_rate(priv->hw, info);
892 tx_rate = rate->hw_value - RATE_18M;
893
894 if (retry > 4)
895 retry = 4;
896
897 if (fb_option & FIFOCTL_AUTO_FB_0)
898 tx_rate = fallback_rate0[tx_rate][retry];
899 else if (fb_option & FIFOCTL_AUTO_FB_1)
900 tx_rate = fallback_rate1[tx_rate][retry];
901
902 if (info->band == IEEE80211_BAND_5GHZ)
903 idx = tx_rate - RATE_6M;
904 else
905 idx = tx_rate;
906 }
907
908 ieee80211_tx_info_clear_status(info);
909
910 info->status.rates[0].count = tx_retry;
911
912 if (!(tsr1 & TSR1_TERR)) {
913 info->status.rates[0].idx = idx;
914 info->flags |= IEEE80211_TX_STAT_ACK;
915 }
916
917 return 0;
918}
919
3f8597f4 920static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
84b50762 921{
915006cd 922 PSTxDesc pTD;
915006cd
JP		 923 int works = 0;
924 unsigned char byTsr0;
925 unsigned char byTsr1;
915006cd 926
915006cd 927 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
915006cd
JP		 928 if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC)
929 break;
930 if (works++ > 15)
931 break;
932
933 byTsr0 = pTD->m_td0TD0.byTSR0;
934 byTsr1 = pTD->m_td0TD0.byTSR1;
935
936 //Only the status of first TD in the chain is correct
937 if (pTD->m_td1TD1.byTCR & TCR_STP) {
915006cd 938 if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
59918bea
MP		 939
940 vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1);
915006cd
JP		 941
942 if (!(byTsr1 & TSR1_TERR)) {
943 if (byTsr0 != 0) {
48caf5a0
JP		 944 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
945 (int)uIdx, byTsr1,
946 byTsr0);
915006cd 947 }
5e0cc8a2 948 } else {
48caf5a0
JP		 949 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
950 (int)uIdx, byTsr1, byTsr0);
915006cd
JP		 951 }
952 }
953
954 if (byTsr1 & TSR1_TERR) {
955 if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) {
48caf5a0
JP		 956 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
957 (int)uIdx, byTsr1, byTsr0);
915006cd 958 }
915006cd
JP		 959 }
960 device_free_tx_buf(pDevice, pTD);
961 pDevice->iTDUsed[uIdx]--;
915006cd 962 }
915006cd
JP		 963 }
964
915006cd
JP		 965 pDevice->apTailTD[uIdx] = pTD;
966
967 return works;
5449c685
FB		 968}
969
3f8597f4 970static void device_error(struct vnt_private *pDevice, unsigned short status)
84b50762 971{
915006cd 972 if (status & ISR_FETALERR) {
42f709ef
MP		 973 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
974
915006cd
JP		 975 MACbShutdown(pDevice->PortOffset);
976 return;
977 }
5449c685
FB		 978}
979
3f8597f4 980static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc)
84b50762 981{
915006cd
JP		 982 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
983 struct sk_buff *skb = pTDInfo->skb;
5449c685 984
915006cd
JP		 985 // pre-allocated buf_dma can't be unmapped.
986 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
987 pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma, skb->len,
988 PCI_DMA_TODEVICE);
989 }
5449c685 990
59918bea
MP		 991 if (pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
992 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
993 else
915006cd 994 dev_kfree_skb_irq(skb);
5449c685 995
915006cd 996 pTDInfo->skb_dma = 0;
70ae543b 997 pTDInfo->skb = NULL;
915006cd 998 pTDInfo->byFlags = 0;
5449c685
FB		 999}
1000
64e4fd51
MP		 1001static void vnt_check_bb_vga(struct vnt_private *priv)
1002{
1003 long dbm;
1004 int i;
1005
1006 if (!priv->bUpdateBBVGA)
1007 return;
1008
1009 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1010 return;
1011
1012 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
1013 return;
1014
1015 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
1016
1017 for (i = 0; i < BB_VGA_LEVEL; i++) {
1018 if (dbm < priv->ldBmThreshold[i]) {
1019 priv->byBBVGANew = priv->abyBBVGA[i];
1020 break;
1021 }
1022 }
1023
1024 if (priv->byBBVGANew == priv->byBBVGACurrent) {
1025 priv->uBBVGADiffCount = 1;
1026 return;
1027 }
1028
1029 priv->uBBVGADiffCount++;
1030
1031 if (priv->uBBVGADiffCount == 1) {
1032 /* first VGA diff gain */
1033 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1034
1035 dev_dbg(&priv->pcid->dev,
1036 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1037 (int)dbm, priv->byBBVGANew,
1038 priv->byBBVGACurrent,
1039 (int)priv->uBBVGADiffCount);
1040 }
1041
1042 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1043 dev_dbg(&priv->pcid->dev,
1044 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1045 (int)dbm, priv->byBBVGANew,
1046 priv->byBBVGACurrent,
1047 (int)priv->uBBVGADiffCount);
1048
1049 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1050 }
1051}
1052
84b50762
GC		 1053static irqreturn_t device_intr(int irq, void *dev_instance)
1054{
e70abceb 1055 struct vnt_private *pDevice = dev_instance;
915006cd
JP		 1056 int max_count = 0;
1057 unsigned long dwMIBCounter = 0;
915006cd
JP		 1058 unsigned char byOrgPageSel = 0;
1059 int handled = 0;
6cff1f6a 1060 unsigned long flags;
915006cd 1061
915006cd
JP		 1062 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1063
1064 if (pDevice->dwIsr == 0)
1065 return IRQ_RETVAL(handled);
1066
1067 if (pDevice->dwIsr == 0xffffffff) {
48caf5a0 1068 pr_debug("dwIsr = 0xffff\n");
915006cd
JP		 1069 return IRQ_RETVAL(handled);
1070 }
915006cd
JP		 1071
1072 handled = 1;
1073 MACvIntDisable(pDevice->PortOffset);
6cff1f6a
MP		 1074
1075 spin_lock_irqsave(&pDevice->lock, flags);
915006cd
JP		 1076
1077 //Make sure current page is 0
1078 VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
bc5cf656 1079 if (byOrgPageSel == 1)
915006cd 1080 MACvSelectPage0(pDevice->PortOffset);
bc5cf656 1081 else
915006cd
JP		 1082 byOrgPageSel = 0;
1083
1084 MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
1085 // TBD....
1086 // Must do this after doing rx/tx, cause ISR bit is slow
1087 // than RD/TD write back
1088 // update ISR counter
2a0a7b3d 1089 STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
915006cd 1090 while (pDevice->dwIsr != 0) {
915006cd
JP		 1091 STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
1092 MACvWriteISR(pDevice->PortOffset, pDevice->dwIsr);
1093
1094 if (pDevice->dwIsr & ISR_FETALERR) {
48caf5a0 1095 pr_debug(" ISR_FETALERR\n");
915006cd
JP		 1096 VNSvOutPortB(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1097 VNSvOutPortW(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1098 device_error(pDevice, pDevice->dwIsr);
1099 }
1100
915006cd 1101 if (pDevice->dwIsr & ISR_TBTT) {
59918bea 1102 if (pDevice->vif &&
64e4fd51
MP		 1103 pDevice->op_mode != NL80211_IFTYPE_ADHOC)
1104 vnt_check_bb_vga(pDevice);
915006cd
JP		 1105
1106 pDevice->bBeaconSent = false;
bc5cf656 1107 if (pDevice->bEnablePSMode)
915006cd 1108 PSbIsNextTBTTWakeUp((void *)pDevice);
915006cd 1109
e70abceb
MP		 1110 if ((pDevice->op_mode == NL80211_IFTYPE_AP ||
1111 pDevice->op_mode == NL80211_IFTYPE_ADHOC) &&
1112 pDevice->vif->bss_conf.enable_beacon) {
915006cd 1113 MACvOneShotTimer1MicroSec(pDevice->PortOffset,
e70abceb 1114 (pDevice->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
915006cd
JP		 1115 }
1116
4e8a7e5f 1117 /* TODO: adhoc PS mode */
915006cd
JP		 1118
1119 }
1120
1121 if (pDevice->dwIsr & ISR_BNTX) {
a9873673 1122 if (pDevice->op_mode == NL80211_IFTYPE_ADHOC) {
915006cd
JP		 1123 pDevice->bIsBeaconBufReadySet = false;
1124 pDevice->cbBeaconBufReadySetCnt = 0;
1125 }
1126
915006cd 1127 pDevice->bBeaconSent = true;
915006cd
JP		 1128 }
1129
bc5cf656 1130 if (pDevice->dwIsr & ISR_RXDMA0)
915006cd 1131 max_count += device_rx_srv(pDevice, TYPE_RXDMA0);
bc5cf656
GM		 1132
1133 if (pDevice->dwIsr & ISR_RXDMA1)
915006cd 1134 max_count += device_rx_srv(pDevice, TYPE_RXDMA1);
bc5cf656
GM		 1135
1136 if (pDevice->dwIsr & ISR_TXDMA0)
915006cd 1137 max_count += device_tx_srv(pDevice, TYPE_TXDMA0);
bc5cf656
GM		 1138
1139 if (pDevice->dwIsr & ISR_AC0DMA)
915006cd 1140 max_count += device_tx_srv(pDevice, TYPE_AC0DMA);
bc5cf656 1141
915006cd 1142 if (pDevice->dwIsr & ISR_SOFTTIMER1) {
e70abceb
MP		 1143 if (pDevice->vif) {
1144 if (pDevice->vif->bss_conf.enable_beacon)
1145 vnt_beacon_make(pDevice, pDevice->vif);
915006cd 1146 }
915006cd
JP		 1147 }
1148
54fbb2da
MP		 1149 /* If both buffers available wake the queue */
1150 if (pDevice->vif) {
1151 if (AVAIL_TD(pDevice, TYPE_TXDMA0) &&
1152 AVAIL_TD(pDevice, TYPE_AC0DMA) &&
1153 ieee80211_queue_stopped(pDevice->hw, 0))
1154 ieee80211_wake_queues(pDevice->hw);
1155 }
1156
915006cd
JP		 1157 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1158
1159 MACvReceive0(pDevice->PortOffset);
1160 MACvReceive1(pDevice->PortOffset);
1161
1162 if (max_count > pDevice->sOpts.int_works)
1163 break;
1164 }
1165
bc5cf656 1166 if (byOrgPageSel == 1)
915006cd 1167 MACvSelectPage1(pDevice->PortOffset);
915006cd 1168
6cff1f6a
MP		 1169 spin_unlock_irqrestore(&pDevice->lock, flags);
1170
915006cd
JP		 1171 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
1172
1173 return IRQ_RETVAL(handled);
5449c685 1174}
915006cd 1175
67013f2c
MP		 1176static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1177{
1178 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1179 PSTxDesc head_td;
c3125305 1180 u32 dma_idx;
67013f2c
MP		 1181 unsigned long flags;
1182
1183 spin_lock_irqsave(&priv->lock, flags);
1184
c3125305
MP		 1185 if (ieee80211_is_data(hdr->frame_control))
1186 dma_idx = TYPE_AC0DMA;
1187 else
67013f2c
MP		 1188 dma_idx = TYPE_TXDMA0;
1189
1190 if (AVAIL_TD(priv, dma_idx) < 1) {
1191 spin_unlock_irqrestore(&priv->lock, flags);
1192 return -ENOMEM;
1193 }
1194
1195 head_td = priv->apCurrTD[dma_idx];
1196
b5745290 1197 head_td->m_td1TD1.byTCR = 0;
67013f2c
MP		 1198
1199 head_td->pTDInfo->skb = skb;
1200
c3125305
MP		 1201 if (dma_idx == TYPE_AC0DMA)
1202 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1203
67013f2c
MP		 1204 priv->iTDUsed[dma_idx]++;
1205
1206 /* Take ownership */
1207 wmb();
1208 head_td->m_td0TD0.f1Owner = OWNED_BY_NIC;
1209
1210 /* get Next */
1211 wmb();
1212 priv->apCurrTD[dma_idx] = head_td->next;
1213
1214 spin_unlock_irqrestore(&priv->lock, flags);
1215
1216 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1217
1218 if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS))
1219 MACbPSWakeup(priv->PortOffset);
1220
1221 spin_lock_irqsave(&priv->lock, flags);
1222
1223 priv->bPWBitOn = false;
1224
b5745290
MP		 1225 /* Set TSR1 & ReqCount in TxDescHead */
1226 head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU);
1227 head_td->m_td1TD1.wReqCount =
1228 cpu_to_le16((u16)head_td->pTDInfo->dwReqCount);
1229
187e2a81
MP		 1230 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma);
1231
c3125305 1232 if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
67013f2c 1233 MACvTransmitAC0(priv->PortOffset);
c3125305 1234 else
67013f2c
MP		 1235 MACvTransmit0(priv->PortOffset);
1236
1237 spin_unlock_irqrestore(&priv->lock, flags);
1238
1239 return 0;
1240}
1241
1242static void vnt_tx_80211(struct ieee80211_hw *hw,
1243 struct ieee80211_tx_control *control,
1244 struct sk_buff *skb)
1245{
1246 struct vnt_private *priv = hw->priv;
1247
1248 ieee80211_stop_queues(hw);
1249
1250 if (vnt_tx_packet(priv, skb)) {
1251 ieee80211_free_txskb(hw, skb);
1252
1253 ieee80211_wake_queues(hw);
1254 }
1255}
1256
1257static int vnt_start(struct ieee80211_hw *hw)
1258{
1259 struct vnt_private *priv = hw->priv;
1260 int ret;
1261
1262 priv->rx_buf_sz = PKT_BUF_SZ;
1263 if (!device_init_rings(priv))
1264 return -ENOMEM;
1265
1266 ret = request_irq(priv->pcid->irq, &device_intr,
1267 IRQF_SHARED, "vt6655", priv);
1268 if (ret) {
1269 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1270 return ret;
1271 }
1272
1273 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1274 device_init_rd0_ring(priv);
1275 device_init_rd1_ring(priv);
67013f2c
MP		 1276 device_init_td0_ring(priv);
1277 device_init_td1_ring(priv);
1278
1279 device_init_registers(priv);
1280
1281 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1282 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1283
1284 ieee80211_wake_queues(hw);
1285
1286 return 0;
1287}
1288
1289static void vnt_stop(struct ieee80211_hw *hw)
1290{
1291 struct vnt_private *priv = hw->priv;
1292
1293 ieee80211_stop_queues(hw);
1294
1295 MACbShutdown(priv->PortOffset);
1296 MACbSoftwareReset(priv->PortOffset);
1297 CARDbRadioPowerOff(priv);
1298
1299 device_free_td0_ring(priv);
1300 device_free_td1_ring(priv);
1301 device_free_rd0_ring(priv);
1302 device_free_rd1_ring(priv);
67013f2c
MP		 1303 device_free_rings(priv);
1304
1305 free_irq(priv->pcid->irq, priv);
1306}
1307
1308static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1309{
1310 struct vnt_private *priv = hw->priv;
1311
1312 priv->vif = vif;
1313
1314 switch (vif->type) {
1315 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1316 break;
1317 case NL80211_IFTYPE_ADHOC:
1318 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1319
1320 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1321
1322 break;
1323 case NL80211_IFTYPE_AP:
1324 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1325
1326 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1327
1328 break;
1329 default:
1330 return -EOPNOTSUPP;
1331 }
1332
1333 priv->op_mode = vif->type;
1334
1335 return 0;
1336}
1337
1338static void vnt_remove_interface(struct ieee80211_hw *hw,
1339 struct ieee80211_vif *vif)
1340{
1341 struct vnt_private *priv = hw->priv;
1342
1343 switch (vif->type) {
1344 case NL80211_IFTYPE_STATION:
67013f2c
MP		 1345 break;
1346 case NL80211_IFTYPE_ADHOC:
1347 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1348 MACvRegBitsOff(priv->PortOffset,
1349 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1350 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1351 break;
1352 case NL80211_IFTYPE_AP:
1353 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1354 MACvRegBitsOff(priv->PortOffset,
1355 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1356 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1357 break;
1358 default:
1359 break;
1360 }
1361
1362 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1363}
1364
1365
1366static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1367{
1368 struct vnt_private *priv = hw->priv;
1369 struct ieee80211_conf *conf = &hw->conf;
1370 u8 bb_type;
1371
1372 if (changed & IEEE80211_CONF_CHANGE_PS) {
1373 if (conf->flags & IEEE80211_CONF_PS)
1374 PSvEnablePowerSaving(priv, conf->listen_interval);
1375 else
1376 PSvDisablePowerSaving(priv);
1377 }
1378
1379 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1380 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
d7a4cfa8 1381 set_channel(priv, conf->chandef.chan);
67013f2c
MP		 1382
1383 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1384 bb_type = BB_TYPE_11A;
1385 else
1386 bb_type = BB_TYPE_11G;
1387
1388 if (priv->byBBType != bb_type) {
1389 priv->byBBType = bb_type;
1390
bfb6c863 1391 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1392 }
1393 }
1394
1395 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1396 if (priv->byBBType == BB_TYPE_11B)
1397 priv->wCurrentRate = RATE_1M;
1398 else
1399 priv->wCurrentRate = RATE_54M;
1400
1401 RFbSetPower(priv, priv->wCurrentRate,
1402 conf->chandef.chan->hw_value);
1403 }
1404
1405 return 0;
1406}
1407
1408static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1409 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1410 u32 changed)
1411{
1412 struct vnt_private *priv = hw->priv;
1413
1414 priv->current_aid = conf->aid;
1415
1416 if (changed & BSS_CHANGED_BSSID)
1417 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1418
1419 if (changed & BSS_CHANGED_BASIC_RATES) {
1420 priv->basic_rates = conf->basic_rates;
1421
1422 CARDvUpdateBasicTopRate(priv);
1423
1424 dev_dbg(&priv->pcid->dev,
1425 "basic rates %x\n", conf->basic_rates);
1426 }
1427
1428 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1429 if (conf->use_short_preamble) {
1430 MACvEnableBarkerPreambleMd(priv->PortOffset);
1431 priv->byPreambleType = true;
1432 } else {
1433 MACvDisableBarkerPreambleMd(priv->PortOffset);
1434 priv->byPreambleType = false;
1435 }
1436 }
1437
1438 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1439 if (conf->use_cts_prot)
1440 MACvEnableProtectMD(priv->PortOffset);
1441 else
1442 MACvDisableProtectMD(priv->PortOffset);
1443 }
1444
1445 if (changed & BSS_CHANGED_ERP_SLOT) {
1446 if (conf->use_short_slot)
1447 priv->bShortSlotTime = true;
1448 else
1449 priv->bShortSlotTime = false;
1450
bfb6c863 1451 CARDbSetPhyParameter(priv, priv->byBBType);
67013f2c
MP		 1452 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1453 }
1454
1455 if (changed & BSS_CHANGED_TXPOWER)
1456 RFbSetPower(priv, priv->wCurrentRate,
1457 conf->chandef.chan->hw_value);
1458
1459 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1460 dev_dbg(&priv->pcid->dev,
1461 "Beacon enable %d\n", conf->enable_beacon);
1462
1463 if (conf->enable_beacon) {
1464 vnt_beacon_enable(priv, vif, conf);
1465
84c00afe
MK		 1466 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1467 TCR_AUTOBCNTX);
67013f2c 1468 } else {
84c00afe
MK		 1469 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1470 TCR_AUTOBCNTX);
67013f2c
MP		 1471 }
1472 }
1473
1474 if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {
1475 if (conf->assoc) {
1476 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1477 conf->sync_device_ts, conf->sync_tsf);
1478
1479 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1480
738487ff 1481 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
c7b14ea0
MP		 1482 } else {
1483 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1484 TFTCTL_TSFCNTRST);
1485 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1486 TFTCTL_TSFCNTREN);
67013f2c
MP		 1487 }
1488 }
1489}
1490
1491static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1492 struct netdev_hw_addr_list *mc_list)
1493{
1494 struct vnt_private *priv = hw->priv;
1495 struct netdev_hw_addr *ha;
1496 u64 mc_filter = 0;
1497 u32 bit_nr = 0;
1498
1499 netdev_hw_addr_list_for_each(ha, mc_list) {
1500 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1501
1502 mc_filter |= 1ULL << (bit_nr & 0x3f);
1503 }
1504
1505 priv->mc_list_count = mc_list->count;
1506
1507 return mc_filter;
1508}
1509
1510static void vnt_configure(struct ieee80211_hw *hw,
1511 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1512{
1513 struct vnt_private *priv = hw->priv;
1514 u8 rx_mode = 0;
1515
1516 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_PROMISC_IN_BSS |
1517 FIF_BCN_PRBRESP_PROMISC;
1518
1519 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1520
1521 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1522
1523 if (changed_flags & FIF_PROMISC_IN_BSS) {
1524 /* unconditionally log net taps */
1525 if (*total_flags & FIF_PROMISC_IN_BSS)
1526 rx_mode |= RCR_UNICAST;
1527 else
1528 rx_mode &= ~RCR_UNICAST;
1529 }
1530
1531 if (changed_flags & FIF_ALLMULTI) {
1532 if (*total_flags & FIF_ALLMULTI) {
95775d12
MP		 1533 unsigned long flags;
1534
1535 spin_lock_irqsave(&priv->lock, flags);
1536
67013f2c
MP		 1537 if (priv->mc_list_count > 2) {
1538 MACvSelectPage1(priv->PortOffset);
1539
1540 VNSvOutPortD(priv->PortOffset +
1541 MAC_REG_MAR0, 0xffffffff);
1542 VNSvOutPortD(priv->PortOffset +
1543 MAC_REG_MAR0 + 4, 0xffffffff);
1544
1545 MACvSelectPage0(priv->PortOffset);
1546 } else {
1547 MACvSelectPage1(priv->PortOffset);
1548
1549 VNSvOutPortD(priv->PortOffset +
1550 MAC_REG_MAR0, (u32)multicast);
1551 VNSvOutPortD(priv->PortOffset +
1552 MAC_REG_MAR0 + 4,
1553 (u32)(multicast >> 32));
1554
1555 MACvSelectPage0(priv->PortOffset);
1556 }
1557
95775d12
MP		 1558 spin_unlock_irqrestore(&priv->lock, flags);
1559
67013f2c
MP		 1560 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1561 } else {
1562 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1563 }
1564 }
1565
1566 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1567 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1568
1569 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1570 rx_mode &= ~RCR_BSSID;
1571 else
1572 rx_mode |= RCR_BSSID;
1573 }
1574
1575 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1576
1577 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1578}
1579
1580static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1581 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1582 struct ieee80211_key_conf *key)
1583{
1584 struct vnt_private *priv = hw->priv;
1585
1586 switch (cmd) {
1587 case SET_KEY:
1588 if (vnt_set_keys(hw, sta, vif, key))
1589 return -EOPNOTSUPP;
1590 break;
1591 case DISABLE_KEY:
1592 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1593 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1594 default:
1595 break;
1596 }
1597
1598 return 0;
1599}
1600
1601static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1602{
1603 struct vnt_private *priv = hw->priv;
1604 u64 tsf;
1605
738487ff 1606 CARDbGetCurrentTSF(priv, &tsf);
67013f2c
MP		 1607
1608 return tsf;
1609}
1610
1611static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1612 u64 tsf)
1613{
1614 struct vnt_private *priv = hw->priv;
1615
738487ff 1616 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
67013f2c
MP		 1617}
1618
1619static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1620{
1621 struct vnt_private *priv = hw->priv;
1622
1623 /* reset TSF counter */
1624 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1625}
1626
1627static const struct ieee80211_ops vnt_mac_ops = {
1628 .tx = vnt_tx_80211,
1629 .start = vnt_start,
1630 .stop = vnt_stop,
1631 .add_interface = vnt_add_interface,
1632 .remove_interface = vnt_remove_interface,
1633 .config = vnt_config,
1634 .bss_info_changed = vnt_bss_info_changed,
1635 .prepare_multicast = vnt_prepare_multicast,
1636 .configure_filter = vnt_configure,
1637 .set_key = vnt_set_key,
1638 .get_tsf = vnt_get_tsf,
1639 .set_tsf = vnt_set_tsf,
1640 .reset_tsf = vnt_reset_tsf,
1641};
1642
b7c9cd45 1643static int vnt_init(struct vnt_private *priv)
67013f2c
MP		 1644{
1645 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1646
3d75b9e2
MP		 1647 vnt_init_bands(priv);
1648
67013f2c
MP		 1649 if (ieee80211_register_hw(priv->hw))
1650 return -ENODEV;
1651
1652 priv->mac_hw = true;
1653
1654 CARDbRadioPowerOff(priv);
1655
1656 return 0;
1657}
1658
1659static int
1660vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1661{
1662 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1663 struct vnt_private *priv;
1664 struct ieee80211_hw *hw;
1665 struct wiphy *wiphy;
1666 int rc;
1667
1668 dev_notice(&pcid->dev,
1669 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1670
1671 dev_notice(&pcid->dev,
1672 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1673
1674 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1675 if (!hw) {
1676 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1677 return -ENOMEM;
1678 }
1679
1680 priv = hw->priv;
1681
1682 vt6655_init_info(pcid, &priv, pChip_info);
1683
1684 priv->hw = hw;
1685
1686 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1687
1688 if (pci_enable_device(pcid)) {
1689 device_free_info(priv);
1690 return -ENODEV;
1691 }
1692
1693 dev_dbg(&pcid->dev,
1694 "Before get pci_info memaddr is %x\n", priv->memaddr);
1695
1696 if (!device_get_pci_info(priv, pcid)) {
1697 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1698 device_free_info(priv);
1699 return -ENODEV;
1700 }
1701
1702#ifdef DEBUG
1703 dev_dbg(&pcid->dev,
1704 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1705 priv->memaddr, priv->ioaddr, priv->io_size);
1706 {
1707 int i;
1708 u32 bar, len;
1709 u32 address[] = {
1710 PCI_BASE_ADDRESS_0,
1711 PCI_BASE_ADDRESS_1,
1712 PCI_BASE_ADDRESS_2,
1713 PCI_BASE_ADDRESS_3,
1714 PCI_BASE_ADDRESS_4,
1715 PCI_BASE_ADDRESS_5,
1716 0};
1717 for (i = 0; address[i]; i++) {
1718 pci_read_config_dword(pcid, address[i], &bar);
1719
1720 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1721
1722 if (!bar) {
1723 dev_dbg(&pcid->dev,
1724 "bar %d not implemented\n", i);
1725 continue;
1726 }
1727
1728 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1729 /* This is IO */
1730
1731 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1732 len = len & ~(len - 1);
1733
1734 dev_dbg(&pcid->dev,
1735 "IO space: len in IO %x, BAR %d\n",
1736 len, i);
1737 } else {
1738 len = bar & 0xfffffff0;
1739 len = ~len + 1;
1740
1741 dev_dbg(&pcid->dev,
1742 "len in MEM %x, BAR %d\n", len, i);
1743 }
1744 }
1745 }
1746#endif
1747
1748 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1749 priv->io_size);
1750 if (!priv->PortOffset) {
1751 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1752 device_free_info(priv);
1753 return -ENODEV;
1754 }
1755
1756 rc = pci_request_regions(pcid, DEVICE_NAME);
1757 if (rc) {
1758 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1759 device_free_info(priv);
1760 return -ENODEV;
1761 }
1762
1763 /* do reset */
1764 if (!MACbSoftwareReset(priv->PortOffset)) {
1765 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1766 device_free_info(priv);
1767 return -ENODEV;
1768 }
1769 /* initial to reload eeprom */
1770 MACvInitialize(priv->PortOffset);
1771 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1772
1f51d580
MP		 1773 /* Get RFType */
1774 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1775 priv->byRFType &= RF_MASK;
1776
1777 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1778
67013f2c
MP		 1779 device_get_options(priv);
1780 device_set_options(priv);
1781 /* Mask out the options cannot be set to the chip */
1782 priv->sOpts.flags &= pChip_info->flags;
1783
1784 /* Enable the chip specified capabilities */
1785 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
67013f2c
MP		 1786
1787 wiphy = priv->hw->wiphy;
1788
1789 wiphy->frag_threshold = FRAG_THRESH_DEF;
1790 wiphy->rts_threshold = RTS_THRESH_DEF;
1791 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1792 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1793
1794 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1795 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
1796 IEEE80211_HW_SIGNAL_DBM |
1797 IEEE80211_HW_TIMING_BEACON_ONLY;
1798
1799 priv->hw->max_signal = 100;
1800
1801 if (vnt_init(priv))
1802 return -ENODEV;
1803
1804 device_print_info(priv);
1805 pci_set_drvdata(pcid, priv);
1806
1807 return 0;
1808}
1809
5449c685 1810/*------------------------------------------------------------------*/
5449c685 1811
000fe0f5
MP		 1812#ifdef CONFIG_PM
1813static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1814{
1815 struct vnt_private *priv = pci_get_drvdata(pcid);
1816 unsigned long flags;
1817
1818 spin_lock_irqsave(&priv->lock, flags);
1819
1820 pci_save_state(pcid);
1821
1822 MACbShutdown(priv->PortOffset);
1823
1824 pci_disable_device(pcid);
1825 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1826
1827 spin_unlock_irqrestore(&priv->lock, flags);
1828
1829 return 0;
1830}
1831
1832static int vt6655_resume(struct pci_dev *pcid)
1833{
1834
1835 pci_set_power_state(pcid, PCI_D0);
1836 pci_enable_wake(pcid, PCI_D0, 0);
1837 pci_restore_state(pcid);
1838
1839 return 0;
1840}
1841#endif
1842
013a468c 1843MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
5449c685
FB		 1844
1845static struct pci_driver device_driver = {
34381c22
PH		 1846 .name = DEVICE_NAME,
1847 .id_table = vt6655_pci_id_table,
1848 .probe = vt6655_probe,
1849 .remove = vt6655_remove,
5449c685 1850#ifdef CONFIG_PM
000fe0f5
MP		 1851 .suspend = vt6655_suspend,
1852 .resume = vt6655_resume,
5449c685 1853#endif
5449c685
FB		 1854};
1855
013a468c 1856static int __init vt6655_init_module(void)
5449c685 1857{
915006cd 1858 int ret;
5449c685 1859
5449c685 1860 ret = pci_register_driver(&device_driver);
5449c685 1861#ifdef CONFIG_PM
915006cd
JP		 1862 if (ret >= 0)
1863 register_reboot_notifier(&device_notifier);
5449c685
FB		 1864#endif
1865
915006cd 1866 return ret;
5449c685
FB		 1867}
1868
013a468c 1869static void __exit vt6655_cleanup_module(void)
5449c685 1870{
5449c685 1871#ifdef CONFIG_PM
915006cd 1872 unregister_reboot_notifier(&device_notifier);
5449c685 1873#endif
915006cd 1874 pci_unregister_driver(&device_driver);
5449c685
FB		 1875}
1876
013a468c
CC		 1877module_init(vt6655_init_module);
1878module_exit(vt6655_cleanup_module);
5449c685 1879
5449c685
FB		 1880#ifdef CONFIG_PM
1881static int
1882device_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
1883{
915006cd 1884 struct pci_dev *pdev = NULL;
6b711271 1885
915006cd
JP		 1886 switch (event) {
1887 case SYS_DOWN:
1888 case SYS_HALT:
1889 case SYS_POWER_OFF:
1890 for_each_pci_dev(pdev) {
1891 if (pci_dev_driver(pdev) == &device_driver) {
1892 if (pci_get_drvdata(pdev))
000fe0f5 1893 vt6655_suspend(pdev, PMSG_HIBERNATE);
915006cd
JP		 1894 }
1895 }
1896 }
1897 return NOTIFY_DONE;
5449c685 1898}
5449c685 1899#endif
Linux kernel - Deliverables
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