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staging: vt6655: Convert to kernel brace style
[deliverable/linux.git] / drivers / staging / vt6655 / mac.c
CommitLineData
5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
612822f5 19 *
5449c685
FB		 20 * File: mac.c
21 *
22 * Purpose: MAC routines
23 *
24 * Author: Tevin Chen
25 *
26 * Date: May 21, 1996
27 *
28 * Functions:
29 * MACvReadAllRegs - Read All MAC Registers to buffer
30 * MACbIsRegBitsOn - Test if All test Bits On
31 * MACbIsRegBitsOff - Test if All test Bits Off
32 * MACbIsIntDisable - Test if MAC interrupt disable
33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
37 * MACvSetRxThreshold - Set Rx Threshold value
38 * MACvGetRxThreshold - Get Rx Threshold value
39 * MACvSetTxThreshold - Set Tx Threshold value
40 * MACvGetTxThreshold - Get Tx Threshold value
41 * MACvSetDmaLength - Set Dma Length value
42 * MACvGetDmaLength - Get Dma Length value
43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
47 * MACvSetLoopbackMode - Set MAC Loopback Mode
48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
49 * MACvSetPacketFilter - Set MAC Address Filter
50 * MACvSaveContext - Save Context of MAC Registers
51 * MACvRestoreContext - Restore Context of MAC Registers
52 * MACbCompareContext - Compare if values of MAC Registers same as Context
53 * MACbSoftwareReset - Software Reset MAC
54 * MACbSafeRxOff - Turn Off MAC Rx
55 * MACbSafeTxOff - Turn Off MAC Tx
56 * MACbSafeStop - Stop MAC function
57 * MACbShutdown - Shut down MAC
58 * MACvInitialize - Initialize MAC
789d1aef
JM		 59 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
5449c685
FB		 62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
63 *
64 * Revision History:
65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
68 *
69 */
70
5449c685 71#include "tmacro.h"
5449c685 72#include "tether.h"
5449c685 73#include "mac.h"
5449c685 74
2986db5f 75unsigned short TxRate_iwconfig;//2008-5-8 <add> by chester
5449c685
FB		 76/*--------------------- Static Definitions -------------------------*/
77//static int msglevel =MSG_LEVEL_DEBUG;
c3504bfd 78static int msglevel = MSG_LEVEL_INFO;
5449c685
FB		 79/*--------------------- Static Classes ----------------------------*/
80
81/*--------------------- Static Variables --------------------------*/
82
83/*--------------------- Static Functions --------------------------*/
84
85/*--------------------- Export Variables --------------------------*/
86
87/*--------------------- Export Functions --------------------------*/
88
612822f5
JL		 89
90
91
92
5449c685
FB		 93/*
94 * Description:
95 * Read All MAC Registers to buffer
96 *
97 * Parameters:
98 * In:
99 * dwIoBase - Base Address for MAC
100 * Out:
101 * pbyMacRegs - buffer to read
102 *
103 * Return Value: none
104 *
105 */
c3504bfd 106void MACvReadAllRegs(unsigned long dwIoBase, unsigned char *pbyMacRegs)
5449c685 107{
c3504bfd 108 int ii;
5449c685 109
c3504bfd
JP		 110 // read page0 register
111 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
112 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
113 pbyMacRegs++;
114 }
5449c685 115
c3504bfd 116 MACvSelectPage1(dwIoBase);
5449c685 117
c3504bfd
JP		 118 // read page1 register
119 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
120 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
121 pbyMacRegs++;
122 }
5449c685 123
c3504bfd 124 MACvSelectPage0(dwIoBase);
5449c685
FB		 125
126}
127
128/*
129 * Description:
130 * Test if all test bits on
131 *
132 * Parameters:
133 * In:
134 * dwIoBase - Base Address for MAC
135 * byRegOfs - Offset of MAC Register
136 * byTestBits - Test bits
137 * Out:
138 * none
139 *
5a5a2a6a 140 * Return Value: true if all test bits On; otherwise false
5449c685
FB		 141 *
142 */
c3504bfd 143bool MACbIsRegBitsOn(unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
5449c685 144{
c3504bfd 145 unsigned char byData;
5449c685 146
c3504bfd
JP		 147 VNSvInPortB(dwIoBase + byRegOfs, &byData);
148 return (byData & byTestBits) == byTestBits;
5449c685
FB		 149}
150
151/*
152 * Description:
153 * Test if all test bits off
154 *
155 * Parameters:
156 * In:
157 * dwIoBase - Base Address for MAC
158 * byRegOfs - Offset of MAC Register
159 * byTestBits - Test bits
160 * Out:
161 * none
162 *
5a5a2a6a 163 * Return Value: true if all test bits Off; otherwise false
5449c685
FB		 164 *
165 */
c3504bfd 166bool MACbIsRegBitsOff(unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
5449c685 167{
c3504bfd 168 unsigned char byData;
5449c685 169
c3504bfd
JP		 170 VNSvInPortB(dwIoBase + byRegOfs, &byData);
171 return !(byData & byTestBits);
5449c685
FB		 172}
173
174/*
175 * Description:
176 * Test if MAC interrupt disable
177 *
178 * Parameters:
179 * In:
180 * dwIoBase - Base Address for MAC
181 * Out:
182 * none
183 *
5a5a2a6a 184 * Return Value: true if interrupt is disable; otherwise false
5449c685
FB		 185 *
186 */
c3504bfd 187bool MACbIsIntDisable(unsigned long dwIoBase)
5449c685 188{
c3504bfd 189 unsigned long dwData;
5449c685 190
c3504bfd
JP		 191 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
192 if (dwData != 0)
193 return false;
5449c685 194
c3504bfd 195 return true;
5449c685
FB		 196}
197
198/*
199 * Description:
200 * Read MAC Multicast Address Mask
201 *
202 * Parameters:
203 * In:
204 * dwIoBase - Base Address for MAC
205 * uByteidx - Index of Mask
206 * Out:
207 * none
208 *
209 * Return Value: Mask Value read
210 *
211 */
c3504bfd 212unsigned char MACbyReadMultiAddr(unsigned long dwIoBase, unsigned int uByteIdx)
5449c685 213{
c3504bfd 214 unsigned char byData;
5449c685 215
c3504bfd
JP		 216 MACvSelectPage1(dwIoBase);
217 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
218 MACvSelectPage0(dwIoBase);
219 return byData;
5449c685
FB		 220}
221
222/*
223 * Description:
224 * Write MAC Multicast Address Mask
225 *
226 * Parameters:
227 * In:
228 * dwIoBase - Base Address for MAC
229 * uByteidx - Index of Mask
230 * byData - Mask Value to write
231 * Out:
232 * none
233 *
234 * Return Value: none
235 *
236 */
c3504bfd 237void MACvWriteMultiAddr(unsigned long dwIoBase, unsigned int uByteIdx, unsigned char byData)
5449c685 238{
c3504bfd
JP		 239 MACvSelectPage1(dwIoBase);
240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
241 MACvSelectPage0(dwIoBase);
5449c685
FB		 242}
243
244/*
245 * Description:
246 * Set this hash index into multicast address register bit
247 *
248 * Parameters:
249 * In:
250 * dwIoBase - Base Address for MAC
251 * byHashIdx - Hash index to set
252 * Out:
253 * none
254 *
255 * Return Value: none
256 *
257 */
c3504bfd 258void MACvSetMultiAddrByHash(unsigned long dwIoBase, unsigned char byHashIdx)
5449c685 259{
c3504bfd
JP		 260 unsigned int uByteIdx;
261 unsigned char byBitMask;
262 unsigned char byOrgValue;
263
264 // calculate byte position
265 uByteIdx = byHashIdx / 8;
266 ASSERT(uByteIdx < 8);
267 // calculate bit position
268 byBitMask = 1;
269 byBitMask <<= (byHashIdx % 8);
270 // turn on the bit
271 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
272 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue | byBitMask));
5449c685
FB		 273}
274
275/*
276 * Description:
277 * Reset this hash index into multicast address register bit
278 *
279 * Parameters:
280 * In:
281 * dwIoBase - Base Address for MAC
282 * byHashIdx - Hash index to clear
283 * Out:
284 * none
285 *
286 * Return Value: none
287 *
288 */
c3504bfd 289void MACvResetMultiAddrByHash(unsigned long dwIoBase, unsigned char byHashIdx)
5449c685 290{
c3504bfd
JP		 291 unsigned int uByteIdx;
292 unsigned char byBitMask;
293 unsigned char byOrgValue;
294
295 // calculate byte position
296 uByteIdx = byHashIdx / 8;
297 ASSERT(uByteIdx < 8);
298 // calculate bit position
299 byBitMask = 1;
300 byBitMask <<= (byHashIdx % 8);
301 // turn off the bit
302 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
303 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue & (~byBitMask)));
5449c685
FB		 304}
305
306/*
307 * Description:
308 * Set Rx Threshold
309 *
310 * Parameters:
311 * In:
312 * dwIoBase - Base Address for MAC
313 * byThreshold - Threshold Value
314 * Out:
315 * none
316 *
317 * Return Value: none
318 *
319 */
c3504bfd 320void MACvSetRxThreshold(unsigned long dwIoBase, unsigned char byThreshold)
5449c685 321{
c3504bfd 322 unsigned char byOrgValue;
5449c685 323
c3504bfd 324 ASSERT(byThreshold < 4);
5449c685 325
c3504bfd
JP		 326 // set FCR0
327 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
328 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
329 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
5449c685
FB		 330}
331
332/*
333 * Description:
334 * Get Rx Threshold
335 *
336 * Parameters:
337 * In:
338 * dwIoBase - Base Address for MAC
339 * Out:
340 * pbyThreshold- Threshold Value Get
341 *
342 * Return Value: none
343 *
344 */
c3504bfd 345void MACvGetRxThreshold(unsigned long dwIoBase, unsigned char *pbyThreshold)
5449c685 346{
c3504bfd
JP		 347 // get FCR0
348 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
349 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
5449c685
FB		 350}
351
352/*
353 * Description:
354 * Set Tx Threshold
355 *
356 * Parameters:
357 * In:
358 * dwIoBase - Base Address for MAC
359 * byThreshold - Threshold Value
360 * Out:
361 * none
362 *
363 * Return Value: none
364 *
365 */
c3504bfd 366void MACvSetTxThreshold(unsigned long dwIoBase, unsigned char byThreshold)
5449c685 367{
c3504bfd 368 unsigned char byOrgValue;
5449c685 369
c3504bfd 370 ASSERT(byThreshold < 4);
5449c685 371
c3504bfd
JP		 372 // set FCR0
373 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
374 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
375 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
5449c685
FB		 376}
377
378/*
379 * Description:
380 * Get Tx Threshold
381 *
382 * Parameters:
383 * In:
384 * dwIoBase - Base Address for MAC
385 * Out:
386 * pbyThreshold- Threshold Value Get
387 *
388 * Return Value: none
389 *
390 */
c3504bfd 391void MACvGetTxThreshold(unsigned long dwIoBase, unsigned char *pbyThreshold)
5449c685 392{
c3504bfd
JP		 393 // get FCR0
394 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
395 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
5449c685
FB		 396}
397
398/*
399 * Description:
400 * Set Dma Length
401 *
402 * Parameters:
403 * In:
404 * dwIoBase - Base Address for MAC
405 * byDmaLength - Dma Length Value
406 * Out:
407 * none
408 *
409 * Return Value: none
410 *
411 */
c3504bfd 412void MACvSetDmaLength(unsigned long dwIoBase, unsigned char byDmaLength)
5449c685 413{
c3504bfd 414 unsigned char byOrgValue;
5449c685 415
c3504bfd 416 ASSERT(byDmaLength < 4);
5449c685 417
c3504bfd
JP		 418 // set FCR0
419 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
420 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
421 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
5449c685
FB		 422}
423
424/*
425 * Description:
426 * Get Dma Length
427 *
428 * Parameters:
429 * In:
430 * dwIoBase - Base Address for MAC
431 * Out:
432 * pbyDmaLength- Dma Length Value Get
433 *
434 * Return Value: none
435 *
436 */
c3504bfd 437void MACvGetDmaLength(unsigned long dwIoBase, unsigned char *pbyDmaLength)
5449c685 438{
c3504bfd
JP		 439 // get FCR0
440 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
441 *pbyDmaLength &= 0x03;
5449c685
FB		 442}
443
444/*
445 * Description:
446 * Set 802.11 Short Retry Limit
447 *
448 * Parameters:
449 * In:
450 * dwIoBase - Base Address for MAC
451 * byRetryLimit- Retry Limit
452 * Out:
453 * none
454 *
455 * Return Value: none
456 *
457 */
c3504bfd 458void MACvSetShortRetryLimit(unsigned long dwIoBase, unsigned char byRetryLimit)
5449c685 459{
c3504bfd
JP		 460 // set SRT
461 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
5449c685
FB		 462}
463
464/*
465 * Description:
466 * Get 802.11 Short Retry Limit
467 *
468 * Parameters:
469 * In:
470 * dwIoBase - Base Address for MAC
471 * Out:
472 * pbyRetryLimit - Retry Limit Get
473 *
474 * Return Value: none
475 *
476 */
c3504bfd 477void MACvGetShortRetryLimit(unsigned long dwIoBase, unsigned char *pbyRetryLimit)
5449c685 478{
c3504bfd
JP		 479 // get SRT
480 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
5449c685
FB		 481}
482
483/*
484 * Description:
485 * Set 802.11 Long Retry Limit
486 *
487 * Parameters:
488 * In:
489 * dwIoBase - Base Address for MAC
490 * byRetryLimit- Retry Limit
491 * Out:
492 * none
493 *
494 * Return Value: none
495 *
496 */
c3504bfd 497void MACvSetLongRetryLimit(unsigned long dwIoBase, unsigned char byRetryLimit)
5449c685 498{
c3504bfd
JP		 499 // set LRT
500 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
5449c685
FB		 501}
502
503/*
504 * Description:
505 * Get 802.11 Long Retry Limit
506 *
507 * Parameters:
508 * In:
509 * dwIoBase - Base Address for MAC
510 * Out:
511 * pbyRetryLimit - Retry Limit Get
512 *
513 * Return Value: none
514 *
515 */
c3504bfd 516void MACvGetLongRetryLimit(unsigned long dwIoBase, unsigned char *pbyRetryLimit)
5449c685 517{
c3504bfd
JP		 518 // get LRT
519 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
5449c685
FB		 520}
521
522/*
523 * Description:
524 * Set MAC Loopback mode
525 *
526 * Parameters:
527 * In:
528 * dwIoBase - Base Address for MAC
529 * byLoopbackMode - Loopback Mode
530 * Out:
531 * none
532 *
533 * Return Value: none
534 *
535 */
c3504bfd 536void MACvSetLoopbackMode(unsigned long dwIoBase, unsigned char byLoopbackMode)
5449c685 537{
c3504bfd
JP		 538 unsigned char byOrgValue;
539
540 ASSERT(byLoopbackMode < 3);
541 byLoopbackMode <<= 6;
542 // set TCR
543 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
544 byOrgValue = byOrgValue & 0x3F;
545 byOrgValue = byOrgValue | byLoopbackMode;
546 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
5449c685
FB		 547}
548
549/*
550 * Description:
551 * Test if MAC in Loopback mode
552 *
553 * Parameters:
554 * In:
555 * dwIoBase - Base Address for MAC
556 * Out:
557 * none
558 *
5a5a2a6a 559 * Return Value: true if in Loopback mode; otherwise false
5449c685
FB		 560 *
561 */
c3504bfd 562bool MACbIsInLoopbackMode(unsigned long dwIoBase)
5449c685 563{
c3504bfd 564 unsigned char byOrgValue;
5449c685 565
c3504bfd
JP		 566 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
567 if (byOrgValue & (TEST_LBINT | TEST_LBEXT))
568 return true;
569 return false;
5449c685
FB		 570}
571
572/*
573 * Description:
574 * Set MAC Address filter
575 *
576 * Parameters:
577 * In:
578 * dwIoBase - Base Address for MAC
579 * wFilterType - Filter Type
580 * Out:
581 * none
582 *
583 * Return Value: none
584 *
585 */
c3504bfd 586void MACvSetPacketFilter(unsigned long dwIoBase, unsigned short wFilterType)
5449c685 587{
c3504bfd
JP		 588 unsigned char byOldRCR;
589 unsigned char byNewRCR = 0;
590
591 // if only in DIRECTED mode, multicast-address will set to zero,
592 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
593 // will be open
594 if (wFilterType & PKT_TYPE_DIRECTED) {
595 // set multicast address to accept none
596 MACvSelectPage1(dwIoBase);
597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
598 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L);
599 MACvSelectPage0(dwIoBase);
600 }
601
602 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
603 // set multicast address to accept all
604 MACvSelectPage1(dwIoBase);
605 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
606 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL);
607 MACvSelectPage0(dwIoBase);
608 }
609
610 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
611
612 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
613
614 byNewRCR &= ~RCR_BSSID;
615 }
616
617 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
618 byNewRCR |= RCR_MULTICAST;
619
620 if (wFilterType & PKT_TYPE_BROADCAST)
621 byNewRCR |= RCR_BROADCAST;
622
623 if (wFilterType & PKT_TYPE_ERROR_CRC)
624 byNewRCR |= RCR_ERRCRC;
625
626 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
627 if (byNewRCR != byOldRCR) {
628 // Modify the Receive Command Register
629 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
630 }
5449c685
FB		 631}
632
633/*
634 * Description:
635 * Save MAC registers to context buffer
636 *
637 * Parameters:
638 * In:
639 * dwIoBase - Base Address for MAC
640 * Out:
641 * pbyCxtBuf - Context buffer
642 *
643 * Return Value: none
644 *
645 */
c3504bfd 646void MACvSaveContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
5449c685 647{
c3504bfd 648 int ii;
5449c685 649
c3504bfd
JP		 650 // read page0 register
651 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
652 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
653 }
5449c685 654
c3504bfd 655 MACvSelectPage1(dwIoBase);
5449c685 656
c3504bfd
JP		 657 // read page1 register
658 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
659 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
660 }
5449c685 661
c3504bfd 662 MACvSelectPage0(dwIoBase);
5449c685
FB		 663}
664
665/*
666 * Description:
667 * Restore MAC registers from context buffer
668 *
669 * Parameters:
670 * In:
671 * dwIoBase - Base Address for MAC
672 * pbyCxtBuf - Context buffer
673 * Out:
674 * none
675 *
676 * Return Value: none
677 *
678 */
c3504bfd 679void MACvRestoreContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
5449c685 680{
c3504bfd 681 int ii;
5449c685 682
c3504bfd
JP		 683 MACvSelectPage1(dwIoBase);
684 // restore page1
685 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
686 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
687 }
688 MACvSelectPage0(dwIoBase);
5449c685 689
c3504bfd
JP		 690 // restore RCR,TCR,IMR...
691 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) {
692 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
693 }
694 // restore MAC Config.
695 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) {
696 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
697 }
698 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
5449c685 699
c3504bfd
JP		 700 // restore PS Config.
701 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) {
702 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
703 }
5449c685 704
c3504bfd
JP		 705 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
706 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
707 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
708 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
5449c685
FB		 709
710
c3504bfd 711 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
5449c685 712
c3504bfd 713 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
5449c685
FB		 714
715}
716
717/*
718 * Description:
719 * Compare if MAC registers same as context buffer
720 *
721 * Parameters:
722 * In:
723 * dwIoBase - Base Address for MAC
724 * pbyCxtBuf - Context buffer
725 * Out:
726 * none
727 *
5a5a2a6a 728 * Return Value: true if all values are the same; otherwise false
5449c685
FB		 729 *
730 */
c3504bfd 731bool MACbCompareContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
5449c685 732{
c3504bfd 733 unsigned long dwData;
5449c685 734
c3504bfd
JP		 735 // compare MAC context to determine if this is a power lost init,
736 // return true for power remaining init, return false for power lost init
5449c685 737
c3504bfd
JP		 738 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
739 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
740 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) {
741 return false;
742 }
5449c685 743
c3504bfd
JP		 744 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
745 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) {
746 return false;
747 }
5449c685 748
c3504bfd
JP		 749 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
750 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) {
751 return false;
752 }
5449c685 753
c3504bfd
JP		 754 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
755 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) {
756 return false;
757 }
5449c685
FB		 758
759
c3504bfd 760 return true;
5449c685
FB		 761}
762
763/*
764 * Description:
765 * Software Reset MAC
766 *
767 * Parameters:
768 * In:
769 * dwIoBase - Base Address for MAC
770 * Out:
771 * none
772 *
5a5a2a6a 773 * Return Value: true if Reset Success; otherwise false
5449c685
FB		 774 *
775 */
c3504bfd 776bool MACbSoftwareReset(unsigned long dwIoBase)
5449c685 777{
c3504bfd
JP		 778 unsigned char byData;
779 unsigned short ww;
780
781 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
782 //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST);
783 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
784
785 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
786 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
787 if (!(byData & HOSTCR_SOFTRST))
788 break;
789 }
790 if (ww == W_MAX_TIMEOUT)
791 return false;
792 return true;
5449c685
FB		 793
794}
795
796/*
797 * Description:
798 * save some important register's value, then do reset, then restore register's value
799 *
800 * Parameters:
801 * In:
802 * dwIoBase - Base Address for MAC
803 * Out:
804 * none
805 *
5a5a2a6a 806 * Return Value: true if success; otherwise false
5449c685
FB		 807 *
808 */
c3504bfd 809bool MACbSafeSoftwareReset(unsigned long dwIoBase)
5449c685 810{
c3504bfd
JP		 811 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
812 bool bRetVal;
813
814 // PATCH....
815 // save some important register's value, then do
816 // reset, then restore register's value
817
818 // save MAC context
819 MACvSaveContext(dwIoBase, abyTmpRegData);
820 // do reset
821 bRetVal = MACbSoftwareReset(dwIoBase);
822 //BBvSoftwareReset(pDevice->PortOffset);
823 // restore MAC context, except CR0
824 MACvRestoreContext(dwIoBase, abyTmpRegData);
825
826 return bRetVal;
5449c685
FB		 827}
828
829/*
830 * Description:
831 * Trun Off MAC Rx
832 *
833 * Parameters:
834 * In:
835 * dwIoBase - Base Address for MAC
836 * Out:
837 * none
838 *
5a5a2a6a 839 * Return Value: true if success; otherwise false
5449c685
FB		 840 *
841 */
c3504bfd 842bool MACbSafeRxOff(unsigned long dwIoBase)
5449c685 843{
c3504bfd
JP		 844 unsigned short ww;
845 unsigned long dwData;
846 unsigned char byData;
847
848 // turn off wow temp for turn off Rx safely
849
850 // Clear RX DMA0,1
851 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
852 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
853 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
854 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
855 if (!(dwData & DMACTL_RUN))
856 break;
857 }
858 if (ww == W_MAX_TIMEOUT) {
859 DBG_PORT80(0x10);
860 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x10)\n");
861 return(false);
862 }
863 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
864 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
865 if (!(dwData & DMACTL_RUN))
866 break;
867 }
868 if (ww == W_MAX_TIMEOUT) {
869 DBG_PORT80(0x11);
870 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x11)\n");
871 return(false);
872 }
873
874 // try to safe shutdown RX
875 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
876 // W_MAX_TIMEOUT is the timeout period
877 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
878 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
879 if (!(byData & HOSTCR_RXONST))
880 break;
881 }
882 if (ww == W_MAX_TIMEOUT) {
883 DBG_PORT80(0x12);
884 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x12)\n");
885 return(false);
886 }
887 return true;
5449c685
FB		 888}
889
890/*
891 * Description:
892 * Trun Off MAC Tx
893 *
894 * Parameters:
895 * In:
896 * dwIoBase - Base Address for MAC
897 * Out:
898 * none
899 *
5a5a2a6a 900 * Return Value: true if success; otherwise false
5449c685
FB		 901 *
902 */
c3504bfd 903bool MACbSafeTxOff(unsigned long dwIoBase)
5449c685 904{
c3504bfd
JP		 905 unsigned short ww;
906 unsigned long dwData;
907 unsigned char byData;
908
909 // Clear TX DMA
910 //Tx0
911 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
912 //AC0
913 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
914
915
916 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
917 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
918 if (!(dwData & DMACTL_RUN))
919 break;
920 }
921 if (ww == W_MAX_TIMEOUT) {
922 DBG_PORT80(0x20);
923 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x20)\n");
924 return(false);
925 }
926 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
927 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
928 if (!(dwData & DMACTL_RUN))
929 break;
930 }
931 if (ww == W_MAX_TIMEOUT) {
932 DBG_PORT80(0x21);
933 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x21)\n");
934 return(false);
935 }
936
937 // try to safe shutdown TX
938 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
939
940 // W_MAX_TIMEOUT is the timeout period
941 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
942 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
943 if (!(byData & HOSTCR_TXONST))
944 break;
945 }
946 if (ww == W_MAX_TIMEOUT) {
947 DBG_PORT80(0x24);
948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x24)\n");
949 return(false);
950 }
951 return true;
5449c685
FB		 952}
953
954/*
955 * Description:
956 * Stop MAC function
957 *
958 * Parameters:
959 * In:
960 * dwIoBase - Base Address for MAC
961 * Out:
962 * none
963 *
5a5a2a6a 964 * Return Value: true if success; otherwise false
5449c685
FB		 965 *
966 */
c3504bfd 967bool MACbSafeStop(unsigned long dwIoBase)
5449c685 968{
c3504bfd
JP		 969 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
970
971 if (MACbSafeRxOff(dwIoBase) == false) {
972 DBG_PORT80(0xA1);
973 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " MACbSafeRxOff == false)\n");
974 MACbSafeSoftwareReset(dwIoBase);
975 return false;
976 }
977 if (MACbSafeTxOff(dwIoBase) == false) {
978 DBG_PORT80(0xA2);
979 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " MACbSafeTxOff == false)\n");
980 MACbSafeSoftwareReset(dwIoBase);
981 return false;
982 }
983
984 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
985
986 return true;
5449c685
FB		 987}
988
989/*
990 * Description:
991 * Shut Down MAC
992 *
993 * Parameters:
994 * In:
995 * dwIoBase - Base Address for MAC
996 * Out:
997 * none
998 *
5a5a2a6a 999 * Return Value: true if success; otherwise false
5449c685
FB		 1000 *
1001 */
c3504bfd 1002bool MACbShutdown(unsigned long dwIoBase)
5449c685 1003{
c3504bfd
JP		 1004 // disable MAC IMR
1005 MACvIntDisable(dwIoBase);
1006 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
1007 // stop the adapter
1008 if (!MACbSafeStop(dwIoBase)) {
1009 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1010 return false;
1011 }
1012 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1013 return true;
5449c685
FB		 1014}
1015
1016/*
1017 * Description:
1018 * Initialize MAC
1019 *
1020 * Parameters:
1021 * In:
1022 * dwIoBase - Base Address for MAC
1023 * Out:
1024 * none
1025 *
1026 * Return Value: none
1027 *
1028 */
c3504bfd 1029void MACvInitialize(unsigned long dwIoBase)
5449c685 1030{
c3504bfd
JP		 1031 // clear sticky bits
1032 MACvClearStckDS(dwIoBase);
1033 // disable force PME-enable
1034 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1035 // only 3253 A
1036 /*
1037 MACvPwrEvntDisable(dwIoBase);
1038 // clear power status
1039 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F);
1040 */
1041
1042 // do reset
1043 MACbSoftwareReset(dwIoBase);
1044
1045 // issue AUTOLD in EECSR to reload eeprom
1046 //MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
1047 // wait until EEPROM loading complete
1048 //while (true) {
1049 // u8 u8Data;
1050 // VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &u8Data);
1051 // if (!(u8Data & I2MCSR_AUTOLD))
1052 // break;
1053 //}
1054
1055 // reset TSF counter
1056 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1057 // enable TSF counter
1058 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1059
1060
1061 // set packet filter
1062 // receive directed and broadcast address
1063
1064 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
5449c685
FB		 1065
1066}
1067
1068/*
1069 * Description:
1070 * Set the chip with current rx descriptor address
1071 *
1072 * Parameters:
1073 * In:
1074 * dwIoBase - Base Address for MAC
1075 * dwCurrDescAddr - Descriptor Address
1076 * Out:
1077 * none
1078 *
1079 * Return Value: none
1080 *
1081 */
c3504bfd 1082void MACvSetCurrRx0DescAddr(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
5449c685 1083{
c3504bfd
JP		 1084 unsigned short ww;
1085 unsigned char byData;
1086 unsigned char byOrgDMACtl;
1087
1088 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1089 if (byOrgDMACtl & DMACTL_RUN) {
1090 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1091 }
1092 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1093 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1094 if (!(byData & DMACTL_RUN))
1095 break;
1096 }
1097 if (ww == W_MAX_TIMEOUT) {
1098 DBG_PORT80(0x13);
1099 }
1100 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1101 if (byOrgDMACtl & DMACTL_RUN) {
1102 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1103 }
5449c685
FB		 1104}
1105
1106/*
1107 * Description:
1108 * Set the chip with current rx descriptor address
1109 *
1110 * Parameters:
1111 * In:
1112 * dwIoBase - Base Address for MAC
1113 * dwCurrDescAddr - Descriptor Address
1114 * Out:
1115 * none
1116 *
1117 * Return Value: none
1118 *
1119 */
c3504bfd 1120void MACvSetCurrRx1DescAddr(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
5449c685 1121{
c3504bfd
JP		 1122 unsigned short ww;
1123 unsigned char byData;
1124 unsigned char byOrgDMACtl;
1125
1126 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1127 if (byOrgDMACtl & DMACTL_RUN) {
1128 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1129 }
1130 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1131 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1132 if (!(byData & DMACTL_RUN))
1133 break;
1134 }
1135 if (ww == W_MAX_TIMEOUT) {
1136 DBG_PORT80(0x14);
1137 }
1138 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1139 if (byOrgDMACtl & DMACTL_RUN) {
1140 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1141 }
5449c685
FB		 1142}
1143
1144/*
1145 * Description:
1146 * Set the chip with current tx0 descriptor address
1147 *
1148 * Parameters:
1149 * In:
1150 * dwIoBase - Base Address for MAC
1151 * dwCurrDescAddr - Descriptor Address
1152 * Out:
1153 * none
1154 *
1155 * Return Value: none
1156 *
1157 */
c3504bfd 1158void MACvSetCurrTx0DescAddrEx(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
5449c685 1159{
c3504bfd
JP		 1160 unsigned short ww;
1161 unsigned char byData;
1162 unsigned char byOrgDMACtl;
1163
1164 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1165 if (byOrgDMACtl & DMACTL_RUN) {
1166 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1167 }
1168 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1169 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1170 if (!(byData & DMACTL_RUN))
1171 break;
1172 }
1173 if (ww == W_MAX_TIMEOUT) {
1174 DBG_PORT80(0x25);
1175 }
1176 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1177 if (byOrgDMACtl & DMACTL_RUN) {
1178 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1179 }
5449c685
FB		 1180}
1181
1182/*
1183 * Description:
1184 * Set the chip with current AC0 descriptor address
1185 *
1186 * Parameters:
1187 * In:
1188 * dwIoBase - Base Address for MAC
1189 * dwCurrDescAddr - Descriptor Address
1190 * Out:
1191 * none
1192 *
1193 * Return Value: none
1194 *
1195 */
c3504bfd
JP		 1196//TxDMA1 = AC0DMA
1197void MACvSetCurrAC0DescAddrEx(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
5449c685 1198{
c3504bfd
JP		 1199 unsigned short ww;
1200 unsigned char byData;
1201 unsigned char byOrgDMACtl;
1202
1203 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1204 if (byOrgDMACtl & DMACTL_RUN) {
1205 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1206 }
1207 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1208 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1209 if (!(byData & DMACTL_RUN))
1210 break;
1211 }
1212 if (ww == W_MAX_TIMEOUT) {
1213 DBG_PORT80(0x26);
1214 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x26)\n");
1215 }
1216 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1217 if (byOrgDMACtl & DMACTL_RUN) {
1218 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1219 }
5449c685
FB		 1220}
1221
1222
1223
c3504bfd 1224void MACvSetCurrTXDescAddr(int iTxType, unsigned long dwIoBase, unsigned long dwCurrDescAddr)
5449c685 1225{
c3504bfd
JP		 1226 if (iTxType == TYPE_AC0DMA) {
1227 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1228 } else if (iTxType == TYPE_TXDMA0) {
1229 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1230 }
5449c685
FB		 1231}
1232
1233/*
1234 * Description:
1235 * Micro Second Delay via MAC
1236 *
1237 * Parameters:
1238 * In:
1239 * dwIoBase - Base Address for MAC
1240 * uDelay - Delay time (timer resolution is 4 us)
1241 * Out:
1242 * none
1243 *
1244 * Return Value: none
1245 *
1246 */
c3504bfd 1247void MACvTimer0MicroSDelay(unsigned long dwIoBase, unsigned int uDelay)
5449c685 1248{
c3504bfd
JP		 1249 unsigned char byValue;
1250 unsigned int uu, ii;
1251
1252 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1253 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1254 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1255 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
1256 for (uu = 0; uu < uDelay; uu++) {
1257 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1258 if ((byValue == 0) ||
1259 (byValue & TMCTL_TSUSP)) {
1260 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1261 return;
1262 }
1263 }
1264 }
1265 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
5449c685
FB		 1266
1267}
1268
1269/*
1270 * Description:
1271 * Micro Second One shot timer via MAC
1272 *
1273 * Parameters:
1274 * In:
1275 * dwIoBase - Base Address for MAC
1276 * uDelay - Delay time
1277 * Out:
1278 * none
1279 *
1280 * Return Value: none
1281 *
1282 */
c3504bfd 1283void MACvOneShotTimer0MicroSec(unsigned long dwIoBase, unsigned int uDelayTime)
5449c685 1284{
c3504bfd
JP		 1285 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1286 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1287 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
5449c685
FB		 1288}
1289
1290/*
1291 * Description:
1292 * Micro Second One shot timer via MAC
1293 *
1294 * Parameters:
1295 * In:
1296 * dwIoBase - Base Address for MAC
1297 * uDelay - Delay time
1298 * Out:
1299 * none
1300 *
1301 * Return Value: none
1302 *
1303 */
c3504bfd 1304void MACvOneShotTimer1MicroSec(unsigned long dwIoBase, unsigned int uDelayTime)
5449c685 1305{
c3504bfd
JP		 1306 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1307 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1308 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
5449c685
FB		 1309}
1310
1311
c3504bfd 1312void MACvSetMISCFifo(unsigned long dwIoBase, unsigned short wOffset, unsigned long dwData)
5449c685 1313{
c3504bfd
JP		 1314 if (wOffset > 273)
1315 return;
1316 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1317 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1318 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
5449c685
FB		 1319}
1320
1321
c3504bfd 1322bool MACbTxDMAOff(unsigned long dwIoBase, unsigned int idx)
5449c685 1323{
c3504bfd
JP		 1324 unsigned char byData;
1325 unsigned int ww = 0;
1326
1327 if (idx == TYPE_TXDMA0) {
1328 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1329 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1330 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1331 if (!(byData & DMACTL_RUN))
1332 break;
1333 }
1334 } else if (idx == TYPE_AC0DMA) {
1335 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1336 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1337 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1338 if (!(byData & DMACTL_RUN))
1339 break;
1340 }
1341 }
1342 if (ww == W_MAX_TIMEOUT) {
1343 DBG_PORT80(0x29);
1344 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x29)\n");
1345 return false;
1346 }
1347 return true;
5449c685
FB		 1348}
1349
c3504bfd 1350void MACvClearBusSusInd(unsigned long dwIoBase)
5449c685 1351{
c3504bfd
JP		 1352 unsigned long dwOrgValue;
1353 unsigned int ww;
1354 // check if BcnSusInd enabled
1355 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1356 if (!(dwOrgValue & EnCFG_BcnSusInd))
1357 return;
1358 //Set BcnSusClr
1359 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1360 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1361 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1362 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1363 if (!(dwOrgValue & EnCFG_BcnSusInd))
1364 break;
1365 }
1366 if (ww == W_MAX_TIMEOUT) {
1367 DBG_PORT80(0x33);
1368 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1369 }
5449c685
FB		 1370}
1371
c3504bfd 1372void MACvEnableBusSusEn(unsigned long dwIoBase)
5449c685 1373{
c3504bfd
JP		 1374 unsigned char byOrgValue;
1375 unsigned long dwOrgValue;
1376 unsigned int ww;
1377 // check if BcnSusInd enabled
1378 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1379
1380 //Set BcnSusEn
1381 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1382 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1383 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1384 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1385 if (dwOrgValue & EnCFG_BcnSusInd)
1386 break;
1387 }
1388 if (ww == W_MAX_TIMEOUT) {
1389 DBG_PORT80(0x34);
1390 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x34)\n");
1391 }
5449c685
FB		 1392}
1393
c3504bfd 1394bool MACbFlushSYNCFifo(unsigned long dwIoBase)
5449c685 1395{
c3504bfd
JP		 1396 unsigned char byOrgValue;
1397 unsigned int ww;
1398 // Read MACCR
1399 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1400
1401 // Set SYNCFLUSH
1402 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1403 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1404
1405 // Check if SyncFlushOK
1406 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1407 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1408 if (byOrgValue & MACCR_SYNCFLUSHOK)
1409 break;
1410 }
1411 if (ww == W_MAX_TIMEOUT) {
1412 DBG_PORT80(0x35);
1413 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1414 }
1415 return true;
5449c685
FB		 1416}
1417
c3504bfd 1418bool MACbPSWakeup(unsigned long dwIoBase)
5449c685 1419{
c3504bfd
JP		 1420 unsigned char byOrgValue;
1421 unsigned int ww;
1422 // Read PSCTL
1423 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) {
1424 return true;
1425 }
1426 // Disable PS
1427 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1428
1429 // Check if SyncFlushOK
1430 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1431 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1432 if (byOrgValue & PSCTL_WAKEDONE)
1433 break;
1434 }
1435 if (ww == W_MAX_TIMEOUT) {
1436 DBG_PORT80(0x36);
1437 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1438 return false;
1439 }
1440 return true;
5449c685
FB		 1441}
1442
1443/*
1444 * Description:
1445 * Set the Key by MISCFIFO
1446 *
1447 * Parameters:
1448 * In:
1449 * dwIoBase - Base Address for MAC
1450 *
1451 * Out:
1452 * none
1453 *
1454 * Return Value: none
1455 *
1456 */
1457
c3504bfd
JP		 1458void MACvSetKeyEntry(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
1459 unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID)
5449c685 1460{
c3504bfd
JP		 1461 unsigned short wOffset;
1462 unsigned long dwData;
1463 int ii;
1464
1465 if (byLocalID <= 1)
1466 return;
1467
1468
1469 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetKeyEntry\n");
1470 wOffset = MISCFIFO_KEYETRY0;
1471 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1472
1473 dwData = 0;
1474 dwData |= wKeyCtl;
1475 dwData <<= 16;
1476 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1477 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1478
1479 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1480 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1481 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1482 wOffset++;
1483
1484 dwData = 0;
1485 dwData |= *(pbyAddr+3);
1486 dwData <<= 8;
1487 dwData |= *(pbyAddr+2);
1488 dwData <<= 8;
1489 dwData |= *(pbyAddr+1);
1490 dwData <<= 8;
1491 dwData |= *(pbyAddr+0);
1492 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "2. wOffset: %d, Data: %lX\n", wOffset, dwData);
1493
1494 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1495 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1496 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1497 wOffset++;
1498
1499 wOffset += (uKeyIdx * 4);
1500 for (ii = 0; ii < 4; ii++) {
1501 // always push 128 bits
1502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1503 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1504 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1505 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1506 }
5449c685
FB		 1507}
1508
1509
1510
1511/*
1512 * Description:
1513 * Disable the Key Entry by MISCFIFO
1514 *
1515 * Parameters:
1516 * In:
1517 * dwIoBase - Base Address for MAC
1518 *
1519 * Out:
1520 * none
1521 *
1522 * Return Value: none
1523 *
1524 */
c3504bfd 1525void MACvDisableKeyEntry(unsigned long dwIoBase, unsigned int uEntryIdx)
5449c685 1526{
c3504bfd 1527 unsigned short wOffset;
5449c685 1528
c3504bfd
JP		 1529 wOffset = MISCFIFO_KEYETRY0;
1530 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
5449c685 1531
c3504bfd
JP		 1532 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1533 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1534 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
5449c685
FB		 1535}
1536
1537
1538/*
1539 * Description:
1540 * Set the default Key (KeyEntry[10]) by MISCFIFO
1541 *
1542 * Parameters:
1543 * In:
1544 * dwIoBase - Base Address for MAC
1545 *
1546 * Out:
1547 * none
1548 *
1549 * Return Value: none
1550 *
1551 */
1552
c3504bfd
JP		 1553void MACvSetDefaultKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
1554 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
5449c685 1555{
c3504bfd
JP		 1556 unsigned short wOffset;
1557 unsigned long dwData;
1558 int ii;
1559
1560 if (byLocalID <= 1)
1561 return;
1562
1563 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetDefaultKeyEntry\n");
1564 wOffset = MISCFIFO_KEYETRY0;
1565 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1566
1567 wOffset++;
1568 wOffset++;
1569 wOffset += (uKeyIdx * 4);
1570 // always push 128 bits
1571 for (ii = 0; ii < 3; ii++) {
1572 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1573 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1574 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1575 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1576 }
1577 dwData = *pdwKey;
1578 if (uKeyLen == WLAN_WEP104_KEYLEN) {
1579 dwData |= 0x80000000;
1580 }
1581 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1582 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1583 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1584 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
5449c685
FB		 1585
1586}
1587
1588
1589/*
1590 * Description:
1591 * Enable default Key (KeyEntry[10]) by MISCFIFO
1592 *
1593 * Parameters:
1594 * In:
1595 * dwIoBase - Base Address for MAC
1596 *
1597 * Out:
1598 * none
1599 *
1600 * Return Value: none
1601 *
1602 */
1603/*
c3504bfd
JP		 1604 void MACvEnableDefaultKey(unsigned long dwIoBase, unsigned char byLocalID)
1605 {
1606 unsigned short wOffset;
1607 unsigned long dwData;
5449c685
FB		 1608
1609
c3504bfd
JP		 1610 if (byLocalID <= 1)
1611 return;
5449c685 1612
c3504bfd
JP		 1613 wOffset = MISCFIFO_KEYETRY0;
1614 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
5449c685 1615
c3504bfd
JP		 1616 dwData = 0xC0440000;
1617 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1618 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1619 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1620 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
5449c685 1621
c3504bfd 1622 }
5449c685
FB		 1623*/
1624
1625/*
1626 * Description:
1627 * Disable default Key (KeyEntry[10]) by MISCFIFO
1628 *
1629 * Parameters:
1630 * In:
1631 * dwIoBase - Base Address for MAC
1632 *
1633 * Out:
1634 * none
1635 *
1636 * Return Value: none
1637 *
1638 */
c3504bfd 1639void MACvDisableDefaultKey(unsigned long dwIoBase)
5449c685 1640{
c3504bfd
JP		 1641 unsigned short wOffset;
1642 unsigned long dwData;
5449c685
FB		 1643
1644
c3504bfd
JP		 1645 wOffset = MISCFIFO_KEYETRY0;
1646 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
5449c685 1647
c3504bfd
JP		 1648 dwData = 0x0;
1649 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1650 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1651 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1652 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
5449c685
FB		 1653}
1654
1655/*
1656 * Description:
1657 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1658 *
1659 * Parameters:
1660 * In:
1661 * dwIoBase - Base Address for MAC
1662 *
1663 * Out:
1664 * none
1665 *
1666 * Return Value: none
1667 *
1668 */
c3504bfd
JP		 1669void MACvSetDefaultTKIPKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
1670 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
5449c685 1671{
c3504bfd
JP		 1672 unsigned short wOffset;
1673 unsigned long dwData;
1674 int ii;
1675
1676 if (byLocalID <= 1)
1677 return;
1678
1679
1680 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetDefaultTKIPKeyEntry\n");
1681 wOffset = MISCFIFO_KEYETRY0;
1682 // Kyle test : change offset from 10 -> 0
1683 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1684
1685 dwData = 0xC0660000;
1686 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1687 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1688 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1689 wOffset++;
1690
1691 dwData = 0;
1692 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1693 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1694 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1695 wOffset++;
1696
1697 wOffset += (uKeyIdx * 4);
1698 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx);
1699 // always push 128 bits
1700 for (ii = 0; ii < 4; ii++) {
1701 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1702 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1703 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1704 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1705 }
5449c685
FB		 1706
1707}
1708
1709
1710
1711/*
1712 * Description:
1713 * Set the Key Control by MISCFIFO
1714 *
1715 * Parameters:
1716 * In:
1717 * dwIoBase - Base Address for MAC
1718 *
1719 * Out:
1720 * none
1721 *
1722 * Return Value: none
1723 *
1724 */
1725
c3504bfd 1726void MACvSetDefaultKeyCtl(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID)
5449c685 1727{
c3504bfd
JP		 1728 unsigned short wOffset;
1729 unsigned long dwData;
5449c685 1730
c3504bfd
JP		 1731 if (byLocalID <= 1)
1732 return;
5449c685
FB		 1733
1734
c3504bfd
JP		 1735 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetKeyEntry\n");
1736 wOffset = MISCFIFO_KEYETRY0;
1737 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
5449c685 1738
c3504bfd
JP		 1739 dwData = 0;
1740 dwData |= wKeyCtl;
1741 dwData <<= 16;
1742 dwData |= 0xffff;
1743 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
5449c685 1744
c3504bfd
JP		 1745 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1746 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1747 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
5449c685
FB		 1748
1749}
1750
Linux kernel - Deliverables
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