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1 | /* |
2 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along | |
16 | * with this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * File: mac.c | |
20 | * | |
21 | * Purpose: MAC routines | |
22 | * | |
23 | * Author: Tevin Chen | |
24 | * | |
25 | * Date: May 21, 1996 | |
26 | * | |
27 | * Functions: | |
28 | * MACvReadAllRegs - Read All MAC Registers to buffer | |
29 | * MACbIsRegBitsOn - Test if All test Bits On | |
30 | * MACbIsRegBitsOff - Test if All test Bits Off | |
31 | * MACbIsIntDisable - Test if MAC interrupt disable | |
32 | * MACbyReadMultiAddr - Read Multicast Address Mask Pattern | |
33 | * MACvWriteMultiAddr - Write Multicast Address Mask Pattern | |
34 | * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value | |
35 | * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value | |
36 | * MACvSetRxThreshold - Set Rx Threshold value | |
37 | * MACvGetRxThreshold - Get Rx Threshold value | |
38 | * MACvSetTxThreshold - Set Tx Threshold value | |
39 | * MACvGetTxThreshold - Get Tx Threshold value | |
40 | * MACvSetDmaLength - Set Dma Length value | |
41 | * MACvGetDmaLength - Get Dma Length value | |
42 | * MACvSetShortRetryLimit - Set 802.11 Short Retry limit | |
43 | * MACvGetShortRetryLimit - Get 802.11 Short Retry limit | |
44 | * MACvSetLongRetryLimit - Set 802.11 Long Retry limit | |
45 | * MACvGetLongRetryLimit - Get 802.11 Long Retry limit | |
46 | * MACvSetLoopbackMode - Set MAC Loopback Mode | |
47 | * MACbIsInLoopbackMode - Test if MAC in Loopback mode | |
48 | * MACvSetPacketFilter - Set MAC Address Filter | |
49 | * MACvSaveContext - Save Context of MAC Registers | |
50 | * MACvRestoreContext - Restore Context of MAC Registers | |
51 | * MACbCompareContext - Compare if values of MAC Registers same as Context | |
52 | * MACbSoftwareReset - Software Reset MAC | |
53 | * MACbSafeRxOff - Turn Off MAC Rx | |
54 | * MACbSafeTxOff - Turn Off MAC Tx | |
55 | * MACbSafeStop - Stop MAC function | |
56 | * MACbShutdown - Shut down MAC | |
57 | * MACvInitialize - Initialize MAC | |
58 | * MACvSetCurrRxDescAddr - Set Rx Descriptos Address | |
59 | * MACvSetCurrTx0DescAddr - Set Tx0 Descriptos Address | |
60 | * MACvSetCurrTx1DescAddr - Set Tx1 Descriptos Address | |
61 | * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC | |
62 | * | |
63 | * Revision History: | |
64 | * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53 | |
65 | * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn() | |
66 | * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry | |
67 | * | |
68 | */ | |
69 | ||
70 | #if !defined(__TMACRO_H__) | |
71 | #include "tmacro.h" | |
72 | #endif | |
73 | #if !defined(__TBIT_H__) | |
74 | #include "tbit.h" | |
75 | #endif | |
76 | #if !defined(__TETHER_H__) | |
77 | #include "tether.h" | |
78 | #endif | |
79 | #if !defined(__MAC_H__) | |
80 | #include "mac.h" | |
81 | #endif | |
82 | ||
83 | ||
84 | WORD TxRate_iwconfig;//2008-5-8 <add> by chester | |
85 | /*--------------------- Static Definitions -------------------------*/ | |
86 | //static int msglevel =MSG_LEVEL_DEBUG; | |
87 | static int msglevel =MSG_LEVEL_INFO; | |
88 | /*--------------------- Static Classes ----------------------------*/ | |
89 | ||
90 | /*--------------------- Static Variables --------------------------*/ | |
91 | ||
92 | /*--------------------- Static Functions --------------------------*/ | |
93 | ||
94 | /*--------------------- Export Variables --------------------------*/ | |
95 | ||
96 | /*--------------------- Export Functions --------------------------*/ | |
97 | ||
98 | /* | |
99 | * Description: | |
100 | * Read All MAC Registers to buffer | |
101 | * | |
102 | * Parameters: | |
103 | * In: | |
104 | * dwIoBase - Base Address for MAC | |
105 | * Out: | |
106 | * pbyMacRegs - buffer to read | |
107 | * | |
108 | * Return Value: none | |
109 | * | |
110 | */ | |
111 | VOID MACvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyMacRegs) | |
112 | { | |
113 | int ii; | |
114 | ||
115 | // read page0 register | |
116 | for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) { | |
117 | VNSvInPortB(dwIoBase + ii, pbyMacRegs); | |
118 | pbyMacRegs++; | |
119 | } | |
120 | ||
121 | MACvSelectPage1(dwIoBase); | |
122 | ||
123 | // read page1 register | |
124 | for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { | |
125 | VNSvInPortB(dwIoBase + ii, pbyMacRegs); | |
126 | pbyMacRegs++; | |
127 | } | |
128 | ||
129 | MACvSelectPage0(dwIoBase); | |
130 | ||
131 | } | |
132 | ||
133 | /* | |
134 | * Description: | |
135 | * Test if all test bits on | |
136 | * | |
137 | * Parameters: | |
138 | * In: | |
139 | * dwIoBase - Base Address for MAC | |
140 | * byRegOfs - Offset of MAC Register | |
141 | * byTestBits - Test bits | |
142 | * Out: | |
143 | * none | |
144 | * | |
145 | * Return Value: TRUE if all test bits On; otherwise FALSE | |
146 | * | |
147 | */ | |
148 | BOOL MACbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits) | |
149 | { | |
150 | BYTE byData; | |
151 | ||
152 | VNSvInPortB(dwIoBase + byRegOfs, &byData); | |
153 | return BITbIsAllBitsOn(byData, byTestBits); | |
154 | } | |
155 | ||
156 | /* | |
157 | * Description: | |
158 | * Test if all test bits off | |
159 | * | |
160 | * Parameters: | |
161 | * In: | |
162 | * dwIoBase - Base Address for MAC | |
163 | * byRegOfs - Offset of MAC Register | |
164 | * byTestBits - Test bits | |
165 | * Out: | |
166 | * none | |
167 | * | |
168 | * Return Value: TRUE if all test bits Off; otherwise FALSE | |
169 | * | |
170 | */ | |
171 | BOOL MACbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits) | |
172 | { | |
173 | BYTE byData; | |
174 | ||
175 | VNSvInPortB(dwIoBase + byRegOfs, &byData); | |
176 | return BITbIsAllBitsOff(byData, byTestBits); | |
177 | } | |
178 | ||
179 | /* | |
180 | * Description: | |
181 | * Test if MAC interrupt disable | |
182 | * | |
183 | * Parameters: | |
184 | * In: | |
185 | * dwIoBase - Base Address for MAC | |
186 | * Out: | |
187 | * none | |
188 | * | |
189 | * Return Value: TRUE if interrupt is disable; otherwise FALSE | |
190 | * | |
191 | */ | |
192 | BOOL MACbIsIntDisable (DWORD_PTR dwIoBase) | |
193 | { | |
194 | DWORD dwData; | |
195 | ||
196 | VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData); | |
197 | if (dwData != 0) | |
198 | return FALSE; | |
199 | ||
200 | return TRUE; | |
201 | } | |
202 | ||
203 | /* | |
204 | * Description: | |
205 | * Read MAC Multicast Address Mask | |
206 | * | |
207 | * Parameters: | |
208 | * In: | |
209 | * dwIoBase - Base Address for MAC | |
210 | * uByteidx - Index of Mask | |
211 | * Out: | |
212 | * none | |
213 | * | |
214 | * Return Value: Mask Value read | |
215 | * | |
216 | */ | |
217 | BYTE MACbyReadMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx) | |
218 | { | |
219 | BYTE byData; | |
220 | ||
221 | MACvSelectPage1(dwIoBase); | |
222 | VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData); | |
223 | MACvSelectPage0(dwIoBase); | |
224 | return byData; | |
225 | } | |
226 | ||
227 | /* | |
228 | * Description: | |
229 | * Write MAC Multicast Address Mask | |
230 | * | |
231 | * Parameters: | |
232 | * In: | |
233 | * dwIoBase - Base Address for MAC | |
234 | * uByteidx - Index of Mask | |
235 | * byData - Mask Value to write | |
236 | * Out: | |
237 | * none | |
238 | * | |
239 | * Return Value: none | |
240 | * | |
241 | */ | |
242 | VOID MACvWriteMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData) | |
243 | { | |
244 | MACvSelectPage1(dwIoBase); | |
245 | VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData); | |
246 | MACvSelectPage0(dwIoBase); | |
247 | } | |
248 | ||
249 | /* | |
250 | * Description: | |
251 | * Set this hash index into multicast address register bit | |
252 | * | |
253 | * Parameters: | |
254 | * In: | |
255 | * dwIoBase - Base Address for MAC | |
256 | * byHashIdx - Hash index to set | |
257 | * Out: | |
258 | * none | |
259 | * | |
260 | * Return Value: none | |
261 | * | |
262 | */ | |
263 | void MACvSetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx) | |
264 | { | |
265 | UINT uByteIdx; | |
266 | BYTE byBitMask; | |
267 | BYTE byOrgValue; | |
268 | ||
269 | // calculate byte position | |
270 | uByteIdx = byHashIdx / 8; | |
271 | ASSERT(uByteIdx < 8); | |
272 | // calculate bit position | |
273 | byBitMask = 1; | |
274 | byBitMask <<= (byHashIdx % 8); | |
275 | // turn on the bit | |
276 | byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx); | |
277 | MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue | byBitMask)); | |
278 | } | |
279 | ||
280 | /* | |
281 | * Description: | |
282 | * Reset this hash index into multicast address register bit | |
283 | * | |
284 | * Parameters: | |
285 | * In: | |
286 | * dwIoBase - Base Address for MAC | |
287 | * byHashIdx - Hash index to clear | |
288 | * Out: | |
289 | * none | |
290 | * | |
291 | * Return Value: none | |
292 | * | |
293 | */ | |
294 | void MACvResetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx) | |
295 | { | |
296 | UINT uByteIdx; | |
297 | BYTE byBitMask; | |
298 | BYTE byOrgValue; | |
299 | ||
300 | // calculate byte position | |
301 | uByteIdx = byHashIdx / 8; | |
302 | ASSERT(uByteIdx < 8); | |
303 | // calculate bit position | |
304 | byBitMask = 1; | |
305 | byBitMask <<= (byHashIdx % 8); | |
306 | // turn off the bit | |
307 | byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx); | |
308 | MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue & (~byBitMask))); | |
309 | } | |
310 | ||
311 | /* | |
312 | * Description: | |
313 | * Set Rx Threshold | |
314 | * | |
315 | * Parameters: | |
316 | * In: | |
317 | * dwIoBase - Base Address for MAC | |
318 | * byThreshold - Threshold Value | |
319 | * Out: | |
320 | * none | |
321 | * | |
322 | * Return Value: none | |
323 | * | |
324 | */ | |
325 | void MACvSetRxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold) | |
326 | { | |
327 | BYTE byOrgValue; | |
328 | ||
329 | ASSERT(byThreshold < 4); | |
330 | ||
331 | // set FCR0 | |
332 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); | |
333 | byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4); | |
334 | VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); | |
335 | } | |
336 | ||
337 | /* | |
338 | * Description: | |
339 | * Get Rx Threshold | |
340 | * | |
341 | * Parameters: | |
342 | * In: | |
343 | * dwIoBase - Base Address for MAC | |
344 | * Out: | |
345 | * pbyThreshold- Threshold Value Get | |
346 | * | |
347 | * Return Value: none | |
348 | * | |
349 | */ | |
350 | void MACvGetRxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold) | |
351 | { | |
352 | // get FCR0 | |
353 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold); | |
354 | *pbyThreshold = (*pbyThreshold >> 4) & 0x03; | |
355 | } | |
356 | ||
357 | /* | |
358 | * Description: | |
359 | * Set Tx Threshold | |
360 | * | |
361 | * Parameters: | |
362 | * In: | |
363 | * dwIoBase - Base Address for MAC | |
364 | * byThreshold - Threshold Value | |
365 | * Out: | |
366 | * none | |
367 | * | |
368 | * Return Value: none | |
369 | * | |
370 | */ | |
371 | void MACvSetTxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold) | |
372 | { | |
373 | BYTE byOrgValue; | |
374 | ||
375 | ASSERT(byThreshold < 4); | |
376 | ||
377 | // set FCR0 | |
378 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); | |
379 | byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2); | |
380 | VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); | |
381 | } | |
382 | ||
383 | /* | |
384 | * Description: | |
385 | * Get Tx Threshold | |
386 | * | |
387 | * Parameters: | |
388 | * In: | |
389 | * dwIoBase - Base Address for MAC | |
390 | * Out: | |
391 | * pbyThreshold- Threshold Value Get | |
392 | * | |
393 | * Return Value: none | |
394 | * | |
395 | */ | |
396 | void MACvGetTxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold) | |
397 | { | |
398 | // get FCR0 | |
399 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold); | |
400 | *pbyThreshold = (*pbyThreshold >> 2) & 0x03; | |
401 | } | |
402 | ||
403 | /* | |
404 | * Description: | |
405 | * Set Dma Length | |
406 | * | |
407 | * Parameters: | |
408 | * In: | |
409 | * dwIoBase - Base Address for MAC | |
410 | * byDmaLength - Dma Length Value | |
411 | * Out: | |
412 | * none | |
413 | * | |
414 | * Return Value: none | |
415 | * | |
416 | */ | |
417 | void MACvSetDmaLength (DWORD_PTR dwIoBase, BYTE byDmaLength) | |
418 | { | |
419 | BYTE byOrgValue; | |
420 | ||
421 | ASSERT(byDmaLength < 4); | |
422 | ||
423 | // set FCR0 | |
424 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue); | |
425 | byOrgValue = (byOrgValue & 0xFC) | byDmaLength; | |
426 | VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue); | |
427 | } | |
428 | ||
429 | /* | |
430 | * Description: | |
431 | * Get Dma Length | |
432 | * | |
433 | * Parameters: | |
434 | * In: | |
435 | * dwIoBase - Base Address for MAC | |
436 | * Out: | |
437 | * pbyDmaLength- Dma Length Value Get | |
438 | * | |
439 | * Return Value: none | |
440 | * | |
441 | */ | |
442 | void MACvGetDmaLength (DWORD_PTR dwIoBase, PBYTE pbyDmaLength) | |
443 | { | |
444 | // get FCR0 | |
445 | VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength); | |
446 | *pbyDmaLength &= 0x03; | |
447 | } | |
448 | ||
449 | /* | |
450 | * Description: | |
451 | * Set 802.11 Short Retry Limit | |
452 | * | |
453 | * Parameters: | |
454 | * In: | |
455 | * dwIoBase - Base Address for MAC | |
456 | * byRetryLimit- Retry Limit | |
457 | * Out: | |
458 | * none | |
459 | * | |
460 | * Return Value: none | |
461 | * | |
462 | */ | |
463 | void MACvSetShortRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit) | |
464 | { | |
465 | // set SRT | |
466 | VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit); | |
467 | } | |
468 | ||
469 | /* | |
470 | * Description: | |
471 | * Get 802.11 Short Retry Limit | |
472 | * | |
473 | * Parameters: | |
474 | * In: | |
475 | * dwIoBase - Base Address for MAC | |
476 | * Out: | |
477 | * pbyRetryLimit - Retry Limit Get | |
478 | * | |
479 | * Return Value: none | |
480 | * | |
481 | */ | |
482 | void MACvGetShortRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit) | |
483 | { | |
484 | // get SRT | |
485 | VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit); | |
486 | } | |
487 | ||
488 | /* | |
489 | * Description: | |
490 | * Set 802.11 Long Retry Limit | |
491 | * | |
492 | * Parameters: | |
493 | * In: | |
494 | * dwIoBase - Base Address for MAC | |
495 | * byRetryLimit- Retry Limit | |
496 | * Out: | |
497 | * none | |
498 | * | |
499 | * Return Value: none | |
500 | * | |
501 | */ | |
502 | void MACvSetLongRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit) | |
503 | { | |
504 | // set LRT | |
505 | VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit); | |
506 | } | |
507 | ||
508 | /* | |
509 | * Description: | |
510 | * Get 802.11 Long Retry Limit | |
511 | * | |
512 | * Parameters: | |
513 | * In: | |
514 | * dwIoBase - Base Address for MAC | |
515 | * Out: | |
516 | * pbyRetryLimit - Retry Limit Get | |
517 | * | |
518 | * Return Value: none | |
519 | * | |
520 | */ | |
521 | void MACvGetLongRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit) | |
522 | { | |
523 | // get LRT | |
524 | VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit); | |
525 | } | |
526 | ||
527 | /* | |
528 | * Description: | |
529 | * Set MAC Loopback mode | |
530 | * | |
531 | * Parameters: | |
532 | * In: | |
533 | * dwIoBase - Base Address for MAC | |
534 | * byLoopbackMode - Loopback Mode | |
535 | * Out: | |
536 | * none | |
537 | * | |
538 | * Return Value: none | |
539 | * | |
540 | */ | |
541 | void MACvSetLoopbackMode (DWORD_PTR dwIoBase, BYTE byLoopbackMode) | |
542 | { | |
543 | BYTE byOrgValue; | |
544 | ||
545 | ASSERT(byLoopbackMode < 3); | |
546 | byLoopbackMode <<= 6; | |
547 | // set TCR | |
548 | VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue); | |
549 | byOrgValue = byOrgValue & 0x3F; | |
550 | byOrgValue = byOrgValue | byLoopbackMode; | |
551 | VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue); | |
552 | } | |
553 | ||
554 | /* | |
555 | * Description: | |
556 | * Test if MAC in Loopback mode | |
557 | * | |
558 | * Parameters: | |
559 | * In: | |
560 | * dwIoBase - Base Address for MAC | |
561 | * Out: | |
562 | * none | |
563 | * | |
564 | * Return Value: TRUE if in Loopback mode; otherwise FALSE | |
565 | * | |
566 | */ | |
567 | BOOL MACbIsInLoopbackMode (DWORD_PTR dwIoBase) | |
568 | { | |
569 | BYTE byOrgValue; | |
570 | ||
571 | VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue); | |
572 | if (BITbIsAnyBitsOn(byOrgValue, (TEST_LBINT | TEST_LBEXT))) | |
573 | return TRUE; | |
574 | return FALSE; | |
575 | } | |
576 | ||
577 | /* | |
578 | * Description: | |
579 | * Set MAC Address filter | |
580 | * | |
581 | * Parameters: | |
582 | * In: | |
583 | * dwIoBase - Base Address for MAC | |
584 | * wFilterType - Filter Type | |
585 | * Out: | |
586 | * none | |
587 | * | |
588 | * Return Value: none | |
589 | * | |
590 | */ | |
591 | void MACvSetPacketFilter (DWORD_PTR dwIoBase, WORD wFilterType) | |
592 | { | |
593 | BYTE byOldRCR; | |
594 | BYTE byNewRCR = 0; | |
595 | ||
596 | // if only in DIRECTED mode, multicast-address will set to zero, | |
597 | // but if other mode exist (e.g. PROMISCUOUS), multicast-address | |
598 | // will be open | |
599 | if (BITbIsBitOn(wFilterType, PKT_TYPE_DIRECTED)) { | |
600 | // set multicast address to accept none | |
601 | MACvSelectPage1(dwIoBase); | |
602 | VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L); | |
603 | VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0L); | |
604 | MACvSelectPage0(dwIoBase); | |
605 | } | |
606 | ||
607 | if (BITbIsAnyBitsOn(wFilterType, PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) { | |
608 | // set multicast address to accept all | |
609 | MACvSelectPage1(dwIoBase); | |
610 | VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL); | |
611 | VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0xFFFFFFFFL); | |
612 | MACvSelectPage0(dwIoBase); | |
613 | } | |
614 | ||
615 | if (BITbIsBitOn(wFilterType, PKT_TYPE_PROMISCUOUS)) { | |
616 | ||
617 | byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST); | |
618 | ||
619 | byNewRCR &= ~RCR_BSSID; | |
620 | } | |
621 | ||
622 | if (BITbIsAnyBitsOn(wFilterType, (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))) | |
623 | byNewRCR |= RCR_MULTICAST; | |
624 | ||
625 | if (BITbIsBitOn(wFilterType, PKT_TYPE_BROADCAST)) | |
626 | byNewRCR |= RCR_BROADCAST; | |
627 | ||
628 | if (BITbIsBitOn(wFilterType, PKT_TYPE_ERROR_CRC)) | |
629 | byNewRCR |= RCR_ERRCRC; | |
630 | ||
631 | VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR); | |
632 | if (byNewRCR != byOldRCR) { | |
633 | // Modify the Receive Command Register | |
634 | VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR); | |
635 | } | |
636 | } | |
637 | ||
638 | /* | |
639 | * Description: | |
640 | * Save MAC registers to context buffer | |
641 | * | |
642 | * Parameters: | |
643 | * In: | |
644 | * dwIoBase - Base Address for MAC | |
645 | * Out: | |
646 | * pbyCxtBuf - Context buffer | |
647 | * | |
648 | * Return Value: none | |
649 | * | |
650 | */ | |
651 | void MACvSaveContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf) | |
652 | { | |
653 | int ii; | |
654 | ||
655 | // read page0 register | |
656 | for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) { | |
657 | VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii)); | |
658 | } | |
659 | ||
660 | MACvSelectPage1(dwIoBase); | |
661 | ||
662 | // read page1 register | |
663 | for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { | |
664 | VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii)); | |
665 | } | |
666 | ||
667 | MACvSelectPage0(dwIoBase); | |
668 | } | |
669 | ||
670 | /* | |
671 | * Description: | |
672 | * Restore MAC registers from context buffer | |
673 | * | |
674 | * Parameters: | |
675 | * In: | |
676 | * dwIoBase - Base Address for MAC | |
677 | * pbyCxtBuf - Context buffer | |
678 | * Out: | |
679 | * none | |
680 | * | |
681 | * Return Value: none | |
682 | * | |
683 | */ | |
684 | VOID MACvRestoreContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf) | |
685 | { | |
686 | int ii; | |
687 | ||
688 | MACvSelectPage1(dwIoBase); | |
689 | // restore page1 | |
690 | for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) { | |
691 | VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii)); | |
692 | } | |
693 | MACvSelectPage0(dwIoBase); | |
694 | ||
695 | // restore RCR,TCR,IMR... | |
696 | for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) { | |
697 | VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); | |
698 | } | |
699 | // restore MAC Config. | |
700 | for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) { | |
701 | VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); | |
702 | } | |
703 | VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG)); | |
704 | ||
705 | // restore PS Config. | |
706 | for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) { | |
707 | VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); | |
708 | } | |
709 | ||
710 | // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR | |
711 | VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0)); | |
712 | VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR)); | |
713 | VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_BCNDMAPTR)); | |
714 | ||
715 | ||
716 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0)); | |
717 | ||
718 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1)); | |
719 | ||
720 | } | |
721 | ||
722 | /* | |
723 | * Description: | |
724 | * Compare if MAC registers same as context buffer | |
725 | * | |
726 | * Parameters: | |
727 | * In: | |
728 | * dwIoBase - Base Address for MAC | |
729 | * pbyCxtBuf - Context buffer | |
730 | * Out: | |
731 | * none | |
732 | * | |
733 | * Return Value: TRUE if all values are the same; otherwise FALSE | |
734 | * | |
735 | */ | |
736 | BOOL MACbCompareContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf) | |
737 | { | |
738 | DWORD dwData; | |
739 | ||
740 | // compare MAC context to determine if this is a power lost init, | |
741 | // return TRUE for power remaining init, return FALSE for power lost init | |
742 | ||
743 | // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR | |
744 | VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData); | |
745 | if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) { | |
746 | return FALSE; | |
747 | } | |
748 | ||
749 | VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData); | |
750 | if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) { | |
751 | return FALSE; | |
752 | } | |
753 | ||
754 | VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData); | |
755 | if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) { | |
756 | return FALSE; | |
757 | } | |
758 | ||
759 | VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData); | |
760 | if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) { | |
761 | return FALSE; | |
762 | } | |
763 | ||
764 | ||
765 | return TRUE; | |
766 | } | |
767 | ||
768 | /* | |
769 | * Description: | |
770 | * Software Reset MAC | |
771 | * | |
772 | * Parameters: | |
773 | * In: | |
774 | * dwIoBase - Base Address for MAC | |
775 | * Out: | |
776 | * none | |
777 | * | |
778 | * Return Value: TRUE if Reset Success; otherwise FALSE | |
779 | * | |
780 | */ | |
781 | BOOL MACbSoftwareReset (DWORD_PTR dwIoBase) | |
782 | { | |
783 | BYTE byData; | |
784 | WORD ww; | |
785 | ||
786 | // turn on HOSTCR_SOFTRST, just write 0x01 to reset | |
787 | //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST); | |
788 | VNSvOutPortB(dwIoBase+ MAC_REG_HOSTCR, 0x01); | |
789 | ||
790 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
791 | VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); | |
792 | if (BITbIsBitOff(byData, HOSTCR_SOFTRST)) | |
793 | break; | |
794 | } | |
795 | if (ww == W_MAX_TIMEOUT) | |
796 | return FALSE; | |
797 | return TRUE; | |
798 | ||
799 | } | |
800 | ||
801 | /* | |
802 | * Description: | |
803 | * save some important register's value, then do reset, then restore register's value | |
804 | * | |
805 | * Parameters: | |
806 | * In: | |
807 | * dwIoBase - Base Address for MAC | |
808 | * Out: | |
809 | * none | |
810 | * | |
811 | * Return Value: TRUE if success; otherwise FALSE | |
812 | * | |
813 | */ | |
814 | BOOL MACbSafeSoftwareReset (DWORD_PTR dwIoBase) | |
815 | { | |
816 | BYTE abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1]; | |
817 | BOOL bRetVal; | |
818 | ||
819 | // PATCH.... | |
820 | // save some important register's value, then do | |
821 | // reset, then restore register's value | |
822 | ||
823 | // save MAC context | |
824 | MACvSaveContext(dwIoBase, abyTmpRegData); | |
825 | // do reset | |
826 | bRetVal = MACbSoftwareReset(dwIoBase); | |
827 | //BBvSoftwareReset(pDevice->PortOffset); | |
828 | // restore MAC context, except CR0 | |
829 | MACvRestoreContext(dwIoBase, abyTmpRegData); | |
830 | ||
831 | return bRetVal; | |
832 | } | |
833 | ||
834 | /* | |
835 | * Description: | |
836 | * Trun Off MAC Rx | |
837 | * | |
838 | * Parameters: | |
839 | * In: | |
840 | * dwIoBase - Base Address for MAC | |
841 | * Out: | |
842 | * none | |
843 | * | |
844 | * Return Value: TRUE if success; otherwise FALSE | |
845 | * | |
846 | */ | |
847 | BOOL MACbSafeRxOff (DWORD_PTR dwIoBase) | |
848 | { | |
849 | WORD ww; | |
850 | DWORD dwData; | |
851 | BYTE byData; | |
852 | ||
853 | // turn off wow temp for turn off Rx safely | |
854 | ||
855 | // Clear RX DMA0,1 | |
856 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN); | |
857 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN); | |
858 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
859 | VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); | |
860 | if (BITbIsAllBitsOff(dwData, DMACTL_RUN)) | |
861 | break; | |
862 | } | |
863 | if (ww == W_MAX_TIMEOUT) { | |
864 | DBG_PORT80(0x10); | |
7e809a9b | 865 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x10)\n"); |
5449c685 FB |
866 | return(FALSE); |
867 | } | |
868 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
869 | VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); | |
870 | if (BITbIsAllBitsOff(dwData, DMACTL_RUN)) | |
871 | break; | |
872 | } | |
873 | if (ww == W_MAX_TIMEOUT) { | |
874 | DBG_PORT80(0x11); | |
7e809a9b | 875 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x11)\n"); |
5449c685 FB |
876 | return(FALSE); |
877 | } | |
878 | ||
879 | // try to safe shutdown RX | |
880 | MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON); | |
881 | // W_MAX_TIMEOUT is the timeout period | |
882 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
883 | VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); | |
884 | if (BITbIsAllBitsOff(byData, HOSTCR_RXONST)) | |
885 | break; | |
886 | } | |
887 | if (ww == W_MAX_TIMEOUT) { | |
888 | DBG_PORT80(0x12); | |
7e809a9b | 889 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x12)\n"); |
5449c685 FB |
890 | return(FALSE); |
891 | } | |
892 | return TRUE; | |
893 | } | |
894 | ||
895 | /* | |
896 | * Description: | |
897 | * Trun Off MAC Tx | |
898 | * | |
899 | * Parameters: | |
900 | * In: | |
901 | * dwIoBase - Base Address for MAC | |
902 | * Out: | |
903 | * none | |
904 | * | |
905 | * Return Value: TRUE if success; otherwise FALSE | |
906 | * | |
907 | */ | |
908 | BOOL MACbSafeTxOff (DWORD_PTR dwIoBase) | |
909 | { | |
910 | WORD ww; | |
911 | DWORD dwData; | |
912 | BYTE byData; | |
913 | ||
914 | // Clear TX DMA | |
915 | //Tx0 | |
916 | VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN); | |
917 | //AC0 | |
918 | VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN); | |
919 | ||
920 | ||
921 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
922 | VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); | |
923 | if (BITbIsAllBitsOff(dwData, DMACTL_RUN)) | |
924 | break; | |
925 | } | |
926 | if (ww == W_MAX_TIMEOUT) { | |
927 | DBG_PORT80(0x20); | |
7e809a9b | 928 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x20)\n"); |
5449c685 FB |
929 | return(FALSE); |
930 | } | |
931 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
932 | VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); | |
933 | if (BITbIsAllBitsOff(dwData, DMACTL_RUN)) | |
934 | break; | |
935 | } | |
936 | if (ww == W_MAX_TIMEOUT) { | |
937 | DBG_PORT80(0x21); | |
7e809a9b | 938 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x21)\n"); |
5449c685 FB |
939 | return(FALSE); |
940 | } | |
941 | ||
942 | // try to safe shutdown TX | |
943 | MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON); | |
944 | ||
945 | // W_MAX_TIMEOUT is the timeout period | |
946 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
947 | VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); | |
948 | if (BITbIsAllBitsOff(byData, HOSTCR_TXONST)) | |
949 | break; | |
950 | } | |
951 | if (ww == W_MAX_TIMEOUT) { | |
952 | DBG_PORT80(0x24); | |
7e809a9b | 953 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x24)\n"); |
5449c685 FB |
954 | return(FALSE); |
955 | } | |
956 | return TRUE; | |
957 | } | |
958 | ||
959 | /* | |
960 | * Description: | |
961 | * Stop MAC function | |
962 | * | |
963 | * Parameters: | |
964 | * In: | |
965 | * dwIoBase - Base Address for MAC | |
966 | * Out: | |
967 | * none | |
968 | * | |
969 | * Return Value: TRUE if success; otherwise FALSE | |
970 | * | |
971 | */ | |
972 | BOOL MACbSafeStop (DWORD_PTR dwIoBase) | |
973 | { | |
974 | MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX); | |
975 | ||
976 | if (MACbSafeRxOff(dwIoBase) == FALSE) { | |
977 | DBG_PORT80(0xA1); | |
7e809a9b | 978 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeRxOff == FALSE)\n"); |
5449c685 FB |
979 | MACbSafeSoftwareReset(dwIoBase); |
980 | return FALSE; | |
981 | } | |
982 | if (MACbSafeTxOff(dwIoBase) == FALSE) { | |
983 | DBG_PORT80(0xA2); | |
7e809a9b | 984 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeTxOff == FALSE)\n"); |
5449c685 FB |
985 | MACbSafeSoftwareReset(dwIoBase); |
986 | return FALSE; | |
987 | } | |
988 | ||
989 | MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN); | |
990 | ||
991 | return TRUE; | |
992 | } | |
993 | ||
994 | /* | |
995 | * Description: | |
996 | * Shut Down MAC | |
997 | * | |
998 | * Parameters: | |
999 | * In: | |
1000 | * dwIoBase - Base Address for MAC | |
1001 | * Out: | |
1002 | * none | |
1003 | * | |
1004 | * Return Value: TRUE if success; otherwise FALSE | |
1005 | * | |
1006 | */ | |
1007 | BOOL MACbShutdown (DWORD_PTR dwIoBase) | |
1008 | { | |
1009 | // disable MAC IMR | |
1010 | MACvIntDisable(dwIoBase); | |
1011 | MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL); | |
1012 | // stop the adapter | |
1013 | if (!MACbSafeStop(dwIoBase)) { | |
1014 | MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); | |
1015 | return FALSE; | |
1016 | } | |
1017 | MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); | |
1018 | return TRUE; | |
1019 | } | |
1020 | ||
1021 | /* | |
1022 | * Description: | |
1023 | * Initialize MAC | |
1024 | * | |
1025 | * Parameters: | |
1026 | * In: | |
1027 | * dwIoBase - Base Address for MAC | |
1028 | * Out: | |
1029 | * none | |
1030 | * | |
1031 | * Return Value: none | |
1032 | * | |
1033 | */ | |
1034 | void MACvInitialize (DWORD_PTR dwIoBase) | |
1035 | { | |
1036 | // clear sticky bits | |
1037 | MACvClearStckDS(dwIoBase); | |
1038 | // disable force PME-enable | |
1039 | VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR); | |
1040 | // only 3253 A | |
1041 | /* | |
1042 | MACvPwrEvntDisable(dwIoBase); | |
1043 | // clear power status | |
1044 | VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F); | |
1045 | */ | |
1046 | ||
1047 | // do reset | |
1048 | MACbSoftwareReset(dwIoBase); | |
1049 | ||
1050 | // issue AUTOLD in EECSR to reload eeprom | |
1051 | //MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD); | |
1052 | // wait until EEPROM loading complete | |
1053 | //while (TRUE) { | |
1054 | // U8 u8Data; | |
1055 | // VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &u8Data); | |
1056 | // if (BITbIsBitOff(u8Data, I2MCSR_AUTOLD)) | |
1057 | // break; | |
1058 | //} | |
1059 | ||
1060 | // reset TSF counter | |
1061 | VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); | |
1062 | // enable TSF counter | |
1063 | VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); | |
1064 | ||
1065 | ||
1066 | // set packet filter | |
1067 | // receive directed and broadcast address | |
1068 | ||
1069 | MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST); | |
1070 | ||
1071 | } | |
1072 | ||
1073 | /* | |
1074 | * Description: | |
1075 | * Set the chip with current rx descriptor address | |
1076 | * | |
1077 | * Parameters: | |
1078 | * In: | |
1079 | * dwIoBase - Base Address for MAC | |
1080 | * dwCurrDescAddr - Descriptor Address | |
1081 | * Out: | |
1082 | * none | |
1083 | * | |
1084 | * Return Value: none | |
1085 | * | |
1086 | */ | |
1087 | void MACvSetCurrRx0DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr) | |
1088 | { | |
1089 | WORD ww; | |
1090 | BYTE byData; | |
1091 | BYTE byOrgDMACtl; | |
1092 | ||
1093 | VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl); | |
1094 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1095 | VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN); | |
1096 | } | |
1097 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1098 | VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData); | |
1099 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1100 | break; | |
1101 | } | |
1102 | if (ww == W_MAX_TIMEOUT) { | |
1103 | DBG_PORT80(0x13); | |
1104 | } | |
1105 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr); | |
1106 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1107 | VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); | |
1108 | } | |
1109 | } | |
1110 | ||
1111 | /* | |
1112 | * Description: | |
1113 | * Set the chip with current rx descriptor address | |
1114 | * | |
1115 | * Parameters: | |
1116 | * In: | |
1117 | * dwIoBase - Base Address for MAC | |
1118 | * dwCurrDescAddr - Descriptor Address | |
1119 | * Out: | |
1120 | * none | |
1121 | * | |
1122 | * Return Value: none | |
1123 | * | |
1124 | */ | |
1125 | void MACvSetCurrRx1DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr) | |
1126 | { | |
1127 | WORD ww; | |
1128 | BYTE byData; | |
1129 | BYTE byOrgDMACtl; | |
1130 | ||
1131 | VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl); | |
1132 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1133 | VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN); | |
1134 | } | |
1135 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1136 | VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData); | |
1137 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1138 | break; | |
1139 | } | |
1140 | if (ww == W_MAX_TIMEOUT) { | |
1141 | DBG_PORT80(0x14); | |
1142 | } | |
1143 | VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr); | |
1144 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1145 | VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); | |
1146 | } | |
1147 | } | |
1148 | ||
1149 | /* | |
1150 | * Description: | |
1151 | * Set the chip with current tx0 descriptor address | |
1152 | * | |
1153 | * Parameters: | |
1154 | * In: | |
1155 | * dwIoBase - Base Address for MAC | |
1156 | * dwCurrDescAddr - Descriptor Address | |
1157 | * Out: | |
1158 | * none | |
1159 | * | |
1160 | * Return Value: none | |
1161 | * | |
1162 | */ | |
1163 | void MACvSetCurrTx0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr) | |
1164 | { | |
1165 | WORD ww; | |
1166 | BYTE byData; | |
1167 | BYTE byOrgDMACtl; | |
1168 | ||
1169 | VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl); | |
1170 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1171 | VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN); | |
1172 | } | |
1173 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1174 | VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData); | |
1175 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1176 | break; | |
1177 | } | |
1178 | if (ww == W_MAX_TIMEOUT) { | |
1179 | DBG_PORT80(0x25); | |
1180 | } | |
1181 | VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr); | |
1182 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1183 | VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | /* | |
1188 | * Description: | |
1189 | * Set the chip with current AC0 descriptor address | |
1190 | * | |
1191 | * Parameters: | |
1192 | * In: | |
1193 | * dwIoBase - Base Address for MAC | |
1194 | * dwCurrDescAddr - Descriptor Address | |
1195 | * Out: | |
1196 | * none | |
1197 | * | |
1198 | * Return Value: none | |
1199 | * | |
1200 | */ | |
1201 | //TxDMA1 = AC0DMA | |
1202 | void MACvSetCurrAC0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr) | |
1203 | { | |
1204 | WORD ww; | |
1205 | BYTE byData; | |
1206 | BYTE byOrgDMACtl; | |
1207 | ||
1208 | VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl); | |
1209 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1210 | VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN); | |
1211 | } | |
1212 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1213 | VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData); | |
1214 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1215 | break; | |
1216 | } | |
1217 | if (ww == W_MAX_TIMEOUT) { | |
1218 | DBG_PORT80(0x26); | |
7e809a9b | 1219 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x26)\n"); |
5449c685 FB |
1220 | } |
1221 | VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr); | |
1222 | if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) { | |
1223 | VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); | |
1224 | } | |
1225 | } | |
1226 | ||
1227 | ||
1228 | ||
1229 | void MACvSetCurrTXDescAddr (int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAddr) | |
1230 | { | |
1231 | if(iTxType == TYPE_AC0DMA){ | |
1232 | MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr); | |
1233 | }else if(iTxType == TYPE_TXDMA0){ | |
1234 | MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr); | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | /* | |
1239 | * Description: | |
1240 | * Micro Second Delay via MAC | |
1241 | * | |
1242 | * Parameters: | |
1243 | * In: | |
1244 | * dwIoBase - Base Address for MAC | |
1245 | * uDelay - Delay time (timer resolution is 4 us) | |
1246 | * Out: | |
1247 | * none | |
1248 | * | |
1249 | * Return Value: none | |
1250 | * | |
1251 | */ | |
1252 | VOID MACvTimer0MicroSDelay (DWORD_PTR dwIoBase, UINT uDelay) | |
1253 | { | |
1254 | BYTE byValue; | |
1255 | UINT uu,ii; | |
1256 | ||
1257 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); | |
1258 | VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay); | |
1259 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE)); | |
1260 | for(ii=0;ii<66;ii++) { // assume max PCI clock is 66Mhz | |
1261 | for (uu = 0; uu < uDelay; uu++) { | |
1262 | VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue); | |
1263 | if ((byValue == 0) || | |
1264 | (BITbIsAllBitsOn(byValue, TMCTL_TSUSP))) { | |
1265 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); | |
1266 | return; | |
1267 | } | |
1268 | } | |
1269 | } | |
1270 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); | |
1271 | ||
1272 | } | |
1273 | ||
1274 | /* | |
1275 | * Description: | |
1276 | * Micro Second One shot timer via MAC | |
1277 | * | |
1278 | * Parameters: | |
1279 | * In: | |
1280 | * dwIoBase - Base Address for MAC | |
1281 | * uDelay - Delay time | |
1282 | * Out: | |
1283 | * none | |
1284 | * | |
1285 | * Return Value: none | |
1286 | * | |
1287 | */ | |
1288 | void MACvOneShotTimer0MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime) | |
1289 | { | |
1290 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); | |
1291 | VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime); | |
1292 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE)); | |
1293 | } | |
1294 | ||
1295 | /* | |
1296 | * Description: | |
1297 | * Micro Second One shot timer via MAC | |
1298 | * | |
1299 | * Parameters: | |
1300 | * In: | |
1301 | * dwIoBase - Base Address for MAC | |
1302 | * uDelay - Delay time | |
1303 | * Out: | |
1304 | * none | |
1305 | * | |
1306 | * Return Value: none | |
1307 | * | |
1308 | */ | |
1309 | void MACvOneShotTimer1MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime) | |
1310 | { | |
1311 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0); | |
1312 | VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime); | |
1313 | VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE)); | |
1314 | } | |
1315 | ||
1316 | ||
1317 | void MACvSetMISCFifo (DWORD_PTR dwIoBase, WORD wOffset, DWORD dwData) | |
1318 | { | |
1319 | if (wOffset > 273) | |
1320 | return; | |
1321 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1322 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1323 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1324 | } | |
1325 | ||
1326 | ||
1327 | BOOL MACbTxDMAOff (DWORD_PTR dwIoBase, UINT idx) | |
1328 | { | |
1329 | BYTE byData; | |
1330 | UINT ww = 0; | |
1331 | ||
1332 | if (idx == TYPE_TXDMA0) { | |
1333 | VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN); | |
1334 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1335 | VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData); | |
1336 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1337 | break; | |
1338 | } | |
1339 | } else if (idx == TYPE_AC0DMA) { | |
1340 | VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN); | |
1341 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1342 | VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData); | |
1343 | if (BITbIsAllBitsOff(byData, DMACTL_RUN)) | |
1344 | break; | |
1345 | } | |
1346 | } | |
1347 | if (ww == W_MAX_TIMEOUT) { | |
1348 | DBG_PORT80(0x29); | |
7e809a9b | 1349 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x29)\n"); |
5449c685 FB |
1350 | return FALSE; |
1351 | } | |
1352 | return TRUE; | |
1353 | } | |
1354 | ||
1355 | void MACvClearBusSusInd (DWORD_PTR dwIoBase) | |
1356 | { | |
1357 | DWORD dwOrgValue; | |
1358 | UINT ww; | |
1359 | // check if BcnSusInd enabled | |
1360 | VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); | |
1361 | if(BITbIsBitOff(dwOrgValue, EnCFG_BcnSusInd)) | |
1362 | return; | |
1363 | //Set BcnSusClr | |
1364 | dwOrgValue = dwOrgValue | EnCFG_BcnSusClr; | |
1365 | VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); | |
1366 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1367 | VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); | |
1368 | if(BITbIsBitOff(dwOrgValue, EnCFG_BcnSusInd)) | |
1369 | break; | |
1370 | } | |
1371 | if (ww == W_MAX_TIMEOUT) { | |
1372 | DBG_PORT80(0x33); | |
7e809a9b | 1373 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); |
5449c685 FB |
1374 | } |
1375 | } | |
1376 | ||
1377 | void MACvEnableBusSusEn (DWORD_PTR dwIoBase) | |
1378 | { | |
1379 | BYTE byOrgValue; | |
1380 | DWORD dwOrgValue; | |
1381 | UINT ww; | |
1382 | // check if BcnSusInd enabled | |
1383 | VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue); | |
1384 | ||
1385 | //Set BcnSusEn | |
1386 | byOrgValue = byOrgValue | CFG_BCNSUSEN; | |
1387 | VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue); | |
1388 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1389 | VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); | |
1390 | if(BITbIsBitOn(dwOrgValue, EnCFG_BcnSusInd)) | |
1391 | break; | |
1392 | } | |
1393 | if (ww == W_MAX_TIMEOUT) { | |
1394 | DBG_PORT80(0x34); | |
7e809a9b | 1395 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x34)\n"); |
5449c685 FB |
1396 | } |
1397 | } | |
1398 | ||
1399 | BOOL MACbFlushSYNCFifo (DWORD_PTR dwIoBase) | |
1400 | { | |
1401 | BYTE byOrgValue; | |
1402 | UINT ww; | |
1403 | // Read MACCR | |
1404 | VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue); | |
1405 | ||
1406 | // Set SYNCFLUSH | |
1407 | byOrgValue = byOrgValue | MACCR_SYNCFLUSH; | |
1408 | VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue); | |
1409 | ||
1410 | // Check if SyncFlushOK | |
1411 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1412 | VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue); | |
1413 | if(BITbIsBitOn(byOrgValue, MACCR_SYNCFLUSHOK)) | |
1414 | break; | |
1415 | } | |
1416 | if (ww == W_MAX_TIMEOUT) { | |
1417 | DBG_PORT80(0x35); | |
7e809a9b | 1418 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); |
5449c685 FB |
1419 | } |
1420 | return TRUE; | |
1421 | } | |
1422 | ||
1423 | BOOL MACbPSWakeup (DWORD_PTR dwIoBase) | |
1424 | { | |
1425 | BYTE byOrgValue; | |
1426 | UINT ww; | |
1427 | // Read PSCTL | |
1428 | if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) { | |
1429 | return TRUE; | |
1430 | } | |
1431 | // Disable PS | |
1432 | MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN); | |
1433 | ||
1434 | // Check if SyncFlushOK | |
1435 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
1436 | VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue); | |
1437 | if(BITbIsBitOn(byOrgValue, PSCTL_WAKEDONE)) | |
1438 | break; | |
1439 | } | |
1440 | if (ww == W_MAX_TIMEOUT) { | |
1441 | DBG_PORT80(0x36); | |
7e809a9b | 1442 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n"); |
5449c685 FB |
1443 | return FALSE; |
1444 | } | |
1445 | return TRUE; | |
1446 | } | |
1447 | ||
1448 | /* | |
1449 | * Description: | |
1450 | * Set the Key by MISCFIFO | |
1451 | * | |
1452 | * Parameters: | |
1453 | * In: | |
1454 | * dwIoBase - Base Address for MAC | |
1455 | * | |
1456 | * Out: | |
1457 | * none | |
1458 | * | |
1459 | * Return Value: none | |
1460 | * | |
1461 | */ | |
1462 | ||
1463 | void MACvSetKeyEntry (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, UINT uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey, BYTE byLocalID) | |
1464 | { | |
1465 | WORD wOffset; | |
1466 | DWORD dwData; | |
1467 | int ii; | |
1468 | ||
1469 | if (byLocalID <= 1) | |
1470 | return; | |
1471 | ||
1472 | ||
7e809a9b | 1473 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n"); |
5449c685 FB |
1474 | wOffset = MISCFIFO_KEYETRY0; |
1475 | wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); | |
1476 | ||
1477 | dwData = 0; | |
1478 | dwData |= wKeyCtl; | |
1479 | dwData <<= 16; | |
1480 | dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5)); | |
7e809a9b | 1481 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl); |
5449c685 FB |
1482 | |
1483 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1484 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1485 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1486 | wOffset++; | |
1487 | ||
1488 | dwData = 0; | |
1489 | dwData |= *(pbyAddr+3); | |
1490 | dwData <<= 8; | |
1491 | dwData |= *(pbyAddr+2); | |
1492 | dwData <<= 8; | |
1493 | dwData |= *(pbyAddr+1); | |
1494 | dwData <<= 8; | |
1495 | dwData |= *(pbyAddr+0); | |
7e809a9b | 1496 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %lX\n", wOffset, dwData); |
5449c685 FB |
1497 | |
1498 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1499 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1500 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1501 | wOffset++; | |
1502 | ||
1503 | wOffset += (uKeyIdx * 4); | |
1504 | for (ii=0;ii<4;ii++) { | |
1505 | // alway push 128 bits | |
7e809a9b | 1506 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); |
5449c685 FB |
1507 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); |
1508 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); | |
1509 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1510 | } | |
1511 | } | |
1512 | ||
1513 | ||
1514 | ||
1515 | /* | |
1516 | * Description: | |
1517 | * Disable the Key Entry by MISCFIFO | |
1518 | * | |
1519 | * Parameters: | |
1520 | * In: | |
1521 | * dwIoBase - Base Address for MAC | |
1522 | * | |
1523 | * Out: | |
1524 | * none | |
1525 | * | |
1526 | * Return Value: none | |
1527 | * | |
1528 | */ | |
1529 | void MACvDisableKeyEntry (DWORD_PTR dwIoBase, UINT uEntryIdx) | |
1530 | { | |
1531 | WORD wOffset; | |
1532 | ||
1533 | wOffset = MISCFIFO_KEYETRY0; | |
1534 | wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); | |
1535 | ||
1536 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1537 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0); | |
1538 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1539 | } | |
1540 | ||
1541 | ||
1542 | /* | |
1543 | * Description: | |
1544 | * Set the default Key (KeyEntry[10]) by MISCFIFO | |
1545 | * | |
1546 | * Parameters: | |
1547 | * In: | |
1548 | * dwIoBase - Base Address for MAC | |
1549 | * | |
1550 | * Out: | |
1551 | * none | |
1552 | * | |
1553 | * Return Value: none | |
1554 | * | |
1555 | */ | |
1556 | ||
1557 | void MACvSetDefaultKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID) | |
1558 | { | |
1559 | WORD wOffset; | |
1560 | DWORD dwData; | |
1561 | int ii; | |
1562 | ||
1563 | if (byLocalID <= 1) | |
1564 | return; | |
1565 | ||
7e809a9b | 1566 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultKeyEntry\n"); |
5449c685 FB |
1567 | wOffset = MISCFIFO_KEYETRY0; |
1568 | wOffset += (10 * MISCFIFO_KEYENTRYSIZE); | |
1569 | ||
1570 | wOffset++; | |
1571 | wOffset++; | |
1572 | wOffset += (uKeyIdx * 4); | |
1573 | // alway push 128 bits | |
1574 | for (ii=0; ii<3; ii++) { | |
7e809a9b | 1575 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); |
5449c685 FB |
1576 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); |
1577 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); | |
1578 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1579 | } | |
1580 | dwData = *pdwKey; | |
1581 | if (uKeyLen == WLAN_WEP104_KEYLEN) { | |
1582 | dwData |= 0x80000000; | |
1583 | } | |
1584 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3); | |
1585 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1586 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
7e809a9b | 1587 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"End. wOffset: %d, Data: %lX\n", wOffset+3, dwData); |
5449c685 FB |
1588 | |
1589 | } | |
1590 | ||
1591 | ||
1592 | /* | |
1593 | * Description: | |
1594 | * Enable default Key (KeyEntry[10]) by MISCFIFO | |
1595 | * | |
1596 | * Parameters: | |
1597 | * In: | |
1598 | * dwIoBase - Base Address for MAC | |
1599 | * | |
1600 | * Out: | |
1601 | * none | |
1602 | * | |
1603 | * Return Value: none | |
1604 | * | |
1605 | */ | |
1606 | /* | |
1607 | void MACvEnableDefaultKey (DWORD_PTR dwIoBase, BYTE byLocalID) | |
1608 | { | |
1609 | WORD wOffset; | |
1610 | DWORD dwData; | |
1611 | ||
1612 | ||
1613 | if (byLocalID <= 1) | |
1614 | return; | |
1615 | ||
1616 | wOffset = MISCFIFO_KEYETRY0; | |
1617 | wOffset += (10 * MISCFIFO_KEYENTRYSIZE); | |
1618 | ||
1619 | dwData = 0xC0440000; | |
1620 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1621 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1622 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
7e809a9b | 1623 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData); |
5449c685 FB |
1624 | |
1625 | } | |
1626 | */ | |
1627 | ||
1628 | /* | |
1629 | * Description: | |
1630 | * Disable default Key (KeyEntry[10]) by MISCFIFO | |
1631 | * | |
1632 | * Parameters: | |
1633 | * In: | |
1634 | * dwIoBase - Base Address for MAC | |
1635 | * | |
1636 | * Out: | |
1637 | * none | |
1638 | * | |
1639 | * Return Value: none | |
1640 | * | |
1641 | */ | |
1642 | void MACvDisableDefaultKey (DWORD_PTR dwIoBase) | |
1643 | { | |
1644 | WORD wOffset; | |
1645 | DWORD dwData; | |
1646 | ||
1647 | ||
1648 | wOffset = MISCFIFO_KEYETRY0; | |
1649 | wOffset += (10 * MISCFIFO_KEYENTRYSIZE); | |
1650 | ||
1651 | dwData = 0x0; | |
1652 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1653 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1654 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
7e809a9b | 1655 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData); |
5449c685 FB |
1656 | } |
1657 | ||
1658 | /* | |
1659 | * Description: | |
1660 | * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO | |
1661 | * | |
1662 | * Parameters: | |
1663 | * In: | |
1664 | * dwIoBase - Base Address for MAC | |
1665 | * | |
1666 | * Out: | |
1667 | * none | |
1668 | * | |
1669 | * Return Value: none | |
1670 | * | |
1671 | */ | |
1672 | void MACvSetDefaultTKIPKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID) | |
1673 | { | |
1674 | WORD wOffset; | |
1675 | DWORD dwData; | |
1676 | int ii; | |
1677 | ||
1678 | if (byLocalID <= 1) | |
1679 | return; | |
1680 | ||
1681 | ||
7e809a9b | 1682 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultTKIPKeyEntry\n"); |
5449c685 FB |
1683 | wOffset = MISCFIFO_KEYETRY0; |
1684 | // Kyle test : change offset from 10 -> 0 | |
1685 | wOffset += (10 * MISCFIFO_KEYENTRYSIZE); | |
1686 | ||
1687 | dwData = 0xC0660000; | |
1688 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1689 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1690 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1691 | wOffset++; | |
1692 | ||
1693 | dwData = 0; | |
1694 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1695 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1696 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1697 | wOffset++; | |
1698 | ||
1699 | wOffset += (uKeyIdx * 4); | |
7e809a9b | 1700 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx); |
5449c685 FB |
1701 | // alway push 128 bits |
1702 | for (ii=0; ii<4; ii++) { | |
7e809a9b | 1703 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey); |
5449c685 FB |
1704 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); |
1705 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); | |
1706 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1707 | } | |
1708 | ||
1709 | } | |
1710 | ||
1711 | ||
1712 | ||
1713 | /* | |
1714 | * Description: | |
1715 | * Set the Key Control by MISCFIFO | |
1716 | * | |
1717 | * Parameters: | |
1718 | * In: | |
1719 | * dwIoBase - Base Address for MAC | |
1720 | * | |
1721 | * Out: | |
1722 | * none | |
1723 | * | |
1724 | * Return Value: none | |
1725 | * | |
1726 | */ | |
1727 | ||
1728 | void MACvSetDefaultKeyCtl (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, BYTE byLocalID) | |
1729 | { | |
1730 | WORD wOffset; | |
1731 | DWORD dwData; | |
1732 | ||
1733 | if (byLocalID <= 1) | |
1734 | return; | |
1735 | ||
1736 | ||
7e809a9b | 1737 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n"); |
5449c685 FB |
1738 | wOffset = MISCFIFO_KEYETRY0; |
1739 | wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); | |
1740 | ||
1741 | dwData = 0; | |
1742 | dwData |= wKeyCtl; | |
1743 | dwData <<= 16; | |
1744 | dwData |= 0xffff; | |
7e809a9b | 1745 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl); |
5449c685 FB |
1746 | |
1747 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); | |
1748 | VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); | |
1749 | VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); | |
1750 | ||
1751 | } | |
1752 |