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Merge remote-tracking branch 'mkp-scsi/4.7/scsi-fixes' into fixes
[deliverable/linux.git] / drivers / staging / vt6656 / rf.c
CommitLineData
92b96797
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
92b96797
FB		 15 *
16 * File: rf.c
17 *
18 * Purpose: rf function code
19 *
20 * Author: Jerry Chen
21 *
22 * Date: Feb. 19, 2004
23 *
24 * Functions:
32c48cb8 25 * vnt_rf_write_embedded - Embedded write RF register via MAC
92b96797
FB		 26 *
27 * Revision History:
fc20463e
MP		 28 * RF_VT3226: RobertYu:20051111, VT3226C0 and before
29 * RF_VT3226D0: RobertYu:20051228
ecb6ecbb 30 * RF_VT3342A0: RobertYu:20060609
92b96797
FB		 31 *
32 */
33
92b96797 34#include "mac.h"
92b96797 35#include "rf.h"
92b96797 36#include "baseband.h"
62c8526d 37#include "usbpipe.h"
92b96797 38
92b96797
FB		 39#define CB_AL2230_INIT_SEQ 15
40#define AL2230_PWR_IDX_LEN 64
41
92b96797
FB		 42#define CB_AL7230_INIT_SEQ 16
43#define AL7230_PWR_IDX_LEN 64
44
92b96797
FB		 45#define CB_VT3226_INIT_SEQ 11
46#define VT3226_PWR_IDX_LEN 64
92b96797 47
92b96797
FB		 48#define CB_VT3342_INIT_SEQ 13
49#define VT3342_PWR_IDX_LEN 64
92b96797 50
78a650dc 51static u8 al2230_init_table[CB_AL2230_INIT_SEQ][3] = {
77bdc0a5
MP		 52 {0x03, 0xf7, 0x90},
53 {0x03, 0x33, 0x31},
54 {0x01, 0xb8, 0x02},
55 {0x00, 0xff, 0xf3},
56 {0x00, 0x05, 0xa4},
57 {0x0f, 0x4d, 0xc5},
58 {0x08, 0x05, 0xb6},
59 {0x01, 0x47, 0xc7},
60 {0x00, 0x06, 0x88},
61 {0x04, 0x03, 0xb9},
62 {0x00, 0xdb, 0xba},
63 {0x00, 0x09, 0x9b},
64 {0x0b, 0xdf, 0xfc},
65 {0x00, 0x00, 0x0d},
66 {0x00, 0x58, 0x0f}
67};
92b96797 68
78a650dc 69static u8 al2230_channel_table0[CB_MAX_CHANNEL_24G][3] = {
77bdc0a5
MP		 70 {0x03, 0xf7, 0x90},
71 {0x03, 0xf7, 0x90},
72 {0x03, 0xe7, 0x90},
73 {0x03, 0xe7, 0x90},
74 {0x03, 0xf7, 0xa0},
75 {0x03, 0xf7, 0xa0},
76 {0x03, 0xe7, 0xa0},
77 {0x03, 0xe7, 0xa0},
78 {0x03, 0xf7, 0xb0},
79 {0x03, 0xf7, 0xb0},
80 {0x03, 0xe7, 0xb0},
81 {0x03, 0xe7, 0xb0},
82 {0x03, 0xf7, 0xc0},
83 {0x03, 0xe7, 0xc0}
84};
92b96797 85
78a650dc 86static u8 al2230_channel_table1[CB_MAX_CHANNEL_24G][3] = {
77bdc0a5
MP		 87 {0x03, 0x33, 0x31},
88 {0x0b, 0x33, 0x31},
89 {0x03, 0x33, 0x31},
90 {0x0b, 0x33, 0x31},
91 {0x03, 0x33, 0x31},
92 {0x0b, 0x33, 0x31},
93 {0x03, 0x33, 0x31},
94 {0x0b, 0x33, 0x31},
95 {0x03, 0x33, 0x31},
96 {0x0b, 0x33, 0x31},
97 {0x03, 0x33, 0x31},
98 {0x0b, 0x33, 0x31},
99 {0x03, 0x33, 0x31},
100 {0x06, 0x66, 0x61}
101};
92b96797 102
78a650dc 103static u8 al7230_init_table[CB_AL7230_INIT_SEQ][3] = {
77bdc0a5
MP		 104 {0x20, 0x37, 0x90},
105 {0x13, 0x33, 0x31},
106 {0x84, 0x1f, 0xf2},
107 {0x3f, 0xdf, 0xa3},
108 {0x7f, 0xd7, 0x84},
109 {0x80, 0x2b, 0x55},
110 {0x56, 0xaf, 0x36},
111 {0xce, 0x02, 0x07},
112 {0x6e, 0xbc, 0x98},
113 {0x22, 0x1b, 0xb9},
114 {0xe0, 0x00, 0x0a},
115 {0x08, 0x03, 0x1b},
116 {0x00, 0x0a, 0x3c},
117 {0xff, 0xff, 0xfd},
118 {0x00, 0x00, 0x0e},
119 {0x1a, 0xba, 0x8f}
120};
92b96797 121
78a650dc 122static u8 al7230_init_table_amode[CB_AL7230_INIT_SEQ][3] = {
77bdc0a5
MP		 123 {0x2f, 0xf5, 0x20},
124 {0x00, 0x00, 0x01},
125 {0x45, 0x1f, 0xe2},
126 {0x5f, 0xdf, 0xa3},
127 {0x6f, 0xd7, 0x84},
128 {0x85, 0x3f, 0x55},
129 {0x56, 0xaf, 0x36},
130 {0xce, 0x02, 0x07},
131 {0x6e, 0xbc, 0x98},
132 {0x22, 0x1b, 0xb9},
133 {0xe0, 0x60, 0x0a},
134 {0x08, 0x03, 0x1b},
135 {0x00, 0x14, 0x7c},
136 {0xff, 0xff, 0xfd},
137 {0x00, 0x00, 0x0e},
138 {0x12, 0xba, 0xcf}
139};
92b96797 140
78a650dc 141static u8 al7230_channel_table0[CB_MAX_CHANNEL][3] = {
77bdc0a5
MP		 142 {0x20, 0x37, 0x90},
143 {0x20, 0x37, 0x90},
144 {0x20, 0x37, 0x90},
145 {0x20, 0x37, 0x90},
146 {0x20, 0x37, 0xa0},
147 {0x20, 0x37, 0xa0},
148 {0x20, 0x37, 0xa0},
149 {0x20, 0x37, 0xa0},
150 {0x20, 0x37, 0xb0},
151 {0x20, 0x37, 0xb0},
152 {0x20, 0x37, 0xb0},
153 {0x20, 0x37, 0xb0},
154 {0x20, 0x37, 0xc0},
155 {0x20, 0x37, 0xc0},
156 {0x0f, 0xf5, 0x20}, /* channel 15 Tf = 4915MHz */
157 {0x2f, 0xf5, 0x20},
158 {0x0f, 0xf5, 0x20},
159 {0x0f, 0xf5, 0x20},
160 {0x2f, 0xf5, 0x20},
161 {0x0f, 0xf5, 0x20},
162 {0x2f, 0xf5, 0x30},
163 {0x2f, 0xf5, 0x30},
164 {0x0f, 0xf5, 0x40},
165 {0x2f, 0xf5, 0x40},
166 {0x0f, 0xf5, 0x40},
167 {0x0f, 0xf5, 0x40},
168 {0x2f, 0xf5, 0x40},
169 {0x2f, 0xf5, 0x50},
170 {0x2f, 0xf5, 0x60},
171 {0x2f, 0xf5, 0x60},
172 {0x2f, 0xf5, 0x70},
173 {0x2f, 0xf5, 0x70},
174 {0x2f, 0xf5, 0x70},
175 {0x2f, 0xf5, 0x70},
176 {0x2f, 0xf5, 0x70},
177 {0x2f, 0xf5, 0x70},
178 {0x2f, 0xf5, 0x80},
179 {0x2f, 0xf5, 0x80},
180 {0x2f, 0xf5, 0x80},
181 {0x2f, 0xf5, 0x90},
182 {0x2f, 0xf5, 0xc0},
183 {0x2f, 0xf5, 0xc0},
184 {0x2f, 0xf5, 0xc0},
185 {0x2f, 0xf5, 0xd0},
186 {0x2f, 0xf5, 0xd0},
187 {0x2f, 0xf5, 0xd0},
188 {0x2f, 0xf5, 0xe0},
189 {0x2f, 0xf5, 0xe0},
190 {0x2f, 0xf5, 0xe0},
191 {0x2f, 0xf5, 0xf0},
192 {0x2f, 0xf5, 0xf0},
193 {0x2f, 0xf6, 0x00},
194 {0x2f, 0xf6, 0x00},
195 {0x2f, 0xf6, 0x00},
196 {0x2f, 0xf6, 0x10},
197 {0x2f, 0xf6, 0x10}
198};
92b96797 199
78a650dc 200static u8 al7230_channel_table1[CB_MAX_CHANNEL][3] = {
77bdc0a5
MP		 201 {0x13, 0x33, 0x31},
202 {0x1b, 0x33, 0x31},
203 {0x03, 0x33, 0x31},
204 {0x0b, 0x33, 0x31},
205 {0x13, 0x33, 0x31},
206 {0x1b, 0x33, 0x31},
207 {0x03, 0x33, 0x31},
208 {0x0b, 0x33, 0x31},
209 {0x13, 0x33, 0x31},
210 {0x1b, 0x33, 0x31},
211 {0x03, 0x33, 0x31},
212 {0x0b, 0x33, 0x31},
213 {0x13, 0x33, 0x31},
214 {0x06, 0x66, 0x61},
215 {0x1d, 0x55, 0x51}, /* channel = 15, Tf = 4915MHz */
216 {0x00, 0x00, 0x01},
217 {0x02, 0xaa, 0xa1},
218 {0x08, 0x00, 0x01},
219 {0x0a, 0xaa, 0xa1},
220 {0x0d, 0x55, 0x51},
221 {0x15, 0x55, 0x51},
222 {0x00, 0x00, 0x01},
223 {0x1d, 0x55, 0x51},
224 {0x00, 0x00, 0x01},
225 {0x02, 0xaa, 0xa1},
226 {0x08, 0x00, 0x01},
227 {0x0a, 0xaa, 0xa1},
228 {0x15, 0x55, 0x51},
229 {0x05, 0x55, 0x51},
230 {0x0a, 0xaa, 0xa1},
231 {0x10, 0x00, 0x01},
232 {0x15, 0x55, 0x51},
233 {0x1a, 0xaa, 0xa1},
234 {0x00, 0x00, 0x01},
235 {0x05, 0x55, 0x51},
236 {0x0a, 0xaa, 0xa1},
237 {0x15, 0x55, 0x51},
238 {0x00, 0x00, 0x01},
239 {0x0a, 0xaa, 0xa1},
240 {0x15, 0x55, 0x51},
241 {0x15, 0x55, 0x51},
242 {0x00, 0x00, 0x01},
243 {0x0a, 0xaa, 0xa1},
244 {0x15, 0x55, 0x51},
245 {0x00, 0x00, 0x01},
246 {0x0a, 0xaa, 0xa1},
247 {0x15, 0x55, 0x51},
248 {0x00, 0x00, 0x01},
249 {0x0a, 0xaa, 0xa1},
250 {0x15, 0x55, 0x51},
251 {0x00, 0x00, 0x01},
252 {0x18, 0x00, 0x01},
253 {0x02, 0xaa, 0xa1},
254 {0x0d, 0x55, 0x51},
255 {0x18, 0x00, 0x01},
256 {0x02, 0xaa, 0xb1}
257};
92b96797 258
78a650dc 259static u8 al7230_channel_table2[CB_MAX_CHANNEL][3] = {
77bdc0a5
MP		 260 {0x7f, 0xd7, 0x84},
261 {0x7f, 0xd7, 0x84},
262 {0x7f, 0xd7, 0x84},
263 {0x7f, 0xd7, 0x84},
264 {0x7f, 0xd7, 0x84},
265 {0x7f, 0xd7, 0x84},
266 {0x7f, 0xd7, 0x84},
267 {0x7f, 0xd7, 0x84},
268 {0x7f, 0xd7, 0x84},
269 {0x7f, 0xd7, 0x84},
270 {0x7f, 0xd7, 0x84},
271 {0x7f, 0xd7, 0x84},
272 {0x7f, 0xd7, 0x84},
273 {0x7f, 0xd7, 0x84},
274 {0x7f, 0xd7, 0x84}, /* channel = 15 Tf = 4915MHz */
275 {0x6f, 0xd7, 0x84},
276 {0x7f, 0xd7, 0x84},
277 {0x7f, 0xd7, 0x84},
278 {0x7f, 0xd7, 0x84},
279 {0x7f, 0xd7, 0x84},
280 {0x7f, 0xd7, 0x84},
281 {0x6f, 0xd7, 0x84},
282 {0x7f, 0xd7, 0x84},
283 {0x6f, 0xd7, 0x84},
284 {0x7f, 0xd7, 0x84},
285 {0x7f, 0xd7, 0x84},
286 {0x7f, 0xd7, 0x84},
287 {0x7f, 0xd7, 0x84},
288 {0x7f, 0xd7, 0x84},
289 {0x7f, 0xd7, 0x84},
290 {0x7f, 0xd7, 0x84},
291 {0x7f, 0xd7, 0x84},
292 {0x7f, 0xd7, 0x84},
293 {0x6f, 0xd7, 0x84},
294 {0x7f, 0xd7, 0x84},
295 {0x7f, 0xd7, 0x84},
296 {0x7f, 0xd7, 0x84},
297 {0x6f, 0xd7, 0x84},
298 {0x7f, 0xd7, 0x84},
299 {0x7f, 0xd7, 0x84},
300 {0x7f, 0xd7, 0x84},
301 {0x6f, 0xd7, 0x84},
302 {0x7f, 0xd7, 0x84},
303 {0x7f, 0xd7, 0x84},
304 {0x6f, 0xd7, 0x84},
305 {0x7f, 0xd7, 0x84},
306 {0x7f, 0xd7, 0x84},
307 {0x6f, 0xd7, 0x84},
308 {0x7f, 0xd7, 0x84},
309 {0x7f, 0xd7, 0x84},
310 {0x6f, 0xd7, 0x84},
311 {0x7f, 0xd7, 0x84},
312 {0x7f, 0xd7, 0x84},
313 {0x7f, 0xd7, 0x84},
314 {0x7f, 0xd7, 0x84},
315 {0x7f, 0xd7, 0x84}
316};
92b96797 317
c85a81b2 318static u8 vt3226_init_table[CB_VT3226_INIT_SEQ][3] = {
77bdc0a5
MP		 319 {0x03, 0xff, 0x80},
320 {0x02, 0x82, 0xa1},
321 {0x03, 0xc6, 0xa2},
322 {0x01, 0x97, 0x93},
323 {0x03, 0x66, 0x64},
324 {0x00, 0x61, 0xa5},
325 {0x01, 0x7b, 0xd6},
326 {0x00, 0x80, 0x17},
327 {0x03, 0xf8, 0x08},
328 {0x00, 0x02, 0x39},
329 {0x02, 0x00, 0x2a}
330};
92b96797 331
c85a81b2 332static u8 vt3226d0_init_table[CB_VT3226_INIT_SEQ][3] = {
77bdc0a5
MP		 333 {0x03, 0xff, 0x80},
334 {0x03, 0x02, 0x21},
335 {0x03, 0xc6, 0xa2},
336 {0x01, 0x97, 0x93},
337 {0x03, 0x66, 0x64},
338 {0x00, 0x71, 0xa5},
339 {0x01, 0x15, 0xc6},
340 {0x01, 0x2e, 0x07},
341 {0x00, 0x58, 0x08},
342 {0x00, 0x02, 0x79},
343 {0x02, 0x01, 0xaa}
344};
92b96797 345
78a650dc 346static u8 vt3226_channel_table0[CB_MAX_CHANNEL_24G][3] = {
77bdc0a5
MP		 347 {0x01, 0x97, 0x83},
348 {0x01, 0x97, 0x83},
349 {0x01, 0x97, 0x93},
350 {0x01, 0x97, 0x93},
351 {0x01, 0x97, 0x93},
352 {0x01, 0x97, 0x93},
353 {0x01, 0x97, 0xa3},
354 {0x01, 0x97, 0xa3},
355 {0x01, 0x97, 0xa3},
356 {0x01, 0x97, 0xa3},
357 {0x01, 0x97, 0xb3},
358 {0x01, 0x97, 0xb3},
359 {0x01, 0x97, 0xb3},
360 {0x03, 0x37, 0xc3}
361};
92b96797 362
78a650dc 363static u8 vt3226_channel_table1[CB_MAX_CHANNEL_24G][3] = {
77bdc0a5
MP		 364 {0x02, 0x66, 0x64},
365 {0x03, 0x66, 0x64},
366 {0x00, 0x66, 0x64},
367 {0x01, 0x66, 0x64},
368 {0x02, 0x66, 0x64},
369 {0x03, 0x66, 0x64},
370 {0x00, 0x66, 0x64},
371 {0x01, 0x66, 0x64},
372 {0x02, 0x66, 0x64},
373 {0x03, 0x66, 0x64},
374 {0x00, 0x66, 0x64},
375 {0x01, 0x66, 0x64},
376 {0x02, 0x66, 0x64},
377 {0x00, 0xcc, 0xc4}
378};
92b96797 379
3b138851 380static const u32 vt3226d0_lo_current_table[CB_MAX_CHANNEL_24G] = {
f1c840d5
MP		 381 0x0135c600,
382 0x0135c600,
383 0x0235c600,
384 0x0235c600,
385 0x0235c600,
386 0x0335c600,
387 0x0335c600,
388 0x0335c600,
389 0x0335c600,
390 0x0335c600,
391 0x0335c600,
392 0x0335c600,
393 0x0335c600,
394 0x0135c600
92b96797 395};
92b96797 396
78a650dc 397static u8 vt3342a0_init_table[CB_VT3342_INIT_SEQ][3] = { /* 11b/g mode */
77bdc0a5
MP		 398 {0x03, 0xff, 0x80},
399 {0x02, 0x08, 0x81},
400 {0x00, 0xc6, 0x02},
401 {0x03, 0xc5, 0x13},
402 {0x00, 0xee, 0xe4},
403 {0x00, 0x71, 0xa5},
404 {0x01, 0x75, 0x46},
405 {0x01, 0x40, 0x27},
406 {0x01, 0x54, 0x08},
407 {0x00, 0x01, 0x69},
408 {0x02, 0x00, 0xaa},
409 {0x00, 0x08, 0xcb},
410 {0x01, 0x70, 0x0c}
411};
92b96797 412
78a650dc 413static u8 vt3342_channel_table0[CB_MAX_CHANNEL][3] = {
77bdc0a5
MP		 414 {0x02, 0x05, 0x03},
415 {0x01, 0x15, 0x03},
416 {0x03, 0xc5, 0x03},
417 {0x02, 0x65, 0x03},
418 {0x01, 0x15, 0x13},
419 {0x03, 0xc5, 0x13},
420 {0x02, 0x05, 0x13},
421 {0x01, 0x15, 0x13},
422 {0x03, 0xc5, 0x13},
423 {0x02, 0x65, 0x13},
424 {0x01, 0x15, 0x23},
425 {0x03, 0xc5, 0x23},
426 {0x02, 0x05, 0x23},
427 {0x00, 0xd5, 0x23},
428 {0x01, 0x15, 0x13}, /* channel = 15 Tf = 4915MHz */
429 {0x01, 0x15, 0x13},
430 {0x01, 0x15, 0x13},
431 {0x01, 0x15, 0x13},
432 {0x01, 0x15, 0x13},
433 {0x01, 0x15, 0x13},
434 {0x01, 0x15, 0x13},
435 {0x01, 0x15, 0x13},
436 {0x01, 0x15, 0x13},
437 {0x01, 0x15, 0x13},
438 {0x01, 0x15, 0x13},
439 {0x01, 0x15, 0x13},
440 {0x01, 0x15, 0x13},
441 {0x01, 0x15, 0x13},
442 {0x01, 0x15, 0x13},
443 {0x01, 0x55, 0x63},
444 {0x01, 0x55, 0x63},
445 {0x02, 0xa5, 0x63},
446 {0x02, 0xa5, 0x63},
447 {0x00, 0x05, 0x73},
448 {0x00, 0x05, 0x73},
449 {0x01, 0x55, 0x73},
450 {0x02, 0xa5, 0x73},
451 {0x00, 0x05, 0x83},
452 {0x01, 0x55, 0x83},
453 {0x02, 0xa5, 0x83},
454 {0x02, 0xa5, 0x83},
455 {0x02, 0xa5, 0x83},
456 {0x02, 0xa5, 0x83},
457 {0x02, 0xa5, 0x83},
458 {0x02, 0xa5, 0x83},
459 {0x02, 0xa5, 0x83},
460 {0x02, 0xa5, 0x83},
461 {0x02, 0xa5, 0x83},
462 {0x02, 0xa5, 0x83},
463 {0x02, 0xa5, 0x83},
464 {0x02, 0xa5, 0x83},
465 {0x00, 0x05, 0xF3},
466 {0x01, 0x56, 0x03},
467 {0x02, 0xa6, 0x03},
468 {0x00, 0x06, 0x03},
469 {0x00, 0x06, 0x03}
470};
92b96797 471
78a650dc 472static u8 vt3342_channel_table1[CB_MAX_CHANNEL][3] = {
77bdc0a5
MP		 473 {0x01, 0x99, 0x94},
474 {0x02, 0x44, 0x44},
475 {0x02, 0xee, 0xe4},
476 {0x03, 0x99, 0x94},
477 {0x00, 0x44, 0x44},
478 {0x00, 0xee, 0xe4},
479 {0x01, 0x99, 0x94},
480 {0x02, 0x44, 0x44},
481 {0x02, 0xee, 0xe4},
482 {0x03, 0x99, 0x94},
483 {0x00, 0x44, 0x44},
484 {0x00, 0xee, 0xe4},
485 {0x01, 0x99, 0x94},
486 {0x03, 0x33, 0x34},
487 {0x00, 0x44, 0x44}, /* channel = 15 Tf = 4915MHz */
488 {0x00, 0x44, 0x44},
489 {0x00, 0x44, 0x44},
490 {0x00, 0x44, 0x44},
491 {0x00, 0x44, 0x44},
492 {0x00, 0x44, 0x44},
493 {0x00, 0x44, 0x44},
494 {0x00, 0x44, 0x44},
495 {0x00, 0x44, 0x44},
496 {0x00, 0x44, 0x44},
497 {0x00, 0x44, 0x44},
498 {0x00, 0x44, 0x44},
499 {0x00, 0x44, 0x44},
500 {0x00, 0x44, 0x44},
501 {0x00, 0x44, 0x44},
502 {0x01, 0x55, 0x54},
503 {0x01, 0x55, 0x54},
504 {0x02, 0xaa, 0xa4},
505 {0x02, 0xaa, 0xa4},
506 {0x00, 0x00, 0x04},
507 {0x00, 0x00, 0x04},
508 {0x01, 0x55, 0x54},
509 {0x02, 0xaa, 0xa4},
510 {0x00, 0x00, 0x04},
511 {0x01, 0x55, 0x54},
512 {0x02, 0xaa, 0xa4},
513 {0x02, 0xaa, 0xa4},
514 {0x02, 0xaa, 0xa4},
515 {0x02, 0xaa, 0xa4},
516 {0x02, 0xaa, 0xa4},
517 {0x02, 0xaa, 0xa4},
518 {0x02, 0xaa, 0xa4},
519 {0x02, 0xaa, 0xa4},
520 {0x02, 0xaa, 0xa4},
521 {0x02, 0xaa, 0xa4},
522 {0x02, 0xaa, 0xa4},
523 {0x02, 0xaa, 0xa4},
524 {0x03, 0x00, 0x04},
525 {0x00, 0x55, 0x54},
526 {0x01, 0xaa, 0xa4},
527 {0x03, 0x00, 0x04},
528 {0x03, 0x00, 0x04}
529};
92b96797 530
ef13cfb4 531/* Power Table */
3b138851 532static const u32 al2230_power_table[AL2230_PWR_IDX_LEN] = {
f1c840d5
MP		 533 0x04040900,
534 0x04041900,
535 0x04042900,
536 0x04043900,
537 0x04044900,
538 0x04045900,
539 0x04046900,
540 0x04047900,
541 0x04048900,
542 0x04049900,
543 0x0404a900,
544 0x0404b900,
545 0x0404c900,
546 0x0404d900,
547 0x0404e900,
548 0x0404f900,
549 0x04050900,
550 0x04051900,
551 0x04052900,
552 0x04053900,
553 0x04054900,
554 0x04055900,
555 0x04056900,
556 0x04057900,
557 0x04058900,
558 0x04059900,
559 0x0405a900,
560 0x0405b900,
561 0x0405c900,
562 0x0405d900,
563 0x0405e900,
564 0x0405f900,
565 0x04060900,
566 0x04061900,
567 0x04062900,
568 0x04063900,
569 0x04064900,
570 0x04065900,
571 0x04066900,
572 0x04067900,
573 0x04068900,
574 0x04069900,
575 0x0406a900,
576 0x0406b900,
577 0x0406c900,
578 0x0406d900,
579 0x0406e900,
580 0x0406f900,
581 0x04070900,
582 0x04071900,
583 0x04072900,
584 0x04073900,
585 0x04074900,
586 0x04075900,
587 0x04076900,
588 0x04077900,
589 0x04078900,
590 0x04079900,
591 0x0407a900,
592 0x0407b900,
593 0x0407c900,
594 0x0407d900,
595 0x0407e900,
596 0x0407f900
77bdc0a5 597};
92b96797 598
92b96797 599/*
93184690 600 * Description: Write to IF/RF, by embedded programming
92b96797 601 */
32c48cb8 602int vnt_rf_write_embedded(struct vnt_private *priv, u32 data)
92b96797 603{
d6df2bf2 604 u8 reg_data[4];
92b96797 605
f1c840d5
MP		 606 data |= (VNT_RF_REG_LEN << 3) | IFREGCTL_REGW;
607
d6df2bf2
MP		 608 reg_data[0] = (u8)data;
609 reg_data[1] = (u8)(data >> 8);
610 reg_data[2] = (u8)(data >> 16);
611 reg_data[3] = (u8)(data >> 24);
da033bfd 612
d6df2bf2
MP		 613 vnt_control_out(priv, MESSAGE_TYPE_WRITE_IFRF,
614 0, 0, ARRAY_SIZE(reg_data), reg_data);
92b96797 615
4e9b5e2b 616 return true;
92b96797
FB		 617}
618
ef13cfb4 619/* Set Tx power by rate and channel number */
4f5290ea 620int vnt_rf_setpower(struct vnt_private *priv, u32 rate, u32 channel)
92b96797 621{
5a97491c 622 u8 power = priv->cck_pwr;
92b96797 623
a628747f 624 if (channel == 0)
ab1dd996
MP		 625 return -EINVAL;
626
a628747f
MP		 627 switch (rate) {
628 case RATE_1M:
629 case RATE_2M:
630 case RATE_5M:
631 case RATE_11M:
89daee6f
MP		 632 channel--;
633
5a97491c
MP		 634 if (channel < sizeof(priv->cck_pwr_tbl))
635 power = priv->cck_pwr_tbl[channel];
a628747f
MP		 636 break;
637 case RATE_6M:
638 case RATE_9M:
163fe301 639 case RATE_12M:
a628747f
MP		 640 case RATE_18M:
641 case RATE_24M:
642 case RATE_36M:
643 case RATE_48M:
644 case RATE_54M:
645 if (channel > CB_MAX_CHANNEL_24G)
5a97491c 646 power = priv->ofdm_a_pwr_tbl[channel-15];
a628747f 647 else
5a97491c 648 power = priv->ofdm_pwr_tbl[channel-1];
a628747f
MP		 649 break;
650 }
651
3b9999ec 652 return vnt_rf_set_txpower(priv, power, rate);
92b96797
FB		 653}
654
f53d9f12
MP		 655static u8 vnt_rf_addpower(struct vnt_private *priv)
656{
125cfc63 657 s32 rssi = -priv->current_rssi;
f53d9f12
MP		 658
659 if (!rssi)
660 return 7;
661
6242ecae 662 if (priv->rf_type == RF_VT3226D0) {
f53d9f12
MP		 663 if (rssi < -70)
664 return 9;
665 else if (rssi < -65)
666 return 7;
667 else if (rssi < -60)
668 return 5;
669 } else {
670 if (rssi < -80)
671 return 9;
672 else if (rssi < -75)
673 return 7;
674 else if (rssi < -70)
675 return 5;
676 }
677
678 return 0;
679}
680
ef13cfb4 681/* Set Tx power by power level and rate */
8543bb9c 682int vnt_rf_set_txpower(struct vnt_private *priv, u8 power, u32 rate)
92b96797 683{
fc20463e
MP		 684 u32 power_setting = 0;
685 int ret = true;
686
f53d9f12
MP		 687 power += vnt_rf_addpower(priv);
688 if (power > VNT_RF_MAX_POWER)
689 power = VNT_RF_MAX_POWER;
690
5a97491c 691 if (priv->power == power)
fc20463e
MP		 692 return true;
693
5a97491c 694 priv->power = power;
fc20463e 695
6242ecae 696 switch (priv->rf_type) {
fc20463e 697 case RF_AL2230:
72183c6b 698 if (power >= AL2230_PWR_IDX_LEN)
fc20463e
MP		 699 return false;
700
72183c6b 701 ret &= vnt_rf_write_embedded(priv, al2230_power_table[power]);
fc20463e
MP		 702
703 if (rate <= RATE_11M)
f1c840d5 704 ret &= vnt_rf_write_embedded(priv, 0x0001b400);
fc20463e 705 else
f1c840d5 706 ret &= vnt_rf_write_embedded(priv, 0x0005a400);
fc20463e
MP		 707 break;
708 case RF_AL2230S:
72183c6b 709 if (power >= AL2230_PWR_IDX_LEN)
fc20463e
MP		 710 return false;
711
72183c6b 712 ret &= vnt_rf_write_embedded(priv, al2230_power_table[power]);
fc20463e
MP		 713
714 if (rate <= RATE_11M) {
f1c840d5
MP		 715 ret &= vnt_rf_write_embedded(priv, 0x040c1400);
716 ret &= vnt_rf_write_embedded(priv, 0x00299b00);
fc20463e 717 } else {
f1c840d5
MP		 718 ret &= vnt_rf_write_embedded(priv, 0x0005a400);
719 ret &= vnt_rf_write_embedded(priv, 0x00099b00);
fc20463e
MP		 720 }
721 break;
722
723 case RF_AIROHA7230:
724 if (rate <= RATE_11M)
f1c840d5 725 ret &= vnt_rf_write_embedded(priv, 0x111bb900);
fc20463e 726 else
f1c840d5 727 ret &= vnt_rf_write_embedded(priv, 0x221bb900);
fc20463e 728
72183c6b 729 if (power >= AL7230_PWR_IDX_LEN)
fc20463e
MP		 730 return false;
731
732 /*
733 * 0x080F1B00 for 3 wire control TxGain(D10)
734 * and 0x31 as TX Gain value
735 */
f1c840d5 736 power_setting = 0x080c0b00 | (power << 12);
fc20463e 737
32c48cb8 738 ret &= vnt_rf_write_embedded(priv, power_setting);
fc20463e
MP		 739
740 break;
741
742 case RF_VT3226:
72183c6b 743 if (power >= VT3226_PWR_IDX_LEN)
fc20463e 744 return false;
f1c840d5 745 power_setting = ((0x3f - power) << 20) | (0x17 << 8);
fc20463e 746
32c48cb8 747 ret &= vnt_rf_write_embedded(priv, power_setting);
fc20463e
MP		 748
749 break;
750 case RF_VT3226D0:
72183c6b 751 if (power >= VT3226_PWR_IDX_LEN)
fc20463e
MP		 752 return false;
753
754 if (rate <= RATE_11M) {
a23d8a70
MP		 755 u16 hw_value = priv->hw->conf.chandef.chan->hw_value;
756
f1c840d5 757 power_setting = ((0x3f - power) << 20) | (0xe07 << 8);
fc20463e 758
32c48cb8 759 ret &= vnt_rf_write_embedded(priv, power_setting);
f1c840d5 760 ret &= vnt_rf_write_embedded(priv, 0x03c6a200);
fc20463e 761
a23d8a70
MP		 762 dev_dbg(&priv->usb->dev,
763 "%s 11b channel [%d]\n", __func__, hw_value);
764
765 hw_value--;
766
767 if (hw_value < ARRAY_SIZE(vt3226d0_lo_current_table))
32c48cb8 768 ret &= vnt_rf_write_embedded(priv,
a23d8a70 769 vt3226d0_lo_current_table[hw_value]);
fc20463e 770
f1c840d5 771 ret &= vnt_rf_write_embedded(priv, 0x015C0800);
14c5ef57 772 } else {
5dda2528 773 dev_dbg(&priv->usb->dev,
8543bb9c 774 "@@@@ vnt_rf_set_txpower> 11G mode\n");
fc20463e 775
f1c840d5 776 power_setting = ((0x3f - power) << 20) | (0x7 << 8);
fc20463e 777
32c48cb8 778 ret &= vnt_rf_write_embedded(priv, power_setting);
f1c840d5
MP		 779 ret &= vnt_rf_write_embedded(priv, 0x00C6A200);
780 ret &= vnt_rf_write_embedded(priv, 0x016BC600);
781 ret &= vnt_rf_write_embedded(priv, 0x00900800);
14c5ef57 782 }
fc20463e
MP		 783 break;
784
785 case RF_VT3342A0:
72183c6b 786 if (power >= VT3342_PWR_IDX_LEN)
fc20463e
MP		 787 return false;
788
f1c840d5 789 power_setting = ((0x3f - power) << 20) | (0x27 << 8);
fc20463e 790
32c48cb8 791 ret &= vnt_rf_write_embedded(priv, power_setting);
92b96797 792
fc20463e
MP		 793 break;
794 default:
795 break;
796 }
797 return ret;
92b96797
FB		 798}
799
ef13cfb4 800/* Convert rssi to dbm */
21bba58a 801void vnt_rf_rssi_to_dbm(struct vnt_private *priv, u8 rssi, long *dbm)
92b96797 802{
ecb6ecbb
MP		 803 u8 idx = (((rssi & 0xc0) >> 6) & 0x03);
804 long b = (rssi & 0x3f);
805 long a = 0;
806 u8 airoharf[4] = {0, 18, 0, 40};
92b96797 807
6242ecae 808 switch (priv->rf_type) {
ecb6ecbb
MP		 809 case RF_AL2230:
810 case RF_AL2230S:
811 case RF_AIROHA7230:
812 case RF_VT3226:
813 case RF_VT3226D0:
814 case RF_VT3342A0:
815 a = airoharf[idx];
816 break;
817 default:
818 break;
819 }
820
821 *dbm = -1 * (a + b * 2);
92b96797
FB		 822}
823
c49d7550 824void vnt_rf_table_download(struct vnt_private *priv)
92b96797 825{
d9652aef
MP		 826 u16 length1 = 0, length2 = 0, length3 = 0;
827 u8 *addr1 = NULL, *addr2 = NULL, *addr3 = NULL;
828 u16 length, value;
829 u8 array[256];
92b96797 830
6242ecae 831 switch (priv->rf_type) {
d9652aef
MP		 832 case RF_AL2230:
833 case RF_AL2230S:
834 length1 = CB_AL2230_INIT_SEQ * 3;
835 length2 = CB_MAX_CHANNEL_24G * 3;
836 length3 = CB_MAX_CHANNEL_24G * 3;
78a650dc
MP		 837 addr1 = &al2230_init_table[0][0];
838 addr2 = &al2230_channel_table0[0][0];
839 addr3 = &al2230_channel_table1[0][0];
d9652aef
MP		 840 break;
841 case RF_AIROHA7230:
842 length1 = CB_AL7230_INIT_SEQ * 3;
843 length2 = CB_MAX_CHANNEL * 3;
844 length3 = CB_MAX_CHANNEL * 3;
78a650dc
MP		 845 addr1 = &al7230_init_table[0][0];
846 addr2 = &al7230_channel_table0[0][0];
847 addr3 = &al7230_channel_table1[0][0];
d9652aef
MP		 848 break;
849 case RF_VT3226:
850 length1 = CB_VT3226_INIT_SEQ * 3;
851 length2 = CB_MAX_CHANNEL_24G * 3;
852 length3 = CB_MAX_CHANNEL_24G * 3;
c85a81b2 853 addr1 = &vt3226_init_table[0][0];
78a650dc
MP		 854 addr2 = &vt3226_channel_table0[0][0];
855 addr3 = &vt3226_channel_table1[0][0];
d9652aef
MP		 856 break;
857 case RF_VT3226D0:
858 length1 = CB_VT3226_INIT_SEQ * 3;
859 length2 = CB_MAX_CHANNEL_24G * 3;
860 length3 = CB_MAX_CHANNEL_24G * 3;
c85a81b2 861 addr1 = &vt3226d0_init_table[0][0];
78a650dc
MP		 862 addr2 = &vt3226_channel_table0[0][0];
863 addr3 = &vt3226_channel_table1[0][0];
d9652aef
MP		 864 break;
865 case RF_VT3342A0:
866 length1 = CB_VT3342_INIT_SEQ * 3;
867 length2 = CB_MAX_CHANNEL * 3;
868 length3 = CB_MAX_CHANNEL * 3;
78a650dc
MP		 869 addr1 = &vt3342a0_init_table[0][0];
870 addr2 = &vt3342_channel_table0[0][0];
871 addr3 = &vt3342_channel_table1[0][0];
d9652aef
MP		 872 break;
873 }
874
875 /* Init Table */
876 memcpy(array, addr1, length1);
877
1390b02a 878 vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
d9652aef
MP		 879 MESSAGE_REQUEST_RF_INIT, length1, array);
880
881 /* Channel Table 0 */
882 value = 0;
883 while (length2 > 0) {
884 if (length2 >= 64)
885 length = 64;
886 else
887 length = length2;
888
889 memcpy(array, addr2, length);
890
1390b02a 891 vnt_control_out(priv, MESSAGE_TYPE_WRITE,
d9652aef
MP		 892 value, MESSAGE_REQUEST_RF_CH0, length, array);
893
894 length2 -= length;
895 value += length;
896 addr2 += length;
897 }
898
899 /* Channel table 1 */
900 value = 0;
901 while (length3 > 0) {
902 if (length3 >= 64)
903 length = 64;
904 else
905 length = length3;
906
907 memcpy(array, addr3, length);
908
1390b02a 909 vnt_control_out(priv, MESSAGE_TYPE_WRITE,
d9652aef
MP		 910 value, MESSAGE_REQUEST_RF_CH1, length, array);
911
912 length3 -= length;
913 value += length;
914 addr3 += length;
915 }
916
6242ecae 917 if (priv->rf_type == RF_AIROHA7230) {
d9652aef
MP		 918 length1 = CB_AL7230_INIT_SEQ * 3;
919 length2 = CB_MAX_CHANNEL * 3;
dcf8343d
RS		 920 addr1 = &al7230_init_table_amode[0][0];
921 addr2 = &al7230_channel_table2[0][0];
d9652aef
MP		 922
923 memcpy(array, addr1, length1);
924
925 /* Init Table 2 */
1390b02a 926 vnt_control_out(priv, MESSAGE_TYPE_WRITE,
d9652aef
MP		 927 0, MESSAGE_REQUEST_RF_INIT2, length1, array);
928
929 /* Channel Table 0 */
930 value = 0;
931 while (length2 > 0) {
932 if (length2 >= 64)
933 length = 64;
934 else
935 length = length2;
936
937 memcpy(array, addr2, length);
938
1390b02a 939 vnt_control_out(priv, MESSAGE_TYPE_WRITE,
d9652aef
MP		 940 value, MESSAGE_REQUEST_RF_CH2, length, array);
941
942 length2 -= length;
943 value += length;
944 addr2 += length;
945 }
946 }
92b96797 947}
Linux kernel - Deliverables
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