[deliverable/linux.git] / drivers / staging / winbond / linux / wb35tx.c

//============================================================================
//  Copyright (c) 1996-2002 Winbond Electronic Corporation
//
//  Module Name:
//    Wb35Tx.c
//
//  Abstract:
//    Processing the Tx message and put into down layer
//
//============================================================================
#include "sysdef.h"


unsigned char
Wb35Tx_get_tx_buffer(phw_data_t pHwData, u8 **pBuffer)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	*pBuffer = pWb35Tx->TxBuffer[0];
	return TRUE;
}

void Wb35Tx_start(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	// Allow only one thread to run into function
	if (OS_ATOMIC_INC(pHwData->adapter, &pWb35Tx->TxFireCounter) == 1) {
		pWb35Tx->EP4vm_state = VM_RUNNING;
		Wb35Tx(pHwData);
	} else
		OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
}


void Wb35Tx(phw_data_t pHwData)
{
	PWB35TX		pWb35Tx = &pHwData->Wb35Tx;
	struct wb35_adapter *adapter = pHwData->adapter;
	u8		*pTxBufferAddress;
	PMDS		pMds = &adapter->Mds;
	struct urb *	pUrb = (struct urb *)pWb35Tx->Tx4Urb;
	int         	retv;
	u32		SendIndex;


	if (pHwData->SurpriseRemove || pHwData->HwStop)
		goto cleanup;

	if (pWb35Tx->tx_halt)
		goto cleanup;

	// Ownership checking
	SendIndex = pWb35Tx->TxSendIndex;
	if (!pMds->TxOwner[SendIndex]) //No more data need to be sent, return immediately
		goto cleanup;

	pTxBufferAddress = pWb35Tx->TxBuffer[SendIndex];
	//
	// Issuing URB
	//
	usb_fill_bulk_urb(pUrb, pHwData->WbUsb.udev,
			  usb_sndbulkpipe(pHwData->WbUsb.udev, 4),
			  pTxBufferAddress, pMds->TxBufferSize[ SendIndex ],
			  Wb35Tx_complete, pHwData);

	pWb35Tx->EP4vm_state = VM_RUNNING;
	retv = usb_submit_urb(pUrb, GFP_ATOMIC);
	if (retv<0) {
		printk("EP4 Tx Irp sending error\n");
		goto cleanup;
	}

	// Check if driver needs issue Irp for EP2
	pWb35Tx->TxFillCount += pMds->TxCountInBuffer[SendIndex];
	if (pWb35Tx->TxFillCount > 12)
		Wb35Tx_EP2VM_start( pHwData );

	pWb35Tx->ByteTransfer += pMds->TxBufferSize[SendIndex];
	return;

 cleanup:
	pWb35Tx->EP4vm_state = VM_STOP;
	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
}


void Wb35Tx_complete(struct urb * pUrb)
{
	phw_data_t	pHwData = pUrb->context;
	struct wb35_adapter *adapter = pHwData->adapter;
	PWB35TX		pWb35Tx = &pHwData->Wb35Tx;
	PMDS		pMds = &adapter->Mds;

	printk("wb35: tx complete\n");
	// Variable setting
	pWb35Tx->EP4vm_state = VM_COMPLETED;
	pWb35Tx->EP4VM_status = pUrb->status; //Store the last result of Irp
	pMds->TxOwner[ pWb35Tx->TxSendIndex ] = 0;// Set the owner. Free the owner bit always.
	pWb35Tx->TxSendIndex++;
	pWb35Tx->TxSendIndex %= MAX_USB_TX_BUFFER_NUMBER;

	if (pHwData->SurpriseRemove || pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
		goto error;

	if (pWb35Tx->tx_halt)
		goto error;

	// The URB is completed, check the result
	if (pWb35Tx->EP4VM_status != 0) {
		printk("URB submission failed\n");
		pWb35Tx->EP4vm_state = VM_STOP;
		goto error;
	}

	Mds_Tx(adapter);
	Wb35Tx(pHwData);
	return;

error:
	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
	pWb35Tx->EP4vm_state = VM_STOP;
}

void Wb35Tx_reset_descriptor(  phw_data_t pHwData )
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	pWb35Tx->TxSendIndex = 0;
	pWb35Tx->tx_halt = 0;
}

unsigned char Wb35Tx_initial(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	pWb35Tx->Tx4Urb = usb_alloc_urb(0, GFP_ATOMIC);
	if (!pWb35Tx->Tx4Urb)
		return FALSE;

	pWb35Tx->Tx2Urb = usb_alloc_urb(0, GFP_ATOMIC);
	if (!pWb35Tx->Tx2Urb)
	{
		usb_free_urb( pWb35Tx->Tx4Urb );
		return FALSE;
	}

	return TRUE;
}

//======================================================
void Wb35Tx_stop(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	// Trying to canceling the Trp of EP2
	if (pWb35Tx->EP2vm_state == VM_RUNNING)
		usb_unlink_urb( pWb35Tx->Tx2Urb ); // Only use unlink, let Wb35Tx_destrot to free them
	#ifdef _PE_TX_DUMP_
	WBDEBUG(("EP2 Tx stop\n"));
	#endif

	// Trying to canceling the Irp of EP4
	if (pWb35Tx->EP4vm_state == VM_RUNNING)
		usb_unlink_urb( pWb35Tx->Tx4Urb ); // Only use unlink, let Wb35Tx_destrot to free them
	#ifdef _PE_TX_DUMP_
	WBDEBUG(("EP4 Tx stop\n"));
	#endif
}

//======================================================
void Wb35Tx_destroy(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	// Wait for VM stop
	do {
		msleep(10);  // Delay for waiting function enter 940623.1.a
	} while( (pWb35Tx->EP2vm_state != VM_STOP) && (pWb35Tx->EP4vm_state != VM_STOP) );
	msleep(10);  // Delay for waiting function enter 940623.1.b

	if (pWb35Tx->Tx4Urb)
		usb_free_urb( pWb35Tx->Tx4Urb );

	if (pWb35Tx->Tx2Urb)
		usb_free_urb( pWb35Tx->Tx2Urb );

	#ifdef _PE_TX_DUMP_
	WBDEBUG(("Wb35Tx_destroy OK\n"));
	#endif
}

void Wb35Tx_CurrentTime(phw_data_t pHwData, u32 TimeCount)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	unsigned char Trigger = FALSE;

	if (pWb35Tx->TxTimer > TimeCount)
		Trigger = TRUE;
	else if (TimeCount > (pWb35Tx->TxTimer+500))
		Trigger = TRUE;

	if (Trigger) {
		pWb35Tx->TxTimer = TimeCount;
		Wb35Tx_EP2VM_start( pHwData );
	}
}

void Wb35Tx_EP2VM_start(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;

	// Allow only one thread to run into function
	if (OS_ATOMIC_INC( pHwData->adapter, &pWb35Tx->TxResultCount ) == 1) {
		pWb35Tx->EP2vm_state = VM_RUNNING;
		Wb35Tx_EP2VM( pHwData );
	}
	else
		OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
}


void Wb35Tx_EP2VM(phw_data_t pHwData)
{
	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	struct urb *	pUrb = (struct urb *)pWb35Tx->Tx2Urb;
	u32 *	pltmp = (u32 *)pWb35Tx->EP2_buf;
	int		retv;

	if (pHwData->SurpriseRemove || pHwData->HwStop)
		goto error;

	if (pWb35Tx->tx_halt)
		goto error;

	//
	// Issuing URB
	//
	usb_fill_int_urb( pUrb, pHwData->WbUsb.udev, usb_rcvintpipe(pHwData->WbUsb.udev,2),
			  pltmp, MAX_INTERRUPT_LENGTH, Wb35Tx_EP2VM_complete, pHwData, 32);

	pWb35Tx->EP2vm_state = VM_RUNNING;
	retv = usb_submit_urb(pUrb, GFP_ATOMIC);

	if (retv < 0) {
		#ifdef _PE_TX_DUMP_
		WBDEBUG(("EP2 Tx Irp sending error\n"));
		#endif
		goto error;
	}

	return;
error:
	pWb35Tx->EP2vm_state = VM_STOP;
	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
}


void Wb35Tx_EP2VM_complete(struct urb * pUrb)
{
	phw_data_t	pHwData = pUrb->context;
	T02_DESCRIPTOR	T02, TSTATUS;
	struct wb35_adapter *adapter = pHwData->adapter;
	PWB35TX		pWb35Tx = &pHwData->Wb35Tx;
	u32 *		pltmp = (u32 *)pWb35Tx->EP2_buf;
	u32		i;
	u16		InterruptInLength;


	// Variable setting
	pWb35Tx->EP2vm_state = VM_COMPLETED;
	pWb35Tx->EP2VM_status = pUrb->status;

	// For Linux 2.4. Interrupt will always trigger
	if (pHwData->SurpriseRemove || pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
		goto error;

	if (pWb35Tx->tx_halt)
		goto error;

	//The Urb is completed, check the result
	if (pWb35Tx->EP2VM_status != 0) {
		WBDEBUG(("EP2 IoCompleteRoutine return error\n"));
		pWb35Tx->EP2vm_state= VM_STOP;
		goto error;
	}

	// Update the Tx result
	InterruptInLength = pUrb->actual_length;
	// Modify for minimum memory access and DWORD alignment.
	T02.value = cpu_to_le32(pltmp[0]) >> 8; // [31:8] -> [24:0]
	InterruptInLength -= 1;// 20051221.1.c Modify the follow for more stable
	InterruptInLength >>= 2; // InterruptInLength/4
	for (i = 1; i <= InterruptInLength; i++) {
		T02.value |= ((cpu_to_le32(pltmp[i]) & 0xff) << 24);

		TSTATUS.value = T02.value;  //20061009 anson's endian
		Mds_SendComplete( adapter, &TSTATUS );
		T02.value = cpu_to_le32(pltmp[i]) >> 8;
	}

	return;
error:
	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
	pWb35Tx->EP2vm_state = VM_STOP;
}
Commit	Line	Data
66101de1 PM	1	//============================================================================
	2	// Copyright (c) 1996-2002 Winbond Electronic Corporation
	3	//
	4	// Module Name:
	5	// Wb35Tx.c
	6	//
	7	// Abstract:
	8	// Processing the Tx message and put into down layer
	9	//
	10	//============================================================================
	11	#include "sysdef.h"
	12
	13
	14	unsigned char
8b384e0c	15	Wb35Tx_get_tx_buffer(phw_data_t pHwData, u8 **pBuffer)
66101de1 PM	16	{
	17	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	18
	19	*pBuffer = pWb35Tx->TxBuffer[0];
	20	return TRUE;
	21	}
	22
	23	void Wb35Tx_start(phw_data_t pHwData)
	24	{
	25	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	26
	27	// Allow only one thread to run into function
88ebc4b9	28	if (OS_ATOMIC_INC(pHwData->adapter, &pWb35Tx->TxFireCounter) == 1) {
66101de1 PM	29	pWb35Tx->EP4vm_state = VM_RUNNING;
	30	Wb35Tx(pHwData);
	31	} else
88ebc4b9	32	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
66101de1 PM	33	}
	34
	35
	36	void Wb35Tx(phw_data_t pHwData)
	37	{
	38	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
88ebc4b9	39	struct wb35_adapter *adapter = pHwData->adapter;
8b384e0c	40	u8 *pTxBufferAddress;
88ebc4b9	41	PMDS pMds = &adapter->Mds;
66101de1 PM	42	struct urb * pUrb = (struct urb *)pWb35Tx->Tx4Urb;
	43	int retv;
	44	u32 SendIndex;
	45
	46
	47	if (pHwData->SurpriseRemove \|\| pHwData->HwStop)
	48	goto cleanup;
	49
	50	if (pWb35Tx->tx_halt)
	51	goto cleanup;
	52
	53	// Ownership checking
	54	SendIndex = pWb35Tx->TxSendIndex;
	55	if (!pMds->TxOwner[SendIndex]) //No more data need to be sent, return immediately
	56	goto cleanup;
	57
	58	pTxBufferAddress = pWb35Tx->TxBuffer[SendIndex];
	59	//
	60	// Issuing URB
	61	//
	62	usb_fill_bulk_urb(pUrb, pHwData->WbUsb.udev,
	63	usb_sndbulkpipe(pHwData->WbUsb.udev, 4),
	64	pTxBufferAddress, pMds->TxBufferSize[ SendIndex ],
	65	Wb35Tx_complete, pHwData);
	66
	67	pWb35Tx->EP4vm_state = VM_RUNNING;
7c126043	68	retv = usb_submit_urb(pUrb, GFP_ATOMIC);
66101de1 PM	69	if (retv<0) {
	70	printk("EP4 Tx Irp sending error\n");
	71	goto cleanup;
	72	}
	73
	74	// Check if driver needs issue Irp for EP2
	75	pWb35Tx->TxFillCount += pMds->TxCountInBuffer[SendIndex];
	76	if (pWb35Tx->TxFillCount > 12)
	77	Wb35Tx_EP2VM_start( pHwData );
	78
	79	pWb35Tx->ByteTransfer += pMds->TxBufferSize[SendIndex];
	80	return;
	81
	82	cleanup:
	83	pWb35Tx->EP4vm_state = VM_STOP;
88ebc4b9	84	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
66101de1 PM	85	}
	86
	87
	88	void Wb35Tx_complete(struct urb * pUrb)
	89	{
	90	phw_data_t pHwData = pUrb->context;
88ebc4b9	91	struct wb35_adapter *adapter = pHwData->adapter;
66101de1	92	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
88ebc4b9	93	PMDS pMds = &adapter->Mds;
66101de1 PM	94
	95	printk("wb35: tx complete\n");
	96	// Variable setting
	97	pWb35Tx->EP4vm_state = VM_COMPLETED;
	98	pWb35Tx->EP4VM_status = pUrb->status; //Store the last result of Irp
	99	pMds->TxOwner[ pWb35Tx->TxSendIndex ] = 0;// Set the owner. Free the owner bit always.
	100	pWb35Tx->TxSendIndex++;
	101	pWb35Tx->TxSendIndex %= MAX_USB_TX_BUFFER_NUMBER;
	102
dc7e04fe PE	103	if (pHwData->SurpriseRemove \|\| pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
dc7e04fe PE	104	goto error;
66101de1	105
dc7e04fe PE	106	if (pWb35Tx->tx_halt)
dc7e04fe PE	107	goto error;
66101de1	108
dc7e04fe PE	109	// The URB is completed, check the result
	110	if (pWb35Tx->EP4VM_status != 0) {
	111	printk("URB submission failed\n");
	112	pWb35Tx->EP4vm_state = VM_STOP;
	113	goto error;
	114	}
66101de1	115
88ebc4b9	116	Mds_Tx(adapter);
dc7e04fe PE	117	Wb35Tx(pHwData);
dc7e04fe PE	118	return;
66101de1	119
dc7e04fe	120	error:
88ebc4b9	121	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxFireCounter );
66101de1 PM	122	pWb35Tx->EP4vm_state = VM_STOP;
	123	}
	124
	125	void Wb35Tx_reset_descriptor( phw_data_t pHwData )
	126	{
	127	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	128
	129	pWb35Tx->TxSendIndex = 0;
	130	pWb35Tx->tx_halt = 0;
	131	}
	132
	133	unsigned char Wb35Tx_initial(phw_data_t pHwData)
	134	{
	135	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	136
f3d20188	137	pWb35Tx->Tx4Urb = usb_alloc_urb(0, GFP_ATOMIC);
66101de1 PM	138	if (!pWb35Tx->Tx4Urb)
	139	return FALSE;
	140
f3d20188	141	pWb35Tx->Tx2Urb = usb_alloc_urb(0, GFP_ATOMIC);
66101de1 PM	142	if (!pWb35Tx->Tx2Urb)
	143	{
	144	usb_free_urb( pWb35Tx->Tx4Urb );
	145	return FALSE;
	146	}
	147
	148	return TRUE;
	149	}
	150
	151	//======================================================
	152	void Wb35Tx_stop(phw_data_t pHwData)
	153	{
	154	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	155
	156	// Trying to canceling the Trp of EP2
	157	if (pWb35Tx->EP2vm_state == VM_RUNNING)
	158	usb_unlink_urb( pWb35Tx->Tx2Urb ); // Only use unlink, let Wb35Tx_destrot to free them
	159	#ifdef _PE_TX_DUMP_
	160	WBDEBUG(("EP2 Tx stop\n"));
	161	#endif
	162
	163	// Trying to canceling the Irp of EP4
	164	if (pWb35Tx->EP4vm_state == VM_RUNNING)
	165	usb_unlink_urb( pWb35Tx->Tx4Urb ); // Only use unlink, let Wb35Tx_destrot to free them
	166	#ifdef _PE_TX_DUMP_
	167	WBDEBUG(("EP4 Tx stop\n"));
	168	#endif
	169	}
	170
	171	//======================================================
	172	void Wb35Tx_destroy(phw_data_t pHwData)
	173	{
	174	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	175
	176	// Wait for VM stop
	177	do {
34222e0a	178	msleep(10); // Delay for waiting function enter 940623.1.a
66101de1	179	} while( (pWb35Tx->EP2vm_state != VM_STOP) && (pWb35Tx->EP4vm_state != VM_STOP) );
34222e0a	180	msleep(10); // Delay for waiting function enter 940623.1.b
66101de1 PM	181
	182	if (pWb35Tx->Tx4Urb)
	183	usb_free_urb( pWb35Tx->Tx4Urb );
	184
	185	if (pWb35Tx->Tx2Urb)
	186	usb_free_urb( pWb35Tx->Tx2Urb );
	187
	188	#ifdef _PE_TX_DUMP_
	189	WBDEBUG(("Wb35Tx_destroy OK\n"));
	190	#endif
	191	}
	192
	193	void Wb35Tx_CurrentTime(phw_data_t pHwData, u32 TimeCount)
	194	{
	195	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	196	unsigned char Trigger = FALSE;
	197
	198	if (pWb35Tx->TxTimer > TimeCount)
	199	Trigger = TRUE;
	200	else if (TimeCount > (pWb35Tx->TxTimer+500))
	201	Trigger = TRUE;
	202
	203	if (Trigger) {
	204	pWb35Tx->TxTimer = TimeCount;
	205	Wb35Tx_EP2VM_start( pHwData );
	206	}
	207	}
	208
	209	void Wb35Tx_EP2VM_start(phw_data_t pHwData)
	210	{
	211	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	212
	213	// Allow only one thread to run into function
88ebc4b9	214	if (OS_ATOMIC_INC( pHwData->adapter, &pWb35Tx->TxResultCount ) == 1) {
66101de1 PM	215	pWb35Tx->EP2vm_state = VM_RUNNING;
	216	Wb35Tx_EP2VM( pHwData );
	217	}
	218	else
88ebc4b9	219	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
66101de1 PM	220	}
	221
	222
	223	void Wb35Tx_EP2VM(phw_data_t pHwData)
	224	{
	225	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
	226	struct urb * pUrb = (struct urb *)pWb35Tx->Tx2Urb;
8b384e0c	227	u32 * pltmp = (u32 *)pWb35Tx->EP2_buf;
66101de1 PM	228	int retv;
66101de1 PM	229
dc7e04fe PE	230	if (pHwData->SurpriseRemove \|\| pHwData->HwStop)
dc7e04fe PE	231	goto error;
66101de1	232
dc7e04fe PE	233	if (pWb35Tx->tx_halt)
dc7e04fe PE	234	goto error;
66101de1	235
dc7e04fe PE	236	//
	237	// Issuing URB
	238	//
	239	usb_fill_int_urb( pUrb, pHwData->WbUsb.udev, usb_rcvintpipe(pHwData->WbUsb.udev,2),
	240	pltmp, MAX_INTERRUPT_LENGTH, Wb35Tx_EP2VM_complete, pHwData, 32);
66101de1	241
dc7e04fe	242	pWb35Tx->EP2vm_state = VM_RUNNING;
7c126043	243	retv = usb_submit_urb(pUrb, GFP_ATOMIC);
66101de1	244
dc7e04fe PE	245	if (retv < 0) {
	246	#ifdef _PE_TX_DUMP_
	247	WBDEBUG(("EP2 Tx Irp sending error\n"));
	248	#endif
	249	goto error;
	250	}
66101de1	251
dc7e04fe PE	252	return;
dc7e04fe PE	253	error:
66101de1	254	pWb35Tx->EP2vm_state = VM_STOP;
88ebc4b9	255	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
66101de1 PM	256	}
	257
	258
	259	void Wb35Tx_EP2VM_complete(struct urb * pUrb)
	260	{
	261	phw_data_t pHwData = pUrb->context;
	262	T02_DESCRIPTOR T02, TSTATUS;
88ebc4b9	263	struct wb35_adapter *adapter = pHwData->adapter;
66101de1	264	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
8b384e0c	265	u32 * pltmp = (u32 *)pWb35Tx->EP2_buf;
66101de1 PM	266	u32 i;
	267	u16 InterruptInLength;
	268
	269
	270	// Variable setting
	271	pWb35Tx->EP2vm_state = VM_COMPLETED;
	272	pWb35Tx->EP2VM_status = pUrb->status;
	273
dc7e04fe PE	274	// For Linux 2.4. Interrupt will always trigger
	275	if (pHwData->SurpriseRemove \|\| pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
	276	goto error;
	277
	278	if (pWb35Tx->tx_halt)
	279	goto error;
	280
	281	//The Urb is completed, check the result
	282	if (pWb35Tx->EP2VM_status != 0) {
	283	WBDEBUG(("EP2 IoCompleteRoutine return error\n"));
	284	pWb35Tx->EP2vm_state= VM_STOP;
	285	goto error;
	286	}
66101de1	287
dc7e04fe PE	288	// Update the Tx result
	289	InterruptInLength = pUrb->actual_length;
	290	// Modify for minimum memory access and DWORD alignment.
	291	T02.value = cpu_to_le32(pltmp[0]) >> 8; // [31:8] -> [24:0]
	292	InterruptInLength -= 1;// 20051221.1.c Modify the follow for more stable
	293	InterruptInLength >>= 2; // InterruptInLength/4
	294	for (i = 1; i <= InterruptInLength; i++) {
	295	T02.value \|= ((cpu_to_le32(pltmp[i]) & 0xff) << 24);
	296
	297	TSTATUS.value = T02.value; //20061009 anson's endian
88ebc4b9	298	Mds_SendComplete( adapter, &TSTATUS );
dc7e04fe PE	299	T02.value = cpu_to_le32(pltmp[i]) >> 8;
	300	}
	301
	302	return;
	303	error:
88ebc4b9	304	OS_ATOMIC_DEC( pHwData->adapter, &pWb35Tx->TxResultCount );
66101de1 PM	305	pWb35Tx->EP2vm_state = VM_STOP;
	306	}
	307