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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[deliverable/linux.git] / drivers / staging / xgifb / XGI_main_26.c
CommitLineData
d7636e0b 1/*
2 * XG20, XG21, XG40, XG42 frame buffer device
3 * for Linux kernels 2.5.x, 2.6.x
4 * Base on TW's sis fbdev code.
5 */
6
96c66042
SH		 7#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8
98f4eade 9#include <linux/sizes.h>
d7636e0b 10#include <linux/module.h>
3fb07671 11#include <linux/pci.h>
d7636e0b 12
d7636e0b 13#include "XGI_main.h"
d542af50 14#include "vb_init.h"
d7636e0b 15#include "vb_util.h"
d542af50 16#include "vb_setmode.h"
d7636e0b 17
d7636e0b 18#define Index_CR_GPIO_Reg1 0x48
d7636e0b 19#define Index_CR_GPIO_Reg3 0x4a
20
d5a3a945
HPGE		 21#define GPIOG_EN BIT(6)
22#define GPIOG_READ BIT(1)
d7636e0b 23
2d2c880f 24static char *forcecrt2type;
dfbdf805 25static char *mode;
c3228308 26static int vesa = -1;
7548a83e 27static unsigned int refresh_rate;
dfbdf805 28
d7636e0b 29/* -------------------- Macro definitions ---------------------------- */
30
96cd1f8b 31#ifdef DEBUG
5a3a3f64 32static void dumpVGAReg(struct xgifb_video_info *xgifb_info)
d7636e0b 33{
b654f878
PS		 34 u8 i, reg;
35
b6e2dc39 36 xgifb_reg_set(XGISR, 0x05, 0x86);
b654f878
PS		 37
38 for (i = 0; i < 0x4f; i++) {
7e119b75 39 reg = xgifb_reg_get(XGISR, i);
be25aef0
MG		 40 pr_debug("o 3c4 %x\n", i);
41 pr_debug("i 3c5 => %x\n", reg);
b654f878
PS		 42 }
43
44 for (i = 0; i < 0xF0; i++) {
7e119b75 45 reg = xgifb_reg_get(XGICR, i);
be25aef0
MG		 46 pr_debug("o 3d4 %x\n", i);
47 pr_debug("i 3d5 => %x\n", reg);
b654f878 48 }
d7636e0b 49}
50#else
5a3a3f64 51static inline void dumpVGAReg(struct xgifb_video_info *xgifb_info)
b654f878
PS		 52{
53}
d7636e0b 54#endif
55
d7636e0b 56/* --------------- Hardware Access Routines -------------------------- */
57
b654f878
PS		 58static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr,
59 struct xgi_hw_device_info *HwDeviceExtension,
f3ac47cf 60 unsigned char modeno)
d7636e0b 61{
b654f878
PS		 62 unsigned short ModeNo = modeno;
63 unsigned short ModeIdIndex = 0, ClockIndex = 0;
64 unsigned short RefreshRateTableIndex = 0;
b654f878 65 int Clock;
694683f6 66
b654f878 67 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
d7636e0b 68
334ab072 69 XGI_SearchModeID(ModeNo, &ModeIdIndex);
aca03bcc 70
b654f878
PS		 71 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
72 ModeIdIndex, XGI_Pr);
d7636e0b 73
a39325d2 74 ClockIndex = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
b654f878 75
acfe093e 76 Clock = XGI_VCLKData[ClockIndex].CLOCK * 1000;
d7636e0b 77
b654f878 78 return Clock;
d7636e0b 79}
80
b654f878
PS		 81static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
82 struct xgi_hw_device_info *HwDeviceExtension,
f3ac47cf 83 unsigned char modeno,
b654f878
PS		 84 u32 *left_margin, u32 *right_margin, u32 *upper_margin,
85 u32 *lower_margin, u32 *hsync_len, u32 *vsync_len, u32 *sync,
86 u32 *vmode)
d7636e0b 87{
b654f878 88 unsigned short ModeNo = modeno;
051ff1bb 89 unsigned short ModeIdIndex, index = 0;
b654f878
PS		 90 unsigned short RefreshRateTableIndex = 0;
91
ecfaa00c
PH		 92 unsigned short VRE, VBE, VRS, VDE;
93 unsigned short HRE, HBE, HRS, HDE;
b654f878 94 unsigned char sr_data, cr_data, cr_data2;
a5e080b8 95 int B, C, D, F, temp, j;
694683f6 96
b654f878 97 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
334ab072 98 if (!XGI_SearchModeID(ModeNo, &ModeIdIndex))
051ff1bb 99 return 0;
b654f878
PS		 100 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
101 ModeIdIndex, XGI_Pr);
a39325d2 102 index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
d7636e0b 103
7853bced 104 sr_data = XGI_CRT1Table[index].CR[5];
d7636e0b 105
9ea755f3 106 HDE = XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3;
d7636e0b 107
7853bced 108 cr_data = XGI_CRT1Table[index].CR[3];
d7636e0b 109
b654f878
PS		 110 /* Horizontal retrace (=sync) start */
111 HRS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0xC0) << 2);
a5e080b8 112 F = HRS - HDE - 3;
d7636e0b 113
7853bced 114 sr_data = XGI_CRT1Table[index].CR[6];
d7636e0b 115
7853bced 116 cr_data = XGI_CRT1Table[index].CR[2];
d7636e0b 117
7853bced 118 cr_data2 = XGI_CRT1Table[index].CR[4];
d7636e0b 119
b654f878
PS		 120 /* Horizontal blank end */
121 HBE = (cr_data & 0x1f) | ((unsigned short) (cr_data2 & 0x80) >> 2)
122 | ((unsigned short) (sr_data & 0x03) << 6);
d7636e0b 123
b654f878
PS		 124 /* Horizontal retrace (=sync) end */
125 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
d7636e0b 126
a5e080b8 127 temp = HBE - ((HDE - 1) & 255);
b654f878 128 B = (temp > 0) ? temp : (temp + 256);
d7636e0b 129
a5e080b8 130 temp = HRE - ((HDE + F + 3) & 63);
b654f878 131 C = (temp > 0) ? temp : (temp + 64);
d7636e0b 132
b654f878 133 D = B - F - C;
d7636e0b 134
b654f878
PS		 135 *left_margin = D * 8;
136 *right_margin = F * 8;
137 *hsync_len = C * 8;
d7636e0b 138
7853bced 139 sr_data = XGI_CRT1Table[index].CR[14];
d7636e0b 140
7853bced 141 cr_data2 = XGI_CRT1Table[index].CR[9];
d7636e0b 142
a5e080b8 143 VDE = XGI330_RefIndex[RefreshRateTableIndex].YRes;
d7636e0b 144
7853bced 145 cr_data = XGI_CRT1Table[index].CR[10];
d7636e0b 146
b654f878
PS		 147 /* Vertical retrace (=sync) start */
148 VRS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x04) << 6)
149 | ((unsigned short) (cr_data2 & 0x80) << 2)
150 | ((unsigned short) (sr_data & 0x08) << 7);
a5e080b8 151 F = VRS + 1 - VDE;
d7636e0b 152
7853bced 153 cr_data = XGI_CRT1Table[index].CR[13];
d7636e0b 154
b654f878
PS		 155 /* Vertical blank end */
156 VBE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x10) << 4);
a5e080b8 157 temp = VBE - ((VDE - 1) & 511);
b654f878 158 B = (temp > 0) ? temp : (temp + 512);
d7636e0b 159
7853bced 160 cr_data = XGI_CRT1Table[index].CR[11];
d7636e0b 161
b654f878
PS		 162 /* Vertical retrace (=sync) end */
163 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
a5e080b8 164 temp = VRE - ((VDE + F - 1) & 31);
b654f878 165 C = (temp > 0) ? temp : (temp + 32);
d7636e0b 166
b654f878 167 D = B - F - C;
d7636e0b 168
b654f878
PS		 169 *upper_margin = D;
170 *lower_margin = F;
171 *vsync_len = C;
d7636e0b 172
a39325d2 173 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
b654f878
PS		 174 *sync &= ~FB_SYNC_VERT_HIGH_ACT;
175 else
176 *sync |= FB_SYNC_VERT_HIGH_ACT;
d7636e0b 177
a39325d2 178 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
b654f878
PS		 179 *sync &= ~FB_SYNC_HOR_HIGH_ACT;
180 else
181 *sync |= FB_SYNC_HOR_HIGH_ACT;
d7636e0b 182
b654f878 183 *vmode = FB_VMODE_NONINTERLACED;
a39325d2 184 if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
b654f878
PS		 185 *vmode = FB_VMODE_INTERLACED;
186 else {
187 j = 0;
b397992e
AK		 188 while (XGI330_EModeIDTable[j].Ext_ModeID != 0xff) {
189 if (XGI330_EModeIDTable[j].Ext_ModeID ==
a39325d2 190 XGI330_RefIndex[RefreshRateTableIndex].ModeID) {
b397992e 191 if (XGI330_EModeIDTable[j].Ext_ModeFlag &
a12c27c5 192 DoubleScanMode) {
b654f878
PS		 193 *vmode = FB_VMODE_DOUBLE;
194 }
195 break;
196 }
197 j++;
198 }
199 }
d7636e0b 200
b654f878
PS		 201 return 1;
202}
d7636e0b 203
56810a92 204void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr)
d7636e0b 205{
b654f878
PS		 206 XGI_Pr->P3c4 = BaseAddr + 0x14;
207 XGI_Pr->P3d4 = BaseAddr + 0x24;
208 XGI_Pr->P3c0 = BaseAddr + 0x10;
209 XGI_Pr->P3ce = BaseAddr + 0x1e;
210 XGI_Pr->P3c2 = BaseAddr + 0x12;
d51d45da 211 XGI_Pr->P3cc = BaseAddr + 0x1c;
b654f878
PS		 212 XGI_Pr->P3ca = BaseAddr + 0x1a;
213 XGI_Pr->P3c6 = BaseAddr + 0x16;
214 XGI_Pr->P3c7 = BaseAddr + 0x17;
215 XGI_Pr->P3c8 = BaseAddr + 0x18;
216 XGI_Pr->P3c9 = BaseAddr + 0x19;
217 XGI_Pr->P3da = BaseAddr + 0x2A;
a5c79d61 218 XGI_Pr->Part0Port = BaseAddr + XGI_CRT2_PORT_00;
a12c27c5 219 /* Digital video interface registers (LCD) */
6896b94e 220 XGI_Pr->Part1Port = BaseAddr + SIS_CRT2_PORT_04;
a12c27c5 221 /* 301 TV Encoder registers */
6896b94e 222 XGI_Pr->Part2Port = BaseAddr + SIS_CRT2_PORT_10;
a12c27c5 223 /* 301 Macrovision registers */
6896b94e 224 XGI_Pr->Part3Port = BaseAddr + SIS_CRT2_PORT_12;
a12c27c5 225 /* 301 VGA2 (and LCD) registers */
6896b94e 226 XGI_Pr->Part4Port = BaseAddr + SIS_CRT2_PORT_14;
a12c27c5 227 /* 301 palette address port registers */
6896b94e 228 XGI_Pr->Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
d7636e0b 229}
230
d7636e0b 231/* ------------------ Internal helper routines ----------------- */
232
fab04b97 233static int XGIfb_GetXG21DefaultLVDSModeIdx(struct xgifb_video_info *xgifb_info)
c4fa7dfe 234{
791fef1b
MG		 235 int i = 0;
236
237 while ((XGIbios_mode[i].mode_no != 0)
238 && (XGIbios_mode[i].xres <= xgifb_info->lvds_data.LVDSHDE)) {
239 if ((XGIbios_mode[i].xres == xgifb_info->lvds_data.LVDSHDE)
240 && (XGIbios_mode[i].yres == xgifb_info->lvds_data.LVDSVDE)
241 && (XGIbios_mode[i].bpp == 8)) {
242 return i;
c4fa7dfe 243 }
791fef1b 244 i++;
c4fa7dfe 245 }
c4fa7dfe 246
791fef1b 247 return -1;
c4fa7dfe
AK		 248}
249
ccf265ad
AK		 250static void XGIfb_search_mode(struct xgifb_video_info *xgifb_info,
251 const char *name)
d7636e0b 252{
f9e5de0f
AK		 253 unsigned int xres;
254 unsigned int yres;
255 unsigned int bpp;
256 int i;
d7636e0b 257
f9e5de0f
AK		 258 if (sscanf(name, "%ux%ux%u", &xres, &yres, &bpp) != 3)
259 goto invalid_mode;
260
261 if (bpp == 24)
262 bpp = 32; /* That's for people who mix up color and fb depth. */
263
264 for (i = 0; XGIbios_mode[i].mode_no != 0; i++)
265 if (XGIbios_mode[i].xres == xres &&
266 XGIbios_mode[i].yres == yres &&
267 XGIbios_mode[i].bpp == bpp) {
ccf265ad 268 xgifb_info->mode_idx = i;
f9e5de0f 269 return;
d7636e0b 270 }
f9e5de0f
AK		 271invalid_mode:
272 pr_info("Invalid mode '%s'\n", name);
d7636e0b 273}
274
ccf265ad
AK		 275static void XGIfb_search_vesamode(struct xgifb_video_info *xgifb_info,
276 unsigned int vesamode)
d7636e0b 277{
4362f5be 278 int i = 0;
d7636e0b 279
c3228308
AK		 280 if (vesamode == 0)
281 goto invalid;
d7636e0b 282
b654f878 283 vesamode &= 0x1dff; /* Clean VESA mode number from other flags */
d7636e0b 284
b654f878 285 while (XGIbios_mode[i].mode_no != 0) {
a12c27c5
KT		 286 if ((XGIbios_mode[i].vesa_mode_no_1 == vesamode) ||
287 (XGIbios_mode[i].vesa_mode_no_2 == vesamode)) {
ccf265ad 288 xgifb_info->mode_idx = i;
4362f5be 289 return;
d7636e0b 290 }
291 i++;
292 }
c3228308
AK		 293
294invalid:
4362f5be 295 pr_info("Invalid VESA mode 0x%x'\n", vesamode);
d7636e0b 296}
297
fd26d420 298static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex)
d7636e0b 299{
b654f878 300 u16 xres, yres;
fd26d420 301 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
a09f347c 302 unsigned long required_mem;
b654f878 303
fd26d420 304 if (xgifb_info->chip == XG21) {
289ea524 305 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
fab04b97
AK		 306 xres = xgifb_info->lvds_data.LVDSHDE;
307 yres = xgifb_info->lvds_data.LVDSVDE;
b654f878
PS		 308 if (XGIbios_mode[myindex].xres > xres)
309 return -1;
310 if (XGIbios_mode[myindex].yres > yres)
311 return -1;
a12c27c5
KT		 312 if ((XGIbios_mode[myindex].xres < xres) &&
313 (XGIbios_mode[myindex].yres < yres)) {
b654f878
PS		 314 if (XGIbios_mode[myindex].bpp > 8)
315 return -1;
316 }
b654f878 317 }
a09f347c 318 goto check_memory;
d7636e0b 319 }
b654f878
PS		 320
321 /* FIXME: for now, all is valid on XG27 */
fd26d420 322 if (xgifb_info->chip == XG27)
a09f347c 323 goto check_memory;
b654f878
PS		 324
325 if (!(XGIbios_mode[myindex].chipset & MD_XGI315))
326 return -1;
327
289ea524
AK		 328 switch (xgifb_info->display2) {
329 case XGIFB_DISP_LCD:
c62f2e46 330 switch (hw_info->ulCRT2LCDType) {
b654f878
PS		 331 case LCD_640x480:
332 xres = 640;
333 yres = 480;
d7636e0b 334 break;
b654f878
PS		 335 case LCD_800x600:
336 xres = 800;
337 yres = 600;
d7636e0b 338 break;
b654f878
PS		 339 case LCD_1024x600:
340 xres = 1024;
341 yres = 600;
d7636e0b 342 break;
b654f878
PS		 343 case LCD_1024x768:
344 xres = 1024;
345 yres = 768;
d7636e0b 346 break;
b654f878
PS		 347 case LCD_1152x768:
348 xres = 1152;
349 yres = 768;
d7636e0b 350 break;
b654f878
PS		 351 case LCD_1280x960:
352 xres = 1280;
353 yres = 960;
d7636e0b 354 break;
b654f878
PS		 355 case LCD_1280x768:
356 xres = 1280;
357 yres = 768;
d7636e0b 358 break;
b654f878
PS		 359 case LCD_1280x1024:
360 xres = 1280;
361 yres = 1024;
d7636e0b 362 break;
b654f878
PS		 363 case LCD_1400x1050:
364 xres = 1400;
365 yres = 1050;
d7636e0b 366 break;
b654f878
PS		 367 case LCD_1600x1200:
368 xres = 1600;
369 yres = 1200;
370 break;
b654f878
PS		 371 default:
372 xres = 0;
373 yres = 0;
374 break;
375 }
376 if (XGIbios_mode[myindex].xres > xres)
377 return -1;
378 if (XGIbios_mode[myindex].yres > yres)
379 return -1;
c62f2e46
AK		 380 if ((hw_info->ulExternalChip == 0x01) || /* LVDS */
381 (hw_info->ulExternalChip == 0x05)) { /* LVDS+Chrontel */
b654f878
PS		 382 switch (XGIbios_mode[myindex].xres) {
383 case 512:
384 if (XGIbios_mode[myindex].yres != 512)
385 return -1;
c62f2e46 386 if (hw_info->ulCRT2LCDType == LCD_1024x600)
b654f878
PS		 387 return -1;
388 break;
389 case 640:
390 if ((XGIbios_mode[myindex].yres != 400)
391 && (XGIbios_mode[myindex].yres
392 != 480))
393 return -1;
394 break;
395 case 800:
396 if (XGIbios_mode[myindex].yres != 600)
397 return -1;
398 break;
399 case 1024:
a12c27c5
KT		 400 if ((XGIbios_mode[myindex].yres != 600) &&
401 (XGIbios_mode[myindex].yres != 768))
b654f878 402 return -1;
a12c27c5 403 if ((XGIbios_mode[myindex].yres == 600) &&
c62f2e46 404 (hw_info->ulCRT2LCDType != LCD_1024x600))
b654f878
PS		 405 return -1;
406 break;
407 case 1152:
408 if ((XGIbios_mode[myindex].yres) != 768)
409 return -1;
c62f2e46 410 if (hw_info->ulCRT2LCDType != LCD_1152x768)
b654f878
PS		 411 return -1;
412 break;
413 case 1280:
a12c27c5
KT		 414 if ((XGIbios_mode[myindex].yres != 768) &&
415 (XGIbios_mode[myindex].yres != 1024))
b654f878 416 return -1;
a12c27c5 417 if ((XGIbios_mode[myindex].yres == 768) &&
c62f2e46 418 (hw_info->ulCRT2LCDType != LCD_1280x768))
b654f878
PS		 419 return -1;
420 break;
421 case 1400:
422 if (XGIbios_mode[myindex].yres != 1050)
423 return -1;
424 break;
425 case 1600:
426 if (XGIbios_mode[myindex].yres != 1200)
427 return -1;
428 break;
429 default:
430 return -1;
d7636e0b 431 }
b654f878
PS		 432 } else {
433 switch (XGIbios_mode[myindex].xres) {
434 case 512:
435 if (XGIbios_mode[myindex].yres != 512)
436 return -1;
437 break;
438 case 640:
a12c27c5
KT		 439 if ((XGIbios_mode[myindex].yres != 400) &&
440 (XGIbios_mode[myindex].yres != 480))
b654f878
PS		 441 return -1;
442 break;
443 case 800:
444 if (XGIbios_mode[myindex].yres != 600)
445 return -1;
446 break;
447 case 1024:
448 if (XGIbios_mode[myindex].yres != 768)
449 return -1;
450 break;
451 case 1280:
a12c27c5
KT		 452 if ((XGIbios_mode[myindex].yres != 960) &&
453 (XGIbios_mode[myindex].yres != 1024))
b654f878
PS		 454 return -1;
455 if (XGIbios_mode[myindex].yres == 960) {
c62f2e46 456 if (hw_info->ulCRT2LCDType ==
a12c27c5 457 LCD_1400x1050)
b654f878
PS		 458 return -1;
459 }
460 break;
461 case 1400:
462 if (XGIbios_mode[myindex].yres != 1050)
463 return -1;
464 break;
465 case 1600:
466 if (XGIbios_mode[myindex].yres != 1200)
467 return -1;
468 break;
469 default:
470 return -1;
d7636e0b 471 }
472 }
d7636e0b 473 break;
289ea524 474 case XGIFB_DISP_TV:
b654f878
PS		 475 switch (XGIbios_mode[myindex].xres) {
476 case 512:
477 case 640:
478 case 800:
479 break;
480 case 720:
fd26d420 481 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 482 if (XGIbios_mode[myindex].yres != 480)
483 return -1;
fd26d420 484 } else if (xgifb_info->TV_type == TVMODE_PAL) {
b654f878
PS		 485 if (XGIbios_mode[myindex].yres != 576)
486 return -1;
d7636e0b 487 }
949eb0ae 488 /* LVDS/CHRONTEL does not support 720 */
fd26d420
AK		 489 if (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL ||
490 xgifb_info->hasVB == HASVB_CHRONTEL) {
b654f878
PS		 491 return -1;
492 }
493 break;
494 case 1024:
fd26d420 495 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 496 if (XGIbios_mode[myindex].bpp == 32)
497 return -1;
498 }
b654f878
PS		 499 break;
500 default:
501 return -1;
d7636e0b 502 }
503 break;
289ea524 504 case XGIFB_DISP_CRT:
b654f878
PS		 505 if (XGIbios_mode[myindex].xres > 1280)
506 return -1;
507 break;
289ea524
AK		 508 case XGIFB_DISP_NONE:
509 break;
d7636e0b 510 }
a09f347c
AK		 511
512check_memory:
513 required_mem = XGIbios_mode[myindex].xres * XGIbios_mode[myindex].yres *
514 XGIbios_mode[myindex].bpp / 8;
515 if (required_mem > xgifb_info->video_size)
516 return -1;
b654f878 517 return myindex;
d7636e0b 518}
519
520static void XGIfb_search_crt2type(const char *name)
521{
522 int i = 0;
523
b654f878 524 if (name == NULL)
d7636e0b 525 return;
526
b654f878 527 while (XGI_crt2type[i].type_no != -1) {
d7636e0b 528 if (!strcmp(name, XGI_crt2type[i].name)) {
529 XGIfb_crt2type = XGI_crt2type[i].type_no;
530 XGIfb_tvplug = XGI_crt2type[i].tvplug_no;
531 break;
532 }
533 i++;
534 }
b654f878 535 if (XGIfb_crt2type < 0)
4a6b1518 536 pr_info("Invalid CRT2 type: %s\n", name);
d7636e0b 537}
538
fd26d420
AK		 539static u8 XGIfb_search_refresh_rate(struct xgifb_video_info *xgifb_info,
540 unsigned int rate)
d7636e0b 541{
542 u16 xres, yres;
543 int i = 0;
544
ccf265ad
AK		 545 xres = XGIbios_mode[xgifb_info->mode_idx].xres;
546 yres = XGIbios_mode[xgifb_info->mode_idx].yres;
d7636e0b 547
5aa55d9f 548 xgifb_info->rate_idx = 0;
d7636e0b 549 while ((XGIfb_vrate[i].idx != 0) && (XGIfb_vrate[i].xres <= xres)) {
a12c27c5
KT		 550 if ((XGIfb_vrate[i].xres == xres) &&
551 (XGIfb_vrate[i].yres == yres)) {
d7636e0b 552 if (XGIfb_vrate[i].refresh == rate) {
5aa55d9f 553 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
d7636e0b 554 break;
555 } else if (XGIfb_vrate[i].refresh > rate) {
556 if ((XGIfb_vrate[i].refresh - rate) <= 3) {
be25aef0 557 pr_debug("Adjusting rate from %d up to %d\n",
d56b4c3d 558 rate, XGIfb_vrate[i].refresh);
5aa55d9f
AK		 559 xgifb_info->rate_idx =
560 XGIfb_vrate[i].idx;
fd26d420 561 xgifb_info->refresh_rate =
a12c27c5 562 XGIfb_vrate[i].refresh;
b654f878
PS		 563 } else if (((rate - XGIfb_vrate[i - 1].refresh)
564 <= 2) && (XGIfb_vrate[i].idx
565 != 1)) {
be25aef0 566 pr_debug("Adjusting rate from %d down to %d\n",
3bcc2460
MG		 567 rate,
568 XGIfb_vrate[i-1].refresh);
5aa55d9f
AK		 569 xgifb_info->rate_idx =
570 XGIfb_vrate[i - 1].idx;
fd26d420 571 xgifb_info->refresh_rate =
a12c27c5 572 XGIfb_vrate[i - 1].refresh;
d7636e0b 573 }
574 break;
b654f878 575 } else if ((rate - XGIfb_vrate[i].refresh) <= 2) {
be25aef0 576 pr_debug("Adjusting rate from %d down to %d\n",
d56b4c3d 577 rate, XGIfb_vrate[i].refresh);
5aa55d9f 578 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
b654f878
PS		 579 break;
580 }
d7636e0b 581 }
582 i++;
583 }
9c8c8315 584 if (xgifb_info->rate_idx > 0)
5aa55d9f 585 return xgifb_info->rate_idx;
9c8c8315
TG		 586 pr_info("Unsupported rate %d for %dx%d\n",
587 rate, xres, yres);
588 return 0;
d7636e0b 589}
590
591static void XGIfb_search_tvstd(const char *name)
592{
593 int i = 0;
594
b654f878 595 if (name == NULL)
d7636e0b 596 return;
597
598 while (XGI_tvtype[i].type_no != -1) {
599 if (!strcmp(name, XGI_tvtype[i].name)) {
600 XGIfb_tvmode = XGI_tvtype[i].type_no;
601 break;
602 }
603 i++;
604 }
605}
606
d7636e0b 607/* ----------- FBDev related routines for all series ----------- */
608
fd26d420
AK		 609static void XGIfb_bpp_to_var(struct xgifb_video_info *xgifb_info,
610 struct fb_var_screeninfo *var)
d7636e0b 611{
b654f878
PS		 612 switch (var->bits_per_pixel) {
613 case 8:
614 var->red.offset = var->green.offset = var->blue.offset = 0;
d7636e0b 615 var->red.length = var->green.length = var->blue.length = 6;
fd26d420 616 xgifb_info->video_cmap_len = 256;
d7636e0b 617 break;
b654f878 618 case 16:
d7636e0b 619 var->red.offset = 11;
620 var->red.length = 5;
621 var->green.offset = 5;
622 var->green.length = 6;
623 var->blue.offset = 0;
624 var->blue.length = 5;
625 var->transp.offset = 0;
626 var->transp.length = 0;
fd26d420 627 xgifb_info->video_cmap_len = 16;
d7636e0b 628 break;
b654f878 629 case 32:
d7636e0b 630 var->red.offset = 16;
631 var->red.length = 8;
632 var->green.offset = 8;
633 var->green.length = 8;
634 var->blue.offset = 0;
635 var->blue.length = 8;
636 var->transp.offset = 24;
637 var->transp.length = 8;
fd26d420 638 xgifb_info->video_cmap_len = 16;
d7636e0b 639 break;
640 }
641}
642
c4fa7dfe 643/* --------------------- SetMode routines ------------------------- */
d7636e0b 644
fd26d420 645static void XGIfb_pre_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 646{
647 u8 cr30 = 0, cr31 = 0;
d7636e0b 648
c4fa7dfe
AK		 649 cr31 = xgifb_reg_get(XGICR, 0x31);
650 cr31 &= ~0x60;
d7636e0b 651
289ea524
AK		 652 switch (xgifb_info->display2) {
653 case XGIFB_DISP_CRT:
7aa546e4 654 cr30 = SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE;
fc39dcb7 655 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 656 break;
289ea524 657 case XGIFB_DISP_LCD:
7aa546e4 658 cr30 = SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE;
fc39dcb7 659 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 660 break;
289ea524 661 case XGIFB_DISP_TV:
fd26d420 662 if (xgifb_info->TV_type == TVMODE_HIVISION)
7aa546e4
JR		 663 cr30 = SIS_VB_OUTPUT_HIVISION
664 | SIS_SIMULTANEOUS_VIEW_ENABLE;
fd26d420 665 else if (xgifb_info->TV_plug == TVPLUG_SVIDEO)
7aa546e4
JR		 666 cr30 = SIS_VB_OUTPUT_SVIDEO
667 | SIS_SIMULTANEOUS_VIEW_ENABLE;
fd26d420 668 else if (xgifb_info->TV_plug == TVPLUG_COMPOSITE)
7aa546e4
JR		 669 cr30 = SIS_VB_OUTPUT_COMPOSITE
670 | SIS_SIMULTANEOUS_VIEW_ENABLE;
fd26d420 671 else if (xgifb_info->TV_plug == TVPLUG_SCART)
7aa546e4
JR		 672 cr30 = SIS_VB_OUTPUT_SCART
673 | SIS_SIMULTANEOUS_VIEW_ENABLE;
fc39dcb7 674 cr31 |= SIS_DRIVER_MODE;
d7636e0b 675
fd26d420 676 if (XGIfb_tvmode == 1 || xgifb_info->TV_type == TVMODE_PAL)
c4fa7dfe
AK		 677 cr31 |= 0x01;
678 else
679 cr31 &= ~0x01;
680 break;
681 default: /* disable CRT2 */
682 cr30 = 0x00;
fc39dcb7 683 cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
d7636e0b 684 }
685
c4fa7dfe
AK		 686 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR30, cr30);
687 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR31, cr31);
5aa55d9f
AK		 688 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR33,
689 (xgifb_info->rate_idx & 0x0F));
c4fa7dfe 690}
d7636e0b 691
fd26d420 692static void XGIfb_post_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 693{
694 u8 reg;
695 unsigned char doit = 1;
949eb0ae 696
fd26d420 697 if (xgifb_info->video_bpp == 8) {
949eb0ae
MG		 698 /*
699 * We can't switch off CRT1 on LVDS/Chrontel
700 * in 8bpp Modes
701 */
fd26d420
AK		 702 if ((xgifb_info->hasVB == HASVB_LVDS) ||
703 (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL)) {
c4fa7dfe
AK		 704 doit = 0;
705 }
949eb0ae
MG		 706 /*
707 * We can't switch off CRT1 on 301B-DH
708 * in 8bpp Modes if using LCD
709 */
289ea524 710 if (xgifb_info->display2 == XGIFB_DISP_LCD)
c4fa7dfe 711 doit = 0;
d7636e0b 712 }
713
949eb0ae 714 /* We can't switch off CRT1 if bridge is in slave mode */
fd26d420 715 if (xgifb_info->hasVB != HASVB_NONE) {
c4fa7dfe 716 reg = xgifb_reg_get(XGIPART1, 0x00);
d7636e0b 717
c4fa7dfe
AK		 718 if ((reg & 0x50) == 0x10)
719 doit = 0;
d7636e0b 720
c4fa7dfe
AK		 721 } else {
722 XGIfb_crt1off = 0;
d7636e0b 723 }
724
c4fa7dfe
AK		 725 reg = xgifb_reg_get(XGICR, 0x17);
726 if ((XGIfb_crt1off) && (doit))
727 reg &= ~0x80;
d7636e0b 728 else
c4fa7dfe
AK		 729 reg |= 0x80;
730 xgifb_reg_set(XGICR, 0x17, reg);
d7636e0b 731
fc39dcb7 732 xgifb_reg_and(XGISR, IND_SIS_RAMDAC_CONTROL, ~0x04);
d7636e0b 733
289ea524
AK		 734 if (xgifb_info->display2 == XGIFB_DISP_TV &&
735 xgifb_info->hasVB == HASVB_301) {
d7636e0b 736
c4fa7dfe 737 reg = xgifb_reg_get(XGIPART4, 0x01);
d7636e0b 738
c4fa7dfe 739 if (reg < 0xB0) { /* Set filter for XGI301 */
84a6c46e
AK		 740 int filter_tb;
741
fd26d420 742 switch (xgifb_info->video_width) {
c4fa7dfe 743 case 320:
fd26d420 744 filter_tb = (xgifb_info->TV_type ==
a12c27c5 745 TVMODE_NTSC) ? 4 : 12;
c4fa7dfe
AK		 746 break;
747 case 640:
fd26d420 748 filter_tb = (xgifb_info->TV_type ==
a12c27c5 749 TVMODE_NTSC) ? 5 : 13;
c4fa7dfe
AK		 750 break;
751 case 720:
fd26d420 752 filter_tb = (xgifb_info->TV_type ==
a12c27c5 753 TVMODE_NTSC) ? 6 : 14;
c4fa7dfe
AK		 754 break;
755 case 800:
fd26d420 756 filter_tb = (xgifb_info->TV_type ==
a12c27c5 757 TVMODE_NTSC) ? 7 : 15;
c4fa7dfe
AK		 758 break;
759 default:
84a6c46e 760 filter_tb = 0;
c4fa7dfe
AK		 761 filter = -1;
762 break;
763 }
39f10bf1 764 xgifb_reg_or(XGIPART1,
fc39dcb7 765 SIS_CRT2_WENABLE_315,
39f10bf1 766 0x01);
d7636e0b 767
fd26d420 768 if (xgifb_info->TV_type == TVMODE_NTSC) {
d7636e0b 769
c4fa7dfe 770 xgifb_reg_and(XGIPART2, 0x3a, 0x1f);
d7636e0b 771
fd26d420 772 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 773
774 xgifb_reg_and(XGIPART2, 0x30, 0xdf);
775
fd26d420 776 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 777 == TVPLUG_COMPOSITE) {
778
779 xgifb_reg_or(XGIPART2, 0x30, 0x20);
780
fd26d420 781 switch (xgifb_info->video_width) {
c4fa7dfe 782 case 640:
a12c27c5
KT		 783 xgifb_reg_set(XGIPART2,
784 0x35,
785 0xEB);
786 xgifb_reg_set(XGIPART2,
787 0x36,
788 0x04);
789 xgifb_reg_set(XGIPART2,
790 0x37,
791 0x25);
792 xgifb_reg_set(XGIPART2,
793 0x38,
794 0x18);
c4fa7dfe
AK		 795 break;
796 case 720:
a12c27c5
KT		 797 xgifb_reg_set(XGIPART2,
798 0x35,
799 0xEE);
800 xgifb_reg_set(XGIPART2,
801 0x36,
802 0x0C);
803 xgifb_reg_set(XGIPART2,
804 0x37,
805 0x22);
806 xgifb_reg_set(XGIPART2,
807 0x38,
808 0x08);
c4fa7dfe
AK		 809 break;
810 case 800:
a12c27c5
KT		 811 xgifb_reg_set(XGIPART2,
812 0x35,
813 0xEB);
814 xgifb_reg_set(XGIPART2,
815 0x36,
816 0x15);
817 xgifb_reg_set(XGIPART2,
818 0x37,
819 0x25);
820 xgifb_reg_set(XGIPART2,
821 0x38,
822 0xF6);
c4fa7dfe
AK		 823 break;
824 }
825 }
826
fd26d420 827 } else if (xgifb_info->TV_type == TVMODE_PAL) {
c4fa7dfe
AK		 828
829 xgifb_reg_and(XGIPART2, 0x3A, 0x1F);
830
fd26d420 831 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 832
833 xgifb_reg_and(XGIPART2, 0x30, 0xDF);
834
fd26d420 835 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 836 == TVPLUG_COMPOSITE) {
837
838 xgifb_reg_or(XGIPART2, 0x30, 0x20);
839
fd26d420 840 switch (xgifb_info->video_width) {
c4fa7dfe 841 case 640:
a12c27c5
KT		 842 xgifb_reg_set(XGIPART2,
843 0x35,
844 0xF1);
845 xgifb_reg_set(XGIPART2,
846 0x36,
847 0xF7);
848 xgifb_reg_set(XGIPART2,
849 0x37,
850 0x1F);
851 xgifb_reg_set(XGIPART2,
852 0x38,
853 0x32);
c4fa7dfe
AK		 854 break;
855 case 720:
a12c27c5
KT		 856 xgifb_reg_set(XGIPART2,
857 0x35,
858 0xF3);
859 xgifb_reg_set(XGIPART2,
860 0x36,
861 0x00);
862 xgifb_reg_set(XGIPART2,
863 0x37,
864 0x1D);
865 xgifb_reg_set(XGIPART2,
866 0x38,
867 0x20);
c4fa7dfe
AK		 868 break;
869 case 800:
a12c27c5
KT		 870 xgifb_reg_set(XGIPART2,
871 0x35,
872 0xFC);
873 xgifb_reg_set(XGIPART2,
874 0x36,
875 0xFB);
876 xgifb_reg_set(XGIPART2,
877 0x37,
878 0x14);
879 xgifb_reg_set(XGIPART2,
880 0x38,
881 0x2A);
c4fa7dfe
AK		 882 break;
883 }
884 }
885 }
886
887 if ((filter >= 0) && (filter <= 7)) {
977310bb 888 pr_debug("FilterTable[%d]-%d: %*ph\n",
d56b4c3d 889 filter_tb, filter,
977310bb
AS		 890 4, XGI_TV_filter[filter_tb].
891 filter[filter]);
c4fa7dfe 892 xgifb_reg_set(
a12c27c5
KT		 893 XGIPART2,
894 0x35,
895 (XGI_TV_filter[filter_tb].
896 filter[filter][0]));
c4fa7dfe 897 xgifb_reg_set(
a12c27c5
KT		 898 XGIPART2,
899 0x36,
900 (XGI_TV_filter[filter_tb].
901 filter[filter][1]));
c4fa7dfe 902 xgifb_reg_set(
a12c27c5
KT		 903 XGIPART2,
904 0x37,
905 (XGI_TV_filter[filter_tb].
906 filter[filter][2]));
c4fa7dfe 907 xgifb_reg_set(
a12c27c5
KT		 908 XGIPART2,
909 0x38,
910 (XGI_TV_filter[filter_tb].
911 filter[filter][3]));
c4fa7dfe 912 }
c4fa7dfe 913 }
c4fa7dfe 914 }
c4fa7dfe
AK		 915}
916
917static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
918 struct fb_info *info)
919{
fd26d420
AK		 920 struct xgifb_video_info *xgifb_info = info->par;
921 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
c4fa7dfe
AK		 922 unsigned int htotal = var->left_margin + var->xres + var->right_margin
923 + var->hsync_len;
924 unsigned int vtotal = var->upper_margin + var->yres + var->lower_margin
925 + var->vsync_len;
509031dd 926#if defined(__BIG_ENDIAN)
ef23b210 927 u8 cr_data;
c4fa7dfe
AK		 928#endif
929 unsigned int drate = 0, hrate = 0;
930 int found_mode = 0;
931 int old_mode;
c4fa7dfe 932
c4fa7dfe
AK		 933 info->var.xres_virtual = var->xres_virtual;
934 info->var.yres_virtual = var->yres_virtual;
935 info->var.bits_per_pixel = var->bits_per_pixel;
936
937 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
938 vtotal <<= 1;
939 else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
940 vtotal <<= 2;
c4fa7dfe
AK		 941
942 if (!htotal || !vtotal) {
be25aef0 943 pr_debug("Invalid 'var' information\n");
c4fa7dfe 944 return -EINVAL;
4a6b1518 945 } pr_debug("var->pixclock=%d, htotal=%d, vtotal=%d\n",
c4fa7dfe
AK		 946 var->pixclock, htotal, vtotal);
947
38c97723 948 if (var->pixclock) {
c4fa7dfe
AK		 949 drate = 1000000000 / var->pixclock;
950 hrate = (drate * 1000) / htotal;
fd26d420 951 xgifb_info->refresh_rate = (unsigned int) (hrate * 2
c4fa7dfe
AK		 952 / vtotal);
953 } else {
fd26d420 954 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 955 }
956
4a6b1518 957 pr_debug("Change mode to %dx%dx%d-%dHz\n",
a12c27c5
KT		 958 var->xres,
959 var->yres,
960 var->bits_per_pixel,
fd26d420 961 xgifb_info->refresh_rate);
c4fa7dfe 962
ccf265ad
AK		 963 old_mode = xgifb_info->mode_idx;
964 xgifb_info->mode_idx = 0;
c4fa7dfe 965
ccf265ad
AK		 966 while ((XGIbios_mode[xgifb_info->mode_idx].mode_no != 0) &&
967 (XGIbios_mode[xgifb_info->mode_idx].xres <= var->xres)) {
968 if ((XGIbios_mode[xgifb_info->mode_idx].xres == var->xres) &&
969 (XGIbios_mode[xgifb_info->mode_idx].yres == var->yres) &&
970 (XGIbios_mode[xgifb_info->mode_idx].bpp
c4fa7dfe 971 == var->bits_per_pixel)) {
c4fa7dfe
AK		 972 found_mode = 1;
973 break;
974 }
ccf265ad 975 xgifb_info->mode_idx++;
c4fa7dfe
AK		 976 }
977
978 if (found_mode)
ccf265ad
AK		 979 xgifb_info->mode_idx = XGIfb_validate_mode(xgifb_info,
980 xgifb_info->mode_idx);
c4fa7dfe 981 else
ccf265ad 982 xgifb_info->mode_idx = -1;
c4fa7dfe 983
ccf265ad 984 if (xgifb_info->mode_idx < 0) {
4a6b1518 985 pr_err("Mode %dx%dx%d not supported\n",
a12c27c5 986 var->xres, var->yres, var->bits_per_pixel);
ccf265ad 987 xgifb_info->mode_idx = old_mode;
c4fa7dfe
AK		 988 return -EINVAL;
989 }
990
fd26d420
AK		 991 if (XGIfb_search_refresh_rate(xgifb_info,
992 xgifb_info->refresh_rate) == 0) {
f47f12d6 993 xgifb_info->rate_idx = 1;
fd26d420 994 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 995 }
996
997 if (isactive) {
998
fd26d420 999 XGIfb_pre_setmode(xgifb_info);
fab04b97 1000 if (XGISetModeNew(xgifb_info, hw_info,
ccf265ad
AK		 1001 XGIbios_mode[xgifb_info->mode_idx].mode_no)
1002 == 0) {
4a6b1518 1003 pr_err("Setting mode[0x%x] failed\n",
ccf265ad 1004 XGIbios_mode[xgifb_info->mode_idx].mode_no);
c4fa7dfe
AK		 1005 return -EINVAL;
1006 }
9ea755f3
AM		 1007 info->fix.line_length = (info->var.xres_virtual
1008 * info->var.bits_per_pixel) >> 6;
c4fa7dfe 1009
fc39dcb7 1010 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
c4fa7dfe
AK		 1011
1012 xgifb_reg_set(XGICR, 0x13, (info->fix.line_length & 0x00ff));
a12c27c5
KT		 1013 xgifb_reg_set(XGISR,
1014 0x0E,
1015 (info->fix.line_length & 0xff00) >> 8);
c4fa7dfe 1016
fd26d420 1017 XGIfb_post_setmode(xgifb_info);
c4fa7dfe 1018
be25aef0 1019 pr_debug("Set new mode: %dx%dx%d-%d\n",
d56b4c3d
MG		 1020 XGIbios_mode[xgifb_info->mode_idx].xres,
1021 XGIbios_mode[xgifb_info->mode_idx].yres,
1022 XGIbios_mode[xgifb_info->mode_idx].bpp,
1023 xgifb_info->refresh_rate);
fd26d420 1024
ccf265ad 1025 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420 1026 xgifb_info->video_vwidth = info->var.xres_virtual;
ccf265ad
AK		 1027 xgifb_info->video_width =
1028 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420 1029 xgifb_info->video_vheight = info->var.yres_virtual;
ccf265ad
AK		 1030 xgifb_info->video_height =
1031 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 1032 xgifb_info->org_x = xgifb_info->org_y = 0;
1033 xgifb_info->video_linelength = info->var.xres_virtual
1034 * (xgifb_info->video_bpp >> 3);
1035 switch (xgifb_info->video_bpp) {
c4fa7dfe 1036 case 8:
fd26d420
AK		 1037 xgifb_info->DstColor = 0x0000;
1038 xgifb_info->XGI310_AccelDepth = 0x00000000;
1039 xgifb_info->video_cmap_len = 256;
509031dd 1040#if defined(__BIG_ENDIAN)
c4fa7dfe
AK		 1041 cr_data = xgifb_reg_get(XGICR, 0x4D);
1042 xgifb_reg_set(XGICR, 0x4D, (cr_data & 0xE0));
1043#endif
1044 break;
1045 case 16:
fd26d420
AK		 1046 xgifb_info->DstColor = 0x8000;
1047 xgifb_info->XGI310_AccelDepth = 0x00010000;
509031dd 1048#if defined(__BIG_ENDIAN)
7e119b75 1049 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1050 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x0B));
d7636e0b 1051#endif
fd26d420 1052 xgifb_info->video_cmap_len = 16;
b654f878
PS		 1053 break;
1054 case 32:
fd26d420
AK		 1055 xgifb_info->DstColor = 0xC000;
1056 xgifb_info->XGI310_AccelDepth = 0x00020000;
1057 xgifb_info->video_cmap_len = 16;
509031dd 1058#if defined(__BIG_ENDIAN)
7e119b75 1059 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1060 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x15));
d7636e0b 1061#endif
b654f878
PS		 1062 break;
1063 default:
fd26d420 1064 xgifb_info->video_cmap_len = 16;
be25aef0 1065 pr_err("Unsupported depth %d\n",
fd26d420 1066 xgifb_info->video_bpp);
b654f878
PS		 1067 break;
1068 }
d7636e0b 1069 }
fd26d420 1070 XGIfb_bpp_to_var(xgifb_info, var); /*update ARGB info*/
d7636e0b 1071
5a3a3f64 1072 dumpVGAReg(xgifb_info);
d7636e0b 1073 return 0;
1074}
1075
0d5c6ca3 1076static int XGIfb_pan_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1077{
acff987d 1078 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1079 unsigned int base;
1080
0d5c6ca3 1081 base = var->yoffset * info->var.xres_virtual + var->xoffset;
d7636e0b 1082
b654f878 1083 /* calculate base bpp dep. */
0d5c6ca3 1084 switch (info->var.bits_per_pixel) {
b654f878
PS		 1085 case 16:
1086 base >>= 1;
1087 break;
d7636e0b 1088 case 32:
b654f878 1089 break;
d7636e0b 1090 case 8:
b654f878
PS		 1091 default:
1092 base >>= 2;
1093 break;
1094 }
d7636e0b 1095
fc39dcb7 1096 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
d7636e0b 1097
b6e2dc39
AK		 1098 xgifb_reg_set(XGICR, 0x0D, base & 0xFF);
1099 xgifb_reg_set(XGICR, 0x0C, (base >> 8) & 0xFF);
1100 xgifb_reg_set(XGISR, 0x0D, (base >> 16) & 0xFF);
1101 xgifb_reg_set(XGISR, 0x37, (base >> 24) & 0x03);
65283d42 1102 xgifb_reg_and_or(XGISR, 0x37, 0xDF, (base >> 21) & 0x04);
d7636e0b 1103
289ea524 1104 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
fc39dcb7 1105 xgifb_reg_or(XGIPART1, SIS_CRT2_WENABLE_315, 0x01);
b6e2dc39
AK		 1106 xgifb_reg_set(XGIPART1, 0x06, (base & 0xFF));
1107 xgifb_reg_set(XGIPART1, 0x05, ((base >> 8) & 0xFF));
1108 xgifb_reg_set(XGIPART1, 0x04, ((base >> 16) & 0xFF));
a12c27c5
KT		 1109 xgifb_reg_and_or(XGIPART1,
1110 0x02,
1111 0x7F,
1112 ((base >> 24) & 0x01) << 7);
b654f878 1113 }
d7636e0b 1114 return 0;
1115}
d7636e0b 1116
d7636e0b 1117static int XGIfb_open(struct fb_info *info, int user)
1118{
b654f878 1119 return 0;
d7636e0b 1120}
1121
1122static int XGIfb_release(struct fb_info *info, int user)
1123{
b654f878 1124 return 0;
d7636e0b 1125}
1126
bae31702 1127/* similar to sisfb_get_cmap_len */
d7636e0b 1128static int XGIfb_get_cmap_len(const struct fb_var_screeninfo *var)
1129{
bae31702 1130 return (var->bits_per_pixel == 8) ? 256 : 16;
d7636e0b 1131}
1132
d3120076
CB		 1133static int XGIfb_setcolreg(unsigned int regno, unsigned int red,
1134 unsigned int green, unsigned int blue,
1135 unsigned int transp, struct fb_info *info)
d7636e0b 1136{
fd26d420
AK		 1137 struct xgifb_video_info *xgifb_info = info->par;
1138
d7636e0b 1139 if (regno >= XGIfb_get_cmap_len(&info->var))
1140 return 1;
1141
1142 switch (info->var.bits_per_pixel) {
1143 case 8:
e3d5ceb0
AK		 1144 outb(regno, XGIDACA);
1145 outb((red >> 10), XGIDACD);
1146 outb((green >> 10), XGIDACD);
1147 outb((blue >> 10), XGIDACD);
289ea524 1148 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
e3d5ceb0
AK		 1149 outb(regno, XGIDAC2A);
1150 outb((red >> 8), XGIDAC2D);
1151 outb((green >> 8), XGIDAC2D);
1152 outb((blue >> 8), XGIDAC2D);
d7636e0b 1153 }
1154 break;
1155 case 16:
b654f878
PS		 1156 ((u32 *) (info->pseudo_palette))[regno] = ((red & 0xf800))
1157 | ((green & 0xfc00) >> 5) | ((blue & 0xf800)
1158 >> 11);
d7636e0b 1159 break;
1160 case 32:
1161 red >>= 8;
1162 green >>= 8;
1163 blue >>= 8;
b654f878
PS		 1164 ((u32 *) (info->pseudo_palette))[regno] = (red << 16) | (green
1165 << 8) | (blue);
d7636e0b 1166 break;
1167 }
1168 return 0;
1169}
1170
c4fa7dfe
AK		 1171/* ----------- FBDev related routines for all series ---------- */
1172
1173static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
1174 struct fb_info *info)
1175{
fd26d420
AK		 1176 struct xgifb_video_info *xgifb_info = info->par;
1177
c4fa7dfe
AK		 1178 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1179
176f7842
PH		 1180 strncpy(fix->id, "XGI", sizeof(fix->id) - 1);
1181
95649c42
PH		 1182 /* if register_framebuffer has been called, we must lock */
1183 if (atomic_read(&info->count))
1184 mutex_lock(&info->mm_lock);
c4fa7dfe 1185
95649c42 1186 fix->smem_start = xgifb_info->video_base;
fd26d420 1187 fix->smem_len = xgifb_info->video_size;
c4fa7dfe 1188
95649c42
PH		 1189 /* if register_framebuffer has been called, we can unlock */
1190 if (atomic_read(&info->count))
1191 mutex_unlock(&info->mm_lock);
1192
de351ba6 1193 fix->type = FB_TYPE_PACKED_PIXELS;
c4fa7dfe 1194 fix->type_aux = 0;
fd26d420 1195 if (xgifb_info->video_bpp == 8)
c4fa7dfe
AK		 1196 fix->visual = FB_VISUAL_PSEUDOCOLOR;
1197 else
1198 fix->visual = FB_VISUAL_DIRECTCOLOR;
1199 fix->xpanstep = 0;
c4fa7dfe
AK		 1200 if (XGIfb_ypan)
1201 fix->ypanstep = 1;
c4fa7dfe 1202 fix->ywrapstep = 0;
fd26d420
AK		 1203 fix->line_length = xgifb_info->video_linelength;
1204 fix->mmio_start = xgifb_info->mmio_base;
1205 fix->mmio_len = xgifb_info->mmio_size;
fc39dcb7 1206 fix->accel = FB_ACCEL_SIS_XABRE;
c4fa7dfe 1207
c4fa7dfe
AK		 1208 return 0;
1209}
1210
d7636e0b 1211static int XGIfb_set_par(struct fb_info *info)
1212{
1213 int err;
1214
b654f878
PS		 1215 err = XGIfb_do_set_var(&info->var, 1, info);
1216 if (err)
d7636e0b 1217 return err;
d7636e0b 1218 XGIfb_get_fix(&info->fix, -1, info);
d7636e0b 1219 return 0;
1220}
1221
b654f878 1222static int XGIfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1223{
fd26d420 1224 struct xgifb_video_info *xgifb_info = info->par;
b654f878
PS		 1225 unsigned int htotal = var->left_margin + var->xres + var->right_margin
1226 + var->hsync_len;
d7636e0b 1227 unsigned int vtotal = 0;
1228 unsigned int drate = 0, hrate = 0;
1229 int found_mode = 0;
1230 int refresh_rate, search_idx;
1231
b654f878
PS		 1232 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
1233 vtotal = var->upper_margin + var->yres + var->lower_margin
1234 + var->vsync_len;
d7636e0b 1235 vtotal <<= 1;
b654f878
PS		 1236 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1237 vtotal = var->upper_margin + var->yres + var->lower_margin
1238 + var->vsync_len;
d7636e0b 1239 vtotal <<= 2;
b654f878
PS		 1240 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1241 vtotal = var->upper_margin + (var->yres / 2)
1242 + var->lower_margin + var->vsync_len;
1243 } else
1244 vtotal = var->upper_margin + var->yres + var->lower_margin
1245 + var->vsync_len;
d7636e0b 1246
47cee13d 1247 if (!(htotal) || !(vtotal)) {
be25aef0 1248 pr_debug("No valid timing data\n");
47cee13d
MG		 1249 return -EINVAL;
1250 }
d7636e0b 1251
b654f878
PS		 1252 if (var->pixclock && htotal && vtotal) {
1253 drate = 1000000000 / var->pixclock;
1254 hrate = (drate * 1000) / htotal;
fd26d420 1255 xgifb_info->refresh_rate =
a12c27c5 1256 (unsigned int) (hrate * 2 / vtotal);
4a6b1518 1257 pr_debug(
b654f878
PS		 1258 "%s: pixclock = %d ,htotal=%d, vtotal=%d\n"
1259 "%s: drate=%d, hrate=%d, refresh_rate=%d\n",
1260 __func__, var->pixclock, htotal, vtotal,
fd26d420 1261 __func__, drate, hrate, xgifb_info->refresh_rate);
b654f878 1262 } else {
fd26d420 1263 xgifb_info->refresh_rate = 60;
b654f878 1264 }
d7636e0b 1265
949eb0ae 1266 /* Calculation wrong for 1024x600 - force it to 60Hz */
b654f878
PS		 1267 if ((var->xres == 1024) && (var->yres == 600))
1268 refresh_rate = 60;
d7636e0b 1269
1270 search_idx = 0;
b654f878
PS		 1271 while ((XGIbios_mode[search_idx].mode_no != 0) &&
1272 (XGIbios_mode[search_idx].xres <= var->xres)) {
1273 if ((XGIbios_mode[search_idx].xres == var->xres) &&
1274 (XGIbios_mode[search_idx].yres == var->yres) &&
1275 (XGIbios_mode[search_idx].bpp == var->bits_per_pixel)) {
fd26d420 1276 if (XGIfb_validate_mode(xgifb_info, search_idx) > 0) {
b654f878
PS		 1277 found_mode = 1;
1278 break;
1279 }
1280 }
d7636e0b 1281 search_idx++;
1282 }
1283
b654f878 1284 if (!found_mode) {
d7636e0b 1285
4a6b1518 1286 pr_err("%dx%dx%d is no valid mode\n",
d7636e0b 1287 var->xres, var->yres, var->bits_per_pixel);
b654f878
PS		 1288 search_idx = 0;
1289 while (XGIbios_mode[search_idx].mode_no != 0) {
b654f878 1290 if ((var->xres <= XGIbios_mode[search_idx].xres) &&
a12c27c5
KT		 1291 (var->yres <= XGIbios_mode[search_idx].yres) &&
1292 (var->bits_per_pixel ==
1293 XGIbios_mode[search_idx].bpp)) {
fd26d420
AK		 1294 if (XGIfb_validate_mode(xgifb_info,
1295 search_idx) > 0) {
b654f878
PS		 1296 found_mode = 1;
1297 break;
1298 }
1299 }
1300 search_idx++;
1301 }
1302 if (found_mode) {
d7636e0b 1303 var->xres = XGIbios_mode[search_idx].xres;
b654f878 1304 var->yres = XGIbios_mode[search_idx].yres;
4a6b1518 1305 pr_debug("Adapted to mode %dx%dx%d\n",
b654f878 1306 var->xres, var->yres, var->bits_per_pixel);
d7636e0b 1307
1308 } else {
4a6b1518 1309 pr_err("Failed to find similar mode to %dx%dx%d\n",
d7636e0b 1310 var->xres, var->yres, var->bits_per_pixel);
b654f878 1311 return -EINVAL;
d7636e0b 1312 }
1313 }
1314
d7636e0b 1315 /* Adapt RGB settings */
fd26d420 1316 XGIfb_bpp_to_var(xgifb_info, var);
d7636e0b 1317
b654f878
PS		 1318 if (!XGIfb_ypan) {
1319 if (var->xres != var->xres_virtual)
1320 var->xres_virtual = var->xres;
1321 if (var->yres != var->yres_virtual)
d7636e0b 1322 var->yres_virtual = var->yres;
949eb0ae 1323 }
d7636e0b 1324
1325 /* Truncate offsets to maximum if too high */
1326 if (var->xoffset > var->xres_virtual - var->xres)
1327 var->xoffset = var->xres_virtual - var->xres - 1;
1328
1329 if (var->yoffset > var->yres_virtual - var->yres)
1330 var->yoffset = var->yres_virtual - var->yres - 1;
1331
1332 /* Set everything else to 0 */
1333 var->red.msb_right =
b654f878
PS		 1334 var->green.msb_right =
1335 var->blue.msb_right =
1336 var->transp.offset = var->transp.length = var->transp.msb_right = 0;
d7636e0b 1337
d7636e0b 1338 return 0;
1339}
1340
b654f878
PS		 1341static int XGIfb_pan_display(struct fb_var_screeninfo *var,
1342 struct fb_info *info)
d7636e0b 1343{
1344 int err;
1345
0d5c6ca3 1346 if (var->xoffset > (info->var.xres_virtual - info->var.xres))
d7636e0b 1347 return -EINVAL;
0d5c6ca3 1348 if (var->yoffset > (info->var.yres_virtual - info->var.yres))
d7636e0b 1349 return -EINVAL;
1350
1351 if (var->vmode & FB_VMODE_YWRAP) {
44e1312c 1352 if (var->yoffset >= info->var.yres_virtual || var->xoffset)
b654f878 1353 return -EINVAL;
d3ae5762 1354 } else if (var->xoffset + info->var.xres > info->var.xres_virtual
b654f878 1355 || var->yoffset + info->var.yres
d3ae5762
AK		 1356 > info->var.yres_virtual) {
1357 return -EINVAL;
d7636e0b 1358 }
0d5c6ca3 1359 err = XGIfb_pan_var(var, info);
b654f878
PS		 1360 if (err < 0)
1361 return err;
d7636e0b 1362
1363 info->var.xoffset = var->xoffset;
1364 info->var.yoffset = var->yoffset;
1365 if (var->vmode & FB_VMODE_YWRAP)
1366 info->var.vmode |= FB_VMODE_YWRAP;
1367 else
1368 info->var.vmode &= ~FB_VMODE_YWRAP;
1369
d7636e0b 1370 return 0;
1371}
d7636e0b 1372
d7636e0b 1373static int XGIfb_blank(int blank, struct fb_info *info)
1374{
f2df8c09 1375 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1376 u8 reg;
1377
7e119b75 1378 reg = xgifb_reg_get(XGICR, 0x17);
d7636e0b 1379
b654f878 1380 if (blank > 0)
d7636e0b 1381 reg &= 0x7f;
1382 else
1383 reg |= 0x80;
1384
b6e2dc39
AK		 1385 xgifb_reg_set(XGICR, 0x17, reg);
1386 xgifb_reg_set(XGISR, 0x00, 0x01); /* Synchronous Reset */
1387 xgifb_reg_set(XGISR, 0x00, 0x03); /* End Reset */
b654f878 1388 return 0;
d7636e0b 1389}
1390
d7636e0b 1391static struct fb_ops XGIfb_ops = {
b654f878
PS		 1392 .owner = THIS_MODULE,
1393 .fb_open = XGIfb_open,
1394 .fb_release = XGIfb_release,
d7636e0b 1395 .fb_check_var = XGIfb_check_var,
b654f878 1396 .fb_set_par = XGIfb_set_par,
d7636e0b 1397 .fb_setcolreg = XGIfb_setcolreg,
b654f878 1398 .fb_pan_display = XGIfb_pan_display,
b654f878 1399 .fb_blank = XGIfb_blank,
1b402967 1400 .fb_fillrect = cfb_fillrect,
85c3c562 1401 .fb_copyarea = cfb_copyarea,
d7636e0b 1402 .fb_imageblit = cfb_imageblit,
d7636e0b 1403};
1404
1405/* ---------------- Chip generation dependent routines ---------------- */
1406
d7636e0b 1407/* for XGI 315/550/650/740/330 */
1408
fd26d420 1409static int XGIfb_get_dram_size(struct xgifb_video_info *xgifb_info)
d7636e0b 1410{
1411
b654f878
PS		 1412 u8 ChannelNum, tmp;
1413 u8 reg = 0;
d7636e0b 1414
1415 /* xorg driver sets 32MB * 1 channel */
fd26d420 1416 if (xgifb_info->chip == XG27)
fc39dcb7 1417 xgifb_reg_set(XGISR, IND_SIS_DRAM_SIZE, 0x51);
d7636e0b 1418
fc39dcb7 1419 reg = xgifb_reg_get(XGISR, IND_SIS_DRAM_SIZE);
98f4eade
AK		 1420 if (!reg)
1421 return -1;
1422
b654f878
PS		 1423 switch ((reg & XGI_DRAM_SIZE_MASK) >> 4) {
1424 case XGI_DRAM_SIZE_1MB:
fd26d420 1425 xgifb_info->video_size = 0x100000;
b654f878
PS		 1426 break;
1427 case XGI_DRAM_SIZE_2MB:
fd26d420 1428 xgifb_info->video_size = 0x200000;
b654f878
PS		 1429 break;
1430 case XGI_DRAM_SIZE_4MB:
fd26d420 1431 xgifb_info->video_size = 0x400000;
b654f878
PS		 1432 break;
1433 case XGI_DRAM_SIZE_8MB:
fd26d420 1434 xgifb_info->video_size = 0x800000;
b654f878
PS		 1435 break;
1436 case XGI_DRAM_SIZE_16MB:
fd26d420 1437 xgifb_info->video_size = 0x1000000;
b654f878
PS		 1438 break;
1439 case XGI_DRAM_SIZE_32MB:
fd26d420 1440 xgifb_info->video_size = 0x2000000;
b654f878
PS		 1441 break;
1442 case XGI_DRAM_SIZE_64MB:
fd26d420 1443 xgifb_info->video_size = 0x4000000;
b654f878
PS		 1444 break;
1445 case XGI_DRAM_SIZE_128MB:
fd26d420 1446 xgifb_info->video_size = 0x8000000;
b654f878
PS		 1447 break;
1448 case XGI_DRAM_SIZE_256MB:
fd26d420 1449 xgifb_info->video_size = 0x10000000;
b654f878
PS		 1450 break;
1451 default:
1452 return -1;
1453 }
d7636e0b 1454
b654f878 1455 tmp = (reg & 0x0c) >> 2;
fd26d420 1456 switch (xgifb_info->chip) {
b654f878
PS		 1457 case XG20:
1458 case XG21:
1459 case XG27:
1460 ChannelNum = 1;
1461 break;
d7636e0b 1462
b654f878
PS		 1463 case XG42:
1464 if (reg & 0x04)
1465 ChannelNum = 2;
1466 else
1467 ChannelNum = 1;
1468 break;
d7636e0b 1469
b654f878
PS		 1470 case XG40:
1471 default:
1472 if (tmp == 2)
1473 ChannelNum = 2;
1474 else if (tmp == 3)
1475 ChannelNum = 3;
1476 else
1477 ChannelNum = 1;
1478 break;
1479 }
1480
fd26d420 1481 xgifb_info->video_size = xgifb_info->video_size * ChannelNum;
b654f878 1482
4a6b1518 1483 pr_info("SR14=%x DramSzie %x ChannelNum %x\n",
a12c27c5 1484 reg,
fd26d420 1485 xgifb_info->video_size, ChannelNum);
b654f878 1486 return 0;
d7636e0b 1487
1488}
1489
fd26d420 1490static void XGIfb_detect_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1491{
b654f878 1492 u8 cr32, temp = 0;
d7636e0b 1493
fd26d420 1494 xgifb_info->TV_plug = xgifb_info->TV_type = 0;
d7636e0b 1495
7e119b75 1496 cr32 = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR32);
d7636e0b 1497
fc39dcb7 1498 if ((cr32 & SIS_CRT1) && !XGIfb_crt1off)
d7636e0b 1499 XGIfb_crt1off = 0;
1500 else {
1501 if (cr32 & 0x5F)
1502 XGIfb_crt1off = 1;
1503 else
1504 XGIfb_crt1off = 0;
1505 }
1506
25aa75f1 1507 if (!xgifb_info->display2_force) {
fc39dcb7 1508 if (cr32 & SIS_VB_TV)
25aa75f1 1509 xgifb_info->display2 = XGIFB_DISP_TV;
fc39dcb7 1510 else if (cr32 & SIS_VB_LCD)
25aa75f1 1511 xgifb_info->display2 = XGIFB_DISP_LCD;
fc39dcb7 1512 else if (cr32 & SIS_VB_CRT2)
25aa75f1
AK		 1513 xgifb_info->display2 = XGIFB_DISP_CRT;
1514 else
1515 xgifb_info->display2 = XGIFB_DISP_NONE;
1516 }
d7636e0b 1517
b654f878 1518 if (XGIfb_tvplug != -1)
949eb0ae 1519 /* Override with option */
fd26d420 1520 xgifb_info->TV_plug = XGIfb_tvplug;
fc39dcb7 1521 else if (cr32 & SIS_VB_HIVISION) {
fd26d420
AK		 1522 xgifb_info->TV_type = TVMODE_HIVISION;
1523 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1524 } else if (cr32 & SIS_VB_SVIDEO)
fd26d420 1525 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1526 else if (cr32 & SIS_VB_COMPOSITE)
fd26d420 1527 xgifb_info->TV_plug = TVPLUG_COMPOSITE;
fc39dcb7 1528 else if (cr32 & SIS_VB_SCART)
fd26d420 1529 xgifb_info->TV_plug = TVPLUG_SCART;
d7636e0b 1530
fd26d420 1531 if (xgifb_info->TV_type == 0) {
7e119b75 1532 temp = xgifb_reg_get(XGICR, 0x38);
ebe7846d 1533 if (temp & 0x10)
fd26d420 1534 xgifb_info->TV_type = TVMODE_PAL;
ebe7846d 1535 else
fd26d420 1536 xgifb_info->TV_type = TVMODE_NTSC;
d7636e0b 1537 }
1538
949eb0ae 1539 /* Copy forceCRT1 option to CRT1off if option is given */
b654f878
PS		 1540 if (XGIfb_forcecrt1 != -1) {
1541 if (XGIfb_forcecrt1)
1542 XGIfb_crt1off = 0;
1543 else
1544 XGIfb_crt1off = 1;
1545 }
d7636e0b 1546}
1547
6fd9a2a1 1548static bool XGIfb_has_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1549{
1550 u8 vb_chipid;
1551
7e119b75 1552 vb_chipid = xgifb_reg_get(XGIPART4, 0x00);
d7636e0b 1553 switch (vb_chipid) {
b654f878 1554 case 0x01:
fd26d420 1555 xgifb_info->hasVB = HASVB_301;
d7636e0b 1556 break;
b654f878 1557 case 0x02:
fd26d420 1558 xgifb_info->hasVB = HASVB_302;
d7636e0b 1559 break;
b654f878 1560 default:
fd26d420 1561 xgifb_info->hasVB = HASVB_NONE;
6fd9a2a1 1562 return false;
d7636e0b 1563 }
6fd9a2a1 1564 return true;
d7636e0b 1565}
1566
fd26d420 1567static void XGIfb_get_VB_type(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 1568{
1569 u8 reg;
1570
fd26d420 1571 if (!XGIfb_has_VB(xgifb_info)) {
c4fa7dfe 1572 reg = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR37);
fc39dcb7
PH		 1573 switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
1574 case SIS_EXTERNAL_CHIP_LVDS:
fd26d420 1575 xgifb_info->hasVB = HASVB_LVDS;
c4fa7dfe 1576 break;
fc39dcb7 1577 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
fd26d420 1578 xgifb_info->hasVB = HASVB_LVDS_CHRONTEL;
c4fa7dfe
AK		 1579 break;
1580 default:
1581 break;
1582 }
1583 }
1584}
1585
d27c6bc9
AK		 1586static int __init xgifb_optval(char *fullopt, int validx)
1587{
1588 unsigned long lres;
1589
1590 if (kstrtoul(fullopt + validx, 0, &lres) < 0 || lres > INT_MAX) {
be25aef0 1591 pr_err("Invalid value for option: %s\n", fullopt);
d27c6bc9
AK		 1592 return 0;
1593 }
1594 return lres;
1595}
1596
032abf7b 1597static int __init XGIfb_setup(char *options)
d7636e0b 1598{
1599 char *this_opt;
1600
d7636e0b 1601 if (!options || !*options)
1602 return 0;
1603
be25aef0 1604 pr_info("Options: %s\n", options);
79bea04c 1605
b654f878 1606 while ((this_opt = strsep(&options, ",")) != NULL) {
d7636e0b 1607
b654f878
PS		 1608 if (!*this_opt)
1609 continue;
d7636e0b 1610
1611 if (!strncmp(this_opt, "mode:", 5)) {
dfbdf805 1612 mode = this_opt + 5;
d7636e0b 1613 } else if (!strncmp(this_opt, "vesa:", 5)) {
dfbdf805 1614 vesa = xgifb_optval(this_opt, 5);
d7636e0b 1615 } else if (!strncmp(this_opt, "vrate:", 6)) {
7548a83e 1616 refresh_rate = xgifb_optval(this_opt, 6);
d7636e0b 1617 } else if (!strncmp(this_opt, "rate:", 5)) {
7548a83e 1618 refresh_rate = xgifb_optval(this_opt, 5);
d7636e0b 1619 } else if (!strncmp(this_opt, "crt1off", 7)) {
1620 XGIfb_crt1off = 1;
1621 } else if (!strncmp(this_opt, "filter:", 7)) {
d27c6bc9 1622 filter = xgifb_optval(this_opt, 7);
d7636e0b 1623 } else if (!strncmp(this_opt, "forcecrt2type:", 14)) {
1624 XGIfb_search_crt2type(this_opt + 14);
1625 } else if (!strncmp(this_opt, "forcecrt1:", 10)) {
d27c6bc9 1626 XGIfb_forcecrt1 = xgifb_optval(this_opt, 10);
b654f878
PS		 1627 } else if (!strncmp(this_opt, "tvmode:", 7)) {
1628 XGIfb_search_tvstd(this_opt + 7);
1629 } else if (!strncmp(this_opt, "tvstandard:", 11)) {
d7636e0b 1630 XGIfb_search_tvstd(this_opt + 7);
b654f878 1631 } else if (!strncmp(this_opt, "dstn", 4)) {
d7636e0b 1632 enable_dstn = 1;
949eb0ae 1633 /* DSTN overrules forcecrt2type */
289ea524 1634 XGIfb_crt2type = XGIFB_DISP_LCD;
d7636e0b 1635 } else if (!strncmp(this_opt, "noypan", 6)) {
b654f878 1636 XGIfb_ypan = 0;
d7636e0b 1637 } else {
dfbdf805 1638 mode = this_opt;
d7636e0b 1639 }
d7636e0b 1640 }
d7636e0b 1641 return 0;
1642}
d7636e0b 1643
89f6883c 1644static int xgifb_probe(struct pci_dev *pdev,
b654f878 1645 const struct pci_device_id *ent)
d7636e0b 1646{
b654f878
PS		 1647 u8 reg, reg1;
1648 u8 CR48, CR38;
bb292234 1649 int ret;
19c1e88e 1650 struct fb_info *fb_info;
fcbdda90
AK		 1651 struct xgifb_video_info *xgifb_info;
1652 struct xgi_hw_device_info *hw_info;
6b2a7e0c 1653 unsigned long video_size_max;
bb292234 1654
fcbdda90 1655 fb_info = framebuffer_alloc(sizeof(*xgifb_info), &pdev->dev);
b654f878
PS		 1656 if (!fb_info)
1657 return -ENOMEM;
1658
fcbdda90
AK		 1659 xgifb_info = fb_info->par;
1660 hw_info = &xgifb_info->hw_info;
fd26d420
AK		 1661 xgifb_info->fb_info = fb_info;
1662 xgifb_info->chip_id = pdev->device;
a12c27c5
KT		 1663 pci_read_config_byte(pdev,
1664 PCI_REVISION_ID,
fd26d420
AK		 1665 &xgifb_info->revision_id);
1666 hw_info->jChipRevision = xgifb_info->revision_id;
1667
1668 xgifb_info->pcibus = pdev->bus->number;
1669 xgifb_info->pcislot = PCI_SLOT(pdev->devfn);
1670 xgifb_info->pcifunc = PCI_FUNC(pdev->devfn);
1671 xgifb_info->subsysvendor = pdev->subsystem_vendor;
1672 xgifb_info->subsysdevice = pdev->subsystem_device;
1673
6b2a7e0c 1674 video_size_max = pci_resource_len(pdev, 0);
fd26d420
AK		 1675 xgifb_info->video_base = pci_resource_start(pdev, 0);
1676 xgifb_info->mmio_base = pci_resource_start(pdev, 1);
1677 xgifb_info->mmio_size = pci_resource_len(pdev, 1);
1678 xgifb_info->vga_base = pci_resource_start(pdev, 2) + 0x30;
19185703
MG		 1679 dev_info(&pdev->dev, "Relocate IO address: %Lx [%08lx]\n",
1680 (u64) pci_resource_start(pdev, 2),
1681 xgifb_info->vga_base);
b654f878 1682
bb292234
AK		 1683 if (pci_enable_device(pdev)) {
1684 ret = -EIO;
1685 goto error;
1686 }
b654f878 1687
25aa75f1
AK		 1688 if (XGIfb_crt2type != -1) {
1689 xgifb_info->display2 = XGIfb_crt2type;
1690 xgifb_info->display2_force = true;
1691 }
1692
9a801f25 1693 XGIRegInit(&xgifb_info->dev_info, xgifb_info->vga_base);
b654f878 1694
fc39dcb7
PH		 1695 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
1696 reg1 = xgifb_reg_get(XGISR, IND_SIS_PASSWORD);
b654f878
PS		 1697
1698 if (reg1 != 0xa1) { /*I/O error */
be25aef0 1699 dev_err(&pdev->dev, "I/O error\n");
bb292234 1700 ret = -EIO;
05e06036 1701 goto error_disable;
b654f878 1702 }
d7636e0b 1703
fd26d420 1704 switch (xgifb_info->chip_id) {
fc39dcb7 1705 case PCI_DEVICE_ID_XGI_20:
e67f4d4d 1706 xgifb_reg_or(XGICR, Index_CR_GPIO_Reg3, GPIOG_EN);
7e119b75 1707 CR48 = xgifb_reg_get(XGICR, Index_CR_GPIO_Reg1);
d7636e0b 1708 if (CR48&GPIOG_READ)
fd26d420 1709 xgifb_info->chip = XG21;
d7636e0b 1710 else
fd26d420 1711 xgifb_info->chip = XG20;
d7636e0b 1712 break;
fc39dcb7 1713 case PCI_DEVICE_ID_XGI_40:
fd26d420 1714 xgifb_info->chip = XG40;
d7636e0b 1715 break;
fc39dcb7 1716 case PCI_DEVICE_ID_XGI_42:
fd26d420 1717 xgifb_info->chip = XG42;
d7636e0b 1718 break;
fc39dcb7 1719 case PCI_DEVICE_ID_XGI_27:
fd26d420 1720 xgifb_info->chip = XG27;
d7636e0b 1721 break;
b654f878 1722 default:
bb292234 1723 ret = -ENODEV;
05e06036 1724 goto error_disable;
d7636e0b 1725 }
1726
19185703 1727 dev_info(&pdev->dev, "chipid = %x\n", xgifb_info->chip);
fd26d420 1728 hw_info->jChipType = xgifb_info->chip;
d7636e0b 1729
fd26d420 1730 if (XGIfb_get_dram_size(xgifb_info)) {
98f4eade
AK		 1731 xgifb_info->video_size = min_t(unsigned long, video_size_max,
1732 SZ_16M);
6b2a7e0c
AK		 1733 } else if (xgifb_info->video_size > video_size_max) {
1734 xgifb_info->video_size = video_size_max;
b654f878 1735 }
d7636e0b 1736
e1521a16
AK		 1737 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */
1738 xgifb_reg_or(XGISR,
fc39dcb7
PH		 1739 IND_SIS_PCI_ADDRESS_SET,
1740 (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
e1521a16 1741 /* Enable 2D accelerator engine */
fc39dcb7 1742 xgifb_reg_or(XGISR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
d7636e0b 1743
fd26d420 1744 hw_info->ulVideoMemorySize = xgifb_info->video_size;
d7636e0b 1745
fd26d420
AK		 1746 if (!request_mem_region(xgifb_info->video_base,
1747 xgifb_info->video_size,
a12c27c5 1748 "XGIfb FB")) {
be25aef0 1749 dev_err(&pdev->dev, "Unable request memory size %x\n",
fd26d420 1750 xgifb_info->video_size);
19185703 1751 dev_err(&pdev->dev,
e508b52a 1752 "Fatal error: Unable to reserve frame buffer memory. Is there another framebuffer driver active?\n");
bb292234 1753 ret = -ENODEV;
05e06036 1754 goto error_disable;
d7636e0b 1755 }
d7636e0b 1756
fd26d420
AK		 1757 if (!request_mem_region(xgifb_info->mmio_base,
1758 xgifb_info->mmio_size,
1b3909e5 1759 "XGIfb MMIO")) {
19185703
MG		 1760 dev_err(&pdev->dev,
1761 "Fatal error: Unable to reserve MMIO region\n");
bb292234 1762 ret = -ENODEV;
5c0ef2ac 1763 goto error_0;
b654f878 1764 }
d7636e0b 1765
fd26d420 1766 xgifb_info->video_vbase = hw_info->pjVideoMemoryAddress =
3fb07671 1767 ioremap_wc(xgifb_info->video_base, xgifb_info->video_size);
fd26d420
AK		 1768 xgifb_info->mmio_vbase = ioremap(xgifb_info->mmio_base,
1769 xgifb_info->mmio_size);
d7636e0b 1770
19185703
MG		 1771 dev_info(&pdev->dev,
1772 "Framebuffer at 0x%Lx, mapped to 0x%p, size %dk\n",
1773 (u64) xgifb_info->video_base,
1774 xgifb_info->video_vbase,
1775 xgifb_info->video_size / 1024);
d7636e0b 1776
19185703
MG		 1777 dev_info(&pdev->dev,
1778 "MMIO at 0x%Lx, mapped to 0x%p, size %ldk\n",
1779 (u64) xgifb_info->mmio_base, xgifb_info->mmio_vbase,
1780 xgifb_info->mmio_size / 1024);
4a6b1518 1781
fcbdda90 1782 pci_set_drvdata(pdev, xgifb_info);
4a6b1518 1783 if (!XGIInitNew(pdev))
19185703 1784 dev_err(&pdev->dev, "XGIInitNew() failed!\n");
b654f878 1785
8cedcc70 1786 xgifb_info->mtrr = -1;
b654f878 1787
fd26d420
AK		 1788 xgifb_info->hasVB = HASVB_NONE;
1789 if ((xgifb_info->chip == XG20) ||
1790 (xgifb_info->chip == XG27)) {
1791 xgifb_info->hasVB = HASVB_NONE;
1792 } else if (xgifb_info->chip == XG21) {
e1521a16 1793 CR38 = xgifb_reg_get(XGICR, 0x38);
cae9a7be 1794 if ((CR38&0xE0) == 0xC0)
289ea524 1795 xgifb_info->display2 = XGIFB_DISP_LCD;
cae9a7be 1796 else if ((CR38&0xE0) == 0x60)
fd26d420 1797 xgifb_info->hasVB = HASVB_CHRONTEL;
cae9a7be 1798 else
fd26d420 1799 xgifb_info->hasVB = HASVB_NONE;
e1521a16 1800 } else {
fd26d420 1801 XGIfb_get_VB_type(xgifb_info);
e1521a16 1802 }
d7636e0b 1803
c62f2e46 1804 hw_info->ujVBChipID = VB_CHIP_UNKNOWN;
d7636e0b 1805
c62f2e46 1806 hw_info->ulExternalChip = 0;
d7636e0b 1807
fd26d420 1808 switch (xgifb_info->hasVB) {
e1521a16
AK		 1809 case HASVB_301:
1810 reg = xgifb_reg_get(XGIPART4, 0x01);
1811 if (reg >= 0xE0) {
c62f2e46 1812 hw_info->ujVBChipID = VB_CHIP_302LV;
19185703
MG		 1813 dev_info(&pdev->dev,
1814 "XGI302LV bridge detected (revision 0x%02x)\n",
1815 reg);
e1521a16 1816 } else if (reg >= 0xD0) {
c62f2e46 1817 hw_info->ujVBChipID = VB_CHIP_301LV;
19185703
MG		 1818 dev_info(&pdev->dev,
1819 "XGI301LV bridge detected (revision 0x%02x)\n",
1820 reg);
949eb0ae 1821 } else {
c62f2e46 1822 hw_info->ujVBChipID = VB_CHIP_301;
19185703 1823 dev_info(&pdev->dev, "XGI301 bridge detected\n");
e1521a16
AK		 1824 }
1825 break;
1826 case HASVB_302:
1827 reg = xgifb_reg_get(XGIPART4, 0x01);
1828 if (reg >= 0xE0) {
c62f2e46 1829 hw_info->ujVBChipID = VB_CHIP_302LV;
19185703
MG		 1830 dev_info(&pdev->dev,
1831 "XGI302LV bridge detected (revision 0x%02x)\n",
1832 reg);
e1521a16 1833 } else if (reg >= 0xD0) {
c62f2e46 1834 hw_info->ujVBChipID = VB_CHIP_301LV;
19185703
MG		 1835 dev_info(&pdev->dev,
1836 "XGI302LV bridge detected (revision 0x%02x)\n",
1837 reg);
e1521a16
AK		 1838 } else if (reg >= 0xB0) {
1839 reg1 = xgifb_reg_get(XGIPART4, 0x23);
d7636e0b 1840
c62f2e46 1841 hw_info->ujVBChipID = VB_CHIP_302B;
d7636e0b 1842
d7636e0b 1843 } else {
c62f2e46 1844 hw_info->ujVBChipID = VB_CHIP_302;
19185703 1845 dev_info(&pdev->dev, "XGI302 bridge detected\n");
d7636e0b 1846 }
e1521a16
AK		 1847 break;
1848 case HASVB_LVDS:
c62f2e46 1849 hw_info->ulExternalChip = 0x1;
19185703 1850 dev_info(&pdev->dev, "LVDS transmitter detected\n");
e1521a16
AK		 1851 break;
1852 case HASVB_TRUMPION:
c62f2e46 1853 hw_info->ulExternalChip = 0x2;
19185703 1854 dev_info(&pdev->dev, "Trumpion Zurac LVDS scaler detected\n");
e1521a16
AK		 1855 break;
1856 case HASVB_CHRONTEL:
c62f2e46 1857 hw_info->ulExternalChip = 0x4;
19185703 1858 dev_info(&pdev->dev, "Chrontel TV encoder detected\n");
e1521a16
AK		 1859 break;
1860 case HASVB_LVDS_CHRONTEL:
c62f2e46 1861 hw_info->ulExternalChip = 0x5;
19185703
MG		 1862 dev_info(&pdev->dev,
1863 "LVDS transmitter and Chrontel TV encoder detected\n");
e1521a16
AK		 1864 break;
1865 default:
19185703 1866 dev_info(&pdev->dev, "No or unknown bridge type detected\n");
e1521a16
AK		 1867 break;
1868 }
d7636e0b 1869
fd26d420
AK		 1870 if (xgifb_info->hasVB != HASVB_NONE)
1871 XGIfb_detect_VB(xgifb_info);
25aa75f1
AK		 1872 else if (xgifb_info->chip != XG21)
1873 xgifb_info->display2 = XGIFB_DISP_NONE;
b654f878 1874
289ea524 1875 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
e1521a16
AK		 1876 if (!enable_dstn) {
1877 reg = xgifb_reg_get(XGICR, IND_XGI_LCD_PANEL);
1878 reg &= 0x0f;
c62f2e46 1879 hw_info->ulCRT2LCDType = XGI310paneltype[reg];
d7636e0b 1880 }
e1521a16 1881 }
d7636e0b 1882
ccf265ad
AK		 1883 xgifb_info->mode_idx = -1;
1884
dfbdf805 1885 if (mode)
ccf265ad 1886 XGIfb_search_mode(xgifb_info, mode);
dfbdf805 1887 else if (vesa != -1)
ccf265ad 1888 XGIfb_search_vesamode(xgifb_info, vesa);
dfbdf805 1889
ccf265ad
AK		 1890 if (xgifb_info->mode_idx >= 0)
1891 xgifb_info->mode_idx =
1892 XGIfb_validate_mode(xgifb_info, xgifb_info->mode_idx);
d7636e0b 1893
ccf265ad 1894 if (xgifb_info->mode_idx < 0) {
289ea524 1895 if (xgifb_info->display2 == XGIFB_DISP_LCD &&
fd26d420 1896 xgifb_info->chip == XG21)
ccf265ad 1897 xgifb_info->mode_idx =
fab04b97 1898 XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info);
c8bec1f0 1899 else
ccf265ad 1900 xgifb_info->mode_idx = DEFAULT_MODE;
e1521a16 1901 }
d7636e0b 1902
ccf265ad 1903 if (xgifb_info->mode_idx < 0) {
be25aef0 1904 dev_err(&pdev->dev, "No supported video mode found\n");
fd1bbbb7 1905 ret = -EINVAL;
de736dbb
AK		 1906 goto error_1;
1907 }
1908
949eb0ae 1909 /* set default refresh rate */
fd26d420
AK		 1910 xgifb_info->refresh_rate = refresh_rate;
1911 if (xgifb_info->refresh_rate == 0)
1912 xgifb_info->refresh_rate = 60;
1913 if (XGIfb_search_refresh_rate(xgifb_info,
1914 xgifb_info->refresh_rate) == 0) {
f47f12d6 1915 xgifb_info->rate_idx = 1;
fd26d420 1916 xgifb_info->refresh_rate = 60;
e1521a16
AK		 1917 }
1918
ccf265ad 1919 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420
AK		 1920 xgifb_info->video_vwidth =
1921 xgifb_info->video_width =
ccf265ad 1922 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420
AK		 1923 xgifb_info->video_vheight =
1924 xgifb_info->video_height =
ccf265ad 1925 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 1926 xgifb_info->org_x = xgifb_info->org_y = 0;
1927 xgifb_info->video_linelength =
1928 xgifb_info->video_width *
1929 (xgifb_info->video_bpp >> 3);
1930 switch (xgifb_info->video_bpp) {
e1521a16 1931 case 8:
fd26d420
AK		 1932 xgifb_info->DstColor = 0x0000;
1933 xgifb_info->XGI310_AccelDepth = 0x00000000;
1934 xgifb_info->video_cmap_len = 256;
e1521a16
AK		 1935 break;
1936 case 16:
fd26d420
AK		 1937 xgifb_info->DstColor = 0x8000;
1938 xgifb_info->XGI310_AccelDepth = 0x00010000;
1939 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 1940 break;
1941 case 32:
fd26d420
AK		 1942 xgifb_info->DstColor = 0xC000;
1943 xgifb_info->XGI310_AccelDepth = 0x00020000;
1944 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 1945 break;
1946 default:
fd26d420 1947 xgifb_info->video_cmap_len = 16;
4a6b1518 1948 pr_info("Unsupported depth %d\n",
fd26d420 1949 xgifb_info->video_bpp);
e1521a16
AK		 1950 break;
1951 }
1952
4a6b1518 1953 pr_info("Default mode is %dx%dx%d (%dHz)\n",
fd26d420
AK		 1954 xgifb_info->video_width,
1955 xgifb_info->video_height,
1956 xgifb_info->video_bpp,
1957 xgifb_info->refresh_rate);
e1521a16 1958
e9865d47
AK		 1959 fb_info->var.red.length = 8;
1960 fb_info->var.green.length = 8;
1961 fb_info->var.blue.length = 8;
1962 fb_info->var.activate = FB_ACTIVATE_NOW;
1963 fb_info->var.height = -1;
1964 fb_info->var.width = -1;
1965 fb_info->var.vmode = FB_VMODE_NONINTERLACED;
1966 fb_info->var.xres = xgifb_info->video_width;
1967 fb_info->var.xres_virtual = xgifb_info->video_width;
1968 fb_info->var.yres = xgifb_info->video_height;
1969 fb_info->var.yres_virtual = xgifb_info->video_height;
1970 fb_info->var.bits_per_pixel = xgifb_info->video_bpp;
1971
1972 XGIfb_bpp_to_var(xgifb_info, &fb_info->var);
1973
1974 fb_info->var.pixclock = (u32) (1000000000 /
f2df8c09
AK		 1975 XGIfb_mode_rate_to_dclock(&xgifb_info->dev_info,
1976 hw_info,
f3ac47cf 1977 XGIbios_mode[xgifb_info->mode_idx].mode_no));
e1521a16 1978
f2df8c09 1979 if (XGIfb_mode_rate_to_ddata(&xgifb_info->dev_info, hw_info,
5aa55d9f 1980 XGIbios_mode[xgifb_info->mode_idx].mode_no,
e9865d47
AK		 1981 &fb_info->var.left_margin,
1982 &fb_info->var.right_margin,
1983 &fb_info->var.upper_margin,
1984 &fb_info->var.lower_margin,
1985 &fb_info->var.hsync_len,
1986 &fb_info->var.vsync_len,
1987 &fb_info->var.sync,
1988 &fb_info->var.vmode)) {
1989
1990 if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 1991 FB_VMODE_INTERLACED) {
e9865d47
AK		 1992 fb_info->var.yres <<= 1;
1993 fb_info->var.yres_virtual <<= 1;
1994 } else if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 1995 FB_VMODE_DOUBLE) {
e9865d47
AK		 1996 fb_info->var.pixclock >>= 1;
1997 fb_info->var.yres >>= 1;
1998 fb_info->var.yres_virtual >>= 1;
b654f878 1999 }
d7636e0b 2000
e1521a16
AK		 2001 }
2002
2003 fb_info->flags = FBINFO_FLAG_DEFAULT;
fd26d420 2004 fb_info->screen_base = xgifb_info->video_vbase;
e1521a16
AK		 2005 fb_info->fbops = &XGIfb_ops;
2006 XGIfb_get_fix(&fb_info->fix, -1, fb_info);
76cabaa4 2007 fb_info->pseudo_palette = xgifb_info->pseudo_palette;
d7636e0b 2008
92be2d4d 2009 fb_alloc_cmap(&fb_info->cmap, 256, 0);
d7636e0b 2010
3fb07671
LR		 2011 xgifb_info->mtrr = arch_phys_wc_add(xgifb_info->video_base,
2012 xgifb_info->video_size);
d7636e0b 2013
e1521a16
AK		 2014 if (register_framebuffer(fb_info) < 0) {
2015 ret = -EINVAL;
3028474c 2016 goto error_mtrr;
e1521a16 2017 }
d7636e0b 2018
5a3a3f64 2019 dumpVGAReg(xgifb_info);
d7636e0b 2020
2021 return 0;
bb292234 2022
3028474c 2023error_mtrr:
3fb07671 2024 arch_phys_wc_del(xgifb_info->mtrr);
5c0ef2ac 2025error_1:
fd26d420
AK		 2026 iounmap(xgifb_info->mmio_vbase);
2027 iounmap(xgifb_info->video_vbase);
2028 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
5c0ef2ac 2029error_0:
fd26d420 2030 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
05e06036
MG		 2031error_disable:
2032 pci_disable_device(pdev);
bb292234
AK		 2033error:
2034 framebuffer_release(fb_info);
2035 return ret;
d7636e0b 2036}
2037
d7636e0b 2038/*****************************************************/
2039/* PCI DEVICE HANDLING */
2040/*****************************************************/
2041
8db72ff5 2042static void xgifb_remove(struct pci_dev *pdev)
d7636e0b 2043{
ab886ff8 2044 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev);
19c1e88e 2045 struct fb_info *fb_info = xgifb_info->fb_info;
54301b5c 2046
b654f878 2047 unregister_framebuffer(fb_info);
3fb07671 2048 arch_phys_wc_del(xgifb_info->mtrr);
54301b5c
AK		 2049 iounmap(xgifb_info->mmio_vbase);
2050 iounmap(xgifb_info->video_vbase);
2051 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
2052 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
bf55b483 2053 pci_disable_device(pdev);
b654f878 2054 framebuffer_release(fb_info);
45dcfaf1 2055}
d7636e0b 2056
2057static struct pci_driver xgifb_driver = {
b654f878
PS		 2058 .name = "xgifb",
2059 .id_table = xgifb_pci_table,
2060 .probe = xgifb_probe,
2c4ae9d2 2061 .remove = xgifb_remove
d7636e0b 2062};
2063
d7636e0b 2064/*****************************************************/
2065/* MODULE */
2066/*****************************************************/
2067
d7636e0b 2068module_param(mode, charp, 0);
d049053e 2069MODULE_PARM_DESC(mode,
e508b52a 2070 "Selects the desired default display mode in the format XxYxDepth (eg. 1024x768x16).");
2d2c880f 2071
d049053e 2072module_param(forcecrt2type, charp, 0);
2d2c880f 2073MODULE_PARM_DESC(forcecrt2type,
e508b52a 2074 "Force the second display output type. Possible values are NONE, LCD, TV, VGA, SVIDEO or COMPOSITE.");
d7636e0b 2075
d049053e 2076module_param(vesa, int, 0);
d7636e0b 2077MODULE_PARM_DESC(vesa,
e508b52a 2078 "Selects the desired default display mode by VESA mode number (eg. 0x117).");
d7636e0b 2079
d049053e 2080module_param(filter, int, 0);
d7636e0b 2081MODULE_PARM_DESC(filter,
e508b52a 2082 "Selects TV flicker filter type (only for systems with a SiS301 video bridge). Possible values 0-7. Default: [no filter]).");
d049053e
MG		 2083
2084static int __init xgifb_init(void)
2085{
2086 char *option = NULL;
2087
2088 if (forcecrt2type != NULL)
2089 XGIfb_search_crt2type(forcecrt2type);
2090 if (fb_get_options("xgifb", &option))
2091 return -ENODEV;
2092 XGIfb_setup(option);
2093
2094 return pci_register_driver(&xgifb_driver);
2095}
d7636e0b 2096
d7636e0b 2097static void __exit xgifb_remove_module(void)
2098{
2099 pci_unregister_driver(&xgifb_driver);
4a6b1518 2100 pr_debug("Module unloaded\n");
d7636e0b 2101}
2102
d049053e
MG		 2103MODULE_DESCRIPTION("Z7 Z9 Z9S Z11 framebuffer device driver");
2104MODULE_LICENSE("GPL");
2105MODULE_AUTHOR("XGITECH , Others");
2106module_init(xgifb_init);
d7636e0b 2107module_exit(xgifb_remove_module);
Linux kernel - Deliverables
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