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fa0d654c EG |
1 | /* |
2 | * Marvell Armada 370/XP thermal sensor driver | |
3 | * | |
4 | * Copyright (C) 2013 Marvell | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | */ | |
16 | #include <linux/device.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/of_device.h> | |
25 | #include <linux/thermal.h> | |
26 | ||
fa0d654c | 27 | #define THERMAL_VALID_MASK 0x1 |
fa0d654c EG |
28 | |
29 | /* Thermal Manager Control and Status Register */ | |
30 | #define PMU_TDC0_SW_RST_MASK (0x1 << 1) | |
31 | #define PMU_TM_DISABLE_OFFS 0 | |
32 | #define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS) | |
33 | #define PMU_TDC0_REF_CAL_CNT_OFFS 11 | |
34 | #define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS) | |
35 | #define PMU_TDC0_OTF_CAL_MASK (0x1 << 30) | |
36 | #define PMU_TDC0_START_CAL_MASK (0x1 << 25) | |
37 | ||
e2d5f05b EG |
38 | #define A375_Z1_CAL_RESET_LSB 0x8011e214 |
39 | #define A375_Z1_CAL_RESET_MSB 0x30a88019 | |
40 | #define A375_Z1_WORKAROUND_BIT BIT(9) | |
41 | ||
42 | #define A375_UNIT_CONTROL_SHIFT 27 | |
43 | #define A375_UNIT_CONTROL_MASK 0x7 | |
44 | #define A375_READOUT_INVERT BIT(15) | |
45 | #define A375_HW_RESETn BIT(8) | |
e6e0a68c | 46 | #define A380_HW_RESET BIT(8) |
e2d5f05b | 47 | |
66fdb7b6 | 48 | struct armada_thermal_data; |
fa0d654c EG |
49 | |
50 | /* Marvell EBU Thermal Sensor Dev Structure */ | |
51 | struct armada_thermal_priv { | |
52 | void __iomem *sensor; | |
53 | void __iomem *control; | |
66fdb7b6 | 54 | struct armada_thermal_data *data; |
fa0d654c EG |
55 | }; |
56 | ||
66fdb7b6 | 57 | struct armada_thermal_data { |
fa0d654c | 58 | /* Initialize the sensor */ |
04bf3d7e EG |
59 | void (*init_sensor)(struct platform_device *pdev, |
60 | struct armada_thermal_priv *); | |
fa0d654c EG |
61 | |
62 | /* Test for a valid sensor value (optional) */ | |
63 | bool (*is_valid)(struct armada_thermal_priv *); | |
9484bc62 EG |
64 | |
65 | /* Formula coeficients: temp = (b + m * reg) / div */ | |
66 | unsigned long coef_b; | |
67 | unsigned long coef_m; | |
68 | unsigned long coef_div; | |
fd2c94d5 | 69 | bool inverted; |
1fcacca4 EG |
70 | |
71 | /* Register shift and mask to access the sensor temperature */ | |
72 | unsigned int temp_shift; | |
73 | unsigned int temp_mask; | |
74 | unsigned int is_valid_shift; | |
fa0d654c EG |
75 | }; |
76 | ||
04bf3d7e EG |
77 | static void armadaxp_init_sensor(struct platform_device *pdev, |
78 | struct armada_thermal_priv *priv) | |
fa0d654c EG |
79 | { |
80 | unsigned long reg; | |
81 | ||
82 | reg = readl_relaxed(priv->control); | |
83 | reg |= PMU_TDC0_OTF_CAL_MASK; | |
84 | writel(reg, priv->control); | |
85 | ||
86 | /* Reference calibration value */ | |
87 | reg &= ~PMU_TDC0_REF_CAL_CNT_MASK; | |
88 | reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS); | |
89 | writel(reg, priv->control); | |
90 | ||
91 | /* Reset the sensor */ | |
92 | reg = readl_relaxed(priv->control); | |
93 | writel((reg | PMU_TDC0_SW_RST_MASK), priv->control); | |
94 | ||
95 | writel(reg, priv->control); | |
96 | ||
97 | /* Enable the sensor */ | |
98 | reg = readl_relaxed(priv->sensor); | |
99 | reg &= ~PMU_TM_DISABLE_MASK; | |
100 | writel(reg, priv->sensor); | |
101 | } | |
102 | ||
04bf3d7e EG |
103 | static void armada370_init_sensor(struct platform_device *pdev, |
104 | struct armada_thermal_priv *priv) | |
fa0d654c EG |
105 | { |
106 | unsigned long reg; | |
107 | ||
108 | reg = readl_relaxed(priv->control); | |
109 | reg |= PMU_TDC0_OTF_CAL_MASK; | |
110 | writel(reg, priv->control); | |
111 | ||
112 | /* Reference calibration value */ | |
113 | reg &= ~PMU_TDC0_REF_CAL_CNT_MASK; | |
114 | reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS); | |
115 | writel(reg, priv->control); | |
116 | ||
117 | reg &= ~PMU_TDC0_START_CAL_MASK; | |
118 | writel(reg, priv->control); | |
119 | ||
120 | mdelay(10); | |
121 | } | |
122 | ||
e2d5f05b EG |
123 | static void armada375_init_sensor(struct platform_device *pdev, |
124 | struct armada_thermal_priv *priv) | |
125 | { | |
126 | unsigned long reg; | |
127 | bool quirk_needed = | |
128 | !!of_device_is_compatible(pdev->dev.of_node, | |
129 | "marvell,armada375-z1-thermal"); | |
130 | ||
131 | if (quirk_needed) { | |
132 | /* Ensure these registers have the default (reset) values */ | |
133 | writel(A375_Z1_CAL_RESET_LSB, priv->control); | |
134 | writel(A375_Z1_CAL_RESET_MSB, priv->control + 0x4); | |
135 | } | |
136 | ||
137 | reg = readl(priv->control + 4); | |
138 | reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT); | |
139 | reg &= ~A375_READOUT_INVERT; | |
140 | reg &= ~A375_HW_RESETn; | |
141 | ||
142 | if (quirk_needed) | |
143 | reg |= A375_Z1_WORKAROUND_BIT; | |
144 | ||
145 | writel(reg, priv->control + 4); | |
146 | mdelay(20); | |
147 | ||
148 | reg |= A375_HW_RESETn; | |
149 | writel(reg, priv->control + 4); | |
150 | mdelay(50); | |
151 | } | |
152 | ||
e6e0a68c EG |
153 | static void armada380_init_sensor(struct platform_device *pdev, |
154 | struct armada_thermal_priv *priv) | |
155 | { | |
156 | unsigned long reg = readl_relaxed(priv->control); | |
157 | ||
158 | /* Reset hardware once */ | |
159 | if (!(reg & A380_HW_RESET)) { | |
160 | reg |= A380_HW_RESET; | |
161 | writel(reg, priv->control); | |
162 | mdelay(10); | |
163 | } | |
164 | } | |
165 | ||
fa0d654c EG |
166 | static bool armada_is_valid(struct armada_thermal_priv *priv) |
167 | { | |
168 | unsigned long reg = readl_relaxed(priv->sensor); | |
169 | ||
1fcacca4 | 170 | return (reg >> priv->data->is_valid_shift) & THERMAL_VALID_MASK; |
fa0d654c EG |
171 | } |
172 | ||
173 | static int armada_get_temp(struct thermal_zone_device *thermal, | |
174 | unsigned long *temp) | |
175 | { | |
176 | struct armada_thermal_priv *priv = thermal->devdata; | |
177 | unsigned long reg; | |
9484bc62 | 178 | unsigned long m, b, div; |
fa0d654c EG |
179 | |
180 | /* Valid check */ | |
66fdb7b6 | 181 | if (priv->data->is_valid && !priv->data->is_valid(priv)) { |
fa0d654c EG |
182 | dev_err(&thermal->device, |
183 | "Temperature sensor reading not valid\n"); | |
184 | return -EIO; | |
185 | } | |
186 | ||
187 | reg = readl_relaxed(priv->sensor); | |
1fcacca4 | 188 | reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask; |
9484bc62 EG |
189 | |
190 | /* Get formula coeficients */ | |
191 | b = priv->data->coef_b; | |
192 | m = priv->data->coef_m; | |
193 | div = priv->data->coef_div; | |
194 | ||
fd2c94d5 EG |
195 | if (priv->data->inverted) |
196 | *temp = ((m * reg) - b) / div; | |
197 | else | |
198 | *temp = (b - (m * reg)) / div; | |
fa0d654c EG |
199 | return 0; |
200 | } | |
201 | ||
202 | static struct thermal_zone_device_ops ops = { | |
203 | .get_temp = armada_get_temp, | |
204 | }; | |
205 | ||
66fdb7b6 | 206 | static const struct armada_thermal_data armadaxp_data = { |
fa0d654c | 207 | .init_sensor = armadaxp_init_sensor, |
1fcacca4 EG |
208 | .temp_shift = 10, |
209 | .temp_mask = 0x1ff, | |
9484bc62 EG |
210 | .coef_b = 3153000000UL, |
211 | .coef_m = 10000000UL, | |
212 | .coef_div = 13825, | |
fa0d654c EG |
213 | }; |
214 | ||
66fdb7b6 | 215 | static const struct armada_thermal_data armada370_data = { |
fa0d654c EG |
216 | .is_valid = armada_is_valid, |
217 | .init_sensor = armada370_init_sensor, | |
1fcacca4 EG |
218 | .is_valid_shift = 9, |
219 | .temp_shift = 10, | |
220 | .temp_mask = 0x1ff, | |
9484bc62 EG |
221 | .coef_b = 3153000000UL, |
222 | .coef_m = 10000000UL, | |
223 | .coef_div = 13825, | |
fa0d654c EG |
224 | }; |
225 | ||
e2d5f05b EG |
226 | static const struct armada_thermal_data armada375_data = { |
227 | .is_valid = armada_is_valid, | |
228 | .init_sensor = armada375_init_sensor, | |
229 | .is_valid_shift = 10, | |
230 | .temp_shift = 0, | |
231 | .temp_mask = 0x1ff, | |
232 | .coef_b = 3171900000UL, | |
233 | .coef_m = 10000000UL, | |
234 | .coef_div = 13616, | |
235 | }; | |
236 | ||
e6e0a68c EG |
237 | static const struct armada_thermal_data armada380_data = { |
238 | .is_valid = armada_is_valid, | |
239 | .init_sensor = armada380_init_sensor, | |
240 | .is_valid_shift = 10, | |
241 | .temp_shift = 0, | |
242 | .temp_mask = 0x3ff, | |
243 | .coef_b = 1169498786UL, | |
244 | .coef_m = 2000000UL, | |
245 | .coef_div = 4289, | |
246 | .inverted = true, | |
247 | }; | |
248 | ||
fa0d654c EG |
249 | static const struct of_device_id armada_thermal_id_table[] = { |
250 | { | |
251 | .compatible = "marvell,armadaxp-thermal", | |
66fdb7b6 | 252 | .data = &armadaxp_data, |
fa0d654c EG |
253 | }, |
254 | { | |
255 | .compatible = "marvell,armada370-thermal", | |
66fdb7b6 | 256 | .data = &armada370_data, |
fa0d654c | 257 | }, |
e2d5f05b EG |
258 | { |
259 | .compatible = "marvell,armada375-thermal", | |
260 | .data = &armada375_data, | |
261 | }, | |
262 | { | |
263 | .compatible = "marvell,armada375-z1-thermal", | |
264 | .data = &armada375_data, | |
265 | }, | |
e6e0a68c EG |
266 | { |
267 | .compatible = "marvell,armada380-thermal", | |
268 | .data = &armada380_data, | |
269 | }, | |
fa0d654c EG |
270 | { |
271 | /* sentinel */ | |
272 | }, | |
273 | }; | |
274 | MODULE_DEVICE_TABLE(of, armada_thermal_id_table); | |
275 | ||
276 | static int armada_thermal_probe(struct platform_device *pdev) | |
277 | { | |
278 | struct thermal_zone_device *thermal; | |
279 | const struct of_device_id *match; | |
280 | struct armada_thermal_priv *priv; | |
281 | struct resource *res; | |
282 | ||
283 | match = of_match_device(armada_thermal_id_table, &pdev->dev); | |
284 | if (!match) | |
285 | return -ENODEV; | |
286 | ||
287 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); | |
288 | if (!priv) | |
289 | return -ENOMEM; | |
290 | ||
291 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
fa0d654c EG |
292 | priv->sensor = devm_ioremap_resource(&pdev->dev, res); |
293 | if (IS_ERR(priv->sensor)) | |
294 | return PTR_ERR(priv->sensor); | |
295 | ||
296 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
fa0d654c EG |
297 | priv->control = devm_ioremap_resource(&pdev->dev, res); |
298 | if (IS_ERR(priv->control)) | |
299 | return PTR_ERR(priv->control); | |
300 | ||
66fdb7b6 | 301 | priv->data = (struct armada_thermal_data *)match->data; |
04bf3d7e | 302 | priv->data->init_sensor(pdev, priv); |
fa0d654c EG |
303 | |
304 | thermal = thermal_zone_device_register("armada_thermal", 0, 0, | |
305 | priv, &ops, NULL, 0, 0); | |
306 | if (IS_ERR(thermal)) { | |
307 | dev_err(&pdev->dev, | |
308 | "Failed to register thermal zone device\n"); | |
309 | return PTR_ERR(thermal); | |
310 | } | |
311 | ||
312 | platform_set_drvdata(pdev, thermal); | |
313 | ||
314 | return 0; | |
315 | } | |
316 | ||
317 | static int armada_thermal_exit(struct platform_device *pdev) | |
318 | { | |
319 | struct thermal_zone_device *armada_thermal = | |
320 | platform_get_drvdata(pdev); | |
321 | ||
322 | thermal_zone_device_unregister(armada_thermal); | |
fa0d654c EG |
323 | |
324 | return 0; | |
325 | } | |
326 | ||
327 | static struct platform_driver armada_thermal_driver = { | |
328 | .probe = armada_thermal_probe, | |
329 | .remove = armada_thermal_exit, | |
330 | .driver = { | |
331 | .name = "armada_thermal", | |
332 | .owner = THIS_MODULE, | |
1d089e09 | 333 | .of_match_table = armada_thermal_id_table, |
fa0d654c EG |
334 | }, |
335 | }; | |
336 | ||
337 | module_platform_driver(armada_thermal_driver); | |
338 | ||
339 | MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>"); | |
340 | MODULE_DESCRIPTION("Armada 370/XP thermal driver"); | |
341 | MODULE_LICENSE("GPL v2"); |