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Thermal: Fix bug on cpu_cooling, cooling device's id conflict problem.
[deliverable/linux.git] / drivers / thermal / exynos_thermal.c
CommitLineData
9d97e5c8 1/*
c48cbba6 2 * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
9d97e5c8
DK		 3 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
c48cbba6 6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
9d97e5c8
DK		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/err.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/platform_device.h>
29#include <linux/interrupt.h>
30#include <linux/clk.h>
31#include <linux/workqueue.h>
32#include <linux/sysfs.h>
33#include <linux/kobject.h>
34#include <linux/io.h>
35#include <linux/mutex.h>
c48cbba6 36#include <linux/platform_data/exynos_thermal.h>
7e0b55e6
ADK		 37#include <linux/thermal.h>
38#include <linux/cpufreq.h>
39#include <linux/cpu_cooling.h>
f22d9c03
ADK		 40#include <linux/of.h>
41
42#include <plat/cpu.h>
43
44/* Exynos generic registers */
45#define EXYNOS_TMU_REG_TRIMINFO 0x0
46#define EXYNOS_TMU_REG_CONTROL 0x20
47#define EXYNOS_TMU_REG_STATUS 0x28
48#define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
49#define EXYNOS_TMU_REG_INTEN 0x70
50#define EXYNOS_TMU_REG_INTSTAT 0x74
51#define EXYNOS_TMU_REG_INTCLEAR 0x78
52
53#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
54#define EXYNOS_TMU_GAIN_SHIFT 8
55#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
56#define EXYNOS_TMU_CORE_ON 3
57#define EXYNOS_TMU_CORE_OFF 2
58#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
59
60/* Exynos4210 specific registers */
61#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
62#define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
63#define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
64#define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
65#define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
66#define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
67#define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
68#define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
69#define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
70
71#define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
72#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
73#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
74#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
75#define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
76
77/* Exynos5250 and Exynos4412 specific registers */
78#define EXYNOS_TMU_TRIMINFO_CON 0x14
79#define EXYNOS_THD_TEMP_RISE 0x50
80#define EXYNOS_THD_TEMP_FALL 0x54
81#define EXYNOS_EMUL_CON 0x80
82
83#define EXYNOS_TRIMINFO_RELOAD 0x1
84#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
85#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 16)
86#define EXYNOS_MUX_ADDR_VALUE 6
87#define EXYNOS_MUX_ADDR_SHIFT 20
88#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
89
90#define EFUSE_MIN_VALUE 40
91#define EFUSE_MAX_VALUE 100
92
93/* In-kernel thermal framework related macros & definations */
94#define SENSOR_NAME_LEN 16
95#define MAX_TRIP_COUNT 8
96#define MAX_COOLING_DEVICE 4
97
98#define ACTIVE_INTERVAL 500
99#define IDLE_INTERVAL 10000
7e0b55e6 100#define MCELSIUS 1000
f22d9c03
ADK		 101
102/* CPU Zone information */
103#define PANIC_ZONE 4
104#define WARN_ZONE 3
105#define MONITOR_ZONE 2
106#define SAFE_ZONE 1
107
108#define GET_ZONE(trip) (trip + 2)
109#define GET_TRIP(zone) (zone - 2)
110
7e0b55e6
ADK		 111#define EXYNOS_ZONE_COUNT 3
112
f22d9c03
ADK		 113struct exynos_tmu_data {
114 struct exynos_tmu_platform_data *pdata;
9d97e5c8
DK		 115 struct resource *mem;
116 void __iomem *base;
117 int irq;
f22d9c03 118 enum soc_type soc;
9d97e5c8
DK		 119 struct work_struct irq_work;
120 struct mutex lock;
121 struct clk *clk;
122 u8 temp_error1, temp_error2;
123};
124
7e0b55e6
ADK		 125struct thermal_trip_point_conf {
126 int trip_val[MAX_TRIP_COUNT];
127 int trip_count;
128};
129
130struct thermal_cooling_conf {
131 struct freq_clip_table freq_data[MAX_TRIP_COUNT];
132 int freq_clip_count;
133};
134
135struct thermal_sensor_conf {
136 char name[SENSOR_NAME_LEN];
137 int (*read_temperature)(void *data);
138 struct thermal_trip_point_conf trip_data;
139 struct thermal_cooling_conf cooling_data;
140 void *private_data;
141};
142
143struct exynos_thermal_zone {
144 enum thermal_device_mode mode;
145 struct thermal_zone_device *therm_dev;
146 struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
147 unsigned int cool_dev_size;
148 struct platform_device *exynos4_dev;
149 struct thermal_sensor_conf *sensor_conf;
150 bool bind;
151};
152
153static struct exynos_thermal_zone *th_zone;
154static void exynos_unregister_thermal(void);
155static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
156
157/* Get mode callback functions for thermal zone */
158static int exynos_get_mode(struct thermal_zone_device *thermal,
159 enum thermal_device_mode *mode)
160{
161 if (th_zone)
162 *mode = th_zone->mode;
163 return 0;
164}
165
166/* Set mode callback functions for thermal zone */
167static int exynos_set_mode(struct thermal_zone_device *thermal,
168 enum thermal_device_mode mode)
169{
170 if (!th_zone->therm_dev) {
171 pr_notice("thermal zone not registered\n");
172 return 0;
173 }
174
175 mutex_lock(&th_zone->therm_dev->lock);
176
177 if (mode == THERMAL_DEVICE_ENABLED)
178 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
179 else
180 th_zone->therm_dev->polling_delay = 0;
181
182 mutex_unlock(&th_zone->therm_dev->lock);
183
184 th_zone->mode = mode;
185 thermal_zone_device_update(th_zone->therm_dev);
186 pr_info("thermal polling set for duration=%d msec\n",
187 th_zone->therm_dev->polling_delay);
188 return 0;
189}
190
191
192/* Get trip type callback functions for thermal zone */
193static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
194 enum thermal_trip_type *type)
195{
196 switch (GET_ZONE(trip)) {
197 case MONITOR_ZONE:
198 case WARN_ZONE:
199 *type = THERMAL_TRIP_ACTIVE;
200 break;
201 case PANIC_ZONE:
202 *type = THERMAL_TRIP_CRITICAL;
203 break;
204 default:
205 return -EINVAL;
206 }
207 return 0;
208}
209
210/* Get trip temperature callback functions for thermal zone */
211static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
212 unsigned long *temp)
213{
214 if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
215 return -EINVAL;
216
217 *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
218 /* convert the temperature into millicelsius */
219 *temp = *temp * MCELSIUS;
220
221 return 0;
222}
223
224/* Get critical temperature callback functions for thermal zone */
225static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
226 unsigned long *temp)
227{
228 int ret;
229 /* Panic zone */
230 ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
231 return ret;
232}
233
234static int exynos_get_frequency_level(unsigned int cpu, unsigned int freq)
235{
236 int i = 0, ret = -EINVAL;
237 struct cpufreq_frequency_table *table = NULL;
238#ifdef CONFIG_CPU_FREQ
239 table = cpufreq_frequency_get_table(cpu);
240#endif
241 if (!table)
242 return ret;
243
244 while (table[i].frequency != CPUFREQ_TABLE_END) {
245 if (table[i].frequency == CPUFREQ_ENTRY_INVALID)
246 continue;
247 if (table[i].frequency == freq)
248 return i;
249 i++;
250 }
251 return ret;
252}
253
254/* Bind callback functions for thermal zone */
255static int exynos_bind(struct thermal_zone_device *thermal,
256 struct thermal_cooling_device *cdev)
257{
258 int ret = 0, i, tab_size, level;
259 struct freq_clip_table *tab_ptr, *clip_data;
260 struct thermal_sensor_conf *data = th_zone->sensor_conf;
261
262 tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
263 tab_size = data->cooling_data.freq_clip_count;
264
265 if (tab_ptr == NULL || tab_size == 0)
266 return -EINVAL;
267
268 /* find the cooling device registered*/
269 for (i = 0; i < th_zone->cool_dev_size; i++)
270 if (cdev == th_zone->cool_dev[i])
271 break;
272
273 /* No matching cooling device */
274 if (i == th_zone->cool_dev_size)
275 return 0;
276
277 /* Bind the thermal zone to the cpufreq cooling device */
278 for (i = 0; i < tab_size; i++) {
279 clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
280 level = exynos_get_frequency_level(0, clip_data->freq_clip_max);
281 if (level < 0)
282 return 0;
283 switch (GET_ZONE(i)) {
284 case MONITOR_ZONE:
285 case WARN_ZONE:
286 if (thermal_zone_bind_cooling_device(thermal, i, cdev,
287 level, level)) {
288 pr_err("error binding cdev inst %d\n", i);
289 ret = -EINVAL;
290 }
291 th_zone->bind = true;
292 break;
293 default:
294 ret = -EINVAL;
295 }
296 }
297
298 return ret;
299}
300
301/* Unbind callback functions for thermal zone */
302static int exynos_unbind(struct thermal_zone_device *thermal,
303 struct thermal_cooling_device *cdev)
304{
305 int ret = 0, i, tab_size;
306 struct thermal_sensor_conf *data = th_zone->sensor_conf;
307
308 if (th_zone->bind == false)
309 return 0;
310
311 tab_size = data->cooling_data.freq_clip_count;
312
313 if (tab_size == 0)
314 return -EINVAL;
315
316 /* find the cooling device registered*/
317 for (i = 0; i < th_zone->cool_dev_size; i++)
318 if (cdev == th_zone->cool_dev[i])
319 break;
320
321 /* No matching cooling device */
322 if (i == th_zone->cool_dev_size)
323 return 0;
324
325 /* Bind the thermal zone to the cpufreq cooling device */
326 for (i = 0; i < tab_size; i++) {
327 switch (GET_ZONE(i)) {
328 case MONITOR_ZONE:
329 case WARN_ZONE:
330 if (thermal_zone_unbind_cooling_device(thermal, i,
331 cdev)) {
332 pr_err("error unbinding cdev inst=%d\n", i);
333 ret = -EINVAL;
334 }
335 th_zone->bind = false;
336 break;
337 default:
338 ret = -EINVAL;
339 }
340 }
341 return ret;
342}
343
344/* Get temperature callback functions for thermal zone */
345static int exynos_get_temp(struct thermal_zone_device *thermal,
346 unsigned long *temp)
347{
348 void *data;
349
350 if (!th_zone->sensor_conf) {
351 pr_info("Temperature sensor not initialised\n");
352 return -EINVAL;
353 }
354 data = th_zone->sensor_conf->private_data;
355 *temp = th_zone->sensor_conf->read_temperature(data);
356 /* convert the temperature into millicelsius */
357 *temp = *temp * MCELSIUS;
358 return 0;
359}
360
361/* Get the temperature trend */
362static int exynos_get_trend(struct thermal_zone_device *thermal,
363 int trip, enum thermal_trend *trend)
364{
365 if (thermal->temperature >= trip)
366 *trend = THERMAL_TREND_RAISING;
367 else
368 *trend = THERMAL_TREND_DROPPING;
369
370 return 0;
371}
372/* Operation callback functions for thermal zone */
373static struct thermal_zone_device_ops const exynos_dev_ops = {
374 .bind = exynos_bind,
375 .unbind = exynos_unbind,
376 .get_temp = exynos_get_temp,
377 .get_trend = exynos_get_trend,
378 .get_mode = exynos_get_mode,
379 .set_mode = exynos_set_mode,
380 .get_trip_type = exynos_get_trip_type,
381 .get_trip_temp = exynos_get_trip_temp,
382 .get_crit_temp = exynos_get_crit_temp,
383};
384
385/*
386 * This function may be called from interrupt based temperature sensor
387 * when threshold is changed.
388 */
389static void exynos_report_trigger(void)
390{
391 unsigned int i;
392 char data[10];
393 char *envp[] = { data, NULL };
394
395 if (!th_zone || !th_zone->therm_dev)
396 return;
397 if (th_zone->bind == false) {
398 for (i = 0; i < th_zone->cool_dev_size; i++) {
399 if (!th_zone->cool_dev[i])
400 continue;
401 exynos_bind(th_zone->therm_dev,
402 th_zone->cool_dev[i]);
403 }
404 }
405
406 thermal_zone_device_update(th_zone->therm_dev);
407
408 mutex_lock(&th_zone->therm_dev->lock);
409 /* Find the level for which trip happened */
410 for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
411 if (th_zone->therm_dev->last_temperature <
412 th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
413 break;
414 }
415
416 if (th_zone->mode == THERMAL_DEVICE_ENABLED) {
417 if (i > 0)
418 th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
419 else
420 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
421 }
422
423 snprintf(data, sizeof(data), "%u", i);
424 kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
425 mutex_unlock(&th_zone->therm_dev->lock);
426}
427
428/* Register with the in-kernel thermal management */
429static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
430{
431 int ret;
432 struct cpumask mask_val;
433
434 if (!sensor_conf || !sensor_conf->read_temperature) {
435 pr_err("Temperature sensor not initialised\n");
436 return -EINVAL;
437 }
438
439 th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
440 if (!th_zone)
441 return -ENOMEM;
442
443 th_zone->sensor_conf = sensor_conf;
444 cpumask_set_cpu(0, &mask_val);
445 th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
446 if (IS_ERR(th_zone->cool_dev[0])) {
447 pr_err("Failed to register cpufreq cooling device\n");
448 ret = -EINVAL;
449 goto err_unregister;
450 }
451 th_zone->cool_dev_size++;
452
453 th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
454 EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, 0,
455 IDLE_INTERVAL);
456
457 if (IS_ERR(th_zone->therm_dev)) {
458 pr_err("Failed to register thermal zone device\n");
459 ret = -EINVAL;
460 goto err_unregister;
461 }
462 th_zone->mode = THERMAL_DEVICE_ENABLED;
463
464 pr_info("Exynos: Kernel Thermal management registered\n");
465
466 return 0;
467
468err_unregister:
469 exynos_unregister_thermal();
470 return ret;
471}
472
473/* Un-Register with the in-kernel thermal management */
474static void exynos_unregister_thermal(void)
475{
476 int i;
477
478 if (th_zone && th_zone->therm_dev)
479 thermal_zone_device_unregister(th_zone->therm_dev);
480
481 for (i = 0; i < th_zone->cool_dev_size; i++) {
482 if (th_zone && th_zone->cool_dev[i])
483 cpufreq_cooling_unregister(th_zone->cool_dev[i]);
484 }
485
486 kfree(th_zone);
487 pr_info("Exynos: Kernel Thermal management unregistered\n");
488}
489
9d97e5c8
DK		 490/*
491 * TMU treats temperature as a mapped temperature code.
492 * The temperature is converted differently depending on the calibration type.
493 */
f22d9c03 494static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
9d97e5c8 495{
f22d9c03 496 struct exynos_tmu_platform_data *pdata = data->pdata;
9d97e5c8
DK		 497 int temp_code;
498
f22d9c03
ADK		 499 if (data->soc == SOC_ARCH_EXYNOS4210)
500 /* temp should range between 25 and 125 */
501 if (temp < 25 || temp > 125) {
502 temp_code = -EINVAL;
503 goto out;
504 }
9d97e5c8
DK		 505
506 switch (pdata->cal_type) {
507 case TYPE_TWO_POINT_TRIMMING:
508 temp_code = (temp - 25) *
509 (data->temp_error2 - data->temp_error1) /
510 (85 - 25) + data->temp_error1;
511 break;
512 case TYPE_ONE_POINT_TRIMMING:
513 temp_code = temp + data->temp_error1 - 25;
514 break;
515 default:
f22d9c03 516 temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
9d97e5c8
DK		 517 break;
518 }
519out:
520 return temp_code;
521}
522
523/*
524 * Calculate a temperature value from a temperature code.
525 * The unit of the temperature is degree Celsius.
526 */
f22d9c03 527static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
9d97e5c8 528{
f22d9c03 529 struct exynos_tmu_platform_data *pdata = data->pdata;
9d97e5c8
DK		 530 int temp;
531
f22d9c03
ADK		 532 if (data->soc == SOC_ARCH_EXYNOS4210)
533 /* temp_code should range between 75 and 175 */
534 if (temp_code < 75 || temp_code > 175) {
535 temp = -ENODATA;
536 goto out;
537 }
9d97e5c8
DK		 538
539 switch (pdata->cal_type) {
540 case TYPE_TWO_POINT_TRIMMING:
541 temp = (temp_code - data->temp_error1) * (85 - 25) /
542 (data->temp_error2 - data->temp_error1) + 25;
543 break;
544 case TYPE_ONE_POINT_TRIMMING:
545 temp = temp_code - data->temp_error1 + 25;
546 break;
547 default:
f22d9c03 548 temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
9d97e5c8
DK		 549 break;
550 }
551out:
552 return temp;
553}
554
f22d9c03 555static int exynos_tmu_initialize(struct platform_device *pdev)
9d97e5c8 556{
f22d9c03
ADK		 557 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
558 struct exynos_tmu_platform_data *pdata = data->pdata;
559 unsigned int status, trim_info, rising_threshold;
9d97e5c8
DK		 560 int ret = 0, threshold_code;
561
562 mutex_lock(&data->lock);
563 clk_enable(data->clk);
564
f22d9c03 565 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
9d97e5c8
DK		 566 if (!status) {
567 ret = -EBUSY;
568 goto out;
569 }
570
f22d9c03
ADK		 571 if (data->soc == SOC_ARCH_EXYNOS) {
572 __raw_writel(EXYNOS_TRIMINFO_RELOAD,
573 data->base + EXYNOS_TMU_TRIMINFO_CON);
574 }
9d97e5c8 575 /* Save trimming info in order to perform calibration */
f22d9c03
ADK		 576 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
577 data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
578 data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
579
580 if ((EFUSE_MIN_VALUE > data->temp_error1) ||
581 (data->temp_error1 > EFUSE_MAX_VALUE) ||
582 (data->temp_error2 != 0))
583 data->temp_error1 = pdata->efuse_value;
584
585 if (data->soc == SOC_ARCH_EXYNOS4210) {
586 /* Write temperature code for threshold */
587 threshold_code = temp_to_code(data, pdata->threshold);
588 if (threshold_code < 0) {
589 ret = threshold_code;
590 goto out;
591 }
592 writeb(threshold_code,
593 data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
594
595 writeb(pdata->trigger_levels[0],
596 data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0);
597 writeb(pdata->trigger_levels[1],
598 data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL1);
599 writeb(pdata->trigger_levels[2],
600 data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL2);
601 writeb(pdata->trigger_levels[3],
602 data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL3);
603
604 writel(EXYNOS4210_TMU_INTCLEAR_VAL,
605 data->base + EXYNOS_TMU_REG_INTCLEAR);
606 } else if (data->soc == SOC_ARCH_EXYNOS) {
607 /* Write temperature code for threshold */
608 threshold_code = temp_to_code(data, pdata->trigger_levels[0]);
609 if (threshold_code < 0) {
610 ret = threshold_code;
611 goto out;
612 }
613 rising_threshold = threshold_code;
614 threshold_code = temp_to_code(data, pdata->trigger_levels[1]);
615 if (threshold_code < 0) {
616 ret = threshold_code;
617 goto out;
618 }
619 rising_threshold |= (threshold_code << 8);
620 threshold_code = temp_to_code(data, pdata->trigger_levels[2]);
621 if (threshold_code < 0) {
622 ret = threshold_code;
623 goto out;
624 }
625 rising_threshold |= (threshold_code << 16);
626
627 writel(rising_threshold,
628 data->base + EXYNOS_THD_TEMP_RISE);
629 writel(0, data->base + EXYNOS_THD_TEMP_FALL);
630
631 writel(EXYNOS_TMU_CLEAR_RISE_INT|EXYNOS_TMU_CLEAR_FALL_INT,
632 data->base + EXYNOS_TMU_REG_INTCLEAR);
9d97e5c8 633 }
9d97e5c8
DK		 634out:
635 clk_disable(data->clk);
636 mutex_unlock(&data->lock);
637
638 return ret;
639}
640
f22d9c03 641static void exynos_tmu_control(struct platform_device *pdev, bool on)
9d97e5c8 642{
f22d9c03
ADK		 643 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
644 struct exynos_tmu_platform_data *pdata = data->pdata;
9d97e5c8
DK		 645 unsigned int con, interrupt_en;
646
647 mutex_lock(&data->lock);
648 clk_enable(data->clk);
649
f22d9c03
ADK		 650 con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
651 pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
652
653 if (data->soc == SOC_ARCH_EXYNOS) {
654 con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
655 con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
656 }
657
9d97e5c8 658 if (on) {
f22d9c03 659 con |= EXYNOS_TMU_CORE_ON;
9d97e5c8
DK		 660 interrupt_en = pdata->trigger_level3_en << 12 |
661 pdata->trigger_level2_en << 8 |
662 pdata->trigger_level1_en << 4 |
663 pdata->trigger_level0_en;
664 } else {
f22d9c03 665 con |= EXYNOS_TMU_CORE_OFF;
9d97e5c8
DK		 666 interrupt_en = 0; /* Disable all interrupts */
667 }
f22d9c03
ADK		 668 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
669 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
9d97e5c8
DK		 670
671 clk_disable(data->clk);
672 mutex_unlock(&data->lock);
673}
674
f22d9c03 675static int exynos_tmu_read(struct exynos_tmu_data *data)
9d97e5c8
DK		 676{
677 u8 temp_code;
678 int temp;
679
680 mutex_lock(&data->lock);
681 clk_enable(data->clk);
682
f22d9c03 683 temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
9d97e5c8
DK		 684 temp = code_to_temp(data, temp_code);
685
686 clk_disable(data->clk);
687 mutex_unlock(&data->lock);
688
689 return temp;
690}
691
f22d9c03 692static void exynos_tmu_work(struct work_struct *work)
9d97e5c8 693{
f22d9c03
ADK		 694 struct exynos_tmu_data *data = container_of(work,
695 struct exynos_tmu_data, irq_work);
9d97e5c8
DK		 696
697 mutex_lock(&data->lock);
698 clk_enable(data->clk);
699
9d97e5c8 700
f22d9c03
ADK		 701 if (data->soc == SOC_ARCH_EXYNOS)
702 writel(EXYNOS_TMU_CLEAR_RISE_INT,
703 data->base + EXYNOS_TMU_REG_INTCLEAR);
704 else
705 writel(EXYNOS4210_TMU_INTCLEAR_VAL,
706 data->base + EXYNOS_TMU_REG_INTCLEAR);
9d97e5c8
DK		 707
708 clk_disable(data->clk);
709 mutex_unlock(&data->lock);
7e0b55e6 710 exynos_report_trigger();
f22d9c03 711 enable_irq(data->irq);
9d97e5c8
DK		 712}
713
f22d9c03 714static irqreturn_t exynos_tmu_irq(int irq, void *id)
9d97e5c8 715{
f22d9c03 716 struct exynos_tmu_data *data = id;
9d97e5c8
DK		 717
718 disable_irq_nosync(irq);
719 schedule_work(&data->irq_work);
720
721 return IRQ_HANDLED;
722}
7e0b55e6
ADK		 723static struct thermal_sensor_conf exynos_sensor_conf = {
724 .name = "exynos-therm",
725 .read_temperature = (int (*)(void *))exynos_tmu_read,
17be868e
ADK		 726};
727
728#if defined(CONFIG_CPU_EXYNOS4210)
729static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
730 .threshold = 80,
731 .trigger_levels[0] = 5,
732 .trigger_levels[1] = 20,
733 .trigger_levels[2] = 30,
734 .trigger_level0_en = 1,
735 .trigger_level1_en = 1,
736 .trigger_level2_en = 1,
737 .trigger_level3_en = 0,
738 .gain = 15,
739 .reference_voltage = 7,
740 .cal_type = TYPE_ONE_POINT_TRIMMING,
741 .freq_tab[0] = {
742 .freq_clip_max = 800 * 1000,
743 .temp_level = 85,
744 },
745 .freq_tab[1] = {
746 .freq_clip_max = 200 * 1000,
747 .temp_level = 100,
748 },
749 .freq_tab_count = 2,
750 .type = SOC_ARCH_EXYNOS4210,
751};
752#define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
753#else
754#define EXYNOS4210_TMU_DRV_DATA (NULL)
755#endif
756
757#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
758static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
759 .trigger_levels[0] = 85,
760 .trigger_levels[1] = 103,
761 .trigger_levels[2] = 110,
762 .trigger_level0_en = 1,
763 .trigger_level1_en = 1,
764 .trigger_level2_en = 1,
765 .trigger_level3_en = 0,
766 .gain = 8,
767 .reference_voltage = 16,
768 .noise_cancel_mode = 4,
769 .cal_type = TYPE_ONE_POINT_TRIMMING,
770 .efuse_value = 55,
771 .freq_tab[0] = {
772 .freq_clip_max = 800 * 1000,
773 .temp_level = 85,
774 },
775 .freq_tab[1] = {
776 .freq_clip_max = 200 * 1000,
777 .temp_level = 103,
778 },
779 .freq_tab_count = 2,
780 .type = SOC_ARCH_EXYNOS,
781};
782#define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
783#else
784#define EXYNOS_TMU_DRV_DATA (NULL)
785#endif
786
787#ifdef CONFIG_OF
788static const struct of_device_id exynos_tmu_match[] = {
789 {
790 .compatible = "samsung,exynos4210-tmu",
791 .data = (void *)EXYNOS4210_TMU_DRV_DATA,
792 },
793 {
794 .compatible = "samsung,exynos5250-tmu",
795 .data = (void *)EXYNOS_TMU_DRV_DATA,
796 },
797 {},
798};
799MODULE_DEVICE_TABLE(of, exynos_tmu_match);
800#else
801#define exynos_tmu_match NULL
802#endif
803
804static struct platform_device_id exynos_tmu_driver_ids[] = {
805 {
806 .name = "exynos4210-tmu",
807 .driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
808 },
809 {
810 .name = "exynos5250-tmu",
811 .driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
812 },
813 { },
814};
815MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids);
816
817static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
818 struct platform_device *pdev)
819{
820#ifdef CONFIG_OF
821 if (pdev->dev.of_node) {
822 const struct of_device_id *match;
823 match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
824 if (!match)
825 return NULL;
826 return (struct exynos_tmu_platform_data *) match->data;
827 }
828#endif
829 return (struct exynos_tmu_platform_data *)
830 platform_get_device_id(pdev)->driver_data;
7e0b55e6 831}
f22d9c03 832static int __devinit exynos_tmu_probe(struct platform_device *pdev)
9d97e5c8 833{
f22d9c03
ADK		 834 struct exynos_tmu_data *data;
835 struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
7e0b55e6 836 int ret, i;
9d97e5c8 837
17be868e
ADK		 838 if (!pdata)
839 pdata = exynos_get_driver_data(pdev);
840
9d97e5c8
DK		 841 if (!pdata) {
842 dev_err(&pdev->dev, "No platform init data supplied.\n");
843 return -ENODEV;
844 }
79e093c3
ADK		 845 data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
846 GFP_KERNEL);
9d97e5c8
DK		 847 if (!data) {
848 dev_err(&pdev->dev, "Failed to allocate driver structure\n");
849 return -ENOMEM;
850 }
851
852 data->irq = platform_get_irq(pdev, 0);
853 if (data->irq < 0) {
9d97e5c8 854 dev_err(&pdev->dev, "Failed to get platform irq\n");
79e093c3 855 return data->irq;
9d97e5c8
DK		 856 }
857
f22d9c03 858 INIT_WORK(&data->irq_work, exynos_tmu_work);
9d97e5c8
DK		 859
860 data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
861 if (!data->mem) {
9d97e5c8 862 dev_err(&pdev->dev, "Failed to get platform resource\n");
79e093c3 863 return -ENOENT;
9d97e5c8
DK		 864 }
865
79e093c3 866 data->base = devm_request_and_ioremap(&pdev->dev, data->mem);
9d97e5c8 867 if (!data->base) {
9d97e5c8 868 dev_err(&pdev->dev, "Failed to ioremap memory\n");
79e093c3 869 return -ENODEV;
9d97e5c8
DK		 870 }
871
79e093c3 872 ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
f22d9c03 873 IRQF_TRIGGER_RISING, "exynos-tmu", data);
9d97e5c8
DK		 874 if (ret) {
875 dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
79e093c3 876 return ret;
9d97e5c8
DK		 877 }
878
879 data->clk = clk_get(NULL, "tmu_apbif");
880 if (IS_ERR(data->clk)) {
9d97e5c8 881 dev_err(&pdev->dev, "Failed to get clock\n");
79e093c3 882 return PTR_ERR(data->clk);
9d97e5c8
DK		 883 }
884
f22d9c03
ADK		 885 if (pdata->type == SOC_ARCH_EXYNOS ||
886 pdata->type == SOC_ARCH_EXYNOS4210)
887 data->soc = pdata->type;
888 else {
889 ret = -EINVAL;
890 dev_err(&pdev->dev, "Platform not supported\n");
891 goto err_clk;
892 }
893
9d97e5c8
DK		 894 data->pdata = pdata;
895 platform_set_drvdata(pdev, data);
896 mutex_init(&data->lock);
897
f22d9c03 898 ret = exynos_tmu_initialize(pdev);
9d97e5c8
DK		 899 if (ret) {
900 dev_err(&pdev->dev, "Failed to initialize TMU\n");
901 goto err_clk;
902 }
903
f22d9c03 904 exynos_tmu_control(pdev, true);
9d97e5c8 905
7e0b55e6
ADK		 906 /* Register the sensor with thermal management interface */
907 (&exynos_sensor_conf)->private_data = data;
908 exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
909 pdata->trigger_level1_en + pdata->trigger_level2_en +
910 pdata->trigger_level3_en;
911
912 for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
913 exynos_sensor_conf.trip_data.trip_val[i] =
914 pdata->threshold + pdata->trigger_levels[i];
915
916 exynos_sensor_conf.cooling_data.freq_clip_count =
917 pdata->freq_tab_count;
918 for (i = 0; i < pdata->freq_tab_count; i++) {
919 exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
920 pdata->freq_tab[i].freq_clip_max;
921 exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
922 pdata->freq_tab[i].temp_level;
923 }
924
925 ret = exynos_register_thermal(&exynos_sensor_conf);
926 if (ret) {
927 dev_err(&pdev->dev, "Failed to register thermal interface\n");
928 goto err_clk;
929 }
9d97e5c8 930 return 0;
9d97e5c8
DK		 931err_clk:
932 platform_set_drvdata(pdev, NULL);
933 clk_put(data->clk);
9d97e5c8
DK		 934 return ret;
935}
936
f22d9c03 937static int __devexit exynos_tmu_remove(struct platform_device *pdev)
9d97e5c8 938{
f22d9c03 939 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
9d97e5c8 940
f22d9c03 941 exynos_tmu_control(pdev, false);
9d97e5c8 942
7e0b55e6
ADK		 943 exynos_unregister_thermal();
944
9d97e5c8
DK		 945 clk_put(data->clk);
946
9d97e5c8
DK		 947 platform_set_drvdata(pdev, NULL);
948
9d97e5c8
DK		 949 return 0;
950}
951
08cd6753 952#ifdef CONFIG_PM_SLEEP
f22d9c03 953static int exynos_tmu_suspend(struct device *dev)
9d97e5c8 954{
f22d9c03 955 exynos_tmu_control(to_platform_device(dev), false);
9d97e5c8
DK		 956
957 return 0;
958}
959
f22d9c03 960static int exynos_tmu_resume(struct device *dev)
9d97e5c8 961{
08cd6753
RW		 962 struct platform_device *pdev = to_platform_device(dev);
963
f22d9c03
ADK		 964 exynos_tmu_initialize(pdev);
965 exynos_tmu_control(pdev, true);
9d97e5c8
DK		 966
967 return 0;
968}
08cd6753 969
f22d9c03
ADK		 970static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
971 exynos_tmu_suspend, exynos_tmu_resume);
972#define EXYNOS_TMU_PM (&exynos_tmu_pm)
9d97e5c8 973#else
f22d9c03 974#define EXYNOS_TMU_PM NULL
9d97e5c8
DK		 975#endif
976
f22d9c03 977static struct platform_driver exynos_tmu_driver = {
9d97e5c8 978 .driver = {
f22d9c03 979 .name = "exynos-tmu",
9d97e5c8 980 .owner = THIS_MODULE,
f22d9c03 981 .pm = EXYNOS_TMU_PM,
17be868e 982 .of_match_table = exynos_tmu_match,
9d97e5c8 983 },
f22d9c03
ADK		 984 .probe = exynos_tmu_probe,
985 .remove = __devexit_p(exynos_tmu_remove),
17be868e 986 .id_table = exynos_tmu_driver_ids,
9d97e5c8
DK		 987};
988
f22d9c03 989module_platform_driver(exynos_tmu_driver);
9d97e5c8 990
f22d9c03 991MODULE_DESCRIPTION("EXYNOS TMU Driver");
9d97e5c8
DK		 992MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
993MODULE_LICENSE("GPL");
f22d9c03 994MODULE_ALIAS("platform:exynos-tmu");
Linux kernel - Deliverables
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