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9d97e5c8 | 1 | /* |
0c1836a6 | 2 | * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit) |
9d97e5c8 DK |
3 | * |
4 | * Copyright (C) 2011 Samsung Electronics | |
5 | * Donggeun Kim <dg77.kim@samsung.com> | |
0c1836a6 | 6 | * Amit Daniel Kachhap <amit.daniel@samsung.com> |
9d97e5c8 DK |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
0c1836a6 ADK |
23 | #ifndef _EXYNOS_TMU_H |
24 | #define _EXYNOS_TMU_H | |
7e0b55e6 | 25 | #include <linux/cpu_cooling.h> |
9d97e5c8 | 26 | |
0c1836a6 ADK |
27 | #include "exynos_thermal_common.h" |
28 | ||
9d97e5c8 DK |
29 | enum calibration_type { |
30 | TYPE_ONE_POINT_TRIMMING, | |
31 | TYPE_TWO_POINT_TRIMMING, | |
32 | TYPE_NONE, | |
33 | }; | |
34 | ||
f22d9c03 ADK |
35 | enum soc_type { |
36 | SOC_ARCH_EXYNOS4210 = 1, | |
37 | SOC_ARCH_EXYNOS, | |
38 | }; | |
7e0b55e6 | 39 | |
9d97e5c8 | 40 | /** |
f22d9c03 | 41 | * struct exynos_tmu_platform_data |
9d97e5c8 DK |
42 | * @threshold: basic temperature for generating interrupt |
43 | * 25 <= threshold <= 125 [unit: degree Celsius] | |
4f0a6847 JL |
44 | * @threshold_falling: differntial value for setting threshold |
45 | * of temperature falling interrupt. | |
9d97e5c8 DK |
46 | * @trigger_levels: array for each interrupt levels |
47 | * [unit: degree Celsius] | |
48 | * 0: temperature for trigger_level0 interrupt | |
49 | * condition for trigger_level0 interrupt: | |
50 | * current temperature > threshold + trigger_levels[0] | |
51 | * 1: temperature for trigger_level1 interrupt | |
52 | * condition for trigger_level1 interrupt: | |
53 | * current temperature > threshold + trigger_levels[1] | |
54 | * 2: temperature for trigger_level2 interrupt | |
55 | * condition for trigger_level2 interrupt: | |
56 | * current temperature > threshold + trigger_levels[2] | |
57 | * 3: temperature for trigger_level3 interrupt | |
58 | * condition for trigger_level3 interrupt: | |
59 | * current temperature > threshold + trigger_levels[3] | |
60 | * @trigger_level0_en: | |
61 | * 1 = enable trigger_level0 interrupt, | |
62 | * 0 = disable trigger_level0 interrupt | |
63 | * @trigger_level1_en: | |
64 | * 1 = enable trigger_level1 interrupt, | |
65 | * 0 = disable trigger_level1 interrupt | |
66 | * @trigger_level2_en: | |
67 | * 1 = enable trigger_level2 interrupt, | |
68 | * 0 = disable trigger_level2 interrupt | |
69 | * @trigger_level3_en: | |
70 | * 1 = enable trigger_level3 interrupt, | |
71 | * 0 = disable trigger_level3 interrupt | |
72 | * @gain: gain of amplifier in the positive-TC generator block | |
73 | * 0 <= gain <= 15 | |
74 | * @reference_voltage: reference voltage of amplifier | |
75 | * in the positive-TC generator block | |
76 | * 0 <= reference_voltage <= 31 | |
f22d9c03 ADK |
77 | * @noise_cancel_mode: noise cancellation mode |
78 | * 000, 100, 101, 110 and 111 can be different modes | |
79 | * @type: determines the type of SOC | |
80 | * @efuse_value: platform defined fuse value | |
9d97e5c8 | 81 | * @cal_type: calibration type for temperature |
7e0b55e6 ADK |
82 | * @freq_clip_table: Table representing frequency reduction percentage. |
83 | * @freq_tab_count: Count of the above table as frequency reduction may | |
84 | * applicable to only some of the trigger levels. | |
9d97e5c8 | 85 | * |
f22d9c03 | 86 | * This structure is required for configuration of exynos_tmu driver. |
9d97e5c8 | 87 | */ |
f22d9c03 | 88 | struct exynos_tmu_platform_data { |
9d97e5c8 | 89 | u8 threshold; |
4f0a6847 | 90 | u8 threshold_falling; |
9d97e5c8 DK |
91 | u8 trigger_levels[4]; |
92 | bool trigger_level0_en; | |
93 | bool trigger_level1_en; | |
94 | bool trigger_level2_en; | |
95 | bool trigger_level3_en; | |
96 | ||
97 | u8 gain; | |
98 | u8 reference_voltage; | |
f22d9c03 ADK |
99 | u8 noise_cancel_mode; |
100 | u32 efuse_value; | |
9d97e5c8 DK |
101 | |
102 | enum calibration_type cal_type; | |
f22d9c03 | 103 | enum soc_type type; |
7e0b55e6 ADK |
104 | struct freq_clip_table freq_tab[4]; |
105 | unsigned int freq_tab_count; | |
9d97e5c8 | 106 | }; |
0c1836a6 | 107 | #endif /* _EXYNOS_TMU_H */ |