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6b7d8f8b TK |
1 | /* |
2 | * altera_uart.c -- Altera UART driver | |
3 | * | |
4 | * Based on mcf.c -- Freescale ColdFire UART driver | |
5 | * | |
6 | * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> | |
7 | * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> | |
8 | * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
2f8b9c15 | 18 | #include <linux/timer.h> |
6b7d8f8b TK |
19 | #include <linux/interrupt.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/tty.h> | |
23 | #include <linux/tty_flip.h> | |
24 | #include <linux/serial.h> | |
25 | #include <linux/serial_core.h> | |
26 | #include <linux/platform_device.h> | |
7c9325d7 | 27 | #include <linux/of.h> |
6b7d8f8b TK |
28 | #include <linux/io.h> |
29 | #include <linux/altera_uart.h> | |
30 | ||
31 | #define DRV_NAME "altera_uart" | |
99793c66 AV |
32 | #define SERIAL_ALTERA_MAJOR 204 |
33 | #define SERIAL_ALTERA_MINOR 213 | |
6b7d8f8b TK |
34 | |
35 | /* | |
36 | * Altera UART register definitions according to the Nios UART datasheet: | |
37 | * http://www.altera.com/literature/ds/ds_nios_uart.pdf | |
38 | */ | |
39 | ||
40 | #define ALTERA_UART_SIZE 32 | |
41 | ||
42 | #define ALTERA_UART_RXDATA_REG 0 | |
43 | #define ALTERA_UART_TXDATA_REG 4 | |
44 | #define ALTERA_UART_STATUS_REG 8 | |
45 | #define ALTERA_UART_CONTROL_REG 12 | |
46 | #define ALTERA_UART_DIVISOR_REG 16 | |
47 | #define ALTERA_UART_EOP_REG 20 | |
48 | ||
49 | #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ | |
50 | #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ | |
51 | #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ | |
52 | #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ | |
53 | #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ | |
54 | #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ | |
55 | #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ | |
56 | #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ | |
57 | #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ | |
58 | #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ | |
59 | #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ | |
60 | #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ | |
61 | ||
62 | /* Enable interrupt on... */ | |
63 | #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ | |
64 | #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ | |
65 | #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ | |
66 | #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ | |
67 | #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ | |
68 | #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ | |
69 | #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ | |
70 | #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ | |
71 | #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ | |
72 | ||
73 | #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ | |
74 | #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ | |
75 | #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ | |
76 | #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ | |
77 | ||
78 | /* | |
79 | * Local per-uart structure. | |
80 | */ | |
81 | struct altera_uart { | |
82 | struct uart_port port; | |
2f8b9c15 | 83 | struct timer_list tmr; |
6b7d8f8b TK |
84 | unsigned int sigs; /* Local copy of line sigs */ |
85 | unsigned short imr; /* Local IMR mirror */ | |
86 | }; | |
87 | ||
0d426eda AV |
88 | static u32 altera_uart_readl(struct uart_port *port, int reg) |
89 | { | |
2780ad42 | 90 | return readl(port->membase + (reg << port->regshift)); |
0d426eda AV |
91 | } |
92 | ||
93 | static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) | |
94 | { | |
2780ad42 | 95 | writel(dat, port->membase + (reg << port->regshift)); |
0d426eda AV |
96 | } |
97 | ||
6b7d8f8b TK |
98 | static unsigned int altera_uart_tx_empty(struct uart_port *port) |
99 | { | |
0d426eda | 100 | return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
101 | ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; |
102 | } | |
103 | ||
104 | static unsigned int altera_uart_get_mctrl(struct uart_port *port) | |
105 | { | |
106 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b TK |
107 | unsigned int sigs; |
108 | ||
0d426eda | 109 | sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
110 | ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; |
111 | sigs |= (pp->sigs & TIOCM_RTS); | |
6b7d8f8b TK |
112 | |
113 | return sigs; | |
114 | } | |
115 | ||
116 | static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) | |
117 | { | |
118 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 119 | |
6b7d8f8b TK |
120 | pp->sigs = sigs; |
121 | if (sigs & TIOCM_RTS) | |
122 | pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; | |
123 | else | |
124 | pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; | |
0d426eda | 125 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
126 | } |
127 | ||
128 | static void altera_uart_start_tx(struct uart_port *port) | |
129 | { | |
130 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 131 | |
6b7d8f8b | 132 | pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; |
0d426eda | 133 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
134 | } |
135 | ||
136 | static void altera_uart_stop_tx(struct uart_port *port) | |
137 | { | |
138 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 139 | |
6b7d8f8b | 140 | pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; |
0d426eda | 141 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
142 | } |
143 | ||
144 | static void altera_uart_stop_rx(struct uart_port *port) | |
145 | { | |
146 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 147 | |
6b7d8f8b | 148 | pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; |
0d426eda | 149 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
150 | } |
151 | ||
152 | static void altera_uart_break_ctl(struct uart_port *port, int break_state) | |
153 | { | |
154 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
155 | unsigned long flags; | |
156 | ||
157 | spin_lock_irqsave(&port->lock, flags); | |
158 | if (break_state == -1) | |
159 | pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; | |
160 | else | |
161 | pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; | |
0d426eda | 162 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
163 | spin_unlock_irqrestore(&port->lock, flags); |
164 | } | |
165 | ||
166 | static void altera_uart_enable_ms(struct uart_port *port) | |
167 | { | |
168 | } | |
169 | ||
170 | static void altera_uart_set_termios(struct uart_port *port, | |
171 | struct ktermios *termios, | |
172 | struct ktermios *old) | |
173 | { | |
174 | unsigned long flags; | |
175 | unsigned int baud, baudclk; | |
176 | ||
177 | baud = uart_get_baud_rate(port, termios, old, 0, 4000000); | |
178 | baudclk = port->uartclk / baud; | |
179 | ||
180 | if (old) | |
181 | tty_termios_copy_hw(termios, old); | |
182 | tty_termios_encode_baud_rate(termios, baud, baud); | |
183 | ||
184 | spin_lock_irqsave(&port->lock, flags); | |
2f8b9c15 | 185 | uart_update_timeout(port, termios->c_cflag, baud); |
0d426eda | 186 | altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); |
6b7d8f8b TK |
187 | spin_unlock_irqrestore(&port->lock, flags); |
188 | } | |
189 | ||
190 | static void altera_uart_rx_chars(struct altera_uart *pp) | |
191 | { | |
192 | struct uart_port *port = &pp->port; | |
193 | unsigned char ch, flag; | |
194 | unsigned short status; | |
195 | ||
0d426eda | 196 | while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & |
6b7d8f8b | 197 | ALTERA_UART_STATUS_RRDY_MSK) { |
0d426eda | 198 | ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); |
6b7d8f8b TK |
199 | flag = TTY_NORMAL; |
200 | port->icount.rx++; | |
201 | ||
202 | if (status & ALTERA_UART_STATUS_E_MSK) { | |
0d426eda AV |
203 | altera_uart_writel(port, status, |
204 | ALTERA_UART_STATUS_REG); | |
6b7d8f8b TK |
205 | |
206 | if (status & ALTERA_UART_STATUS_BRK_MSK) { | |
207 | port->icount.brk++; | |
208 | if (uart_handle_break(port)) | |
209 | continue; | |
210 | } else if (status & ALTERA_UART_STATUS_PE_MSK) { | |
211 | port->icount.parity++; | |
212 | } else if (status & ALTERA_UART_STATUS_ROE_MSK) { | |
213 | port->icount.overrun++; | |
214 | } else if (status & ALTERA_UART_STATUS_FE_MSK) { | |
215 | port->icount.frame++; | |
216 | } | |
217 | ||
218 | status &= port->read_status_mask; | |
219 | ||
220 | if (status & ALTERA_UART_STATUS_BRK_MSK) | |
221 | flag = TTY_BREAK; | |
222 | else if (status & ALTERA_UART_STATUS_PE_MSK) | |
223 | flag = TTY_PARITY; | |
224 | else if (status & ALTERA_UART_STATUS_FE_MSK) | |
225 | flag = TTY_FRAME; | |
226 | } | |
227 | ||
228 | if (uart_handle_sysrq_char(port, ch)) | |
229 | continue; | |
230 | uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, | |
231 | flag); | |
232 | } | |
233 | ||
dd085ed8 | 234 | spin_unlock(&port->lock); |
2e124b4a | 235 | tty_flip_buffer_push(&port->state->port); |
dd085ed8 | 236 | spin_lock(&port->lock); |
6b7d8f8b TK |
237 | } |
238 | ||
239 | static void altera_uart_tx_chars(struct altera_uart *pp) | |
240 | { | |
241 | struct uart_port *port = &pp->port; | |
242 | struct circ_buf *xmit = &port->state->xmit; | |
243 | ||
244 | if (port->x_char) { | |
245 | /* Send special char - probably flow control */ | |
0d426eda | 246 | altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); |
6b7d8f8b TK |
247 | port->x_char = 0; |
248 | port->icount.tx++; | |
249 | return; | |
250 | } | |
251 | ||
0d426eda | 252 | while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
253 | ALTERA_UART_STATUS_TRDY_MSK) { |
254 | if (xmit->head == xmit->tail) | |
255 | break; | |
0d426eda AV |
256 | altera_uart_writel(port, xmit->buf[xmit->tail], |
257 | ALTERA_UART_TXDATA_REG); | |
6b7d8f8b TK |
258 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
259 | port->icount.tx++; | |
260 | } | |
261 | ||
262 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
263 | uart_write_wakeup(port); | |
264 | ||
265 | if (xmit->head == xmit->tail) { | |
266 | pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; | |
0d426eda | 267 | altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); |
6b7d8f8b TK |
268 | } |
269 | } | |
270 | ||
271 | static irqreturn_t altera_uart_interrupt(int irq, void *data) | |
272 | { | |
273 | struct uart_port *port = data; | |
274 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
275 | unsigned int isr; | |
276 | ||
0d426eda | 277 | isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; |
d8d721f4 TK |
278 | |
279 | spin_lock(&port->lock); | |
6b7d8f8b TK |
280 | if (isr & ALTERA_UART_STATUS_RRDY_MSK) |
281 | altera_uart_rx_chars(pp); | |
282 | if (isr & ALTERA_UART_STATUS_TRDY_MSK) | |
283 | altera_uart_tx_chars(pp); | |
d8d721f4 TK |
284 | spin_unlock(&port->lock); |
285 | ||
6b7d8f8b TK |
286 | return IRQ_RETVAL(isr); |
287 | } | |
288 | ||
2f8b9c15 AV |
289 | static void altera_uart_timer(unsigned long data) |
290 | { | |
291 | struct uart_port *port = (void *)data; | |
292 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
293 | ||
294 | altera_uart_interrupt(0, port); | |
295 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); | |
296 | } | |
297 | ||
6b7d8f8b TK |
298 | static void altera_uart_config_port(struct uart_port *port, int flags) |
299 | { | |
300 | port->type = PORT_ALTERA_UART; | |
301 | ||
302 | /* Clear mask, so no surprise interrupts. */ | |
0d426eda | 303 | altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); |
6b7d8f8b | 304 | /* Clear status register */ |
0d426eda | 305 | altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); |
6b7d8f8b TK |
306 | } |
307 | ||
308 | static int altera_uart_startup(struct uart_port *port) | |
309 | { | |
310 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
311 | unsigned long flags; | |
312 | int ret; | |
313 | ||
2f8b9c15 AV |
314 | if (!port->irq) { |
315 | setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port); | |
316 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); | |
317 | return 0; | |
318 | } | |
319 | ||
9cfb5c05 | 320 | ret = request_irq(port->irq, altera_uart_interrupt, 0, |
6b7d8f8b TK |
321 | DRV_NAME, port); |
322 | if (ret) { | |
323 | pr_err(DRV_NAME ": unable to attach Altera UART %d " | |
324 | "interrupt vector=%d\n", port->line, port->irq); | |
325 | return ret; | |
326 | } | |
327 | ||
328 | spin_lock_irqsave(&port->lock, flags); | |
329 | ||
330 | /* Enable RX interrupts now */ | |
331 | pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; | |
332 | writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); | |
333 | ||
334 | spin_unlock_irqrestore(&port->lock, flags); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | static void altera_uart_shutdown(struct uart_port *port) | |
340 | { | |
341 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
342 | unsigned long flags; | |
343 | ||
344 | spin_lock_irqsave(&port->lock, flags); | |
345 | ||
346 | /* Disable all interrupts now */ | |
347 | pp->imr = 0; | |
348 | writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); | |
349 | ||
350 | spin_unlock_irqrestore(&port->lock, flags); | |
351 | ||
2f8b9c15 AV |
352 | if (port->irq) |
353 | free_irq(port->irq, port); | |
354 | else | |
355 | del_timer_sync(&pp->tmr); | |
6b7d8f8b TK |
356 | } |
357 | ||
358 | static const char *altera_uart_type(struct uart_port *port) | |
359 | { | |
360 | return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; | |
361 | } | |
362 | ||
363 | static int altera_uart_request_port(struct uart_port *port) | |
364 | { | |
365 | /* UARTs always present */ | |
366 | return 0; | |
367 | } | |
368 | ||
369 | static void altera_uart_release_port(struct uart_port *port) | |
370 | { | |
371 | /* Nothing to release... */ | |
372 | } | |
373 | ||
374 | static int altera_uart_verify_port(struct uart_port *port, | |
375 | struct serial_struct *ser) | |
376 | { | |
377 | if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) | |
378 | return -EINVAL; | |
379 | return 0; | |
380 | } | |
381 | ||
418a936e TK |
382 | #ifdef CONFIG_CONSOLE_POLL |
383 | static int altera_uart_poll_get_char(struct uart_port *port) | |
384 | { | |
385 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & | |
386 | ALTERA_UART_STATUS_RRDY_MSK)) | |
387 | cpu_relax(); | |
388 | ||
389 | return altera_uart_readl(port, ALTERA_UART_RXDATA_REG); | |
390 | } | |
391 | ||
392 | static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c) | |
393 | { | |
394 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & | |
395 | ALTERA_UART_STATUS_TRDY_MSK)) | |
396 | cpu_relax(); | |
397 | ||
398 | altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); | |
399 | } | |
400 | #endif | |
401 | ||
6b7d8f8b TK |
402 | /* |
403 | * Define the basic serial functions we support. | |
404 | */ | |
405 | static struct uart_ops altera_uart_ops = { | |
406 | .tx_empty = altera_uart_tx_empty, | |
407 | .get_mctrl = altera_uart_get_mctrl, | |
408 | .set_mctrl = altera_uart_set_mctrl, | |
409 | .start_tx = altera_uart_start_tx, | |
410 | .stop_tx = altera_uart_stop_tx, | |
411 | .stop_rx = altera_uart_stop_rx, | |
412 | .enable_ms = altera_uart_enable_ms, | |
413 | .break_ctl = altera_uart_break_ctl, | |
414 | .startup = altera_uart_startup, | |
415 | .shutdown = altera_uart_shutdown, | |
416 | .set_termios = altera_uart_set_termios, | |
417 | .type = altera_uart_type, | |
418 | .request_port = altera_uart_request_port, | |
419 | .release_port = altera_uart_release_port, | |
420 | .config_port = altera_uart_config_port, | |
421 | .verify_port = altera_uart_verify_port, | |
418a936e TK |
422 | #ifdef CONFIG_CONSOLE_POLL |
423 | .poll_get_char = altera_uart_poll_get_char, | |
424 | .poll_put_char = altera_uart_poll_put_char, | |
425 | #endif | |
6b7d8f8b TK |
426 | }; |
427 | ||
428 | static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; | |
429 | ||
430 | #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) | |
431 | ||
fadf34f0 | 432 | static void altera_uart_console_putc(struct uart_port *port, const char c) |
6b7d8f8b | 433 | { |
0d426eda | 434 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
e8dd4757 | 435 | ALTERA_UART_STATUS_TRDY_MSK)) |
fadf34f0 | 436 | cpu_relax(); |
6b7d8f8b | 437 | |
6b7d8f8b | 438 | writel(c, port->membase + ALTERA_UART_TXDATA_REG); |
6b7d8f8b TK |
439 | } |
440 | ||
441 | static void altera_uart_console_write(struct console *co, const char *s, | |
442 | unsigned int count) | |
443 | { | |
fadf34f0 TK |
444 | struct uart_port *port = &(altera_uart_ports + co->index)->port; |
445 | ||
6b7d8f8b | 446 | for (; count; count--, s++) { |
fadf34f0 | 447 | altera_uart_console_putc(port, *s); |
6b7d8f8b | 448 | if (*s == '\n') |
fadf34f0 | 449 | altera_uart_console_putc(port, '\r'); |
6b7d8f8b TK |
450 | } |
451 | } | |
452 | ||
453 | static int __init altera_uart_console_setup(struct console *co, char *options) | |
454 | { | |
455 | struct uart_port *port; | |
456 | int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; | |
457 | int bits = 8; | |
458 | int parity = 'n'; | |
459 | int flow = 'n'; | |
460 | ||
461 | if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) | |
462 | return -EINVAL; | |
463 | port = &altera_uart_ports[co->index].port; | |
70eebd0b | 464 | if (!port->membase) |
6b7d8f8b TK |
465 | return -ENODEV; |
466 | ||
467 | if (options) | |
468 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
469 | ||
470 | return uart_set_options(port, co, baud, parity, bits, flow); | |
471 | } | |
472 | ||
473 | static struct uart_driver altera_uart_driver; | |
474 | ||
475 | static struct console altera_uart_console = { | |
99793c66 | 476 | .name = "ttyAL", |
6b7d8f8b TK |
477 | .write = altera_uart_console_write, |
478 | .device = uart_console_device, | |
479 | .setup = altera_uart_console_setup, | |
480 | .flags = CON_PRINTBUFFER, | |
481 | .index = -1, | |
482 | .data = &altera_uart_driver, | |
483 | }; | |
484 | ||
485 | static int __init altera_uart_console_init(void) | |
486 | { | |
487 | register_console(&altera_uart_console); | |
488 | return 0; | |
489 | } | |
490 | ||
491 | console_initcall(altera_uart_console_init); | |
492 | ||
493 | #define ALTERA_UART_CONSOLE (&altera_uart_console) | |
494 | ||
495 | #else | |
496 | ||
497 | #define ALTERA_UART_CONSOLE NULL | |
498 | ||
499 | #endif /* CONFIG_ALTERA_UART_CONSOLE */ | |
500 | ||
501 | /* | |
502 | * Define the altera_uart UART driver structure. | |
503 | */ | |
504 | static struct uart_driver altera_uart_driver = { | |
505 | .owner = THIS_MODULE, | |
506 | .driver_name = DRV_NAME, | |
99793c66 AV |
507 | .dev_name = "ttyAL", |
508 | .major = SERIAL_ALTERA_MAJOR, | |
509 | .minor = SERIAL_ALTERA_MINOR, | |
6b7d8f8b TK |
510 | .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, |
511 | .cons = ALTERA_UART_CONSOLE, | |
512 | }; | |
513 | ||
7c9325d7 TK |
514 | #ifdef CONFIG_OF |
515 | static int altera_uart_get_of_uartclk(struct platform_device *pdev, | |
516 | struct uart_port *port) | |
517 | { | |
518 | int len; | |
519 | const __be32 *clk; | |
520 | ||
521 | clk = of_get_property(pdev->dev.of_node, "clock-frequency", &len); | |
522 | if (!clk || len < sizeof(__be32)) | |
523 | return -ENODEV; | |
524 | ||
525 | port->uartclk = be32_to_cpup(clk); | |
526 | ||
527 | return 0; | |
528 | } | |
529 | #else | |
530 | static int altera_uart_get_of_uartclk(struct platform_device *pdev, | |
531 | struct uart_port *port) | |
532 | { | |
533 | return -ENODEV; | |
534 | } | |
535 | #endif /* CONFIG_OF */ | |
536 | ||
9671f099 | 537 | static int altera_uart_probe(struct platform_device *pdev) |
6b7d8f8b | 538 | { |
574de559 | 539 | struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); |
6b7d8f8b | 540 | struct uart_port *port; |
6b5756f1 AV |
541 | struct resource *res_mem; |
542 | struct resource *res_irq; | |
543 | int i = pdev->id; | |
7c9325d7 | 544 | int ret; |
6b7d8f8b | 545 | |
a664ec96 TK |
546 | /* if id is -1 scan for a free id and use that one */ |
547 | if (i == -1) { | |
548 | for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) | |
549 | if (altera_uart_ports[i].port.mapbase == 0) | |
550 | break; | |
551 | } | |
6b7d8f8b | 552 | |
a664ec96 | 553 | if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) |
6b5756f1 | 554 | return -EINVAL; |
6b7d8f8b | 555 | |
6b5756f1 AV |
556 | port = &altera_uart_ports[i].port; |
557 | ||
558 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
559 | if (res_mem) | |
560 | port->mapbase = res_mem->start; | |
acede70d | 561 | else if (platp) |
6b5756f1 AV |
562 | port->mapbase = platp->mapbase; |
563 | else | |
564 | return -EINVAL; | |
565 | ||
566 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
567 | if (res_irq) | |
568 | port->irq = res_irq->start; | |
acede70d | 569 | else if (platp) |
6b5756f1 AV |
570 | port->irq = platp->irq; |
571 | ||
7c9325d7 TK |
572 | /* Check platform data first so we can override device node data */ |
573 | if (platp) | |
574 | port->uartclk = platp->uartclk; | |
575 | else { | |
576 | ret = altera_uart_get_of_uartclk(pdev, port); | |
577 | if (ret) | |
578 | return ret; | |
579 | } | |
580 | ||
6b5756f1 AV |
581 | port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); |
582 | if (!port->membase) | |
583 | return -ENOMEM; | |
584 | ||
2780ad42 TK |
585 | if (platp) |
586 | port->regshift = platp->bus_shift; | |
587 | else | |
588 | port->regshift = 0; | |
589 | ||
6b5756f1 AV |
590 | port->line = i; |
591 | port->type = PORT_ALTERA_UART; | |
592 | port->iotype = SERIAL_IO_MEM; | |
6b5756f1 | 593 | port->ops = &altera_uart_ops; |
288e9feb | 594 | port->flags = UPF_BOOT_AUTOCONF; |
6b5756f1 | 595 | |
1a16afa2 | 596 | platform_set_drvdata(pdev, port); |
a664ec96 | 597 | |
6b5756f1 | 598 | uart_add_one_port(&altera_uart_driver, port); |
6b7d8f8b TK |
599 | |
600 | return 0; | |
601 | } | |
602 | ||
ae8d8a14 | 603 | static int altera_uart_remove(struct platform_device *pdev) |
6b7d8f8b | 604 | { |
1a16afa2 | 605 | struct uart_port *port = platform_get_drvdata(pdev); |
6b7d8f8b | 606 | |
a664ec96 TK |
607 | if (port) { |
608 | uart_remove_one_port(&altera_uart_driver, port); | |
a664ec96 TK |
609 | port->mapbase = 0; |
610 | } | |
e96fabd8 | 611 | |
6b7d8f8b TK |
612 | return 0; |
613 | } | |
614 | ||
7c9325d7 TK |
615 | #ifdef CONFIG_OF |
616 | static struct of_device_id altera_uart_match[] = { | |
617 | { .compatible = "ALTR,uart-1.0", }, | |
13960b47 | 618 | { .compatible = "altr,uart-1.0", }, |
7c9325d7 TK |
619 | {}, |
620 | }; | |
621 | MODULE_DEVICE_TABLE(of, altera_uart_match); | |
7c9325d7 TK |
622 | #endif /* CONFIG_OF */ |
623 | ||
6b7d8f8b TK |
624 | static struct platform_driver altera_uart_platform_driver = { |
625 | .probe = altera_uart_probe, | |
2d47b716 | 626 | .remove = altera_uart_remove, |
6b7d8f8b | 627 | .driver = { |
7c9325d7 TK |
628 | .name = DRV_NAME, |
629 | .owner = THIS_MODULE, | |
85888069 | 630 | .of_match_table = of_match_ptr(altera_uart_match), |
6b7d8f8b TK |
631 | }, |
632 | }; | |
633 | ||
634 | static int __init altera_uart_init(void) | |
635 | { | |
636 | int rc; | |
637 | ||
638 | rc = uart_register_driver(&altera_uart_driver); | |
639 | if (rc) | |
640 | return rc; | |
641 | rc = platform_driver_register(&altera_uart_platform_driver); | |
61bc6559 | 642 | if (rc) |
6b7d8f8b | 643 | uart_unregister_driver(&altera_uart_driver); |
61bc6559 | 644 | return rc; |
6b7d8f8b TK |
645 | } |
646 | ||
647 | static void __exit altera_uart_exit(void) | |
648 | { | |
649 | platform_driver_unregister(&altera_uart_platform_driver); | |
650 | uart_unregister_driver(&altera_uart_driver); | |
651 | } | |
652 | ||
653 | module_init(altera_uart_init); | |
654 | module_exit(altera_uart_exit); | |
655 | ||
656 | MODULE_DESCRIPTION("Altera UART driver"); | |
657 | MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); | |
658 | MODULE_LICENSE("GPL"); | |
659 | MODULE_ALIAS("platform:" DRV_NAME); | |
99793c66 | 660 | MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); |