Commit | Line | Data |
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d4ac42a5 KG |
1 | /* |
2 | * Driver for GRLIB serial ports (APBUART) | |
3 | * | |
4 | * Based on linux/drivers/serial/amba.c | |
5 | * | |
6 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
7 | * Copyright (C) 2003 Konrad Eisele <eiselekd@web.de> | |
8 | * Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB | |
9 | * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com> | |
10 | * Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB | |
11 | */ | |
12 | ||
13 | #if defined(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
14 | #define SUPPORT_SYSRQ | |
15 | #endif | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/tty.h> | |
19 | #include <linux/ioport.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/serial.h> | |
22 | #include <linux/console.h> | |
23 | #include <linux/sysrq.h> | |
24 | #include <linux/kthread.h> | |
25 | #include <linux/device.h> | |
26 | #include <linux/of.h> | |
27 | #include <linux/of_device.h> | |
ddaf1b27 | 28 | #include <linux/of_platform.h> |
f28f3313 | 29 | #include <linux/of_irq.h> |
d4ac42a5 KG |
30 | #include <linux/platform_device.h> |
31 | #include <linux/io.h> | |
32 | #include <linux/serial_core.h> | |
33 | #include <asm/irq.h> | |
d4ac42a5 KG |
34 | |
35 | #include "apbuart.h" | |
36 | ||
37 | #define SERIAL_APBUART_MAJOR TTY_MAJOR | |
38 | #define SERIAL_APBUART_MINOR 64 | |
39 | #define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */ | |
40 | ||
41 | static void apbuart_tx_chars(struct uart_port *port); | |
42 | ||
43 | static void apbuart_stop_tx(struct uart_port *port) | |
44 | { | |
45 | unsigned int cr; | |
46 | ||
47 | cr = UART_GET_CTRL(port); | |
48 | cr &= ~UART_CTRL_TI; | |
49 | UART_PUT_CTRL(port, cr); | |
50 | } | |
51 | ||
52 | static void apbuart_start_tx(struct uart_port *port) | |
53 | { | |
54 | unsigned int cr; | |
55 | ||
56 | cr = UART_GET_CTRL(port); | |
57 | cr |= UART_CTRL_TI; | |
58 | UART_PUT_CTRL(port, cr); | |
59 | ||
60 | if (UART_GET_STATUS(port) & UART_STATUS_THE) | |
61 | apbuart_tx_chars(port); | |
62 | } | |
63 | ||
64 | static void apbuart_stop_rx(struct uart_port *port) | |
65 | { | |
66 | unsigned int cr; | |
67 | ||
68 | cr = UART_GET_CTRL(port); | |
69 | cr &= ~(UART_CTRL_RI); | |
70 | UART_PUT_CTRL(port, cr); | |
71 | } | |
72 | ||
73 | static void apbuart_enable_ms(struct uart_port *port) | |
74 | { | |
75 | /* No modem status change interrupts for APBUART */ | |
76 | } | |
77 | ||
78 | static void apbuart_rx_chars(struct uart_port *port) | |
79 | { | |
80 | struct tty_struct *tty = port->state->port.tty; | |
81 | unsigned int status, ch, rsr, flag; | |
82 | unsigned int max_chars = port->fifosize; | |
83 | ||
84 | status = UART_GET_STATUS(port); | |
85 | ||
86 | while (UART_RX_DATA(status) && (max_chars--)) { | |
87 | ||
88 | ch = UART_GET_CHAR(port); | |
89 | flag = TTY_NORMAL; | |
90 | ||
91 | port->icount.rx++; | |
92 | ||
93 | rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX; | |
94 | UART_PUT_STATUS(port, 0); | |
95 | if (rsr & UART_STATUS_ERR) { | |
96 | ||
97 | if (rsr & UART_STATUS_BR) { | |
98 | rsr &= ~(UART_STATUS_FE | UART_STATUS_PE); | |
99 | port->icount.brk++; | |
100 | if (uart_handle_break(port)) | |
101 | goto ignore_char; | |
102 | } else if (rsr & UART_STATUS_PE) { | |
103 | port->icount.parity++; | |
104 | } else if (rsr & UART_STATUS_FE) { | |
105 | port->icount.frame++; | |
106 | } | |
107 | if (rsr & UART_STATUS_OE) | |
108 | port->icount.overrun++; | |
109 | ||
110 | rsr &= port->read_status_mask; | |
111 | ||
112 | if (rsr & UART_STATUS_PE) | |
113 | flag = TTY_PARITY; | |
114 | else if (rsr & UART_STATUS_FE) | |
115 | flag = TTY_FRAME; | |
116 | } | |
117 | ||
118 | if (uart_handle_sysrq_char(port, ch)) | |
119 | goto ignore_char; | |
120 | ||
121 | uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag); | |
122 | ||
123 | ||
124 | ignore_char: | |
125 | status = UART_GET_STATUS(port); | |
126 | } | |
127 | ||
128 | tty_flip_buffer_push(tty); | |
129 | } | |
130 | ||
131 | static void apbuart_tx_chars(struct uart_port *port) | |
132 | { | |
133 | struct circ_buf *xmit = &port->state->xmit; | |
134 | int count; | |
135 | ||
136 | if (port->x_char) { | |
137 | UART_PUT_CHAR(port, port->x_char); | |
138 | port->icount.tx++; | |
139 | port->x_char = 0; | |
140 | return; | |
141 | } | |
142 | ||
143 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
144 | apbuart_stop_tx(port); | |
145 | return; | |
146 | } | |
147 | ||
148 | /* amba: fill FIFO */ | |
149 | count = port->fifosize >> 1; | |
150 | do { | |
151 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | |
152 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
153 | port->icount.tx++; | |
154 | if (uart_circ_empty(xmit)) | |
155 | break; | |
156 | } while (--count > 0); | |
157 | ||
158 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
159 | uart_write_wakeup(port); | |
160 | ||
161 | if (uart_circ_empty(xmit)) | |
162 | apbuart_stop_tx(port); | |
163 | } | |
164 | ||
165 | static irqreturn_t apbuart_int(int irq, void *dev_id) | |
166 | { | |
167 | struct uart_port *port = dev_id; | |
168 | unsigned int status; | |
169 | ||
170 | spin_lock(&port->lock); | |
171 | ||
172 | status = UART_GET_STATUS(port); | |
173 | if (status & UART_STATUS_DR) | |
174 | apbuart_rx_chars(port); | |
175 | if (status & UART_STATUS_THE) | |
176 | apbuart_tx_chars(port); | |
177 | ||
178 | spin_unlock(&port->lock); | |
179 | ||
180 | return IRQ_HANDLED; | |
181 | } | |
182 | ||
183 | static unsigned int apbuart_tx_empty(struct uart_port *port) | |
184 | { | |
185 | unsigned int status = UART_GET_STATUS(port); | |
186 | return status & UART_STATUS_THE ? TIOCSER_TEMT : 0; | |
187 | } | |
188 | ||
189 | static unsigned int apbuart_get_mctrl(struct uart_port *port) | |
190 | { | |
191 | /* The GRLIB APBUART handles flow control in hardware */ | |
192 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
193 | } | |
194 | ||
195 | static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
196 | { | |
197 | /* The GRLIB APBUART handles flow control in hardware */ | |
198 | } | |
199 | ||
200 | static void apbuart_break_ctl(struct uart_port *port, int break_state) | |
201 | { | |
202 | /* We don't support sending break */ | |
203 | } | |
204 | ||
205 | static int apbuart_startup(struct uart_port *port) | |
206 | { | |
207 | int retval; | |
208 | unsigned int cr; | |
209 | ||
210 | /* Allocate the IRQ */ | |
211 | retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port); | |
212 | if (retval) | |
213 | return retval; | |
214 | ||
215 | /* Finally, enable interrupts */ | |
216 | cr = UART_GET_CTRL(port); | |
217 | UART_PUT_CTRL(port, | |
218 | cr | UART_CTRL_RE | UART_CTRL_TE | | |
219 | UART_CTRL_RI | UART_CTRL_TI); | |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
224 | static void apbuart_shutdown(struct uart_port *port) | |
225 | { | |
226 | unsigned int cr; | |
227 | ||
228 | /* disable all interrupts, disable the port */ | |
229 | cr = UART_GET_CTRL(port); | |
230 | UART_PUT_CTRL(port, | |
231 | cr & ~(UART_CTRL_RE | UART_CTRL_TE | | |
232 | UART_CTRL_RI | UART_CTRL_TI)); | |
233 | ||
234 | /* Free the interrupt */ | |
235 | free_irq(port->irq, port); | |
236 | } | |
237 | ||
238 | static void apbuart_set_termios(struct uart_port *port, | |
239 | struct ktermios *termios, struct ktermios *old) | |
240 | { | |
241 | unsigned int cr; | |
242 | unsigned long flags; | |
243 | unsigned int baud, quot; | |
244 | ||
245 | /* Ask the core to calculate the divisor for us. */ | |
246 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); | |
247 | if (baud == 0) | |
248 | panic("invalid baudrate %i\n", port->uartclk / 16); | |
249 | ||
250 | /* uart_get_divisor calc a *16 uart freq, apbuart is *8 */ | |
251 | quot = (uart_get_divisor(port, baud)) * 2; | |
252 | cr = UART_GET_CTRL(port); | |
253 | cr &= ~(UART_CTRL_PE | UART_CTRL_PS); | |
254 | ||
255 | if (termios->c_cflag & PARENB) { | |
256 | cr |= UART_CTRL_PE; | |
257 | if ((termios->c_cflag & PARODD)) | |
258 | cr |= UART_CTRL_PS; | |
259 | } | |
260 | ||
261 | /* Enable flow control. */ | |
262 | if (termios->c_cflag & CRTSCTS) | |
263 | cr |= UART_CTRL_FL; | |
264 | ||
265 | spin_lock_irqsave(&port->lock, flags); | |
266 | ||
267 | /* Update the per-port timeout. */ | |
268 | uart_update_timeout(port, termios->c_cflag, baud); | |
269 | ||
270 | port->read_status_mask = UART_STATUS_OE; | |
271 | if (termios->c_iflag & INPCK) | |
272 | port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
273 | ||
274 | /* Characters to ignore */ | |
275 | port->ignore_status_mask = 0; | |
276 | if (termios->c_iflag & IGNPAR) | |
277 | port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
278 | ||
279 | /* Ignore all characters if CREAD is not set. */ | |
280 | if ((termios->c_cflag & CREAD) == 0) | |
281 | port->ignore_status_mask |= UART_DUMMY_RSR_RX; | |
282 | ||
283 | /* Set baud rate */ | |
284 | quot -= 1; | |
285 | UART_PUT_SCAL(port, quot); | |
286 | UART_PUT_CTRL(port, cr); | |
287 | ||
288 | spin_unlock_irqrestore(&port->lock, flags); | |
289 | } | |
290 | ||
291 | static const char *apbuart_type(struct uart_port *port) | |
292 | { | |
293 | return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL; | |
294 | } | |
295 | ||
296 | static void apbuart_release_port(struct uart_port *port) | |
297 | { | |
298 | release_mem_region(port->mapbase, 0x100); | |
299 | } | |
300 | ||
301 | static int apbuart_request_port(struct uart_port *port) | |
302 | { | |
303 | return request_mem_region(port->mapbase, 0x100, "grlib-apbuart") | |
304 | != NULL ? 0 : -EBUSY; | |
305 | return 0; | |
306 | } | |
307 | ||
308 | /* Configure/autoconfigure the port */ | |
309 | static void apbuart_config_port(struct uart_port *port, int flags) | |
310 | { | |
311 | if (flags & UART_CONFIG_TYPE) { | |
312 | port->type = PORT_APBUART; | |
313 | apbuart_request_port(port); | |
314 | } | |
315 | } | |
316 | ||
317 | /* Verify the new serial_struct (for TIOCSSERIAL) */ | |
318 | static int apbuart_verify_port(struct uart_port *port, | |
319 | struct serial_struct *ser) | |
320 | { | |
321 | int ret = 0; | |
322 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART) | |
323 | ret = -EINVAL; | |
324 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
325 | ret = -EINVAL; | |
326 | if (ser->baud_base < 9600) | |
327 | ret = -EINVAL; | |
328 | return ret; | |
329 | } | |
330 | ||
331 | static struct uart_ops grlib_apbuart_ops = { | |
332 | .tx_empty = apbuart_tx_empty, | |
333 | .set_mctrl = apbuart_set_mctrl, | |
334 | .get_mctrl = apbuart_get_mctrl, | |
335 | .stop_tx = apbuart_stop_tx, | |
336 | .start_tx = apbuart_start_tx, | |
337 | .stop_rx = apbuart_stop_rx, | |
338 | .enable_ms = apbuart_enable_ms, | |
339 | .break_ctl = apbuart_break_ctl, | |
340 | .startup = apbuart_startup, | |
341 | .shutdown = apbuart_shutdown, | |
342 | .set_termios = apbuart_set_termios, | |
343 | .type = apbuart_type, | |
344 | .release_port = apbuart_release_port, | |
345 | .request_port = apbuart_request_port, | |
346 | .config_port = apbuart_config_port, | |
347 | .verify_port = apbuart_verify_port, | |
348 | }; | |
349 | ||
350 | static struct uart_port grlib_apbuart_ports[UART_NR]; | |
351 | static struct device_node *grlib_apbuart_nodes[UART_NR]; | |
352 | ||
353 | static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber) | |
354 | { | |
355 | int ctrl, loop = 0; | |
356 | int status; | |
357 | int fifosize; | |
358 | unsigned long flags; | |
359 | ||
360 | ctrl = UART_GET_CTRL(port); | |
361 | ||
362 | /* | |
363 | * Enable the transceiver and wait for it to be ready to send data. | |
364 | * Clear interrupts so that this process will not be externally | |
365 | * interrupted in the middle (which can cause the transceiver to | |
366 | * drain prematurely). | |
367 | */ | |
368 | ||
369 | local_irq_save(flags); | |
370 | ||
371 | UART_PUT_CTRL(port, ctrl | UART_CTRL_TE); | |
372 | ||
373 | while (!UART_TX_READY(UART_GET_STATUS(port))) | |
374 | loop++; | |
375 | ||
376 | /* | |
377 | * Disable the transceiver so data isn't actually sent during the | |
378 | * actual test. | |
379 | */ | |
380 | ||
381 | UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE)); | |
382 | ||
383 | fifosize = 1; | |
384 | UART_PUT_CHAR(port, 0); | |
385 | ||
386 | /* | |
387 | * So long as transmitting a character increments the tranceivier FIFO | |
388 | * length the FIFO must be at least that big. These bytes will | |
389 | * automatically drain off of the FIFO. | |
390 | */ | |
391 | ||
392 | status = UART_GET_STATUS(port); | |
393 | while (((status >> 20) & 0x3F) == fifosize) { | |
394 | fifosize++; | |
395 | UART_PUT_CHAR(port, 0); | |
396 | status = UART_GET_STATUS(port); | |
397 | } | |
398 | ||
399 | fifosize--; | |
400 | ||
401 | UART_PUT_CTRL(port, ctrl); | |
402 | local_irq_restore(flags); | |
403 | ||
404 | if (fifosize == 0) | |
405 | fifosize = 1; | |
406 | ||
407 | return fifosize; | |
408 | } | |
409 | ||
410 | static void apbuart_flush_fifo(struct uart_port *port) | |
411 | { | |
412 | int i; | |
413 | ||
414 | for (i = 0; i < port->fifosize; i++) | |
415 | UART_GET_CHAR(port); | |
416 | } | |
417 | ||
418 | ||
419 | /* ======================================================================== */ | |
420 | /* Console driver, if enabled */ | |
421 | /* ======================================================================== */ | |
422 | ||
423 | #ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE | |
424 | ||
425 | static void apbuart_console_putchar(struct uart_port *port, int ch) | |
426 | { | |
427 | unsigned int status; | |
428 | do { | |
429 | status = UART_GET_STATUS(port); | |
430 | } while (!UART_TX_READY(status)); | |
431 | UART_PUT_CHAR(port, ch); | |
432 | } | |
433 | ||
434 | static void | |
435 | apbuart_console_write(struct console *co, const char *s, unsigned int count) | |
436 | { | |
437 | struct uart_port *port = &grlib_apbuart_ports[co->index]; | |
438 | unsigned int status, old_cr, new_cr; | |
439 | ||
440 | /* First save the CR then disable the interrupts */ | |
441 | old_cr = UART_GET_CTRL(port); | |
442 | new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI); | |
443 | UART_PUT_CTRL(port, new_cr); | |
444 | ||
445 | uart_console_write(port, s, count, apbuart_console_putchar); | |
446 | ||
447 | /* | |
448 | * Finally, wait for transmitter to become empty | |
449 | * and restore the TCR | |
450 | */ | |
451 | do { | |
452 | status = UART_GET_STATUS(port); | |
453 | } while (!UART_TX_READY(status)); | |
454 | UART_PUT_CTRL(port, old_cr); | |
455 | } | |
456 | ||
457 | static void __init | |
458 | apbuart_console_get_options(struct uart_port *port, int *baud, | |
459 | int *parity, int *bits) | |
460 | { | |
461 | if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) { | |
462 | ||
463 | unsigned int quot, status; | |
464 | status = UART_GET_STATUS(port); | |
465 | ||
466 | *parity = 'n'; | |
467 | if (status & UART_CTRL_PE) { | |
468 | if ((status & UART_CTRL_PS) == 0) | |
469 | *parity = 'e'; | |
470 | else | |
471 | *parity = 'o'; | |
472 | } | |
473 | ||
474 | *bits = 8; | |
475 | quot = UART_GET_SCAL(port) / 8; | |
476 | *baud = port->uartclk / (16 * (quot + 1)); | |
477 | } | |
478 | } | |
479 | ||
480 | static int __init apbuart_console_setup(struct console *co, char *options) | |
481 | { | |
482 | struct uart_port *port; | |
483 | int baud = 38400; | |
484 | int bits = 8; | |
485 | int parity = 'n'; | |
486 | int flow = 'n'; | |
487 | ||
488 | pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n", | |
489 | co, co->index, options); | |
490 | ||
491 | /* | |
492 | * Check whether an invalid uart number has been specified, and | |
493 | * if so, search for the first available port that does have | |
494 | * console support. | |
495 | */ | |
496 | if (co->index >= grlib_apbuart_port_nr) | |
497 | co->index = 0; | |
498 | ||
499 | port = &grlib_apbuart_ports[co->index]; | |
500 | ||
501 | spin_lock_init(&port->lock); | |
502 | ||
503 | if (options) | |
504 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
505 | else | |
506 | apbuart_console_get_options(port, &baud, &parity, &bits); | |
507 | ||
508 | return uart_set_options(port, co, baud, parity, bits, flow); | |
509 | } | |
510 | ||
511 | static struct uart_driver grlib_apbuart_driver; | |
512 | ||
513 | static struct console grlib_apbuart_console = { | |
514 | .name = "ttyS", | |
515 | .write = apbuart_console_write, | |
516 | .device = uart_console_device, | |
517 | .setup = apbuart_console_setup, | |
518 | .flags = CON_PRINTBUFFER, | |
519 | .index = -1, | |
520 | .data = &grlib_apbuart_driver, | |
521 | }; | |
522 | ||
523 | ||
568389c2 | 524 | static int grlib_apbuart_configure(void); |
d4ac42a5 KG |
525 | |
526 | static int __init apbuart_console_init(void) | |
527 | { | |
568389c2 TG |
528 | if (grlib_apbuart_configure()) |
529 | return -ENODEV; | |
d4ac42a5 KG |
530 | register_console(&grlib_apbuart_console); |
531 | return 0; | |
532 | } | |
533 | ||
534 | console_initcall(apbuart_console_init); | |
535 | ||
536 | #define APBUART_CONSOLE (&grlib_apbuart_console) | |
537 | #else | |
538 | #define APBUART_CONSOLE NULL | |
539 | #endif | |
540 | ||
541 | static struct uart_driver grlib_apbuart_driver = { | |
542 | .owner = THIS_MODULE, | |
543 | .driver_name = "serial", | |
544 | .dev_name = "ttyS", | |
545 | .major = SERIAL_APBUART_MAJOR, | |
546 | .minor = SERIAL_APBUART_MINOR, | |
547 | .nr = UART_NR, | |
548 | .cons = APBUART_CONSOLE, | |
549 | }; | |
550 | ||
551 | ||
552 | /* ======================================================================== */ | |
553 | /* OF Platform Driver */ | |
554 | /* ======================================================================== */ | |
555 | ||
793218df | 556 | static int __devinit apbuart_probe(struct platform_device *op) |
d4ac42a5 | 557 | { |
10544f12 | 558 | int i; |
d4ac42a5 KG |
559 | struct uart_port *port = NULL; |
560 | ||
d4ac42a5 | 561 | for (i = 0; i < grlib_apbuart_port_nr; i++) { |
61c7a080 | 562 | if (op->dev.of_node == grlib_apbuart_nodes[i]) |
d4ac42a5 KG |
563 | break; |
564 | } | |
565 | ||
566 | port = &grlib_apbuart_ports[i]; | |
567 | port->dev = &op->dev; | |
10544f12 | 568 | port->irq = op->archdata.irqs[0]; |
d4ac42a5 KG |
569 | |
570 | uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port); | |
571 | ||
572 | apbuart_flush_fifo((struct uart_port *) port); | |
573 | ||
384a17b2 DM |
574 | printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n", |
575 | (unsigned long long) port->mapbase, port->irq); | |
d4ac42a5 | 576 | return 0; |
d4ac42a5 KG |
577 | } |
578 | ||
579 | static struct of_device_id __initdata apbuart_match[] = { | |
580 | { | |
581 | .name = "GAISLER_APBUART", | |
582 | }, | |
d89ddf0d DH |
583 | { |
584 | .name = "01_00c", | |
585 | }, | |
d4ac42a5 KG |
586 | {}, |
587 | }; | |
588 | ||
793218df | 589 | static struct platform_driver grlib_apbuart_of_driver = { |
d4ac42a5 KG |
590 | .probe = apbuart_probe, |
591 | .driver = { | |
4018294b GL |
592 | .owner = THIS_MODULE, |
593 | .name = "grlib-apbuart", | |
594 | .of_match_table = apbuart_match, | |
595 | }, | |
d4ac42a5 KG |
596 | }; |
597 | ||
598 | ||
35c64e5d | 599 | static int grlib_apbuart_configure(void) |
d4ac42a5 | 600 | { |
d1350098 | 601 | struct device_node *np, *rp; |
d1350098 | 602 | const u32 *prop; |
35c64e5d | 603 | int freq_khz, line = 0; |
d4ac42a5 KG |
604 | |
605 | /* Get bus frequency */ | |
4edd5ad0 | 606 | rp = of_find_node_by_path("/"); |
35c64e5d TG |
607 | if (!rp) |
608 | return -ENODEV; | |
d1350098 | 609 | rp = of_get_next_child(rp, NULL); |
35c64e5d TG |
610 | if (!rp) |
611 | return -ENODEV; | |
d1350098 | 612 | prop = of_get_property(rp, "clock-frequency", NULL); |
35c64e5d TG |
613 | if (!prop) |
614 | return -ENODEV; | |
d1350098 | 615 | freq_khz = *prop; |
d4ac42a5 | 616 | |
d4ac42a5 | 617 | for_each_matching_node(np, apbuart_match) { |
10544f12 | 618 | const int *ampopts; |
35c64e5d TG |
619 | const struct amba_prom_registers *regs; |
620 | struct uart_port *port; | |
621 | unsigned long addr; | |
d4ac42a5 | 622 | |
56b85f32 | 623 | ampopts = of_get_property(np, "ampopts", NULL); |
f28f3313 DH |
624 | if (ampopts && (*ampopts == 0)) |
625 | continue; /* Ignore if used by another OS instance */ | |
35c64e5d | 626 | regs = of_get_property(np, "reg", NULL); |
d4ac42a5 | 627 | |
10544f12 | 628 | if (!regs) |
56b85f32 | 629 | continue; |
d4ac42a5 KG |
630 | |
631 | grlib_apbuart_nodes[line] = np; | |
632 | ||
633 | addr = regs->phys_addr; | |
d4ac42a5 KG |
634 | |
635 | port = &grlib_apbuart_ports[line]; | |
636 | ||
637 | port->mapbase = addr; | |
638 | port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map)); | |
10544f12 | 639 | port->irq = 0; |
d4ac42a5 KG |
640 | port->iotype = UPIO_MEM; |
641 | port->ops = &grlib_apbuart_ops; | |
642 | port->flags = UPF_BOOT_AUTOCONF; | |
643 | port->line = line; | |
644 | port->uartclk = freq_khz * 1000; | |
645 | port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line); | |
646 | line++; | |
647 | ||
648 | /* We support maximum UART_NR uarts ... */ | |
649 | if (line == UART_NR) | |
650 | break; | |
d4ac42a5 KG |
651 | } |
652 | ||
d4ac42a5 | 653 | grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line; |
35c64e5d | 654 | return line ? 0 : -ENODEV; |
d4ac42a5 KG |
655 | } |
656 | ||
657 | static int __init grlib_apbuart_init(void) | |
658 | { | |
659 | int ret; | |
660 | ||
661 | /* Find all APBUARTS in device the tree and initialize their ports */ | |
35c64e5d TG |
662 | ret = grlib_apbuart_configure(); |
663 | if (ret) | |
664 | return ret; | |
d4ac42a5 KG |
665 | |
666 | printk(KERN_INFO "Serial: GRLIB APBUART driver\n"); | |
667 | ||
668 | ret = uart_register_driver(&grlib_apbuart_driver); | |
669 | ||
670 | if (ret) { | |
671 | printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", | |
672 | __FILE__, ret); | |
673 | return ret; | |
674 | } | |
675 | ||
793218df | 676 | ret = platform_driver_register(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
677 | if (ret) { |
678 | printk(KERN_ERR | |
793218df | 679 | "%s: platform_driver_register failed (%i)\n", |
d4ac42a5 KG |
680 | __FILE__, ret); |
681 | uart_unregister_driver(&grlib_apbuart_driver); | |
682 | return ret; | |
683 | } | |
684 | ||
685 | return ret; | |
686 | } | |
687 | ||
688 | static void __exit grlib_apbuart_exit(void) | |
689 | { | |
690 | int i; | |
691 | ||
692 | for (i = 0; i < grlib_apbuart_port_nr; i++) | |
693 | uart_remove_one_port(&grlib_apbuart_driver, | |
694 | &grlib_apbuart_ports[i]); | |
695 | ||
696 | uart_unregister_driver(&grlib_apbuart_driver); | |
793218df | 697 | platform_driver_unregister(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
698 | } |
699 | ||
700 | module_init(grlib_apbuart_init); | |
701 | module_exit(grlib_apbuart_exit); | |
702 | ||
703 | MODULE_AUTHOR("Aeroflex Gaisler AB"); | |
704 | MODULE_DESCRIPTION("GRLIB APBUART serial driver"); | |
705 | MODULE_VERSION("2.1"); | |
706 | MODULE_LICENSE("GPL"); |