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d57f341b GJ |
1 | /* |
2 | * Atheros AR933X SoC built-in UART driver | |
3 | * | |
4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | |
5 | * | |
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published | |
10 | * by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/console.h> | |
17 | #include <linux/sysrq.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/tty_flip.h> | |
22 | #include <linux/serial_core.h> | |
23 | #include <linux/serial.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/irq.h> | |
15ef17f6 | 27 | #include <linux/clk.h> |
d57f341b | 28 | |
2dff8ad9 GJ |
29 | #include <asm/div64.h> |
30 | ||
d57f341b | 31 | #include <asm/mach-ath79/ar933x_uart.h> |
d57f341b GJ |
32 | |
33 | #define DRIVER_NAME "ar933x-uart" | |
34 | ||
2dff8ad9 GJ |
35 | #define AR933X_UART_MAX_SCALE 0xff |
36 | #define AR933X_UART_MAX_STEP 0xffff | |
37 | ||
38 | #define AR933X_UART_MIN_BAUD 300 | |
39 | #define AR933X_UART_MAX_BAUD 3000000 | |
40 | ||
d57f341b GJ |
41 | #define AR933X_DUMMY_STATUS_RD 0x01 |
42 | ||
43 | static struct uart_driver ar933x_uart_driver; | |
44 | ||
45 | struct ar933x_uart_port { | |
46 | struct uart_port port; | |
47 | unsigned int ier; /* shadow Interrupt Enable Register */ | |
2dff8ad9 GJ |
48 | unsigned int min_baud; |
49 | unsigned int max_baud; | |
15ef17f6 | 50 | struct clk *clk; |
d57f341b GJ |
51 | }; |
52 | ||
12415535 GJ |
53 | static inline bool ar933x_uart_console_enabled(void) |
54 | { | |
55 | return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE); | |
56 | } | |
57 | ||
d57f341b GJ |
58 | static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, |
59 | int offset) | |
60 | { | |
61 | return readl(up->port.membase + offset); | |
62 | } | |
63 | ||
64 | static inline void ar933x_uart_write(struct ar933x_uart_port *up, | |
65 | int offset, unsigned int value) | |
66 | { | |
67 | writel(value, up->port.membase + offset); | |
68 | } | |
69 | ||
70 | static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, | |
71 | unsigned int offset, | |
72 | unsigned int mask, | |
73 | unsigned int val) | |
74 | { | |
75 | unsigned int t; | |
76 | ||
77 | t = ar933x_uart_read(up, offset); | |
78 | t &= ~mask; | |
79 | t |= val; | |
80 | ar933x_uart_write(up, offset, t); | |
81 | } | |
82 | ||
83 | static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, | |
84 | unsigned int offset, | |
85 | unsigned int val) | |
86 | { | |
87 | ar933x_uart_rmw(up, offset, 0, val); | |
88 | } | |
89 | ||
90 | static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, | |
91 | unsigned int offset, | |
92 | unsigned int val) | |
93 | { | |
94 | ar933x_uart_rmw(up, offset, val, 0); | |
95 | } | |
96 | ||
97 | static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) | |
98 | { | |
99 | up->ier |= AR933X_UART_INT_TX_EMPTY; | |
100 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
101 | } | |
102 | ||
103 | static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) | |
104 | { | |
105 | up->ier &= ~AR933X_UART_INT_TX_EMPTY; | |
106 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
107 | } | |
108 | ||
109 | static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) | |
110 | { | |
111 | unsigned int rdata; | |
112 | ||
113 | rdata = ch & AR933X_UART_DATA_TX_RX_MASK; | |
114 | rdata |= AR933X_UART_DATA_TX_CSR; | |
115 | ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); | |
116 | } | |
117 | ||
118 | static unsigned int ar933x_uart_tx_empty(struct uart_port *port) | |
119 | { | |
120 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
121 | unsigned long flags; | |
122 | unsigned int rdata; | |
123 | ||
124 | spin_lock_irqsave(&up->port.lock, flags); | |
125 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
126 | spin_unlock_irqrestore(&up->port.lock, flags); | |
127 | ||
128 | return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; | |
129 | } | |
130 | ||
131 | static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) | |
132 | { | |
133 | return TIOCM_CAR; | |
134 | } | |
135 | ||
136 | static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
137 | { | |
138 | } | |
139 | ||
140 | static void ar933x_uart_start_tx(struct uart_port *port) | |
141 | { | |
142 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
143 | ||
144 | ar933x_uart_start_tx_interrupt(up); | |
145 | } | |
146 | ||
147 | static void ar933x_uart_stop_tx(struct uart_port *port) | |
148 | { | |
149 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
150 | ||
151 | ar933x_uart_stop_tx_interrupt(up); | |
152 | } | |
153 | ||
154 | static void ar933x_uart_stop_rx(struct uart_port *port) | |
155 | { | |
156 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
157 | ||
158 | up->ier &= ~AR933X_UART_INT_RX_VALID; | |
159 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
160 | } | |
161 | ||
162 | static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) | |
163 | { | |
164 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
165 | unsigned long flags; | |
166 | ||
167 | spin_lock_irqsave(&up->port.lock, flags); | |
168 | if (break_state == -1) | |
169 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
170 | AR933X_UART_CS_TX_BREAK); | |
171 | else | |
172 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
173 | AR933X_UART_CS_TX_BREAK); | |
174 | spin_unlock_irqrestore(&up->port.lock, flags); | |
175 | } | |
176 | ||
177 | static void ar933x_uart_enable_ms(struct uart_port *port) | |
178 | { | |
179 | } | |
180 | ||
2dff8ad9 GJ |
181 | /* |
182 | * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) | |
183 | */ | |
184 | static unsigned long ar933x_uart_get_baud(unsigned int clk, | |
185 | unsigned int scale, | |
186 | unsigned int step) | |
187 | { | |
188 | u64 t; | |
189 | u32 div; | |
190 | ||
191 | div = (2 << 16) * (scale + 1); | |
192 | t = clk; | |
193 | t *= step; | |
194 | t += (div / 2); | |
195 | do_div(t, div); | |
196 | ||
197 | return t; | |
198 | } | |
199 | ||
200 | static void ar933x_uart_get_scale_step(unsigned int clk, | |
201 | unsigned int baud, | |
202 | unsigned int *scale, | |
203 | unsigned int *step) | |
204 | { | |
205 | unsigned int tscale; | |
206 | long min_diff; | |
207 | ||
208 | *scale = 0; | |
209 | *step = 0; | |
210 | ||
211 | min_diff = baud; | |
212 | for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { | |
213 | u64 tstep; | |
214 | int diff; | |
215 | ||
216 | tstep = baud * (tscale + 1); | |
217 | tstep *= (2 << 16); | |
218 | do_div(tstep, clk); | |
219 | ||
220 | if (tstep > AR933X_UART_MAX_STEP) | |
221 | break; | |
222 | ||
223 | diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); | |
224 | if (diff < min_diff) { | |
225 | min_diff = diff; | |
226 | *scale = tscale; | |
227 | *step = tstep; | |
228 | } | |
229 | } | |
230 | } | |
231 | ||
d57f341b GJ |
232 | static void ar933x_uart_set_termios(struct uart_port *port, |
233 | struct ktermios *new, | |
234 | struct ktermios *old) | |
235 | { | |
236 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
237 | unsigned int cs; | |
238 | unsigned long flags; | |
2dff8ad9 | 239 | unsigned int baud, scale, step; |
d57f341b GJ |
240 | |
241 | /* Only CS8 is supported */ | |
242 | new->c_cflag &= ~CSIZE; | |
243 | new->c_cflag |= CS8; | |
244 | ||
245 | /* Only one stop bit is supported */ | |
246 | new->c_cflag &= ~CSTOPB; | |
247 | ||
248 | cs = 0; | |
249 | if (new->c_cflag & PARENB) { | |
250 | if (!(new->c_cflag & PARODD)) | |
251 | cs |= AR933X_UART_CS_PARITY_EVEN; | |
252 | else | |
253 | cs |= AR933X_UART_CS_PARITY_ODD; | |
254 | } else { | |
255 | cs |= AR933X_UART_CS_PARITY_NONE; | |
256 | } | |
257 | ||
258 | /* Mark/space parity is not supported */ | |
259 | new->c_cflag &= ~CMSPAR; | |
260 | ||
2dff8ad9 GJ |
261 | baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); |
262 | ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); | |
d57f341b GJ |
263 | |
264 | /* | |
265 | * Ok, we're now changing the port state. Do it with | |
266 | * interrupts disabled. | |
267 | */ | |
268 | spin_lock_irqsave(&up->port.lock, flags); | |
269 | ||
2dff8ad9 GJ |
270 | /* disable the UART */ |
271 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
272 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); | |
273 | ||
d57f341b GJ |
274 | /* Update the per-port timeout. */ |
275 | uart_update_timeout(port, new->c_cflag, baud); | |
276 | ||
277 | up->port.ignore_status_mask = 0; | |
278 | ||
279 | /* ignore all characters if CREAD is not set */ | |
280 | if ((new->c_cflag & CREAD) == 0) | |
281 | up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; | |
282 | ||
283 | ar933x_uart_write(up, AR933X_UART_CLOCK_REG, | |
2dff8ad9 | 284 | scale << AR933X_UART_CLOCK_SCALE_S | step); |
d57f341b GJ |
285 | |
286 | /* setup configuration register */ | |
287 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); | |
288 | ||
289 | /* enable host interrupt */ | |
290 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
291 | AR933X_UART_CS_HOST_INT_EN); | |
292 | ||
2dff8ad9 GJ |
293 | /* reenable the UART */ |
294 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, | |
295 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, | |
296 | AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); | |
297 | ||
d57f341b GJ |
298 | spin_unlock_irqrestore(&up->port.lock, flags); |
299 | ||
300 | if (tty_termios_baud_rate(new)) | |
301 | tty_termios_encode_baud_rate(new, baud, baud); | |
302 | } | |
303 | ||
304 | static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) | |
305 | { | |
92a19f9c | 306 | struct tty_port *port = &up->port.state->port; |
d57f341b GJ |
307 | int max_count = 256; |
308 | ||
d57f341b GJ |
309 | do { |
310 | unsigned int rdata; | |
311 | unsigned char ch; | |
312 | ||
313 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
314 | if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) | |
315 | break; | |
316 | ||
317 | /* remove the character from the FIFO */ | |
318 | ar933x_uart_write(up, AR933X_UART_DATA_REG, | |
319 | AR933X_UART_DATA_RX_CSR); | |
320 | ||
d57f341b GJ |
321 | up->port.icount.rx++; |
322 | ch = rdata & AR933X_UART_DATA_TX_RX_MASK; | |
323 | ||
324 | if (uart_handle_sysrq_char(&up->port, ch)) | |
325 | continue; | |
326 | ||
327 | if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) | |
92a19f9c | 328 | tty_insert_flip_char(port, ch, TTY_NORMAL); |
d57f341b GJ |
329 | } while (max_count-- > 0); |
330 | ||
b16c8e3e | 331 | spin_unlock(&up->port.lock); |
2e124b4a | 332 | tty_flip_buffer_push(port); |
b16c8e3e | 333 | spin_lock(&up->port.lock); |
d57f341b GJ |
334 | } |
335 | ||
336 | static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) | |
337 | { | |
338 | struct circ_buf *xmit = &up->port.state->xmit; | |
339 | int count; | |
340 | ||
341 | if (uart_tx_stopped(&up->port)) | |
342 | return; | |
343 | ||
344 | count = up->port.fifosize; | |
345 | do { | |
346 | unsigned int rdata; | |
347 | ||
348 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
349 | if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) | |
350 | break; | |
351 | ||
352 | if (up->port.x_char) { | |
353 | ar933x_uart_putc(up, up->port.x_char); | |
354 | up->port.icount.tx++; | |
355 | up->port.x_char = 0; | |
356 | continue; | |
357 | } | |
358 | ||
359 | if (uart_circ_empty(xmit)) | |
360 | break; | |
361 | ||
362 | ar933x_uart_putc(up, xmit->buf[xmit->tail]); | |
363 | ||
364 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
365 | up->port.icount.tx++; | |
366 | } while (--count > 0); | |
367 | ||
368 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
369 | uart_write_wakeup(&up->port); | |
370 | ||
371 | if (!uart_circ_empty(xmit)) | |
372 | ar933x_uart_start_tx_interrupt(up); | |
373 | } | |
374 | ||
375 | static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) | |
376 | { | |
377 | struct ar933x_uart_port *up = dev_id; | |
378 | unsigned int status; | |
379 | ||
380 | status = ar933x_uart_read(up, AR933X_UART_CS_REG); | |
381 | if ((status & AR933X_UART_CS_HOST_INT) == 0) | |
382 | return IRQ_NONE; | |
383 | ||
384 | spin_lock(&up->port.lock); | |
385 | ||
386 | status = ar933x_uart_read(up, AR933X_UART_INT_REG); | |
387 | status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
388 | ||
389 | if (status & AR933X_UART_INT_RX_VALID) { | |
390 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
391 | AR933X_UART_INT_RX_VALID); | |
392 | ar933x_uart_rx_chars(up); | |
393 | } | |
394 | ||
395 | if (status & AR933X_UART_INT_TX_EMPTY) { | |
396 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
397 | AR933X_UART_INT_TX_EMPTY); | |
398 | ar933x_uart_stop_tx_interrupt(up); | |
399 | ar933x_uart_tx_chars(up); | |
400 | } | |
401 | ||
402 | spin_unlock(&up->port.lock); | |
403 | ||
404 | return IRQ_HANDLED; | |
405 | } | |
406 | ||
407 | static int ar933x_uart_startup(struct uart_port *port) | |
408 | { | |
409 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
410 | unsigned long flags; | |
411 | int ret; | |
412 | ||
413 | ret = request_irq(up->port.irq, ar933x_uart_interrupt, | |
414 | up->port.irqflags, dev_name(up->port.dev), up); | |
415 | if (ret) | |
416 | return ret; | |
417 | ||
418 | spin_lock_irqsave(&up->port.lock, flags); | |
419 | ||
420 | /* Enable HOST interrupts */ | |
421 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
422 | AR933X_UART_CS_HOST_INT_EN); | |
423 | ||
424 | /* Enable RX interrupts */ | |
425 | up->ier = AR933X_UART_INT_RX_VALID; | |
426 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
427 | ||
428 | spin_unlock_irqrestore(&up->port.lock, flags); | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
433 | static void ar933x_uart_shutdown(struct uart_port *port) | |
434 | { | |
435 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
436 | ||
437 | /* Disable all interrupts */ | |
438 | up->ier = 0; | |
439 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
440 | ||
441 | /* Disable break condition */ | |
442 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
443 | AR933X_UART_CS_TX_BREAK); | |
444 | ||
445 | free_irq(up->port.irq, up); | |
446 | } | |
447 | ||
448 | static const char *ar933x_uart_type(struct uart_port *port) | |
449 | { | |
450 | return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; | |
451 | } | |
452 | ||
453 | static void ar933x_uart_release_port(struct uart_port *port) | |
454 | { | |
455 | /* Nothing to release ... */ | |
456 | } | |
457 | ||
458 | static int ar933x_uart_request_port(struct uart_port *port) | |
459 | { | |
460 | /* UARTs always present */ | |
461 | return 0; | |
462 | } | |
463 | ||
464 | static void ar933x_uart_config_port(struct uart_port *port, int flags) | |
465 | { | |
466 | if (flags & UART_CONFIG_TYPE) | |
467 | port->type = PORT_AR933X; | |
468 | } | |
469 | ||
470 | static int ar933x_uart_verify_port(struct uart_port *port, | |
471 | struct serial_struct *ser) | |
472 | { | |
2dff8ad9 GJ |
473 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; |
474 | ||
d57f341b GJ |
475 | if (ser->type != PORT_UNKNOWN && |
476 | ser->type != PORT_AR933X) | |
477 | return -EINVAL; | |
478 | ||
479 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
480 | return -EINVAL; | |
481 | ||
2dff8ad9 GJ |
482 | if (ser->baud_base < up->min_baud || |
483 | ser->baud_base > up->max_baud) | |
d57f341b GJ |
484 | return -EINVAL; |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | static struct uart_ops ar933x_uart_ops = { | |
490 | .tx_empty = ar933x_uart_tx_empty, | |
491 | .set_mctrl = ar933x_uart_set_mctrl, | |
492 | .get_mctrl = ar933x_uart_get_mctrl, | |
493 | .stop_tx = ar933x_uart_stop_tx, | |
494 | .start_tx = ar933x_uart_start_tx, | |
495 | .stop_rx = ar933x_uart_stop_rx, | |
496 | .enable_ms = ar933x_uart_enable_ms, | |
497 | .break_ctl = ar933x_uart_break_ctl, | |
498 | .startup = ar933x_uart_startup, | |
499 | .shutdown = ar933x_uart_shutdown, | |
500 | .set_termios = ar933x_uart_set_termios, | |
501 | .type = ar933x_uart_type, | |
502 | .release_port = ar933x_uart_release_port, | |
503 | .request_port = ar933x_uart_request_port, | |
504 | .config_port = ar933x_uart_config_port, | |
505 | .verify_port = ar933x_uart_verify_port, | |
506 | }; | |
507 | ||
d57f341b GJ |
508 | static struct ar933x_uart_port * |
509 | ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; | |
510 | ||
511 | static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) | |
512 | { | |
513 | unsigned int status; | |
514 | unsigned int timeout = 60000; | |
515 | ||
516 | /* Wait up to 60ms for the character(s) to be sent. */ | |
517 | do { | |
518 | status = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
519 | if (--timeout == 0) | |
520 | break; | |
521 | udelay(1); | |
522 | } while ((status & AR933X_UART_DATA_TX_CSR) == 0); | |
523 | } | |
524 | ||
525 | static void ar933x_uart_console_putchar(struct uart_port *port, int ch) | |
526 | { | |
527 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
528 | ||
529 | ar933x_uart_wait_xmitr(up); | |
530 | ar933x_uart_putc(up, ch); | |
531 | } | |
532 | ||
533 | static void ar933x_uart_console_write(struct console *co, const char *s, | |
534 | unsigned int count) | |
535 | { | |
536 | struct ar933x_uart_port *up = ar933x_console_ports[co->index]; | |
537 | unsigned long flags; | |
538 | unsigned int int_en; | |
539 | int locked = 1; | |
540 | ||
541 | local_irq_save(flags); | |
542 | ||
543 | if (up->port.sysrq) | |
544 | locked = 0; | |
545 | else if (oops_in_progress) | |
546 | locked = spin_trylock(&up->port.lock); | |
547 | else | |
548 | spin_lock(&up->port.lock); | |
549 | ||
550 | /* | |
551 | * First save the IER then disable the interrupts | |
552 | */ | |
553 | int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
554 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); | |
555 | ||
556 | uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); | |
557 | ||
558 | /* | |
559 | * Finally, wait for transmitter to become empty | |
560 | * and restore the IER | |
561 | */ | |
562 | ar933x_uart_wait_xmitr(up); | |
563 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); | |
564 | ||
565 | ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); | |
566 | ||
567 | if (locked) | |
568 | spin_unlock(&up->port.lock); | |
569 | ||
570 | local_irq_restore(flags); | |
571 | } | |
572 | ||
573 | static int ar933x_uart_console_setup(struct console *co, char *options) | |
574 | { | |
575 | struct ar933x_uart_port *up; | |
576 | int baud = 115200; | |
577 | int bits = 8; | |
578 | int parity = 'n'; | |
579 | int flow = 'n'; | |
580 | ||
581 | if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) | |
582 | return -EINVAL; | |
583 | ||
584 | up = ar933x_console_ports[co->index]; | |
585 | if (!up) | |
586 | return -ENODEV; | |
587 | ||
588 | if (options) | |
589 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
590 | ||
591 | return uart_set_options(&up->port, co, baud, parity, bits, flow); | |
592 | } | |
593 | ||
594 | static struct console ar933x_uart_console = { | |
595 | .name = "ttyATH", | |
596 | .write = ar933x_uart_console_write, | |
597 | .device = uart_console_device, | |
598 | .setup = ar933x_uart_console_setup, | |
599 | .flags = CON_PRINTBUFFER, | |
600 | .index = -1, | |
601 | .data = &ar933x_uart_driver, | |
602 | }; | |
603 | ||
604 | static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) | |
605 | { | |
12415535 GJ |
606 | if (!ar933x_uart_console_enabled()) |
607 | return; | |
608 | ||
d57f341b GJ |
609 | ar933x_console_ports[up->port.line] = up; |
610 | } | |
611 | ||
d57f341b GJ |
612 | static struct uart_driver ar933x_uart_driver = { |
613 | .owner = THIS_MODULE, | |
614 | .driver_name = DRIVER_NAME, | |
615 | .dev_name = "ttyATH", | |
616 | .nr = CONFIG_SERIAL_AR933X_NR_UARTS, | |
12415535 | 617 | .cons = NULL, /* filled in runtime */ |
d57f341b GJ |
618 | }; |
619 | ||
9671f099 | 620 | static int ar933x_uart_probe(struct platform_device *pdev) |
d57f341b | 621 | { |
d57f341b GJ |
622 | struct ar933x_uart_port *up; |
623 | struct uart_port *port; | |
624 | struct resource *mem_res; | |
625 | struct resource *irq_res; | |
2dff8ad9 | 626 | unsigned int baud; |
d57f341b GJ |
627 | int id; |
628 | int ret; | |
629 | ||
d57f341b GJ |
630 | id = pdev->id; |
631 | if (id == -1) | |
632 | id = 0; | |
633 | ||
634 | if (id > CONFIG_SERIAL_AR933X_NR_UARTS) | |
635 | return -EINVAL; | |
636 | ||
d57f341b GJ |
637 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
638 | if (!irq_res) { | |
639 | dev_err(&pdev->dev, "no IRQ resource\n"); | |
640 | return -EINVAL; | |
641 | } | |
642 | ||
a324e4de GJ |
643 | up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), |
644 | GFP_KERNEL); | |
d57f341b GJ |
645 | if (!up) |
646 | return -ENOMEM; | |
647 | ||
15ef17f6 GJ |
648 | up->clk = devm_clk_get(&pdev->dev, "uart"); |
649 | if (IS_ERR(up->clk)) { | |
650 | dev_err(&pdev->dev, "unable to get UART clock\n"); | |
651 | return PTR_ERR(up->clk); | |
652 | } | |
653 | ||
d57f341b | 654 | port = &up->port; |
d57f341b | 655 | |
071eb0ff | 656 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
a324e4de GJ |
657 | port->membase = devm_ioremap_resource(&pdev->dev, mem_res); |
658 | if (IS_ERR(port->membase)) | |
659 | return PTR_ERR(port->membase); | |
d57f341b | 660 | |
15ef17f6 GJ |
661 | ret = clk_prepare_enable(up->clk); |
662 | if (ret) | |
663 | return ret; | |
664 | ||
665 | port->uartclk = clk_get_rate(up->clk); | |
666 | if (!port->uartclk) { | |
667 | ret = -EINVAL; | |
668 | goto err_disable_clk; | |
669 | } | |
670 | ||
a324e4de | 671 | port->mapbase = mem_res->start; |
d57f341b GJ |
672 | port->line = id; |
673 | port->irq = irq_res->start; | |
674 | port->dev = &pdev->dev; | |
675 | port->type = PORT_AR933X; | |
676 | port->iotype = UPIO_MEM32; | |
d57f341b GJ |
677 | |
678 | port->regshift = 2; | |
679 | port->fifosize = AR933X_UART_FIFO_SIZE; | |
680 | port->ops = &ar933x_uart_ops; | |
681 | ||
2dff8ad9 GJ |
682 | baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); |
683 | up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); | |
684 | ||
685 | baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); | |
686 | up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); | |
687 | ||
d57f341b GJ |
688 | ar933x_uart_add_console_port(up); |
689 | ||
690 | ret = uart_add_one_port(&ar933x_uart_driver, &up->port); | |
691 | if (ret) | |
15ef17f6 | 692 | goto err_disable_clk; |
d57f341b GJ |
693 | |
694 | platform_set_drvdata(pdev, up); | |
695 | return 0; | |
15ef17f6 GJ |
696 | |
697 | err_disable_clk: | |
698 | clk_disable_unprepare(up->clk); | |
699 | return ret; | |
d57f341b GJ |
700 | } |
701 | ||
ae8d8a14 | 702 | static int ar933x_uart_remove(struct platform_device *pdev) |
d57f341b GJ |
703 | { |
704 | struct ar933x_uart_port *up; | |
705 | ||
706 | up = platform_get_drvdata(pdev); | |
d57f341b | 707 | |
15ef17f6 | 708 | if (up) { |
d57f341b | 709 | uart_remove_one_port(&ar933x_uart_driver, &up->port); |
15ef17f6 GJ |
710 | clk_disable_unprepare(up->clk); |
711 | } | |
d57f341b GJ |
712 | |
713 | return 0; | |
714 | } | |
715 | ||
716 | static struct platform_driver ar933x_uart_platform_driver = { | |
717 | .probe = ar933x_uart_probe, | |
2d47b716 | 718 | .remove = ar933x_uart_remove, |
d57f341b GJ |
719 | .driver = { |
720 | .name = DRIVER_NAME, | |
721 | .owner = THIS_MODULE, | |
722 | }, | |
723 | }; | |
724 | ||
725 | static int __init ar933x_uart_init(void) | |
726 | { | |
727 | int ret; | |
728 | ||
12415535 GJ |
729 | if (ar933x_uart_console_enabled()) |
730 | ar933x_uart_driver.cons = &ar933x_uart_console; | |
731 | ||
d57f341b GJ |
732 | ret = uart_register_driver(&ar933x_uart_driver); |
733 | if (ret) | |
734 | goto err_out; | |
735 | ||
736 | ret = platform_driver_register(&ar933x_uart_platform_driver); | |
737 | if (ret) | |
738 | goto err_unregister_uart_driver; | |
739 | ||
740 | return 0; | |
741 | ||
742 | err_unregister_uart_driver: | |
743 | uart_unregister_driver(&ar933x_uart_driver); | |
744 | err_out: | |
745 | return ret; | |
746 | } | |
747 | ||
748 | static void __exit ar933x_uart_exit(void) | |
749 | { | |
750 | platform_driver_unregister(&ar933x_uart_platform_driver); | |
751 | uart_unregister_driver(&ar933x_uart_driver); | |
752 | } | |
753 | ||
754 | module_init(ar933x_uart_init); | |
755 | module_exit(ar933x_uart_exit); | |
756 | ||
757 | MODULE_DESCRIPTION("Atheros AR933X UART driver"); | |
758 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); | |
759 | MODULE_LICENSE("GPL v2"); | |
760 | MODULE_ALIAS("platform:" DRIVER_NAME); |