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d57f341b GJ |
1 | /* |
2 | * Atheros AR933X SoC built-in UART driver | |
3 | * | |
4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | |
5 | * | |
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published | |
10 | * by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/console.h> | |
17 | #include <linux/sysrq.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/platform_device.h> | |
dd910d98 GJ |
20 | #include <linux/of.h> |
21 | #include <linux/of_platform.h> | |
d57f341b GJ |
22 | #include <linux/tty.h> |
23 | #include <linux/tty_flip.h> | |
24 | #include <linux/serial_core.h> | |
25 | #include <linux/serial.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/io.h> | |
28 | #include <linux/irq.h> | |
15ef17f6 | 29 | #include <linux/clk.h> |
d57f341b | 30 | |
2dff8ad9 GJ |
31 | #include <asm/div64.h> |
32 | ||
d57f341b | 33 | #include <asm/mach-ath79/ar933x_uart.h> |
d57f341b GJ |
34 | |
35 | #define DRIVER_NAME "ar933x-uart" | |
36 | ||
2dff8ad9 GJ |
37 | #define AR933X_UART_MAX_SCALE 0xff |
38 | #define AR933X_UART_MAX_STEP 0xffff | |
39 | ||
40 | #define AR933X_UART_MIN_BAUD 300 | |
41 | #define AR933X_UART_MAX_BAUD 3000000 | |
42 | ||
d57f341b GJ |
43 | #define AR933X_DUMMY_STATUS_RD 0x01 |
44 | ||
45 | static struct uart_driver ar933x_uart_driver; | |
46 | ||
47 | struct ar933x_uart_port { | |
48 | struct uart_port port; | |
49 | unsigned int ier; /* shadow Interrupt Enable Register */ | |
2dff8ad9 GJ |
50 | unsigned int min_baud; |
51 | unsigned int max_baud; | |
15ef17f6 | 52 | struct clk *clk; |
d57f341b GJ |
53 | }; |
54 | ||
12415535 GJ |
55 | static inline bool ar933x_uart_console_enabled(void) |
56 | { | |
57 | return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE); | |
58 | } | |
59 | ||
d57f341b GJ |
60 | static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, |
61 | int offset) | |
62 | { | |
63 | return readl(up->port.membase + offset); | |
64 | } | |
65 | ||
66 | static inline void ar933x_uart_write(struct ar933x_uart_port *up, | |
67 | int offset, unsigned int value) | |
68 | { | |
69 | writel(value, up->port.membase + offset); | |
70 | } | |
71 | ||
72 | static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, | |
73 | unsigned int offset, | |
74 | unsigned int mask, | |
75 | unsigned int val) | |
76 | { | |
77 | unsigned int t; | |
78 | ||
79 | t = ar933x_uart_read(up, offset); | |
80 | t &= ~mask; | |
81 | t |= val; | |
82 | ar933x_uart_write(up, offset, t); | |
83 | } | |
84 | ||
85 | static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, | |
86 | unsigned int offset, | |
87 | unsigned int val) | |
88 | { | |
89 | ar933x_uart_rmw(up, offset, 0, val); | |
90 | } | |
91 | ||
92 | static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, | |
93 | unsigned int offset, | |
94 | unsigned int val) | |
95 | { | |
96 | ar933x_uart_rmw(up, offset, val, 0); | |
97 | } | |
98 | ||
99 | static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) | |
100 | { | |
101 | up->ier |= AR933X_UART_INT_TX_EMPTY; | |
102 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
103 | } | |
104 | ||
105 | static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) | |
106 | { | |
107 | up->ier &= ~AR933X_UART_INT_TX_EMPTY; | |
108 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
109 | } | |
110 | ||
111 | static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) | |
112 | { | |
113 | unsigned int rdata; | |
114 | ||
115 | rdata = ch & AR933X_UART_DATA_TX_RX_MASK; | |
116 | rdata |= AR933X_UART_DATA_TX_CSR; | |
117 | ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); | |
118 | } | |
119 | ||
120 | static unsigned int ar933x_uart_tx_empty(struct uart_port *port) | |
121 | { | |
122 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
123 | unsigned long flags; | |
124 | unsigned int rdata; | |
125 | ||
126 | spin_lock_irqsave(&up->port.lock, flags); | |
127 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
128 | spin_unlock_irqrestore(&up->port.lock, flags); | |
129 | ||
130 | return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; | |
131 | } | |
132 | ||
133 | static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) | |
134 | { | |
135 | return TIOCM_CAR; | |
136 | } | |
137 | ||
138 | static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
139 | { | |
140 | } | |
141 | ||
142 | static void ar933x_uart_start_tx(struct uart_port *port) | |
143 | { | |
144 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
145 | ||
146 | ar933x_uart_start_tx_interrupt(up); | |
147 | } | |
148 | ||
149 | static void ar933x_uart_stop_tx(struct uart_port *port) | |
150 | { | |
151 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
152 | ||
153 | ar933x_uart_stop_tx_interrupt(up); | |
154 | } | |
155 | ||
156 | static void ar933x_uart_stop_rx(struct uart_port *port) | |
157 | { | |
158 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
159 | ||
160 | up->ier &= ~AR933X_UART_INT_RX_VALID; | |
161 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
162 | } | |
163 | ||
164 | static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) | |
165 | { | |
166 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
167 | unsigned long flags; | |
168 | ||
169 | spin_lock_irqsave(&up->port.lock, flags); | |
170 | if (break_state == -1) | |
171 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
172 | AR933X_UART_CS_TX_BREAK); | |
173 | else | |
174 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
175 | AR933X_UART_CS_TX_BREAK); | |
176 | spin_unlock_irqrestore(&up->port.lock, flags); | |
177 | } | |
178 | ||
179 | static void ar933x_uart_enable_ms(struct uart_port *port) | |
180 | { | |
181 | } | |
182 | ||
2dff8ad9 GJ |
183 | /* |
184 | * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) | |
185 | */ | |
186 | static unsigned long ar933x_uart_get_baud(unsigned int clk, | |
187 | unsigned int scale, | |
188 | unsigned int step) | |
189 | { | |
190 | u64 t; | |
191 | u32 div; | |
192 | ||
193 | div = (2 << 16) * (scale + 1); | |
194 | t = clk; | |
195 | t *= step; | |
196 | t += (div / 2); | |
197 | do_div(t, div); | |
198 | ||
199 | return t; | |
200 | } | |
201 | ||
202 | static void ar933x_uart_get_scale_step(unsigned int clk, | |
203 | unsigned int baud, | |
204 | unsigned int *scale, | |
205 | unsigned int *step) | |
206 | { | |
207 | unsigned int tscale; | |
208 | long min_diff; | |
209 | ||
210 | *scale = 0; | |
211 | *step = 0; | |
212 | ||
213 | min_diff = baud; | |
214 | for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { | |
215 | u64 tstep; | |
216 | int diff; | |
217 | ||
218 | tstep = baud * (tscale + 1); | |
219 | tstep *= (2 << 16); | |
220 | do_div(tstep, clk); | |
221 | ||
222 | if (tstep > AR933X_UART_MAX_STEP) | |
223 | break; | |
224 | ||
225 | diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); | |
226 | if (diff < min_diff) { | |
227 | min_diff = diff; | |
228 | *scale = tscale; | |
229 | *step = tstep; | |
230 | } | |
231 | } | |
232 | } | |
233 | ||
d57f341b GJ |
234 | static void ar933x_uart_set_termios(struct uart_port *port, |
235 | struct ktermios *new, | |
236 | struct ktermios *old) | |
237 | { | |
238 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
239 | unsigned int cs; | |
240 | unsigned long flags; | |
2dff8ad9 | 241 | unsigned int baud, scale, step; |
d57f341b GJ |
242 | |
243 | /* Only CS8 is supported */ | |
244 | new->c_cflag &= ~CSIZE; | |
245 | new->c_cflag |= CS8; | |
246 | ||
247 | /* Only one stop bit is supported */ | |
248 | new->c_cflag &= ~CSTOPB; | |
249 | ||
250 | cs = 0; | |
251 | if (new->c_cflag & PARENB) { | |
252 | if (!(new->c_cflag & PARODD)) | |
253 | cs |= AR933X_UART_CS_PARITY_EVEN; | |
254 | else | |
255 | cs |= AR933X_UART_CS_PARITY_ODD; | |
256 | } else { | |
257 | cs |= AR933X_UART_CS_PARITY_NONE; | |
258 | } | |
259 | ||
260 | /* Mark/space parity is not supported */ | |
261 | new->c_cflag &= ~CMSPAR; | |
262 | ||
2dff8ad9 GJ |
263 | baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); |
264 | ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); | |
d57f341b GJ |
265 | |
266 | /* | |
267 | * Ok, we're now changing the port state. Do it with | |
268 | * interrupts disabled. | |
269 | */ | |
270 | spin_lock_irqsave(&up->port.lock, flags); | |
271 | ||
2dff8ad9 GJ |
272 | /* disable the UART */ |
273 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
274 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); | |
275 | ||
d57f341b GJ |
276 | /* Update the per-port timeout. */ |
277 | uart_update_timeout(port, new->c_cflag, baud); | |
278 | ||
279 | up->port.ignore_status_mask = 0; | |
280 | ||
281 | /* ignore all characters if CREAD is not set */ | |
282 | if ((new->c_cflag & CREAD) == 0) | |
283 | up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; | |
284 | ||
285 | ar933x_uart_write(up, AR933X_UART_CLOCK_REG, | |
2dff8ad9 | 286 | scale << AR933X_UART_CLOCK_SCALE_S | step); |
d57f341b GJ |
287 | |
288 | /* setup configuration register */ | |
289 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); | |
290 | ||
291 | /* enable host interrupt */ | |
292 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
293 | AR933X_UART_CS_HOST_INT_EN); | |
294 | ||
2dff8ad9 GJ |
295 | /* reenable the UART */ |
296 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, | |
297 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, | |
298 | AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); | |
299 | ||
d57f341b GJ |
300 | spin_unlock_irqrestore(&up->port.lock, flags); |
301 | ||
302 | if (tty_termios_baud_rate(new)) | |
303 | tty_termios_encode_baud_rate(new, baud, baud); | |
304 | } | |
305 | ||
306 | static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) | |
307 | { | |
92a19f9c | 308 | struct tty_port *port = &up->port.state->port; |
d57f341b GJ |
309 | int max_count = 256; |
310 | ||
d57f341b GJ |
311 | do { |
312 | unsigned int rdata; | |
313 | unsigned char ch; | |
314 | ||
315 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
316 | if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) | |
317 | break; | |
318 | ||
319 | /* remove the character from the FIFO */ | |
320 | ar933x_uart_write(up, AR933X_UART_DATA_REG, | |
321 | AR933X_UART_DATA_RX_CSR); | |
322 | ||
d57f341b GJ |
323 | up->port.icount.rx++; |
324 | ch = rdata & AR933X_UART_DATA_TX_RX_MASK; | |
325 | ||
326 | if (uart_handle_sysrq_char(&up->port, ch)) | |
327 | continue; | |
328 | ||
329 | if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) | |
92a19f9c | 330 | tty_insert_flip_char(port, ch, TTY_NORMAL); |
d57f341b GJ |
331 | } while (max_count-- > 0); |
332 | ||
b16c8e3e | 333 | spin_unlock(&up->port.lock); |
2e124b4a | 334 | tty_flip_buffer_push(port); |
b16c8e3e | 335 | spin_lock(&up->port.lock); |
d57f341b GJ |
336 | } |
337 | ||
338 | static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) | |
339 | { | |
340 | struct circ_buf *xmit = &up->port.state->xmit; | |
341 | int count; | |
342 | ||
343 | if (uart_tx_stopped(&up->port)) | |
344 | return; | |
345 | ||
346 | count = up->port.fifosize; | |
347 | do { | |
348 | unsigned int rdata; | |
349 | ||
350 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
351 | if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) | |
352 | break; | |
353 | ||
354 | if (up->port.x_char) { | |
355 | ar933x_uart_putc(up, up->port.x_char); | |
356 | up->port.icount.tx++; | |
357 | up->port.x_char = 0; | |
358 | continue; | |
359 | } | |
360 | ||
361 | if (uart_circ_empty(xmit)) | |
362 | break; | |
363 | ||
364 | ar933x_uart_putc(up, xmit->buf[xmit->tail]); | |
365 | ||
366 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
367 | up->port.icount.tx++; | |
368 | } while (--count > 0); | |
369 | ||
370 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
371 | uart_write_wakeup(&up->port); | |
372 | ||
373 | if (!uart_circ_empty(xmit)) | |
374 | ar933x_uart_start_tx_interrupt(up); | |
375 | } | |
376 | ||
377 | static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) | |
378 | { | |
379 | struct ar933x_uart_port *up = dev_id; | |
380 | unsigned int status; | |
381 | ||
382 | status = ar933x_uart_read(up, AR933X_UART_CS_REG); | |
383 | if ((status & AR933X_UART_CS_HOST_INT) == 0) | |
384 | return IRQ_NONE; | |
385 | ||
386 | spin_lock(&up->port.lock); | |
387 | ||
388 | status = ar933x_uart_read(up, AR933X_UART_INT_REG); | |
389 | status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
390 | ||
391 | if (status & AR933X_UART_INT_RX_VALID) { | |
392 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
393 | AR933X_UART_INT_RX_VALID); | |
394 | ar933x_uart_rx_chars(up); | |
395 | } | |
396 | ||
397 | if (status & AR933X_UART_INT_TX_EMPTY) { | |
398 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
399 | AR933X_UART_INT_TX_EMPTY); | |
400 | ar933x_uart_stop_tx_interrupt(up); | |
401 | ar933x_uart_tx_chars(up); | |
402 | } | |
403 | ||
404 | spin_unlock(&up->port.lock); | |
405 | ||
406 | return IRQ_HANDLED; | |
407 | } | |
408 | ||
409 | static int ar933x_uart_startup(struct uart_port *port) | |
410 | { | |
411 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
412 | unsigned long flags; | |
413 | int ret; | |
414 | ||
415 | ret = request_irq(up->port.irq, ar933x_uart_interrupt, | |
416 | up->port.irqflags, dev_name(up->port.dev), up); | |
417 | if (ret) | |
418 | return ret; | |
419 | ||
420 | spin_lock_irqsave(&up->port.lock, flags); | |
421 | ||
422 | /* Enable HOST interrupts */ | |
423 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
424 | AR933X_UART_CS_HOST_INT_EN); | |
425 | ||
426 | /* Enable RX interrupts */ | |
427 | up->ier = AR933X_UART_INT_RX_VALID; | |
428 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
429 | ||
430 | spin_unlock_irqrestore(&up->port.lock, flags); | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | static void ar933x_uart_shutdown(struct uart_port *port) | |
436 | { | |
437 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
438 | ||
439 | /* Disable all interrupts */ | |
440 | up->ier = 0; | |
441 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
442 | ||
443 | /* Disable break condition */ | |
444 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
445 | AR933X_UART_CS_TX_BREAK); | |
446 | ||
447 | free_irq(up->port.irq, up); | |
448 | } | |
449 | ||
450 | static const char *ar933x_uart_type(struct uart_port *port) | |
451 | { | |
452 | return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; | |
453 | } | |
454 | ||
455 | static void ar933x_uart_release_port(struct uart_port *port) | |
456 | { | |
457 | /* Nothing to release ... */ | |
458 | } | |
459 | ||
460 | static int ar933x_uart_request_port(struct uart_port *port) | |
461 | { | |
462 | /* UARTs always present */ | |
463 | return 0; | |
464 | } | |
465 | ||
466 | static void ar933x_uart_config_port(struct uart_port *port, int flags) | |
467 | { | |
468 | if (flags & UART_CONFIG_TYPE) | |
469 | port->type = PORT_AR933X; | |
470 | } | |
471 | ||
472 | static int ar933x_uart_verify_port(struct uart_port *port, | |
473 | struct serial_struct *ser) | |
474 | { | |
2dff8ad9 GJ |
475 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; |
476 | ||
d57f341b GJ |
477 | if (ser->type != PORT_UNKNOWN && |
478 | ser->type != PORT_AR933X) | |
479 | return -EINVAL; | |
480 | ||
481 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
482 | return -EINVAL; | |
483 | ||
2dff8ad9 GJ |
484 | if (ser->baud_base < up->min_baud || |
485 | ser->baud_base > up->max_baud) | |
d57f341b GJ |
486 | return -EINVAL; |
487 | ||
488 | return 0; | |
489 | } | |
490 | ||
491 | static struct uart_ops ar933x_uart_ops = { | |
492 | .tx_empty = ar933x_uart_tx_empty, | |
493 | .set_mctrl = ar933x_uart_set_mctrl, | |
494 | .get_mctrl = ar933x_uart_get_mctrl, | |
495 | .stop_tx = ar933x_uart_stop_tx, | |
496 | .start_tx = ar933x_uart_start_tx, | |
497 | .stop_rx = ar933x_uart_stop_rx, | |
498 | .enable_ms = ar933x_uart_enable_ms, | |
499 | .break_ctl = ar933x_uart_break_ctl, | |
500 | .startup = ar933x_uart_startup, | |
501 | .shutdown = ar933x_uart_shutdown, | |
502 | .set_termios = ar933x_uart_set_termios, | |
503 | .type = ar933x_uart_type, | |
504 | .release_port = ar933x_uart_release_port, | |
505 | .request_port = ar933x_uart_request_port, | |
506 | .config_port = ar933x_uart_config_port, | |
507 | .verify_port = ar933x_uart_verify_port, | |
508 | }; | |
509 | ||
d57f341b GJ |
510 | static struct ar933x_uart_port * |
511 | ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; | |
512 | ||
513 | static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) | |
514 | { | |
515 | unsigned int status; | |
516 | unsigned int timeout = 60000; | |
517 | ||
518 | /* Wait up to 60ms for the character(s) to be sent. */ | |
519 | do { | |
520 | status = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
521 | if (--timeout == 0) | |
522 | break; | |
523 | udelay(1); | |
524 | } while ((status & AR933X_UART_DATA_TX_CSR) == 0); | |
525 | } | |
526 | ||
527 | static void ar933x_uart_console_putchar(struct uart_port *port, int ch) | |
528 | { | |
529 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
530 | ||
531 | ar933x_uart_wait_xmitr(up); | |
532 | ar933x_uart_putc(up, ch); | |
533 | } | |
534 | ||
535 | static void ar933x_uart_console_write(struct console *co, const char *s, | |
536 | unsigned int count) | |
537 | { | |
538 | struct ar933x_uart_port *up = ar933x_console_ports[co->index]; | |
539 | unsigned long flags; | |
540 | unsigned int int_en; | |
541 | int locked = 1; | |
542 | ||
543 | local_irq_save(flags); | |
544 | ||
545 | if (up->port.sysrq) | |
546 | locked = 0; | |
547 | else if (oops_in_progress) | |
548 | locked = spin_trylock(&up->port.lock); | |
549 | else | |
550 | spin_lock(&up->port.lock); | |
551 | ||
552 | /* | |
553 | * First save the IER then disable the interrupts | |
554 | */ | |
555 | int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
556 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); | |
557 | ||
558 | uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); | |
559 | ||
560 | /* | |
561 | * Finally, wait for transmitter to become empty | |
562 | * and restore the IER | |
563 | */ | |
564 | ar933x_uart_wait_xmitr(up); | |
565 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); | |
566 | ||
567 | ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); | |
568 | ||
569 | if (locked) | |
570 | spin_unlock(&up->port.lock); | |
571 | ||
572 | local_irq_restore(flags); | |
573 | } | |
574 | ||
575 | static int ar933x_uart_console_setup(struct console *co, char *options) | |
576 | { | |
577 | struct ar933x_uart_port *up; | |
578 | int baud = 115200; | |
579 | int bits = 8; | |
580 | int parity = 'n'; | |
581 | int flow = 'n'; | |
582 | ||
583 | if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) | |
584 | return -EINVAL; | |
585 | ||
586 | up = ar933x_console_ports[co->index]; | |
587 | if (!up) | |
588 | return -ENODEV; | |
589 | ||
590 | if (options) | |
591 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
592 | ||
593 | return uart_set_options(&up->port, co, baud, parity, bits, flow); | |
594 | } | |
595 | ||
596 | static struct console ar933x_uart_console = { | |
597 | .name = "ttyATH", | |
598 | .write = ar933x_uart_console_write, | |
599 | .device = uart_console_device, | |
600 | .setup = ar933x_uart_console_setup, | |
601 | .flags = CON_PRINTBUFFER, | |
602 | .index = -1, | |
603 | .data = &ar933x_uart_driver, | |
604 | }; | |
605 | ||
606 | static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) | |
607 | { | |
12415535 GJ |
608 | if (!ar933x_uart_console_enabled()) |
609 | return; | |
610 | ||
d57f341b GJ |
611 | ar933x_console_ports[up->port.line] = up; |
612 | } | |
613 | ||
d57f341b GJ |
614 | static struct uart_driver ar933x_uart_driver = { |
615 | .owner = THIS_MODULE, | |
616 | .driver_name = DRIVER_NAME, | |
617 | .dev_name = "ttyATH", | |
618 | .nr = CONFIG_SERIAL_AR933X_NR_UARTS, | |
12415535 | 619 | .cons = NULL, /* filled in runtime */ |
d57f341b GJ |
620 | }; |
621 | ||
9671f099 | 622 | static int ar933x_uart_probe(struct platform_device *pdev) |
d57f341b | 623 | { |
d57f341b GJ |
624 | struct ar933x_uart_port *up; |
625 | struct uart_port *port; | |
626 | struct resource *mem_res; | |
627 | struct resource *irq_res; | |
dd910d98 | 628 | struct device_node *np; |
2dff8ad9 | 629 | unsigned int baud; |
d57f341b GJ |
630 | int id; |
631 | int ret; | |
632 | ||
dd910d98 GJ |
633 | np = pdev->dev.of_node; |
634 | if (config_enabled(CONFIG_OF) && np) { | |
635 | id = of_alias_get_id(np, "serial"); | |
636 | if (id < 0) { | |
637 | dev_err(&pdev->dev, "unable to get alias id, err=%d\n", | |
638 | id); | |
639 | return id; | |
640 | } | |
641 | } else { | |
642 | id = pdev->id; | |
643 | if (id == -1) | |
644 | id = 0; | |
645 | } | |
d57f341b GJ |
646 | |
647 | if (id > CONFIG_SERIAL_AR933X_NR_UARTS) | |
648 | return -EINVAL; | |
649 | ||
d57f341b GJ |
650 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
651 | if (!irq_res) { | |
652 | dev_err(&pdev->dev, "no IRQ resource\n"); | |
653 | return -EINVAL; | |
654 | } | |
655 | ||
a324e4de GJ |
656 | up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), |
657 | GFP_KERNEL); | |
d57f341b GJ |
658 | if (!up) |
659 | return -ENOMEM; | |
660 | ||
15ef17f6 GJ |
661 | up->clk = devm_clk_get(&pdev->dev, "uart"); |
662 | if (IS_ERR(up->clk)) { | |
663 | dev_err(&pdev->dev, "unable to get UART clock\n"); | |
664 | return PTR_ERR(up->clk); | |
665 | } | |
666 | ||
d57f341b | 667 | port = &up->port; |
d57f341b | 668 | |
071eb0ff | 669 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
a324e4de GJ |
670 | port->membase = devm_ioremap_resource(&pdev->dev, mem_res); |
671 | if (IS_ERR(port->membase)) | |
672 | return PTR_ERR(port->membase); | |
d57f341b | 673 | |
15ef17f6 GJ |
674 | ret = clk_prepare_enable(up->clk); |
675 | if (ret) | |
676 | return ret; | |
677 | ||
678 | port->uartclk = clk_get_rate(up->clk); | |
679 | if (!port->uartclk) { | |
680 | ret = -EINVAL; | |
681 | goto err_disable_clk; | |
682 | } | |
683 | ||
a324e4de | 684 | port->mapbase = mem_res->start; |
d57f341b GJ |
685 | port->line = id; |
686 | port->irq = irq_res->start; | |
687 | port->dev = &pdev->dev; | |
688 | port->type = PORT_AR933X; | |
689 | port->iotype = UPIO_MEM32; | |
d57f341b GJ |
690 | |
691 | port->regshift = 2; | |
692 | port->fifosize = AR933X_UART_FIFO_SIZE; | |
693 | port->ops = &ar933x_uart_ops; | |
694 | ||
2dff8ad9 GJ |
695 | baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); |
696 | up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); | |
697 | ||
698 | baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); | |
699 | up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); | |
700 | ||
d57f341b GJ |
701 | ar933x_uart_add_console_port(up); |
702 | ||
703 | ret = uart_add_one_port(&ar933x_uart_driver, &up->port); | |
704 | if (ret) | |
15ef17f6 | 705 | goto err_disable_clk; |
d57f341b GJ |
706 | |
707 | platform_set_drvdata(pdev, up); | |
708 | return 0; | |
15ef17f6 GJ |
709 | |
710 | err_disable_clk: | |
711 | clk_disable_unprepare(up->clk); | |
712 | return ret; | |
d57f341b GJ |
713 | } |
714 | ||
ae8d8a14 | 715 | static int ar933x_uart_remove(struct platform_device *pdev) |
d57f341b GJ |
716 | { |
717 | struct ar933x_uart_port *up; | |
718 | ||
719 | up = platform_get_drvdata(pdev); | |
d57f341b | 720 | |
15ef17f6 | 721 | if (up) { |
d57f341b | 722 | uart_remove_one_port(&ar933x_uart_driver, &up->port); |
15ef17f6 GJ |
723 | clk_disable_unprepare(up->clk); |
724 | } | |
d57f341b GJ |
725 | |
726 | return 0; | |
727 | } | |
728 | ||
dd910d98 GJ |
729 | #ifdef CONFIG_OF |
730 | static const struct of_device_id ar933x_uart_of_ids[] = { | |
731 | { .compatible = "qca,ar9330-uart" }, | |
732 | {}, | |
733 | }; | |
734 | MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids); | |
735 | #endif | |
736 | ||
d57f341b GJ |
737 | static struct platform_driver ar933x_uart_platform_driver = { |
738 | .probe = ar933x_uart_probe, | |
2d47b716 | 739 | .remove = ar933x_uart_remove, |
d57f341b GJ |
740 | .driver = { |
741 | .name = DRIVER_NAME, | |
742 | .owner = THIS_MODULE, | |
dd910d98 | 743 | .of_match_table = of_match_ptr(ar933x_uart_of_ids), |
d57f341b GJ |
744 | }, |
745 | }; | |
746 | ||
747 | static int __init ar933x_uart_init(void) | |
748 | { | |
749 | int ret; | |
750 | ||
12415535 GJ |
751 | if (ar933x_uart_console_enabled()) |
752 | ar933x_uart_driver.cons = &ar933x_uart_console; | |
753 | ||
d57f341b GJ |
754 | ret = uart_register_driver(&ar933x_uart_driver); |
755 | if (ret) | |
756 | goto err_out; | |
757 | ||
758 | ret = platform_driver_register(&ar933x_uart_platform_driver); | |
759 | if (ret) | |
760 | goto err_unregister_uart_driver; | |
761 | ||
762 | return 0; | |
763 | ||
764 | err_unregister_uart_driver: | |
765 | uart_unregister_driver(&ar933x_uart_driver); | |
766 | err_out: | |
767 | return ret; | |
768 | } | |
769 | ||
770 | static void __exit ar933x_uart_exit(void) | |
771 | { | |
772 | platform_driver_unregister(&ar933x_uart_platform_driver); | |
773 | uart_unregister_driver(&ar933x_uart_driver); | |
774 | } | |
775 | ||
776 | module_init(ar933x_uart_init); | |
777 | module_exit(ar933x_uart_exit); | |
778 | ||
779 | MODULE_DESCRIPTION("Atheros AR933X UART driver"); | |
780 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); | |
781 | MODULE_LICENSE("GPL v2"); | |
782 | MODULE_ALIAS("platform:" DRIVER_NAME); |