[deliverable/linux.git] / drivers / tty / serial / of_serial.c

/*
 *  Serial Port driver for Open Firmware platform devices
 *
 *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_serial.h>
#include <linux/of_platform.h>
#include <linux/nwpserial.h>

struct of_serial_info {
	int type;
	int line;
};

#ifdef CONFIG_ARCH_TEGRA
void tegra_serial_handle_break(struct uart_port *p)
{
	unsigned int status, tmout = 10000;

	do {
		status = p->serial_in(p, UART_LSR);
		if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
			status = p->serial_in(p, UART_RX);
		else
			break;
		if (--tmout == 0)
			break;
		udelay(1);
	} while (1);
}
/* FIXME remove this export when tegra finishes conversion to open firmware */
EXPORT_SYMBOL_GPL(tegra_serial_handle_break);
#endif

/*
 * Fill a struct uart_port for a given device node
 */
static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
					int type, struct uart_port *port)
{
	struct resource resource;
	struct device_node *np = ofdev->dev.of_node;
	u32 clk, spd, prop;
	int ret;

	memset(port, 0, sizeof *port);
	if (of_property_read_u32(np, "clock-frequency", &clk)) {
		dev_warn(&ofdev->dev, "no clock-frequency property set\n");
		return -ENODEV;
	}
	/* If current-speed was set, then try not to change it. */
	if (of_property_read_u32(np, "current-speed", &spd) == 0)
		port->custom_divisor = clk / (16 * spd);

	ret = of_address_to_resource(np, 0, &resource);
	if (ret) {
		dev_warn(&ofdev->dev, "invalid address\n");
		return ret;
	}

	spin_lock_init(&port->lock);
	port->mapbase = resource.start;

	/* Check for shifted address mapping */
	if (of_property_read_u32(np, "reg-offset", &prop) == 0)
		port->mapbase += prop;

	/* Check for registers offset within the devices address range */
	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
		port->regshift = prop;

	port->irq = irq_of_parse_and_map(np, 0);
	port->iotype = UPIO_MEM;
	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
		switch (prop) {
		case 1:
			port->iotype = UPIO_MEM;
			break;
		case 4:
			port->iotype = UPIO_MEM32;
			break;
		default:
			dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
				 prop);
			return -EINVAL;
		}
	}

	port->type = type;
	port->uartclk = clk;
	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
		| UPF_FIXED_PORT | UPF_FIXED_TYPE;
	port->dev = &ofdev->dev;

	if (type == PORT_TEGRA)
		port->handle_break = tegra_serial_handle_break;

	return 0;
}

/*
 * Try to register a serial port
 */
static struct of_device_id of_platform_serial_table[];
static int __devinit of_platform_serial_probe(struct platform_device *ofdev)
{
	const struct of_device_id *match;
	struct of_serial_info *info;
	struct uart_port port;
	int port_type;
	int ret;

	match = of_match_device(of_platform_serial_table, &ofdev->dev);
	if (!match)
		return -EINVAL;

	if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
		return -EBUSY;

	info = kmalloc(sizeof(*info), GFP_KERNEL);
	if (info == NULL)
		return -ENOMEM;

	port_type = (unsigned long)match->data;
	ret = of_platform_serial_setup(ofdev, port_type, &port);
	if (ret)
		goto out;

	switch (port_type) {
#ifdef CONFIG_SERIAL_8250
	case PORT_8250 ... PORT_MAX_8250:
		ret = serial8250_register_port(&port);
		break;
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	case PORT_NWPSERIAL:
		ret = nwpserial_register_port(&port);
		break;
#endif
	default:
		/* need to add code for these */
	case PORT_UNKNOWN:
		dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
		ret = -ENODEV;
		break;
	}
	if (ret < 0)
		goto out;

	info->type = port_type;
	info->line = ret;
	dev_set_drvdata(&ofdev->dev, info);
	return 0;
out:
	kfree(info);
	irq_dispose_mapping(port.irq);
	return ret;
}

/*
 * Release a line
 */
static int of_platform_serial_remove(struct platform_device *ofdev)
{
	struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
	switch (info->type) {
#ifdef CONFIG_SERIAL_8250
	case PORT_8250 ... PORT_MAX_8250:
		serial8250_unregister_port(info->line);
		break;
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	case PORT_NWPSERIAL:
		nwpserial_unregister_port(info->line);
		break;
#endif
	default:
		/* need to add code for these */
		break;
	}
	kfree(info);
	return 0;
}

/*
 * A few common types, add more as needed.
 */
static struct of_device_id __devinitdata of_platform_serial_table[] = {
	{ .compatible = "ns8250",   .data = (void *)PORT_8250, },
	{ .compatible = "ns16450",  .data = (void *)PORT_16450, },
	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
	{ .compatible = "ns16550",  .data = (void *)PORT_16550, },
	{ .compatible = "ns16750",  .data = (void *)PORT_16750, },
	{ .compatible = "ns16850",  .data = (void *)PORT_16850, },
	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	{ .compatible = "ibm,qpace-nwp-serial",
		.data = (void *)PORT_NWPSERIAL, },
#endif
	{ .type = "serial",         .data = (void *)PORT_UNKNOWN, },
	{ /* end of list */ },
};

static struct platform_driver of_platform_serial_driver = {
	.driver = {
		.name = "of_serial",
		.owner = THIS_MODULE,
		.of_match_table = of_platform_serial_table,
	},
	.probe = of_platform_serial_probe,
	.remove = of_platform_serial_remove,
};

module_platform_driver(of_platform_serial_driver);

MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
Commit	Line	Data
8d38a5b2 AB	1	/*
	2	* Serial Port driver for Open Firmware platform devices
	3	*
	4	* Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	*/
	12	#include <linux/init.h>
	13	#include <linux/module.h>
5a0e3ad6	14	#include <linux/slab.h>
bf03f65b	15	#include <linux/delay.h>
8d38a5b2 AB	16	#include <linux/serial_core.h>
8d38a5b2 AB	17	#include <linux/serial_8250.h>
bf03f65b	18	#include <linux/serial_reg.h>
f1ca09b2	19	#include <linux/of_address.h>
73930a85	20	#include <linux/of_irq.h>
bf03f65b	21	#include <linux/of_serial.h>
c401b044	22	#include <linux/of_platform.h>
5886188d	23	#include <linux/nwpserial.h>
8d38a5b2	24
e34b9c94 IK	25	struct of_serial_info {
	26	int type;
	27	int line;
	28	};
	29
bf03f65b DW	30	#ifdef CONFIG_ARCH_TEGRA
	31	void tegra_serial_handle_break(struct uart_port *p)
	32	{
	33	unsigned int status, tmout = 10000;
	34
	35	do {
	36	status = p->serial_in(p, UART_LSR);
	37	if (status & (UART_LSR_FIFOE \| UART_LSR_BRK_ERROR_BITS))
	38	status = p->serial_in(p, UART_RX);
	39	else
	40	break;
	41	if (--tmout == 0)
	42	break;
	43	udelay(1);
	44	} while (1);
	45	}
	46	/* FIXME remove this export when tegra finishes conversion to open firmware */
	47	EXPORT_SYMBOL_GPL(tegra_serial_handle_break);
	48	#endif
	49
8d38a5b2 AB	50	/*
	51	* Fill a struct uart_port for a given device node
	52	*/
2dc11581	53	static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
8d38a5b2 AB	54	int type, struct uart_port *port)
	55	{
	56	struct resource resource;
61c7a080	57	struct device_node *np = ofdev->dev.of_node;
b84e7731 GL	58	u32 clk, spd, prop;
b84e7731 GL	59	int ret;
8d38a5b2 AB	60
8d38a5b2 AB	61	memset(port, 0, sizeof *port);
b84e7731	62	if (of_property_read_u32(np, "clock-frequency", &clk)) {
8d38a5b2 AB	63	dev_warn(&ofdev->dev, "no clock-frequency property set\n");
	64	return -ENODEV;
	65	}
b84e7731 GL	66	/* If current-speed was set, then try not to change it. */
	67	if (of_property_read_u32(np, "current-speed", &spd) == 0)
	68	port->custom_divisor = clk / (16 * spd);
8d38a5b2 AB	69
	70	ret = of_address_to_resource(np, 0, &resource);
	71	if (ret) {
	72	dev_warn(&ofdev->dev, "invalid address\n");
	73	return ret;
	74	}
	75
	76	spin_lock_init(&port->lock);
	77	port->mapbase = resource.start;
b912b5e2 JL	78
b912b5e2 JL	79	/* Check for shifted address mapping */
b84e7731 GL	80	if (of_property_read_u32(np, "reg-offset", &prop) == 0)
b84e7731 GL	81	port->mapbase += prop;
b912b5e2 JL	82
b912b5e2 JL	83	/* Check for registers offset within the devices address range */
b84e7731 GL	84	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
b84e7731 GL	85	port->regshift = prop;
b912b5e2	86
8d38a5b2 AB	87	port->irq = irq_of_parse_and_map(np, 0);
8d38a5b2 AB	88	port->iotype = UPIO_MEM;
b84e7731 GL	89	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
b84e7731 GL	90	switch (prop) {
7423734e JI	91	case 1:
	92	port->iotype = UPIO_MEM;
	93	break;
	94	case 4:
	95	port->iotype = UPIO_MEM32;
	96	break;
	97	default:
b84e7731 GL	98	dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
b84e7731 GL	99	prop);
7423734e JI	100	return -EINVAL;
	101	}
	102	}
	103
8d38a5b2	104	port->type = type;
b84e7731	105	port->uartclk = clk;
abb4a239	106	port->flags = UPF_SHARE_IRQ \| UPF_BOOT_AUTOCONF \| UPF_IOREMAP
eedacbf0	107	\| UPF_FIXED_PORT \| UPF_FIXED_TYPE;
8d38a5b2	108	port->dev = &ofdev->dev;
8d38a5b2	109
bf03f65b DW	110	if (type == PORT_TEGRA)
	111	port->handle_break = tegra_serial_handle_break;
	112
8d38a5b2 AB	113	return 0;
	114	}
	115
	116	/*
	117	* Try to register a serial port
	118	*/
b1608d69	119	static struct of_device_id of_platform_serial_table[];
793218df	120	static int __devinit of_platform_serial_probe(struct platform_device *ofdev)
8d38a5b2	121	{
b1608d69	122	const struct of_device_id *match;
e34b9c94	123	struct of_serial_info *info;
8d38a5b2 AB	124	struct uart_port port;
	125	int port_type;
	126	int ret;
	127
b1608d69 GL	128	match = of_match_device(of_platform_serial_table, &ofdev->dev);
b1608d69 GL	129	if (!match)
793218df GL	130	return -EINVAL;
793218df GL	131
61c7a080	132	if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
8d38a5b2 AB	133	return -EBUSY;
8d38a5b2 AB	134
e34b9c94 IK	135	info = kmalloc(sizeof(*info), GFP_KERNEL);
	136	if (info == NULL)
	137	return -ENOMEM;
	138
b1608d69	139	port_type = (unsigned long)match->data;
8d38a5b2 AB	140	ret = of_platform_serial_setup(ofdev, port_type, &port);
	141	if (ret)
	142	goto out;
	143
	144	switch (port_type) {
5886188d	145	#ifdef CONFIG_SERIAL_8250
8d38a5b2 AB	146	case PORT_8250 ... PORT_MAX_8250:
	147	ret = serial8250_register_port(&port);
	148	break;
5886188d BK	149	#endif
	150	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	151	case PORT_NWPSERIAL:
	152	ret = nwpserial_register_port(&port);
	153	break;
	154	#endif
8d38a5b2 AB	155	default:
8d38a5b2 AB	156	/* need to add code for these */
1558f9b4 IK	157	case PORT_UNKNOWN:
1558f9b4 IK	158	dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
8d38a5b2 AB	159	ret = -ENODEV;
	160	break;
	161	}
	162	if (ret < 0)
	163	goto out;
	164
e34b9c94 IK	165	info->type = port_type;
e34b9c94 IK	166	info->line = ret;
3cf62a5a	167	dev_set_drvdata(&ofdev->dev, info);
8d38a5b2 AB	168	return 0;
8d38a5b2 AB	169	out:
e34b9c94	170	kfree(info);
8d38a5b2 AB	171	irq_dispose_mapping(port.irq);
	172	return ret;
	173	}
	174
	175	/*
	176	* Release a line
	177	*/
2dc11581	178	static int of_platform_serial_remove(struct platform_device *ofdev)
8d38a5b2	179	{
3cf62a5a	180	struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
e34b9c94	181	switch (info->type) {
5886188d	182	#ifdef CONFIG_SERIAL_8250
e34b9c94 IK	183	case PORT_8250 ... PORT_MAX_8250:
	184	serial8250_unregister_port(info->line);
	185	break;
5886188d BK	186	#endif
	187	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	188	case PORT_NWPSERIAL:
	189	nwpserial_unregister_port(info->line);
	190	break;
	191	#endif
e34b9c94 IK	192	default:
	193	/* need to add code for these */
	194	break;
	195	}
	196	kfree(info);
8d38a5b2 AB	197	return 0;
	198	}
	199
	200	/*
	201	* A few common types, add more as needed.
	202	*/
	203	static struct of_device_id __devinitdata of_platform_serial_table[] = {
8c6e9112 GL	204	{ .compatible = "ns8250", .data = (void *)PORT_8250, },
	205	{ .compatible = "ns16450", .data = (void *)PORT_16450, },
	206	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
	207	{ .compatible = "ns16550", .data = (void *)PORT_16550, },
	208	{ .compatible = "ns16750", .data = (void *)PORT_16750, },
	209	{ .compatible = "ns16850", .data = (void *)PORT_16850, },
2e39e5be	210	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
ed85c604	211	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
5886188d	212	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
8c6e9112 GL	213	{ .compatible = "ibm,qpace-nwp-serial",
8c6e9112 GL	214	.data = (void *)PORT_NWPSERIAL, },
5886188d	215	#endif
8c6e9112	216	{ .type = "serial", .data = (void *)PORT_UNKNOWN, },
8d38a5b2 AB	217	{ /* end of list */ },
	218	};
	219
793218df	220	static struct platform_driver of_platform_serial_driver = {
4018294b GL	221	.driver = {
	222	.name = "of_serial",
	223	.owner = THIS_MODULE,
	224	.of_match_table = of_platform_serial_table,
	225	},
8d38a5b2 AB	226	.probe = of_platform_serial_probe,
8d38a5b2 AB	227	.remove = of_platform_serial_remove,
8d38a5b2 AB	228	};
8d38a5b2 AB	229
940ab889	230	module_platform_driver(of_platform_serial_driver);
8d38a5b2 AB	231
	232	MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
	233	MODULE_LICENSE("GPL");
	234	MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");