Commit | Line | Data |
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304e1266 | 1 | /* |
304e1266 AC |
2 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> |
3 | * | |
4 | * Based on msm_serial.c, which is: | |
5 | * Copyright (C) 2007 Google, Inc. | |
6 | * Author: Robert Love <rlove@google.com> | |
7 | * | |
8 | * This software is licensed under the terms of the GNU General Public | |
9 | * License version 2, as published by the Free Software Foundation, and | |
10 | * may be copied, distributed, and modified under those terms. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
18 | #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
19 | # define SUPPORT_SYSRQ | |
20 | #endif | |
21 | ||
22 | #include <linux/hrtimer.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/irq.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/console.h> | |
30 | #include <linux/tty.h> | |
31 | #include <linux/tty_flip.h> | |
32 | #include <linux/serial_core.h> | |
33 | #include <linux/serial.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/clk.h> | |
36 | #include <linux/platform_device.h> | |
4001130d | 37 | #include <linux/of.h> |
304e1266 AC |
38 | |
39 | /* | |
40 | * UART Register offsets | |
41 | */ | |
42 | ||
43 | #define VT8500_URTDR 0x0000 /* Transmit data */ | |
44 | #define VT8500_URRDR 0x0004 /* Receive data */ | |
45 | #define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */ | |
46 | #define VT8500_URLCR 0x000C /* Line control */ | |
47 | #define VT8500_URICR 0x0010 /* IrDA control */ | |
48 | #define VT8500_URIER 0x0014 /* Interrupt enable */ | |
49 | #define VT8500_URISR 0x0018 /* Interrupt status */ | |
50 | #define VT8500_URUSR 0x001c /* UART status */ | |
51 | #define VT8500_URFCR 0x0020 /* FIFO control */ | |
52 | #define VT8500_URFIDX 0x0024 /* FIFO index */ | |
53 | #define VT8500_URBKR 0x0028 /* Break signal count */ | |
54 | #define VT8500_URTOD 0x002c /* Time out divisor */ | |
55 | #define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */ | |
56 | #define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */ | |
57 | ||
58 | /* | |
59 | * Interrupt enable and status bits | |
60 | */ | |
61 | ||
62 | #define TXDE (1 << 0) /* Tx Data empty */ | |
63 | #define RXDF (1 << 1) /* Rx Data full */ | |
64 | #define TXFAE (1 << 2) /* Tx FIFO almost empty */ | |
65 | #define TXFE (1 << 3) /* Tx FIFO empty */ | |
66 | #define RXFAF (1 << 4) /* Rx FIFO almost full */ | |
67 | #define RXFF (1 << 5) /* Rx FIFO full */ | |
68 | #define TXUDR (1 << 6) /* Tx underrun */ | |
69 | #define RXOVER (1 << 7) /* Rx overrun */ | |
70 | #define PER (1 << 8) /* Parity error */ | |
71 | #define FER (1 << 9) /* Frame error */ | |
72 | #define TCTS (1 << 10) /* Toggle of CTS */ | |
73 | #define RXTOUT (1 << 11) /* Rx timeout */ | |
74 | #define BKDONE (1 << 12) /* Break signal done */ | |
75 | #define ERR (1 << 13) /* AHB error response */ | |
76 | ||
77 | #define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT) | |
78 | #define TX_FIFO_INTS (TXFAE | TXFE | TXUDR) | |
79 | ||
4001130d TP |
80 | #define VT8500_MAX_PORTS 6 |
81 | ||
304e1266 AC |
82 | struct vt8500_port { |
83 | struct uart_port uart; | |
84 | char name[16]; | |
85 | struct clk *clk; | |
86 | unsigned int ier; | |
87 | }; | |
88 | ||
4001130d TP |
89 | /* |
90 | * we use this variable to keep track of which ports | |
91 | * have been allocated as we can't use pdev->id in | |
92 | * devicetree | |
93 | */ | |
94 | static unsigned long vt8500_ports_in_use; | |
95 | ||
304e1266 AC |
96 | static inline void vt8500_write(struct uart_port *port, unsigned int val, |
97 | unsigned int off) | |
98 | { | |
99 | writel(val, port->membase + off); | |
100 | } | |
101 | ||
102 | static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off) | |
103 | { | |
104 | return readl(port->membase + off); | |
105 | } | |
106 | ||
107 | static void vt8500_stop_tx(struct uart_port *port) | |
108 | { | |
109 | struct vt8500_port *vt8500_port = container_of(port, | |
110 | struct vt8500_port, | |
111 | uart); | |
112 | ||
113 | vt8500_port->ier &= ~TX_FIFO_INTS; | |
114 | vt8500_write(port, vt8500_port->ier, VT8500_URIER); | |
115 | } | |
116 | ||
117 | static void vt8500_stop_rx(struct uart_port *port) | |
118 | { | |
119 | struct vt8500_port *vt8500_port = container_of(port, | |
120 | struct vt8500_port, | |
121 | uart); | |
122 | ||
123 | vt8500_port->ier &= ~RX_FIFO_INTS; | |
124 | vt8500_write(port, vt8500_port->ier, VT8500_URIER); | |
125 | } | |
126 | ||
127 | static void vt8500_enable_ms(struct uart_port *port) | |
128 | { | |
129 | struct vt8500_port *vt8500_port = container_of(port, | |
130 | struct vt8500_port, | |
131 | uart); | |
132 | ||
133 | vt8500_port->ier |= TCTS; | |
134 | vt8500_write(port, vt8500_port->ier, VT8500_URIER); | |
135 | } | |
136 | ||
137 | static void handle_rx(struct uart_port *port) | |
138 | { | |
139 | struct tty_struct *tty = tty_port_tty_get(&port->state->port); | |
140 | if (!tty) { | |
141 | /* Discard data: no tty available */ | |
142 | int count = (vt8500_read(port, VT8500_URFIDX) & 0x1f00) >> 8; | |
143 | u16 ch; | |
144 | while (count--) | |
145 | ch = readw(port->membase + VT8500_RXFIFO); | |
146 | return; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Handle overrun | |
151 | */ | |
152 | if ((vt8500_read(port, VT8500_URISR) & RXOVER)) { | |
153 | port->icount.overrun++; | |
154 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
155 | } | |
156 | ||
157 | /* and now the main RX loop */ | |
158 | while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) { | |
159 | unsigned int c; | |
160 | char flag = TTY_NORMAL; | |
161 | ||
162 | c = readw(port->membase + VT8500_RXFIFO) & 0x3ff; | |
163 | ||
164 | /* Mask conditions we're ignorning. */ | |
165 | c &= ~port->read_status_mask; | |
166 | ||
167 | if (c & FER) { | |
168 | port->icount.frame++; | |
169 | flag = TTY_FRAME; | |
170 | } else if (c & PER) { | |
171 | port->icount.parity++; | |
172 | flag = TTY_PARITY; | |
173 | } | |
174 | port->icount.rx++; | |
175 | ||
176 | if (!uart_handle_sysrq_char(port, c)) | |
177 | tty_insert_flip_char(tty, c, flag); | |
178 | } | |
179 | ||
180 | tty_flip_buffer_push(tty); | |
181 | tty_kref_put(tty); | |
182 | } | |
183 | ||
184 | static void handle_tx(struct uart_port *port) | |
185 | { | |
186 | struct circ_buf *xmit = &port->state->xmit; | |
187 | ||
188 | if (port->x_char) { | |
189 | writeb(port->x_char, port->membase + VT8500_TXFIFO); | |
190 | port->icount.tx++; | |
191 | port->x_char = 0; | |
192 | } | |
193 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
194 | vt8500_stop_tx(port); | |
195 | return; | |
196 | } | |
197 | ||
198 | while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) { | |
199 | if (uart_circ_empty(xmit)) | |
200 | break; | |
201 | ||
202 | writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO); | |
203 | ||
204 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
205 | port->icount.tx++; | |
206 | } | |
207 | ||
208 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
209 | uart_write_wakeup(port); | |
210 | ||
211 | if (uart_circ_empty(xmit)) | |
212 | vt8500_stop_tx(port); | |
213 | } | |
214 | ||
215 | static void vt8500_start_tx(struct uart_port *port) | |
216 | { | |
217 | struct vt8500_port *vt8500_port = container_of(port, | |
218 | struct vt8500_port, | |
219 | uart); | |
220 | ||
221 | vt8500_port->ier &= ~TX_FIFO_INTS; | |
222 | vt8500_write(port, vt8500_port->ier, VT8500_URIER); | |
223 | handle_tx(port); | |
224 | vt8500_port->ier |= TX_FIFO_INTS; | |
225 | vt8500_write(port, vt8500_port->ier, VT8500_URIER); | |
226 | } | |
227 | ||
228 | static void handle_delta_cts(struct uart_port *port) | |
229 | { | |
230 | port->icount.cts++; | |
231 | wake_up_interruptible(&port->state->port.delta_msr_wait); | |
232 | } | |
233 | ||
234 | static irqreturn_t vt8500_irq(int irq, void *dev_id) | |
235 | { | |
236 | struct uart_port *port = dev_id; | |
237 | unsigned long isr; | |
238 | ||
239 | spin_lock(&port->lock); | |
240 | isr = vt8500_read(port, VT8500_URISR); | |
241 | ||
242 | /* Acknowledge active status bits */ | |
243 | vt8500_write(port, isr, VT8500_URISR); | |
244 | ||
245 | if (isr & RX_FIFO_INTS) | |
246 | handle_rx(port); | |
247 | if (isr & TX_FIFO_INTS) | |
248 | handle_tx(port); | |
249 | if (isr & TCTS) | |
250 | handle_delta_cts(port); | |
251 | ||
252 | spin_unlock(&port->lock); | |
253 | ||
254 | return IRQ_HANDLED; | |
255 | } | |
256 | ||
257 | static unsigned int vt8500_tx_empty(struct uart_port *port) | |
258 | { | |
259 | return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ? | |
260 | TIOCSER_TEMT : 0; | |
261 | } | |
262 | ||
263 | static unsigned int vt8500_get_mctrl(struct uart_port *port) | |
264 | { | |
265 | unsigned int usr; | |
266 | ||
267 | usr = vt8500_read(port, VT8500_URUSR); | |
268 | if (usr & (1 << 4)) | |
269 | return TIOCM_CTS; | |
270 | else | |
271 | return 0; | |
272 | } | |
273 | ||
274 | static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
275 | { | |
276 | } | |
277 | ||
278 | static void vt8500_break_ctl(struct uart_port *port, int break_ctl) | |
279 | { | |
280 | if (break_ctl) | |
281 | vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9), | |
282 | VT8500_URLCR); | |
283 | } | |
284 | ||
285 | static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud) | |
286 | { | |
287 | unsigned long div; | |
288 | unsigned int loops = 1000; | |
289 | ||
290 | div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff); | |
291 | ||
292 | if (unlikely((baud < 900) || (baud > 921600))) | |
293 | div |= 7; | |
294 | else | |
295 | div |= (921600 / baud) - 1; | |
296 | ||
297 | while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops) | |
298 | cpu_relax(); | |
299 | vt8500_write(port, div, VT8500_URDIV); | |
300 | ||
301 | return baud; | |
302 | } | |
303 | ||
304 | static int vt8500_startup(struct uart_port *port) | |
305 | { | |
306 | struct vt8500_port *vt8500_port = | |
307 | container_of(port, struct vt8500_port, uart); | |
308 | int ret; | |
309 | ||
310 | snprintf(vt8500_port->name, sizeof(vt8500_port->name), | |
311 | "vt8500_serial%d", port->line); | |
312 | ||
313 | ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH, | |
314 | vt8500_port->name, port); | |
315 | if (unlikely(ret)) | |
316 | return ret; | |
317 | ||
318 | vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */ | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
323 | static void vt8500_shutdown(struct uart_port *port) | |
324 | { | |
325 | struct vt8500_port *vt8500_port = | |
326 | container_of(port, struct vt8500_port, uart); | |
327 | ||
328 | vt8500_port->ier = 0; | |
329 | ||
330 | /* disable interrupts and FIFOs */ | |
331 | vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); | |
332 | vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); | |
333 | free_irq(port->irq, port); | |
334 | } | |
335 | ||
336 | static void vt8500_set_termios(struct uart_port *port, | |
337 | struct ktermios *termios, | |
338 | struct ktermios *old) | |
339 | { | |
340 | struct vt8500_port *vt8500_port = | |
341 | container_of(port, struct vt8500_port, uart); | |
342 | unsigned long flags; | |
343 | unsigned int baud, lcr; | |
344 | unsigned int loops = 1000; | |
345 | ||
346 | spin_lock_irqsave(&port->lock, flags); | |
347 | ||
348 | /* calculate and set baud rate */ | |
349 | baud = uart_get_baud_rate(port, termios, old, 900, 921600); | |
350 | baud = vt8500_set_baud_rate(port, baud); | |
351 | if (tty_termios_baud_rate(termios)) | |
352 | tty_termios_encode_baud_rate(termios, baud, baud); | |
353 | ||
354 | /* calculate parity */ | |
355 | lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); | |
356 | lcr &= ~((1 << 5) | (1 << 4)); | |
357 | if (termios->c_cflag & PARENB) { | |
358 | lcr |= (1 << 4); | |
359 | termios->c_cflag &= ~CMSPAR; | |
360 | if (termios->c_cflag & PARODD) | |
361 | lcr |= (1 << 5); | |
362 | } | |
363 | ||
364 | /* calculate bits per char */ | |
365 | lcr &= ~(1 << 2); | |
366 | switch (termios->c_cflag & CSIZE) { | |
367 | case CS7: | |
368 | break; | |
369 | case CS8: | |
370 | default: | |
371 | lcr |= (1 << 2); | |
372 | termios->c_cflag &= ~CSIZE; | |
373 | termios->c_cflag |= CS8; | |
374 | break; | |
375 | } | |
376 | ||
377 | /* calculate stop bits */ | |
378 | lcr &= ~(1 << 3); | |
379 | if (termios->c_cflag & CSTOPB) | |
380 | lcr |= (1 << 3); | |
381 | ||
382 | /* set parity, bits per char, and stop bit */ | |
383 | vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); | |
384 | ||
385 | /* Configure status bits to ignore based on termio flags. */ | |
386 | port->read_status_mask = 0; | |
387 | if (termios->c_iflag & IGNPAR) | |
388 | port->read_status_mask = FER | PER; | |
389 | ||
390 | uart_update_timeout(port, termios->c_cflag, baud); | |
391 | ||
392 | /* Reset FIFOs */ | |
393 | vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); | |
394 | while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) | |
395 | && --loops) | |
396 | cpu_relax(); | |
397 | ||
398 | /* Every possible FIFO-related interrupt */ | |
399 | vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS; | |
400 | ||
401 | /* | |
402 | * CTS flow control | |
403 | */ | |
404 | if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) | |
405 | vt8500_port->ier |= TCTS; | |
406 | ||
407 | vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); | |
408 | vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); | |
409 | ||
410 | spin_unlock_irqrestore(&port->lock, flags); | |
411 | } | |
412 | ||
413 | static const char *vt8500_type(struct uart_port *port) | |
414 | { | |
415 | struct vt8500_port *vt8500_port = | |
416 | container_of(port, struct vt8500_port, uart); | |
417 | return vt8500_port->name; | |
418 | } | |
419 | ||
420 | static void vt8500_release_port(struct uart_port *port) | |
421 | { | |
422 | } | |
423 | ||
424 | static int vt8500_request_port(struct uart_port *port) | |
425 | { | |
426 | return 0; | |
427 | } | |
428 | ||
429 | static void vt8500_config_port(struct uart_port *port, int flags) | |
430 | { | |
431 | port->type = PORT_VT8500; | |
432 | } | |
433 | ||
434 | static int vt8500_verify_port(struct uart_port *port, | |
435 | struct serial_struct *ser) | |
436 | { | |
437 | if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500)) | |
438 | return -EINVAL; | |
439 | if (unlikely(port->irq != ser->irq)) | |
440 | return -EINVAL; | |
441 | return 0; | |
442 | } | |
443 | ||
4001130d | 444 | static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS]; |
304e1266 AC |
445 | static struct uart_driver vt8500_uart_driver; |
446 | ||
447 | #ifdef CONFIG_SERIAL_VT8500_CONSOLE | |
448 | ||
449 | static inline void wait_for_xmitr(struct uart_port *port) | |
450 | { | |
451 | unsigned int status, tmout = 10000; | |
452 | ||
453 | /* Wait up to 10ms for the character(s) to be sent. */ | |
454 | do { | |
455 | status = vt8500_read(port, VT8500_URFIDX); | |
456 | ||
457 | if (--tmout == 0) | |
458 | break; | |
459 | udelay(1); | |
460 | } while (status & 0x10); | |
461 | } | |
462 | ||
463 | static void vt8500_console_putchar(struct uart_port *port, int c) | |
464 | { | |
465 | wait_for_xmitr(port); | |
466 | writeb(c, port->membase + VT8500_TXFIFO); | |
467 | } | |
468 | ||
469 | static void vt8500_console_write(struct console *co, const char *s, | |
470 | unsigned int count) | |
471 | { | |
472 | struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index]; | |
473 | unsigned long ier; | |
474 | ||
475 | BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr); | |
476 | ||
477 | ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); | |
478 | vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); | |
479 | ||
480 | uart_console_write(&vt8500_port->uart, s, count, | |
481 | vt8500_console_putchar); | |
482 | ||
483 | /* | |
484 | * Finally, wait for transmitter to become empty | |
485 | * and switch back to FIFO | |
486 | */ | |
487 | wait_for_xmitr(&vt8500_port->uart); | |
488 | vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); | |
489 | } | |
490 | ||
491 | static int __init vt8500_console_setup(struct console *co, char *options) | |
492 | { | |
493 | struct vt8500_port *vt8500_port; | |
494 | int baud = 9600; | |
495 | int bits = 8; | |
496 | int parity = 'n'; | |
497 | int flow = 'n'; | |
498 | ||
499 | if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0)) | |
500 | return -ENXIO; | |
501 | ||
502 | vt8500_port = vt8500_uart_ports[co->index]; | |
503 | ||
504 | if (!vt8500_port) | |
505 | return -ENODEV; | |
506 | ||
507 | if (options) | |
508 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
509 | ||
510 | return uart_set_options(&vt8500_port->uart, | |
511 | co, baud, parity, bits, flow); | |
512 | } | |
513 | ||
514 | static struct console vt8500_console = { | |
515 | .name = "ttyWMT", | |
516 | .write = vt8500_console_write, | |
517 | .device = uart_console_device, | |
518 | .setup = vt8500_console_setup, | |
519 | .flags = CON_PRINTBUFFER, | |
520 | .index = -1, | |
521 | .data = &vt8500_uart_driver, | |
522 | }; | |
523 | ||
524 | #define VT8500_CONSOLE (&vt8500_console) | |
525 | ||
526 | #else | |
527 | #define VT8500_CONSOLE NULL | |
528 | #endif | |
529 | ||
530 | static struct uart_ops vt8500_uart_pops = { | |
531 | .tx_empty = vt8500_tx_empty, | |
532 | .set_mctrl = vt8500_set_mctrl, | |
533 | .get_mctrl = vt8500_get_mctrl, | |
534 | .stop_tx = vt8500_stop_tx, | |
535 | .start_tx = vt8500_start_tx, | |
536 | .stop_rx = vt8500_stop_rx, | |
537 | .enable_ms = vt8500_enable_ms, | |
538 | .break_ctl = vt8500_break_ctl, | |
539 | .startup = vt8500_startup, | |
540 | .shutdown = vt8500_shutdown, | |
541 | .set_termios = vt8500_set_termios, | |
542 | .type = vt8500_type, | |
543 | .release_port = vt8500_release_port, | |
544 | .request_port = vt8500_request_port, | |
545 | .config_port = vt8500_config_port, | |
546 | .verify_port = vt8500_verify_port, | |
547 | }; | |
548 | ||
549 | static struct uart_driver vt8500_uart_driver = { | |
550 | .owner = THIS_MODULE, | |
551 | .driver_name = "vt8500_serial", | |
552 | .dev_name = "ttyWMT", | |
553 | .nr = 6, | |
554 | .cons = VT8500_CONSOLE, | |
555 | }; | |
556 | ||
9abac853 | 557 | static int __devinit vt8500_serial_probe(struct platform_device *pdev) |
304e1266 AC |
558 | { |
559 | struct vt8500_port *vt8500_port; | |
560 | struct resource *mmres, *irqres; | |
4001130d | 561 | struct device_node *np = pdev->dev.of_node; |
304e1266 | 562 | int ret; |
4001130d | 563 | int port; |
304e1266 AC |
564 | |
565 | mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
566 | irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
567 | if (!mmres || !irqres) | |
568 | return -ENODEV; | |
569 | ||
4001130d TP |
570 | if (np) |
571 | port = of_alias_get_id(np, "serial"); | |
572 | if (port > VT8500_MAX_PORTS) | |
573 | port = -1; | |
574 | else | |
575 | port = -1; | |
576 | ||
577 | if (port < 0) { | |
578 | /* calculate the port id */ | |
579 | port = find_first_zero_bit(&vt8500_ports_in_use, | |
580 | sizeof(vt8500_ports_in_use)); | |
581 | } | |
582 | ||
583 | if (port > VT8500_MAX_PORTS) | |
584 | return -ENODEV; | |
585 | ||
586 | /* reserve the port id */ | |
587 | if (test_and_set_bit(port, &vt8500_ports_in_use)) { | |
588 | /* port already in use - shouldn't really happen */ | |
589 | return -EBUSY; | |
590 | } | |
591 | ||
59c2e855 WY |
592 | vt8500_port = kzalloc(sizeof(struct vt8500_port), GFP_KERNEL); |
593 | if (!vt8500_port) | |
594 | return -ENOMEM; | |
595 | ||
304e1266 AC |
596 | vt8500_port->uart.type = PORT_VT8500; |
597 | vt8500_port->uart.iotype = UPIO_MEM; | |
598 | vt8500_port->uart.mapbase = mmres->start; | |
599 | vt8500_port->uart.irq = irqres->start; | |
600 | vt8500_port->uart.fifosize = 16; | |
601 | vt8500_port->uart.ops = &vt8500_uart_pops; | |
4001130d | 602 | vt8500_port->uart.line = port; |
304e1266 AC |
603 | vt8500_port->uart.dev = &pdev->dev; |
604 | vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; | |
4001130d TP |
605 | |
606 | vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0); | |
607 | if (vt8500_port->clk) { | |
608 | vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk); | |
609 | } else { | |
610 | /* use the default of 24Mhz if not specified and warn */ | |
611 | pr_warn("%s: serial clock source not specified\n", __func__); | |
612 | vt8500_port->uart.uartclk = 24000000; | |
613 | } | |
304e1266 AC |
614 | |
615 | snprintf(vt8500_port->name, sizeof(vt8500_port->name), | |
616 | "VT8500 UART%d", pdev->id); | |
617 | ||
28f65c11 | 618 | vt8500_port->uart.membase = ioremap(mmres->start, resource_size(mmres)); |
304e1266 AC |
619 | if (!vt8500_port->uart.membase) { |
620 | ret = -ENOMEM; | |
621 | goto err; | |
622 | } | |
623 | ||
4001130d | 624 | vt8500_uart_ports[port] = vt8500_port; |
304e1266 AC |
625 | |
626 | uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); | |
627 | ||
628 | platform_set_drvdata(pdev, vt8500_port); | |
629 | ||
630 | return 0; | |
631 | ||
632 | err: | |
633 | kfree(vt8500_port); | |
634 | return ret; | |
635 | } | |
636 | ||
637 | static int __devexit vt8500_serial_remove(struct platform_device *pdev) | |
638 | { | |
639 | struct vt8500_port *vt8500_port = platform_get_drvdata(pdev); | |
640 | ||
641 | platform_set_drvdata(pdev, NULL); | |
642 | uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart); | |
643 | kfree(vt8500_port); | |
644 | ||
645 | return 0; | |
646 | } | |
647 | ||
4001130d TP |
648 | static const struct of_device_id wmt_dt_ids[] = { |
649 | { .compatible = "via,vt8500-uart", }, | |
650 | {} | |
651 | }; | |
652 | ||
304e1266 AC |
653 | static struct platform_driver vt8500_platform_driver = { |
654 | .probe = vt8500_serial_probe, | |
2d47b716 | 655 | .remove = vt8500_serial_remove, |
304e1266 AC |
656 | .driver = { |
657 | .name = "vt8500_serial", | |
658 | .owner = THIS_MODULE, | |
4001130d | 659 | .of_match_table = of_match_ptr(wmt_dt_ids), |
304e1266 AC |
660 | }, |
661 | }; | |
662 | ||
663 | static int __init vt8500_serial_init(void) | |
664 | { | |
665 | int ret; | |
666 | ||
667 | ret = uart_register_driver(&vt8500_uart_driver); | |
668 | if (unlikely(ret)) | |
669 | return ret; | |
670 | ||
671 | ret = platform_driver_register(&vt8500_platform_driver); | |
672 | ||
673 | if (unlikely(ret)) | |
674 | uart_unregister_driver(&vt8500_uart_driver); | |
675 | ||
676 | return ret; | |
677 | } | |
678 | ||
679 | static void __exit vt8500_serial_exit(void) | |
680 | { | |
681 | #ifdef CONFIG_SERIAL_VT8500_CONSOLE | |
682 | unregister_console(&vt8500_console); | |
683 | #endif | |
684 | platform_driver_unregister(&vt8500_platform_driver); | |
685 | uart_unregister_driver(&vt8500_uart_driver); | |
686 | } | |
687 | ||
688 | module_init(vt8500_serial_init); | |
689 | module_exit(vt8500_serial_exit); | |
690 | ||
691 | MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>"); | |
692 | MODULE_DESCRIPTION("Driver for vt8500 serial device"); | |
4001130d | 693 | MODULE_LICENSE("GPL v2"); |