projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| c10b4f03 PC |
1 | /* |
| 2 | * otg.c - ChipIdea USB IP core OTG driver | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
| 5 | * | |
| 6 | * Author: Peter Chen | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | /* | |
| 14 | * This file mainly handles otgsc register, it may include OTG operation | |
| 15 | * in the future. | |
| 16 | */ | |
| 17 | ||
| 18 | #include <linux/usb/otg.h> | |
| 19 | #include <linux/usb/gadget.h> | |
| 20 | #include <linux/usb/chipidea.h> | |
| 21 | ||
| 22 | #include "ci.h" | |
| 23 | #include "bits.h" | |
| 24 | #include "otg.h" | |
| 25 | ||
| 26 | /** | |
| cbec6bd5 PC |
27 | * ci_otg_role - pick role based on ID pin state |
| 28 | * @ci: the controller | |
| 29 | */ | |
| 30 | enum ci_role ci_otg_role(struct ci_hdrc *ci) | |
| 31 | { | |
| 32 | u32 sts = hw_read(ci, OP_OTGSC, ~0); | |
| 33 | enum ci_role role = sts & OTGSC_ID | |
| 34 | ? CI_ROLE_GADGET | |
| 35 | : CI_ROLE_HOST; | |
| 36 | ||
| 37 | return role; | |
| 38 | } | |
| 39 | ||
| a107f8c5 PC |
40 | void ci_handle_vbus_change(struct ci_hdrc *ci) |
| 41 | { | |
| 42 | u32 otgsc; | |
| 43 | ||
| 44 | if (!ci->is_otg) | |
| 45 | return; | |
| 46 | ||
| 47 | otgsc = hw_read(ci, OP_OTGSC, ~0); | |
| 48 | ||
| 49 | if (otgsc & OTGSC_BSV) | |
| 50 | usb_gadget_vbus_connect(&ci->gadget); | |
| 51 | else | |
| 52 | usb_gadget_vbus_disconnect(&ci->gadget); | |
| 53 | } | |
| 54 | ||
| 22fa8445 | 55 | #define CI_VBUS_STABLE_TIMEOUT_MS 5000 |
| a107f8c5 | 56 | static void ci_handle_id_switch(struct ci_hdrc *ci) |
| cbec6bd5 | 57 | { |
| cbec6bd5 PC |
58 | enum ci_role role = ci_otg_role(ci); |
| 59 | ||
| 60 | if (role != ci->role) { | |
| 61 | dev_dbg(ci->dev, "switching from %s to %s\n", | |
| 62 | ci_role(ci)->name, ci->roles[role]->name); | |
| 63 | ||
| 64 | ci_role_stop(ci); | |
| 22fa8445 PC |
65 | /* wait vbus lower than OTGSC_BSV */ |
| 66 | hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0, | |
| 67 | CI_VBUS_STABLE_TIMEOUT_MS); | |
| cbec6bd5 PC |
68 | ci_role_start(ci, role); |
| 69 | } | |
| a107f8c5 PC |
70 | } |
| 71 | /** | |
| 72 | * ci_otg_work - perform otg (vbus/id) event handle | |
| 73 | * @work: work struct | |
| 74 | */ | |
| 75 | static void ci_otg_work(struct work_struct *work) | |
| 76 | { | |
| 77 | struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work); | |
| 78 | ||
| 79 | if (ci->id_event) { | |
| 80 | ci->id_event = false; | |
| 81 | ci_handle_id_switch(ci); | |
| 82 | } else if (ci->b_sess_valid_event) { | |
| 83 | ci->b_sess_valid_event = false; | |
| 84 | ci_handle_vbus_change(ci); | |
| 85 | } else | |
| 86 | dev_err(ci->dev, "unexpected event occurs at %s\n", __func__); | |
| cbec6bd5 PC |
87 | |
| 88 | enable_irq(ci->irq); | |
| 89 | } | |
| 90 | ||
| a107f8c5 | 91 | |
| cbec6bd5 PC |
92 | /** |
| 93 | * ci_hdrc_otg_init - initialize otg struct | |
| c10b4f03 PC |
94 | * ci: the controller |
| 95 | */ | |
| 96 | int ci_hdrc_otg_init(struct ci_hdrc *ci) | |
| 97 | { | |
| a107f8c5 | 98 | INIT_WORK(&ci->work, ci_otg_work); |
| cbec6bd5 PC |
99 | ci->wq = create_singlethread_workqueue("ci_otg"); |
| 100 | if (!ci->wq) { | |
| 101 | dev_err(ci->dev, "can't create workqueue\n"); | |
| 102 | return -ENODEV; | |
| 103 | } | |
| c10b4f03 PC |
104 | |
| 105 | return 0; | |
| 106 | } | |
| cbec6bd5 PC |
107 | |
| 108 | /** | |
| 109 | * ci_hdrc_otg_destroy - destroy otg struct | |
| 110 | * ci: the controller | |
| 111 | */ | |
| 112 | void ci_hdrc_otg_destroy(struct ci_hdrc *ci) | |
| 113 | { | |
| 114 | if (ci->wq) { | |
| 115 | flush_workqueue(ci->wq); | |
| 116 | destroy_workqueue(ci->wq); | |
| 117 | } | |
| 118 | ci_disable_otg_interrupt(ci, OTGSC_INT_EN_BITS); | |
| 119 | ci_clear_otg_interrupt(ci, OTGSC_INT_STATUS_BITS); | |
| 120 | } |