Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...
[deliverable/linux.git] / drivers / usb / chipidea / otg.c
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1/*
2 * otg.c - ChipIdea USB IP core OTG driver
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * Author: Peter Chen
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
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14 * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
15 * are also included.
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16 */
17
18#include <linux/usb/otg.h>
19#include <linux/usb/gadget.h>
20#include <linux/usb/chipidea.h>
21
22#include "ci.h"
23#include "bits.h"
24#include "otg.h"
57677be5 25#include "otg_fsm.h"
c10b4f03 26
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27/**
28 * hw_read_otgsc returns otgsc register bits value.
29 * @mask: bitfield mask
30 */
31u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
32{
33 return hw_read(ci, OP_OTGSC, mask);
34}
35
36/**
37 * hw_write_otgsc updates target bits of OTGSC register.
38 * @mask: bitfield mask
39 * @data: to be written
40 */
41void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
42{
43 hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
44}
45
c10b4f03 46/**
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47 * ci_otg_role - pick role based on ID pin state
48 * @ci: the controller
49 */
50enum ci_role ci_otg_role(struct ci_hdrc *ci)
51{
0c33bf78 52 enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
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53 ? CI_ROLE_GADGET
54 : CI_ROLE_HOST;
55
56 return role;
57}
58
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59void ci_handle_vbus_change(struct ci_hdrc *ci)
60{
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61 if (!ci->is_otg)
62 return;
63
0c33bf78 64 if (hw_read_otgsc(ci, OTGSC_BSV))
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65 usb_gadget_vbus_connect(&ci->gadget);
66 else
67 usb_gadget_vbus_disconnect(&ci->gadget);
68}
69
22fa8445 70#define CI_VBUS_STABLE_TIMEOUT_MS 5000
a107f8c5 71static void ci_handle_id_switch(struct ci_hdrc *ci)
cbec6bd5 72{
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73 enum ci_role role = ci_otg_role(ci);
74
75 if (role != ci->role) {
76 dev_dbg(ci->dev, "switching from %s to %s\n",
77 ci_role(ci)->name, ci->roles[role]->name);
78
79 ci_role_stop(ci);
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80 /* wait vbus lower than OTGSC_BSV */
81 hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
82 CI_VBUS_STABLE_TIMEOUT_MS);
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83 ci_role_start(ci, role);
84 }
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85}
86/**
87 * ci_otg_work - perform otg (vbus/id) event handle
88 * @work: work struct
89 */
90static void ci_otg_work(struct work_struct *work)
91{
92 struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
93
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94 if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
95 enable_irq(ci->irq);
96 return;
97 }
98
1f874edc 99 pm_runtime_get_sync(ci->dev);
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100 if (ci->id_event) {
101 ci->id_event = false;
102 ci_handle_id_switch(ci);
103 } else if (ci->b_sess_valid_event) {
104 ci->b_sess_valid_event = false;
105 ci_handle_vbus_change(ci);
106 } else
107 dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
1f874edc 108 pm_runtime_put_sync(ci->dev);
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109
110 enable_irq(ci->irq);
111}
112
a107f8c5 113
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114/**
115 * ci_hdrc_otg_init - initialize otg struct
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116 * ci: the controller
117 */
118int ci_hdrc_otg_init(struct ci_hdrc *ci)
119{
a107f8c5 120 INIT_WORK(&ci->work, ci_otg_work);
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121 ci->wq = create_singlethread_workqueue("ci_otg");
122 if (!ci->wq) {
123 dev_err(ci->dev, "can't create workqueue\n");
124 return -ENODEV;
125 }
c10b4f03 126
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127 if (ci_otg_is_fsm_mode(ci))
128 return ci_hdrc_otg_fsm_init(ci);
129
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130 return 0;
131}
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132
133/**
134 * ci_hdrc_otg_destroy - destroy otg struct
135 * ci: the controller
136 */
137void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
138{
139 if (ci->wq) {
140 flush_workqueue(ci->wq);
141 destroy_workqueue(ci->wq);
142 }
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143 /* Disable all OTG irq and clear status */
144 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
145 OTGSC_INT_STATUS_BITS);
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146 if (ci_otg_is_fsm_mode(ci))
147 ci_hdrc_otg_fsm_remove(ci);
cbec6bd5 148}
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