Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
95f5555f | 23 | #include <linux/usb/otg-fsm.h> |
e443b333 | 24 | #include <linux/usb/chipidea.h> |
aa69a809 | 25 | |
e443b333 AS |
26 | #include "ci.h" |
27 | #include "udc.h" | |
28 | #include "bits.h" | |
29 | #include "debug.h" | |
3f124d23 | 30 | #include "otg.h" |
4dcf720c | 31 | #include "otg_fsm.h" |
954aad8c | 32 | |
aa69a809 DL |
33 | /* control endpoint description */ |
34 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 35 | ctrl_endpt_out_desc = { |
aa69a809 DL |
36 | .bLength = USB_DT_ENDPOINT_SIZE, |
37 | .bDescriptorType = USB_DT_ENDPOINT, | |
38 | ||
ca9cfea0 PK |
39 | .bEndpointAddress = USB_DIR_OUT, |
40 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
41 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
42 | }; | |
43 | ||
44 | static const struct usb_endpoint_descriptor | |
45 | ctrl_endpt_in_desc = { | |
46 | .bLength = USB_DT_ENDPOINT_SIZE, | |
47 | .bDescriptorType = USB_DT_ENDPOINT, | |
48 | ||
49 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
50 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
51 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
52 | }; | |
53 | ||
aa69a809 DL |
54 | /** |
55 | * hw_ep_bit: calculates the bit number | |
56 | * @num: endpoint number | |
57 | * @dir: endpoint direction | |
58 | * | |
59 | * This function returns bit number | |
60 | */ | |
61 | static inline int hw_ep_bit(int num, int dir) | |
62 | { | |
63 | return num + (dir ? 16 : 0); | |
64 | } | |
65 | ||
8e22978c | 66 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 67 | { |
26c696c6 | 68 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 69 | |
26c696c6 | 70 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
71 | n += fill; |
72 | ||
73 | return n; | |
74 | } | |
75 | ||
aa69a809 | 76 | /** |
c0a48e6c | 77 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
78 | * @dma: 0 => disable, !0 => enable and set dma engine |
79 | * | |
80 | * This function returns an error code | |
81 | */ | |
8e22978c | 82 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
83 | { |
84 | if (dma) { | |
26c696c6 | 85 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 86 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 87 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 88 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
aa69a809 | 89 | } else { |
26c696c6 | 90 | hw_write(ci, OP_USBINTR, ~0, 0); |
aa69a809 DL |
91 | } |
92 | return 0; | |
93 | } | |
94 | ||
95 | /** | |
96 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
97 | * @num: endpoint number | |
98 | * @dir: endpoint direction | |
99 | * | |
100 | * This function returns an error code | |
101 | */ | |
8e22978c | 102 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
103 | { |
104 | int n = hw_ep_bit(num, dir); | |
105 | ||
106 | do { | |
107 | /* flush any pending transfer */ | |
5bf5dbed | 108 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
26c696c6 | 109 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
aa69a809 | 110 | cpu_relax(); |
26c696c6 | 111 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
112 | |
113 | return 0; | |
114 | } | |
115 | ||
116 | /** | |
117 | * hw_ep_disable: disables endpoint (execute without interruption) | |
118 | * @num: endpoint number | |
119 | * @dir: endpoint direction | |
120 | * | |
121 | * This function returns an error code | |
122 | */ | |
8e22978c | 123 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 124 | { |
26c696c6 RZ |
125 | hw_ep_flush(ci, num, dir); |
126 | hw_write(ci, OP_ENDPTCTRL + num, | |
d3595d13 | 127 | dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
128 | return 0; |
129 | } | |
130 | ||
131 | /** | |
132 | * hw_ep_enable: enables endpoint (execute without interruption) | |
133 | * @num: endpoint number | |
134 | * @dir: endpoint direction | |
135 | * @type: endpoint type | |
136 | * | |
137 | * This function returns an error code | |
138 | */ | |
8e22978c | 139 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
140 | { |
141 | u32 mask, data; | |
142 | ||
143 | if (dir) { | |
144 | mask = ENDPTCTRL_TXT; /* type */ | |
727b4ddb | 145 | data = type << __ffs(mask); |
aa69a809 DL |
146 | |
147 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
148 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
149 | data |= ENDPTCTRL_TXR; | |
150 | mask |= ENDPTCTRL_TXE; /* enable */ | |
151 | data |= ENDPTCTRL_TXE; | |
152 | } else { | |
153 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 154 | data = type << __ffs(mask); |
aa69a809 DL |
155 | |
156 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
157 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
158 | data |= ENDPTCTRL_RXR; | |
159 | mask |= ENDPTCTRL_RXE; /* enable */ | |
160 | data |= ENDPTCTRL_RXE; | |
161 | } | |
26c696c6 | 162 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
163 | return 0; |
164 | } | |
165 | ||
166 | /** | |
167 | * hw_ep_get_halt: return endpoint halt status | |
168 | * @num: endpoint number | |
169 | * @dir: endpoint direction | |
170 | * | |
171 | * This function returns 1 if endpoint halted | |
172 | */ | |
8e22978c | 173 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
174 | { |
175 | u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; | |
176 | ||
26c696c6 | 177 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
178 | } |
179 | ||
aa69a809 DL |
180 | /** |
181 | * hw_ep_prime: primes endpoint (execute without interruption) | |
182 | * @num: endpoint number | |
183 | * @dir: endpoint direction | |
184 | * @is_ctrl: true if control endpoint | |
185 | * | |
186 | * This function returns an error code | |
187 | */ | |
8e22978c | 188 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
189 | { |
190 | int n = hw_ep_bit(num, dir); | |
191 | ||
26c696c6 | 192 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
193 | return -EAGAIN; |
194 | ||
5bf5dbed | 195 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
aa69a809 | 196 | |
26c696c6 | 197 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 198 | cpu_relax(); |
26c696c6 | 199 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
200 | return -EAGAIN; |
201 | ||
202 | /* status shoult be tested according with manual but it doesn't work */ | |
203 | return 0; | |
204 | } | |
205 | ||
206 | /** | |
207 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
208 | * without interruption) | |
209 | * @num: endpoint number | |
210 | * @dir: endpoint direction | |
211 | * @value: true => stall, false => unstall | |
212 | * | |
213 | * This function returns an error code | |
214 | */ | |
8e22978c | 215 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
216 | { |
217 | if (value != 0 && value != 1) | |
218 | return -EINVAL; | |
219 | ||
220 | do { | |
8e22978c | 221 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
aa69a809 DL |
222 | u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
223 | u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
224 | ||
225 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 226 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 227 | value ? mask_xs : mask_xr); |
26c696c6 | 228 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
229 | |
230 | return 0; | |
231 | } | |
232 | ||
aa69a809 DL |
233 | /** |
234 | * hw_is_port_high_speed: test if port is high speed | |
235 | * | |
236 | * This function returns true if high speed port | |
237 | */ | |
8e22978c | 238 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 239 | { |
26c696c6 RZ |
240 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
241 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
242 | } |
243 | ||
aa69a809 DL |
244 | /** |
245 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
246 | * interruption) | |
dd39c358 | 247 | * @n: endpoint number |
aa69a809 DL |
248 | * |
249 | * This function returns complete status | |
250 | */ | |
8e22978c | 251 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 252 | { |
26c696c6 RZ |
253 | n = ep_to_bit(ci, n); |
254 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
255 | } |
256 | ||
257 | /** | |
258 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
259 | * without interruption) | |
260 | * | |
261 | * This function returns active interrutps | |
262 | */ | |
8e22978c | 263 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 264 | { |
26c696c6 | 265 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 266 | |
26c696c6 | 267 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
268 | return reg; |
269 | } | |
270 | ||
271 | /** | |
272 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
273 | * interruption) | |
274 | * | |
275 | * This function returns guard value | |
276 | */ | |
8e22978c | 277 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 278 | { |
26c696c6 | 279 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
280 | } |
281 | ||
282 | /** | |
283 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
284 | * interruption) | |
285 | * | |
286 | * This function returns guard value | |
287 | */ | |
8e22978c | 288 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 289 | { |
26c696c6 | 290 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
291 | } |
292 | ||
293 | /** | |
294 | * hw_usb_set_address: configures USB address (execute without interruption) | |
295 | * @value: new USB address | |
296 | * | |
ef15e549 AS |
297 | * This function explicitly sets the address, without the "USBADRA" (advance) |
298 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 299 | */ |
8e22978c | 300 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 301 | { |
26c696c6 | 302 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 303 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
304 | } |
305 | ||
306 | /** | |
307 | * hw_usb_reset: restart device after a bus reset (execute without | |
308 | * interruption) | |
309 | * | |
310 | * This function returns an error code | |
311 | */ | |
8e22978c | 312 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 313 | { |
26c696c6 | 314 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
315 | |
316 | /* ESS flushes only at end?!? */ | |
26c696c6 | 317 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
318 | |
319 | /* clear setup token semaphores */ | |
26c696c6 | 320 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
321 | |
322 | /* clear complete status */ | |
26c696c6 | 323 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
324 | |
325 | /* wait until all bits cleared */ | |
26c696c6 | 326 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
327 | udelay(10); /* not RTOS friendly */ |
328 | ||
329 | /* reset all endpoints ? */ | |
330 | ||
331 | /* reset internal status and wait for further instructions | |
332 | no need to verify the port reset status (ESS does it) */ | |
333 | ||
334 | return 0; | |
335 | } | |
336 | ||
aa69a809 DL |
337 | /****************************************************************************** |
338 | * UTIL block | |
339 | *****************************************************************************/ | |
cc9e6c49 | 340 | |
8e22978c | 341 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
342 | unsigned length) |
343 | { | |
2e270412 MG |
344 | int i; |
345 | u32 temp; | |
cc9e6c49 MG |
346 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
347 | GFP_ATOMIC); | |
348 | ||
349 | if (node == NULL) | |
350 | return -ENOMEM; | |
351 | ||
2dbc5c4c | 352 | node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
353 | &node->dma); |
354 | if (node->ptr == NULL) { | |
355 | kfree(node); | |
356 | return -ENOMEM; | |
357 | } | |
358 | ||
8e22978c | 359 | memset(node->ptr, 0, sizeof(struct ci_hw_td)); |
2e270412 MG |
360 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
361 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
362 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
2fc5a7da PC |
363 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
364 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
365 | ||
366 | if (hwreq->req.length == 0 | |
367 | || hwreq->req.length % hwep->ep.maxpacket) | |
368 | mul++; | |
369 | node->ptr->token |= mul << __ffs(TD_MULTO); | |
370 | } | |
2e270412 | 371 | |
2dbc5c4c | 372 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
373 | if (length) { |
374 | node->ptr->page[0] = cpu_to_le32(temp); | |
375 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 376 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
377 | page &= ~TD_RESERVED_MASK; |
378 | node->ptr->page[i] = cpu_to_le32(page); | |
379 | } | |
380 | } | |
381 | ||
2dbc5c4c | 382 | hwreq->req.actual += length; |
cc9e6c49 | 383 | |
2dbc5c4c | 384 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 385 | /* get the last entry */ |
2dbc5c4c | 386 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
387 | struct td_node, td); |
388 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
389 | } | |
390 | ||
391 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 392 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
393 | |
394 | return 0; | |
395 | } | |
396 | ||
aa69a809 DL |
397 | /** |
398 | * _usb_addr: calculates endpoint address from direction & number | |
399 | * @ep: endpoint | |
400 | */ | |
8e22978c | 401 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
402 | { |
403 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
404 | } | |
405 | ||
406 | /** | |
407 | * _hardware_queue: configures a request at hardware level | |
408 | * @gadget: gadget | |
2dbc5c4c | 409 | * @hwep: endpoint |
aa69a809 DL |
410 | * |
411 | * This function returns an error code | |
412 | */ | |
8e22978c | 413 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 414 | { |
8e22978c | 415 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 416 | int ret = 0; |
2dbc5c4c | 417 | unsigned rest = hwreq->req.length; |
2e270412 | 418 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 419 | struct td_node *firstnode, *lastnode; |
aa69a809 | 420 | |
aa69a809 | 421 | /* don't queue twice */ |
2dbc5c4c | 422 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
423 | return -EALREADY; |
424 | ||
2dbc5c4c | 425 | hwreq->req.status = -EALREADY; |
aa69a809 | 426 | |
2dbc5c4c | 427 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
428 | if (ret) |
429 | return ret; | |
430 | ||
2e270412 MG |
431 | /* |
432 | * The first buffer could be not page aligned. | |
433 | * In that case we have to span into one extra td. | |
434 | */ | |
2dbc5c4c | 435 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 436 | pages--; |
cc9e6c49 | 437 | |
2e270412 | 438 | if (rest == 0) |
2dbc5c4c | 439 | add_td_to_list(hwep, hwreq, 0); |
cc9e6c49 | 440 | |
2e270412 | 441 | while (rest > 0) { |
2dbc5c4c | 442 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 443 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
2dbc5c4c | 444 | add_td_to_list(hwep, hwreq, count); |
2e270412 | 445 | rest -= count; |
0e6ca199 | 446 | } |
aa69a809 | 447 | |
a4da4f12 | 448 | if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX |
2dbc5c4c AS |
449 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) |
450 | add_td_to_list(hwep, hwreq, 0); | |
cc9e6c49 | 451 | |
2dbc5c4c | 452 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 453 | |
2dbc5c4c | 454 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
455 | struct td_node, td); |
456 | ||
457 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 458 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 459 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
460 | wmb(); |
461 | ||
2dbc5c4c AS |
462 | hwreq->req.actual = 0; |
463 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 464 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 465 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 466 | int tmp_stat; |
cc9e6c49 MG |
467 | struct td_node *prevlastnode; |
468 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 469 | |
2dbc5c4c | 470 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 471 | struct ci_hw_req, queue); |
2dbc5c4c | 472 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
473 | struct td_node, td); |
474 | ||
475 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 476 | wmb(); |
26c696c6 | 477 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
478 | goto done; |
479 | do { | |
26c696c6 RZ |
480 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
481 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
482 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
483 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
484 | if (tmp_stat) |
485 | goto done; | |
486 | } | |
487 | ||
488 | /* QH configuration */ | |
2dbc5c4c AS |
489 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
490 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 491 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 492 | |
2fc5a7da | 493 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
2dbc5c4c | 494 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
e4ce4ecd | 495 | |
2fc5a7da PC |
496 | if (hwreq->req.length == 0 |
497 | || hwreq->req.length % hwep->ep.maxpacket) | |
e4ce4ecd | 498 | mul++; |
2dbc5c4c | 499 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
500 | } |
501 | ||
aa69a809 DL |
502 | wmb(); /* synchronize before ep prime */ |
503 | ||
2dbc5c4c AS |
504 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
505 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
506 | done: |
507 | return ret; | |
aa69a809 DL |
508 | } |
509 | ||
2e270412 MG |
510 | /* |
511 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 512 | * @hwep: endpoint |
2e270412 | 513 | */ |
8e22978c | 514 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 515 | { |
2dbc5c4c | 516 | struct td_node *pending = hwep->pending_td; |
2e270412 | 517 | |
2dbc5c4c AS |
518 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
519 | hwep->pending_td = NULL; | |
2e270412 MG |
520 | kfree(pending); |
521 | } | |
522 | ||
06bdfcdb SM |
523 | static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, |
524 | struct td_node *node) | |
525 | { | |
526 | hwep->qh.ptr->td.next = node->dma; | |
527 | hwep->qh.ptr->td.token &= | |
528 | cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); | |
529 | ||
530 | /* Synchronize before ep prime */ | |
531 | wmb(); | |
532 | ||
533 | return hw_ep_prime(ci, hwep->num, hwep->dir, | |
534 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
535 | } | |
536 | ||
aa69a809 DL |
537 | /** |
538 | * _hardware_dequeue: handles a request at hardware level | |
539 | * @gadget: gadget | |
2dbc5c4c | 540 | * @hwep: endpoint |
aa69a809 DL |
541 | * |
542 | * This function returns an error code | |
543 | */ | |
8e22978c | 544 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 545 | { |
cc9e6c49 | 546 | u32 tmptoken; |
2e270412 MG |
547 | struct td_node *node, *tmpnode; |
548 | unsigned remaining_length; | |
2dbc5c4c | 549 | unsigned actual = hwreq->req.length; |
06bdfcdb | 550 | struct ci_hdrc *ci = hwep->ci; |
9e506438 | 551 | |
2dbc5c4c | 552 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
553 | return -EINVAL; |
554 | ||
2dbc5c4c | 555 | hwreq->req.status = 0; |
0e6ca199 | 556 | |
2dbc5c4c | 557 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 558 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 559 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
06bdfcdb SM |
560 | int n = hw_ep_bit(hwep->num, hwep->dir); |
561 | ||
562 | if (ci->rev == CI_REVISION_24) | |
563 | if (!hw_read(ci, OP_ENDPTSTAT, BIT(n))) | |
564 | reprime_dtd(ci, hwep, node); | |
2dbc5c4c | 565 | hwreq->req.status = -EALREADY; |
0e6ca199 | 566 | return -EBUSY; |
cc9e6c49 | 567 | } |
aa69a809 | 568 | |
2e270412 MG |
569 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
570 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
571 | actual -= remaining_length; | |
572 | ||
2dbc5c4c AS |
573 | hwreq->req.status = tmptoken & TD_STATUS; |
574 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
575 | hwreq->req.status = -EPIPE; | |
2e270412 | 576 | break; |
2dbc5c4c AS |
577 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
578 | hwreq->req.status = -EPROTO; | |
2e270412 | 579 | break; |
2dbc5c4c AS |
580 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
581 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
582 | break; |
583 | } | |
584 | ||
585 | if (remaining_length) { | |
2dbc5c4c AS |
586 | if (hwep->dir) { |
587 | hwreq->req.status = -EPROTO; | |
2e270412 MG |
588 | break; |
589 | } | |
590 | } | |
591 | /* | |
592 | * As the hardware could still address the freed td | |
593 | * which will run the udc unusable, the cleanup of the | |
594 | * td has to be delayed by one. | |
595 | */ | |
2dbc5c4c AS |
596 | if (hwep->pending_td) |
597 | free_pending_td(hwep); | |
2e270412 | 598 | |
2dbc5c4c | 599 | hwep->pending_td = node; |
2e270412 MG |
600 | list_del_init(&node->td); |
601 | } | |
aa69a809 | 602 | |
2dbc5c4c | 603 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 604 | |
2dbc5c4c | 605 | hwreq->req.actual += actual; |
aa69a809 | 606 | |
2dbc5c4c AS |
607 | if (hwreq->req.status) |
608 | return hwreq->req.status; | |
aa69a809 | 609 | |
2dbc5c4c | 610 | return hwreq->req.actual; |
aa69a809 DL |
611 | } |
612 | ||
613 | /** | |
614 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 615 | * @hwep: endpoint |
aa69a809 DL |
616 | * |
617 | * This function returns an error code | |
618 | * Caller must hold lock | |
619 | */ | |
8e22978c | 620 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
621 | __releases(hwep->lock) |
622 | __acquires(hwep->lock) | |
aa69a809 | 623 | { |
2e270412 | 624 | struct td_node *node, *tmpnode; |
2dbc5c4c | 625 | if (hwep == NULL) |
aa69a809 DL |
626 | return -EINVAL; |
627 | ||
2dbc5c4c | 628 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 629 | |
2dbc5c4c | 630 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
631 | |
632 | /* pop oldest request */ | |
8e22978c AS |
633 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
634 | struct ci_hw_req, queue); | |
7ca2cd29 | 635 | |
2dbc5c4c AS |
636 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
637 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
638 | list_del_init(&node->td); |
639 | node->ptr = NULL; | |
640 | kfree(node); | |
7ca2cd29 MG |
641 | } |
642 | ||
2dbc5c4c AS |
643 | list_del_init(&hwreq->queue); |
644 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 645 | |
2dbc5c4c AS |
646 | if (hwreq->req.complete != NULL) { |
647 | spin_unlock(hwep->lock); | |
304f7e5e | 648 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 649 | spin_lock(hwep->lock); |
aa69a809 DL |
650 | } |
651 | } | |
2e270412 | 652 | |
2dbc5c4c AS |
653 | if (hwep->pending_td) |
654 | free_pending_td(hwep); | |
2e270412 | 655 | |
aa69a809 DL |
656 | return 0; |
657 | } | |
658 | ||
56ffa1d1 PC |
659 | static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer) |
660 | { | |
661 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); | |
662 | int direction, retval = 0; | |
663 | unsigned long flags; | |
664 | ||
665 | if (ep == NULL || hwep->ep.desc == NULL) | |
666 | return -EINVAL; | |
667 | ||
668 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) | |
669 | return -EOPNOTSUPP; | |
670 | ||
671 | spin_lock_irqsave(hwep->lock, flags); | |
672 | ||
673 | if (value && hwep->dir == TX && check_transfer && | |
674 | !list_empty(&hwep->qh.queue) && | |
675 | !usb_endpoint_xfer_control(hwep->ep.desc)) { | |
676 | spin_unlock_irqrestore(hwep->lock, flags); | |
677 | return -EAGAIN; | |
678 | } | |
679 | ||
680 | direction = hwep->dir; | |
681 | do { | |
682 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); | |
683 | ||
684 | if (!value) | |
685 | hwep->wedge = 0; | |
686 | ||
687 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) | |
688 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
689 | ||
690 | } while (hwep->dir != direction); | |
691 | ||
692 | spin_unlock_irqrestore(hwep->lock, flags); | |
693 | return retval; | |
694 | } | |
695 | ||
696 | ||
aa69a809 DL |
697 | /** |
698 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
699 | * @gadget: gadget | |
700 | * | |
701 | * This function returns an error code | |
aa69a809 DL |
702 | */ |
703 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
704 | { |
705 | struct usb_ep *ep; | |
8e22978c | 706 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 707 | unsigned long flags; |
aa69a809 | 708 | |
26c696c6 RZ |
709 | spin_lock_irqsave(&ci->lock, flags); |
710 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
711 | ci->remote_wakeup = 0; | |
712 | ci->suspended = 0; | |
713 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 714 | |
aa69a809 DL |
715 | /* flush all endpoints */ |
716 | gadget_for_each_ep(ep, gadget) { | |
717 | usb_ep_fifo_flush(ep); | |
718 | } | |
26c696c6 RZ |
719 | usb_ep_fifo_flush(&ci->ep0out->ep); |
720 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 721 | |
aa69a809 DL |
722 | /* make sure to disable all endpoints */ |
723 | gadget_for_each_ep(ep, gadget) { | |
724 | usb_ep_disable(ep); | |
725 | } | |
aa69a809 | 726 | |
26c696c6 RZ |
727 | if (ci->status != NULL) { |
728 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
729 | ci->status = NULL; | |
aa69a809 DL |
730 | } |
731 | ||
aa69a809 DL |
732 | return 0; |
733 | } | |
734 | ||
735 | /****************************************************************************** | |
736 | * ISR block | |
737 | *****************************************************************************/ | |
738 | /** | |
739 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 740 | * @ci: UDC device |
aa69a809 DL |
741 | * |
742 | * This function resets USB engine after a bus reset occurred | |
743 | */ | |
8e22978c | 744 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
745 | __releases(ci->lock) |
746 | __acquires(ci->lock) | |
aa69a809 | 747 | { |
aa69a809 DL |
748 | int retval; |
749 | ||
a3aee368 | 750 | spin_unlock(&ci->lock); |
afbe4775 PC |
751 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) |
752 | usb_gadget_udc_reset(&ci->gadget, ci->driver); | |
92b336d7 | 753 | |
26c696c6 | 754 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
755 | if (retval) |
756 | goto done; | |
757 | ||
26c696c6 | 758 | retval = hw_usb_reset(ci); |
aa69a809 DL |
759 | if (retval) |
760 | goto done; | |
761 | ||
26c696c6 RZ |
762 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
763 | if (ci->status == NULL) | |
ac1aa6a2 | 764 | retval = -ENOMEM; |
ca9cfea0 | 765 | |
b9322252 | 766 | done: |
26c696c6 | 767 | spin_lock(&ci->lock); |
aa69a809 | 768 | |
aa69a809 | 769 | if (retval) |
26c696c6 | 770 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
771 | } |
772 | ||
773 | /** | |
774 | * isr_get_status_complete: get_status request complete function | |
775 | * @ep: endpoint | |
776 | * @req: request handled | |
777 | * | |
778 | * Caller must release lock | |
779 | */ | |
780 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
781 | { | |
0f089094 | 782 | if (ep == NULL || req == NULL) |
aa69a809 | 783 | return; |
aa69a809 DL |
784 | |
785 | kfree(req->buf); | |
786 | usb_ep_free_request(ep, req); | |
787 | } | |
788 | ||
dd064e9d MG |
789 | /** |
790 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
791 | * | |
792 | * Caller must hold lock | |
793 | */ | |
794 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
795 | gfp_t __maybe_unused gfp_flags) | |
796 | { | |
8e22978c AS |
797 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
798 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
799 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
800 | int retval = 0; |
801 | ||
2dbc5c4c | 802 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
803 | return -EINVAL; |
804 | ||
2dbc5c4c | 805 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 806 | if (req->length) |
2dbc5c4c | 807 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 808 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
809 | if (!list_empty(&hwep->qh.queue)) { |
810 | _ep_nuke(hwep); | |
dd064e9d | 811 | retval = -EOVERFLOW; |
2dbc5c4c AS |
812 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
813 | _usb_addr(hwep)); | |
dd064e9d MG |
814 | } |
815 | } | |
816 | ||
2dbc5c4c AS |
817 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
818 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
819 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
820 | return -EMSGSIZE; |
821 | } | |
822 | ||
dd064e9d | 823 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
824 | if (!list_empty(&hwreq->queue)) { |
825 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
826 | return -EBUSY; |
827 | } | |
828 | ||
dd064e9d | 829 | /* push request */ |
2dbc5c4c AS |
830 | hwreq->req.status = -EINPROGRESS; |
831 | hwreq->req.actual = 0; | |
dd064e9d | 832 | |
2dbc5c4c | 833 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
834 | |
835 | if (retval == -EALREADY) | |
836 | retval = 0; | |
837 | if (!retval) | |
2dbc5c4c | 838 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
839 | |
840 | return retval; | |
841 | } | |
842 | ||
aa69a809 DL |
843 | /** |
844 | * isr_get_status_response: get_status request response | |
26c696c6 | 845 | * @ci: ci struct |
aa69a809 DL |
846 | * @setup: setup request packet |
847 | * | |
848 | * This function returns an error code | |
849 | */ | |
8e22978c | 850 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 851 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
852 | __releases(hwep->lock) |
853 | __acquires(hwep->lock) | |
aa69a809 | 854 | { |
8e22978c | 855 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
856 | struct usb_request *req = NULL; |
857 | gfp_t gfp_flags = GFP_ATOMIC; | |
858 | int dir, num, retval; | |
859 | ||
2dbc5c4c | 860 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
861 | return -EINVAL; |
862 | ||
2dbc5c4c AS |
863 | spin_unlock(hwep->lock); |
864 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
865 | spin_lock(hwep->lock); | |
aa69a809 DL |
866 | if (req == NULL) |
867 | return -ENOMEM; | |
868 | ||
869 | req->complete = isr_get_status_complete; | |
870 | req->length = 2; | |
871 | req->buf = kzalloc(req->length, gfp_flags); | |
872 | if (req->buf == NULL) { | |
873 | retval = -ENOMEM; | |
874 | goto err_free_req; | |
875 | } | |
876 | ||
877 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
1009f9a3 PC |
878 | *(u16 *)req->buf = (ci->remote_wakeup << 1) | |
879 | ci->gadget.is_selfpowered; | |
aa69a809 DL |
880 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ |
881 | == USB_RECIP_ENDPOINT) { | |
882 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
883 | TX : RX; | |
884 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 885 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
886 | } |
887 | /* else do nothing; reserved for future use */ | |
888 | ||
2dbc5c4c | 889 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
890 | if (retval) |
891 | goto err_free_buf; | |
892 | ||
893 | return 0; | |
894 | ||
895 | err_free_buf: | |
896 | kfree(req->buf); | |
897 | err_free_req: | |
2dbc5c4c AS |
898 | spin_unlock(hwep->lock); |
899 | usb_ep_free_request(&hwep->ep, req); | |
900 | spin_lock(hwep->lock); | |
aa69a809 DL |
901 | return retval; |
902 | } | |
903 | ||
541cace8 PK |
904 | /** |
905 | * isr_setup_status_complete: setup_status request complete function | |
906 | * @ep: endpoint | |
907 | * @req: request handled | |
908 | * | |
909 | * Caller must release lock. Put the port in test mode if test mode | |
910 | * feature is selected. | |
911 | */ | |
912 | static void | |
913 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
914 | { | |
8e22978c | 915 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
916 | unsigned long flags; |
917 | ||
26c696c6 RZ |
918 | if (ci->setaddr) { |
919 | hw_usb_set_address(ci, ci->address); | |
920 | ci->setaddr = false; | |
10775eb1 PC |
921 | if (ci->address) |
922 | usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); | |
ef15e549 AS |
923 | } |
924 | ||
26c696c6 RZ |
925 | spin_lock_irqsave(&ci->lock, flags); |
926 | if (ci->test_mode) | |
927 | hw_port_test_set(ci, ci->test_mode); | |
928 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
929 | } |
930 | ||
aa69a809 DL |
931 | /** |
932 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 933 | * @ci: ci struct |
aa69a809 DL |
934 | * |
935 | * This function returns an error code | |
936 | */ | |
8e22978c | 937 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
938 | { |
939 | int retval; | |
8e22978c | 940 | struct ci_hw_ep *hwep; |
aa69a809 | 941 | |
2dbc5c4c | 942 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
943 | ci->status->context = ci; |
944 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 945 | |
2dbc5c4c | 946 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
947 | |
948 | return retval; | |
949 | } | |
950 | ||
951 | /** | |
952 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 953 | * @hwep: endpoint |
aa69a809 DL |
954 | * |
955 | * This function returns an error code | |
956 | * Caller must hold lock | |
957 | */ | |
8e22978c | 958 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
959 | __releases(hwep->lock) |
960 | __acquires(hwep->lock) | |
aa69a809 | 961 | { |
8e22978c AS |
962 | struct ci_hw_req *hwreq, *hwreqtemp; |
963 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 964 | int retval = 0; |
aa69a809 | 965 | |
2dbc5c4c | 966 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 967 | queue) { |
2dbc5c4c | 968 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
969 | if (retval < 0) |
970 | break; | |
2dbc5c4c AS |
971 | list_del_init(&hwreq->queue); |
972 | if (hwreq->req.complete != NULL) { | |
973 | spin_unlock(hwep->lock); | |
974 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
975 | hwreq->req.length) | |
976 | hweptemp = hwep->ci->ep0in; | |
304f7e5e | 977 | usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); |
2dbc5c4c | 978 | spin_lock(hwep->lock); |
0e6ca199 | 979 | } |
d9bb9c18 AL |
980 | } |
981 | ||
ef907482 | 982 | if (retval == -EBUSY) |
0e6ca199 | 983 | retval = 0; |
aa69a809 | 984 | |
aa69a809 DL |
985 | return retval; |
986 | } | |
987 | ||
d20f7807 LJ |
988 | static int otg_a_alt_hnp_support(struct ci_hdrc *ci) |
989 | { | |
990 | dev_warn(&ci->gadget.dev, | |
991 | "connect the device to an alternate port if you want HNP\n"); | |
992 | return isr_setup_status_phase(ci); | |
993 | } | |
994 | ||
d7b00e31 PC |
995 | /** |
996 | * isr_setup_packet_handler: setup packet handler | |
997 | * @ci: UDC descriptor | |
998 | * | |
999 | * This function handles setup packet | |
1000 | */ | |
1001 | static void isr_setup_packet_handler(struct ci_hdrc *ci) | |
1002 | __releases(ci->lock) | |
1003 | __acquires(ci->lock) | |
1004 | { | |
1005 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; | |
1006 | struct usb_ctrlrequest req; | |
1007 | int type, num, dir, err = -EINVAL; | |
1008 | u8 tmode = 0; | |
1009 | ||
1010 | /* | |
1011 | * Flush data and handshake transactions of previous | |
1012 | * setup packet. | |
1013 | */ | |
1014 | _ep_nuke(ci->ep0out); | |
1015 | _ep_nuke(ci->ep0in); | |
1016 | ||
1017 | /* read_setup_packet */ | |
1018 | do { | |
1019 | hw_test_and_set_setup_guard(ci); | |
1020 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); | |
1021 | } while (!hw_test_and_clear_setup_guard(ci)); | |
1022 | ||
1023 | type = req.bRequestType; | |
1024 | ||
1025 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; | |
1026 | ||
1027 | switch (req.bRequest) { | |
1028 | case USB_REQ_CLEAR_FEATURE: | |
1029 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1030 | le16_to_cpu(req.wValue) == | |
1031 | USB_ENDPOINT_HALT) { | |
1032 | if (req.wLength != 0) | |
1033 | break; | |
1034 | num = le16_to_cpu(req.wIndex); | |
1035 | dir = num & USB_ENDPOINT_DIR_MASK; | |
1036 | num &= USB_ENDPOINT_NUMBER_MASK; | |
1037 | if (dir) /* TX */ | |
1038 | num += ci->hw_ep_max / 2; | |
1039 | if (!ci->ci_hw_ep[num].wedge) { | |
1040 | spin_unlock(&ci->lock); | |
1041 | err = usb_ep_clear_halt( | |
1042 | &ci->ci_hw_ep[num].ep); | |
1043 | spin_lock(&ci->lock); | |
1044 | if (err) | |
1045 | break; | |
1046 | } | |
1047 | err = isr_setup_status_phase(ci); | |
1048 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && | |
1049 | le16_to_cpu(req.wValue) == | |
1050 | USB_DEVICE_REMOTE_WAKEUP) { | |
1051 | if (req.wLength != 0) | |
1052 | break; | |
1053 | ci->remote_wakeup = 0; | |
1054 | err = isr_setup_status_phase(ci); | |
1055 | } else { | |
1056 | goto delegate; | |
1057 | } | |
1058 | break; | |
1059 | case USB_REQ_GET_STATUS: | |
1060 | if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && | |
1061 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && | |
1062 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1063 | goto delegate; | |
1064 | if (le16_to_cpu(req.wLength) != 2 || | |
1065 | le16_to_cpu(req.wValue) != 0) | |
1066 | break; | |
1067 | err = isr_get_status_response(ci, &req); | |
1068 | break; | |
1069 | case USB_REQ_SET_ADDRESS: | |
1070 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1071 | goto delegate; | |
1072 | if (le16_to_cpu(req.wLength) != 0 || | |
1073 | le16_to_cpu(req.wIndex) != 0) | |
1074 | break; | |
1075 | ci->address = (u8)le16_to_cpu(req.wValue); | |
1076 | ci->setaddr = true; | |
1077 | err = isr_setup_status_phase(ci); | |
1078 | break; | |
1079 | case USB_REQ_SET_FEATURE: | |
1080 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1081 | le16_to_cpu(req.wValue) == | |
1082 | USB_ENDPOINT_HALT) { | |
1083 | if (req.wLength != 0) | |
1084 | break; | |
1085 | num = le16_to_cpu(req.wIndex); | |
1086 | dir = num & USB_ENDPOINT_DIR_MASK; | |
1087 | num &= USB_ENDPOINT_NUMBER_MASK; | |
1088 | if (dir) /* TX */ | |
1089 | num += ci->hw_ep_max / 2; | |
1090 | ||
1091 | spin_unlock(&ci->lock); | |
56ffa1d1 | 1092 | err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false); |
d7b00e31 PC |
1093 | spin_lock(&ci->lock); |
1094 | if (!err) | |
1095 | isr_setup_status_phase(ci); | |
1096 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { | |
1097 | if (req.wLength != 0) | |
1098 | break; | |
1099 | switch (le16_to_cpu(req.wValue)) { | |
1100 | case USB_DEVICE_REMOTE_WAKEUP: | |
1101 | ci->remote_wakeup = 1; | |
1102 | err = isr_setup_status_phase(ci); | |
1103 | break; | |
1104 | case USB_DEVICE_TEST_MODE: | |
1105 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1106 | switch (tmode) { | |
1107 | case TEST_J: | |
1108 | case TEST_K: | |
1109 | case TEST_SE0_NAK: | |
1110 | case TEST_PACKET: | |
1111 | case TEST_FORCE_EN: | |
1112 | ci->test_mode = tmode; | |
1113 | err = isr_setup_status_phase( | |
1114 | ci); | |
1115 | break; | |
1116 | default: | |
1117 | break; | |
1118 | } | |
95f5555f LJ |
1119 | break; |
1120 | case USB_DEVICE_B_HNP_ENABLE: | |
1121 | if (ci_otg_is_fsm_mode(ci)) { | |
1122 | ci->gadget.b_hnp_enable = 1; | |
1123 | err = isr_setup_status_phase( | |
1124 | ci); | |
1125 | } | |
1126 | break; | |
d20f7807 LJ |
1127 | case USB_DEVICE_A_ALT_HNP_SUPPORT: |
1128 | if (ci_otg_is_fsm_mode(ci)) | |
1129 | err = otg_a_alt_hnp_support(ci); | |
1130 | break; | |
3520d462 PC |
1131 | case USB_DEVICE_A_HNP_SUPPORT: |
1132 | if (ci_otg_is_fsm_mode(ci)) { | |
1133 | ci->gadget.a_hnp_support = 1; | |
1134 | err = isr_setup_status_phase( | |
1135 | ci); | |
1136 | } | |
1137 | break; | |
d7b00e31 PC |
1138 | default: |
1139 | goto delegate; | |
1140 | } | |
1141 | } else { | |
1142 | goto delegate; | |
1143 | } | |
1144 | break; | |
1145 | default: | |
1146 | delegate: | |
1147 | if (req.wLength == 0) /* no data phase */ | |
1148 | ci->ep0_dir = TX; | |
1149 | ||
1150 | spin_unlock(&ci->lock); | |
1151 | err = ci->driver->setup(&ci->gadget, &req); | |
1152 | spin_lock(&ci->lock); | |
1153 | break; | |
1154 | } | |
1155 | ||
1156 | if (err < 0) { | |
1157 | spin_unlock(&ci->lock); | |
56ffa1d1 PC |
1158 | if (_ep_set_halt(&hwep->ep, 1, false)) |
1159 | dev_err(ci->dev, "error: _ep_set_halt\n"); | |
d7b00e31 PC |
1160 | spin_lock(&ci->lock); |
1161 | } | |
1162 | } | |
1163 | ||
aa69a809 DL |
1164 | /** |
1165 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 1166 | * @ci: UDC descriptor |
aa69a809 DL |
1167 | * |
1168 | * This function handles traffic events | |
1169 | */ | |
8e22978c | 1170 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
1171 | __releases(ci->lock) |
1172 | __acquires(ci->lock) | |
aa69a809 DL |
1173 | { |
1174 | unsigned i; | |
d7b00e31 | 1175 | int err; |
aa69a809 | 1176 | |
26c696c6 | 1177 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 1178 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
aa69a809 | 1179 | |
2dbc5c4c | 1180 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
1181 | continue; /* not configured */ |
1182 | ||
26c696c6 | 1183 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
1184 | err = isr_tr_complete_low(hwep); |
1185 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 1186 | if (err > 0) /* needs status phase */ |
26c696c6 | 1187 | err = isr_setup_status_phase(ci); |
aa69a809 | 1188 | if (err < 0) { |
26c696c6 | 1189 | spin_unlock(&ci->lock); |
56ffa1d1 | 1190 | if (_ep_set_halt(&hwep->ep, 1, false)) |
26c696c6 | 1191 | dev_err(ci->dev, |
56ffa1d1 | 1192 | "error: _ep_set_halt\n"); |
26c696c6 | 1193 | spin_lock(&ci->lock); |
aa69a809 DL |
1194 | } |
1195 | } | |
1196 | } | |
1197 | ||
64fc06c4 | 1198 | /* Only handle setup packet below */ |
d7b00e31 PC |
1199 | if (i == 0 && |
1200 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) | |
1201 | isr_setup_packet_handler(ci); | |
aa69a809 DL |
1202 | } |
1203 | } | |
1204 | ||
1205 | /****************************************************************************** | |
1206 | * ENDPT block | |
1207 | *****************************************************************************/ | |
1208 | /** | |
1209 | * ep_enable: configure endpoint, making it usable | |
1210 | * | |
1211 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1212 | */ | |
1213 | static int ep_enable(struct usb_ep *ep, | |
1214 | const struct usb_endpoint_descriptor *desc) | |
1215 | { | |
8e22978c | 1216 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1217 | int retval = 0; |
aa69a809 | 1218 | unsigned long flags; |
1cd12a9c | 1219 | u32 cap = 0; |
aa69a809 | 1220 | |
aa69a809 DL |
1221 | if (ep == NULL || desc == NULL) |
1222 | return -EINVAL; | |
1223 | ||
2dbc5c4c | 1224 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1225 | |
1226 | /* only internal SW should enable ctrl endpts */ | |
1227 | ||
d5d1e1be | 1228 | if (!list_empty(&hwep->qh.queue)) { |
2dbc5c4c | 1229 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); |
d5d1e1be PC |
1230 | spin_unlock_irqrestore(hwep->lock, flags); |
1231 | return -EBUSY; | |
1232 | } | |
1233 | ||
1234 | hwep->ep.desc = desc; | |
aa69a809 | 1235 | |
2dbc5c4c AS |
1236 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1237 | hwep->num = usb_endpoint_num(desc); | |
1238 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1239 | |
2dbc5c4c AS |
1240 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1241 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1242 | |
2dbc5c4c | 1243 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1244 | cap |= QH_IOS; |
953c6646 AR |
1245 | |
1246 | cap |= QH_ZLT; | |
2dbc5c4c | 1247 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
2fc5a7da PC |
1248 | /* |
1249 | * For ISO-TX, we set mult at QH as the largest value, and use | |
1250 | * MultO at TD as real mult value. | |
1251 | */ | |
1252 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) | |
1253 | cap |= 3 << __ffs(QH_MULT); | |
1cd12a9c | 1254 | |
2dbc5c4c | 1255 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1256 | |
2dbc5c4c | 1257 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1258 | |
64fc06c4 PC |
1259 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
1260 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); | |
1261 | retval = -EINVAL; | |
1262 | } | |
1263 | ||
ac1aa6a2 A |
1264 | /* |
1265 | * Enable endpoints in the HW other than ep0 as ep0 | |
1266 | * is always enabled | |
1267 | */ | |
2dbc5c4c AS |
1268 | if (hwep->num) |
1269 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1270 | hwep->type); | |
aa69a809 | 1271 | |
2dbc5c4c | 1272 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1273 | return retval; |
1274 | } | |
1275 | ||
1276 | /** | |
1277 | * ep_disable: endpoint is no longer usable | |
1278 | * | |
1279 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1280 | */ | |
1281 | static int ep_disable(struct usb_ep *ep) | |
1282 | { | |
8e22978c | 1283 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1284 | int direction, retval = 0; |
1285 | unsigned long flags; | |
1286 | ||
aa69a809 DL |
1287 | if (ep == NULL) |
1288 | return -EINVAL; | |
2dbc5c4c | 1289 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1290 | return -EBUSY; |
1291 | ||
2dbc5c4c | 1292 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1293 | |
1294 | /* only internal SW should disable ctrl endpts */ | |
1295 | ||
2dbc5c4c | 1296 | direction = hwep->dir; |
aa69a809 | 1297 | do { |
2dbc5c4c AS |
1298 | retval |= _ep_nuke(hwep); |
1299 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1300 | |
2dbc5c4c AS |
1301 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1302 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1303 | |
2dbc5c4c | 1304 | } while (hwep->dir != direction); |
aa69a809 | 1305 | |
2dbc5c4c | 1306 | hwep->ep.desc = NULL; |
aa69a809 | 1307 | |
2dbc5c4c | 1308 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1309 | return retval; |
1310 | } | |
1311 | ||
1312 | /** | |
1313 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1314 | * | |
1315 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1316 | */ | |
1317 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1318 | { | |
8e22978c | 1319 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1320 | |
0f089094 | 1321 | if (ep == NULL) |
aa69a809 | 1322 | return NULL; |
aa69a809 | 1323 | |
8e22978c | 1324 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1325 | if (hwreq != NULL) { |
1326 | INIT_LIST_HEAD(&hwreq->queue); | |
1327 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1328 | } |
1329 | ||
2dbc5c4c | 1330 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1331 | } |
1332 | ||
1333 | /** | |
1334 | * ep_free_request: frees a request object | |
1335 | * | |
1336 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1337 | */ | |
1338 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1339 | { | |
8e22978c AS |
1340 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1341 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1342 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1343 | unsigned long flags; |
1344 | ||
aa69a809 | 1345 | if (ep == NULL || req == NULL) { |
aa69a809 | 1346 | return; |
2dbc5c4c AS |
1347 | } else if (!list_empty(&hwreq->queue)) { |
1348 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1349 | return; |
1350 | } | |
1351 | ||
2dbc5c4c | 1352 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1353 | |
2dbc5c4c AS |
1354 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1355 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1356 | list_del_init(&node->td); |
1357 | node->ptr = NULL; | |
1358 | kfree(node); | |
1359 | } | |
cc9e6c49 | 1360 | |
2dbc5c4c | 1361 | kfree(hwreq); |
aa69a809 | 1362 | |
2dbc5c4c | 1363 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1364 | } |
1365 | ||
1366 | /** | |
1367 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1368 | * | |
1369 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1370 | */ | |
1371 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1372 | gfp_t __maybe_unused gfp_flags) | |
1373 | { | |
8e22978c | 1374 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1375 | int retval = 0; |
1376 | unsigned long flags; | |
1377 | ||
2dbc5c4c | 1378 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1379 | return -EINVAL; |
1380 | ||
2dbc5c4c | 1381 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1382 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1383 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1384 | return retval; |
1385 | } | |
1386 | ||
1387 | /** | |
1388 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1389 | * | |
1390 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1391 | */ | |
1392 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1393 | { | |
8e22978c AS |
1394 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1395 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 | 1396 | unsigned long flags; |
e4adcff0 | 1397 | struct td_node *node, *tmpnode; |
aa69a809 | 1398 | |
2dbc5c4c AS |
1399 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1400 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1401 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1402 | return -EINVAL; |
1403 | ||
2dbc5c4c | 1404 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1405 | |
2dbc5c4c | 1406 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1407 | |
e4adcff0 PC |
1408 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1409 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
1410 | list_del(&node->td); | |
1411 | kfree(node); | |
1412 | } | |
1413 | ||
aa69a809 | 1414 | /* pop request */ |
2dbc5c4c | 1415 | list_del_init(&hwreq->queue); |
5e0aa49e | 1416 | |
2dbc5c4c | 1417 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1418 | |
aa69a809 DL |
1419 | req->status = -ECONNRESET; |
1420 | ||
2dbc5c4c AS |
1421 | if (hwreq->req.complete != NULL) { |
1422 | spin_unlock(hwep->lock); | |
304f7e5e | 1423 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 1424 | spin_lock(hwep->lock); |
aa69a809 DL |
1425 | } |
1426 | ||
2dbc5c4c | 1427 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1428 | return 0; |
1429 | } | |
1430 | ||
1431 | /** | |
1432 | * ep_set_halt: sets the endpoint halt feature | |
1433 | * | |
1434 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1435 | */ | |
1436 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1437 | { | |
56ffa1d1 | 1438 | return _ep_set_halt(ep, value, true); |
aa69a809 DL |
1439 | } |
1440 | ||
1441 | /** | |
1442 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1443 | * | |
1444 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1445 | */ | |
1446 | static int ep_set_wedge(struct usb_ep *ep) | |
1447 | { | |
8e22978c | 1448 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1449 | unsigned long flags; |
1450 | ||
2dbc5c4c | 1451 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1452 | return -EINVAL; |
1453 | ||
2dbc5c4c AS |
1454 | spin_lock_irqsave(hwep->lock, flags); |
1455 | hwep->wedge = 1; | |
1456 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1457 | |
1458 | return usb_ep_set_halt(ep); | |
1459 | } | |
1460 | ||
1461 | /** | |
1462 | * ep_fifo_flush: flushes contents of a fifo | |
1463 | * | |
1464 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1465 | */ | |
1466 | static void ep_fifo_flush(struct usb_ep *ep) | |
1467 | { | |
8e22978c | 1468 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1469 | unsigned long flags; |
1470 | ||
aa69a809 | 1471 | if (ep == NULL) { |
2dbc5c4c | 1472 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1473 | return; |
1474 | } | |
1475 | ||
2dbc5c4c | 1476 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1477 | |
2dbc5c4c | 1478 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1479 | |
2dbc5c4c | 1480 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1481 | } |
1482 | ||
1483 | /** | |
1484 | * Endpoint-specific part of the API to the USB controller hardware | |
1485 | * Check "usb_gadget.h" for details | |
1486 | */ | |
1487 | static const struct usb_ep_ops usb_ep_ops = { | |
1488 | .enable = ep_enable, | |
1489 | .disable = ep_disable, | |
1490 | .alloc_request = ep_alloc_request, | |
1491 | .free_request = ep_free_request, | |
1492 | .queue = ep_queue, | |
1493 | .dequeue = ep_dequeue, | |
1494 | .set_halt = ep_set_halt, | |
1495 | .set_wedge = ep_set_wedge, | |
1496 | .fifo_flush = ep_fifo_flush, | |
1497 | }; | |
1498 | ||
1499 | /****************************************************************************** | |
1500 | * GADGET block | |
1501 | *****************************************************************************/ | |
8e22978c | 1502 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1503 | { |
8e22978c | 1504 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1505 | unsigned long flags; |
1506 | int gadget_ready = 0; | |
1507 | ||
26c696c6 RZ |
1508 | spin_lock_irqsave(&ci->lock, flags); |
1509 | ci->vbus_active = is_active; | |
1510 | if (ci->driver) | |
f01ef574 | 1511 | gadget_ready = 1; |
26c696c6 | 1512 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1513 | |
1514 | if (gadget_ready) { | |
1515 | if (is_active) { | |
c036019e | 1516 | pm_runtime_get_sync(&_gadget->dev); |
5b157300 | 1517 | hw_device_reset(ci); |
26c696c6 | 1518 | hw_device_state(ci, ci->ep0out->qh.dma); |
10775eb1 | 1519 | usb_gadget_set_state(_gadget, USB_STATE_POWERED); |
467a78c8 | 1520 | usb_udc_vbus_handler(_gadget, true); |
f01ef574 | 1521 | } else { |
467a78c8 | 1522 | usb_udc_vbus_handler(_gadget, false); |
92b336d7 PC |
1523 | if (ci->driver) |
1524 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1525 | hw_device_state(ci, 0); |
1526 | if (ci->platdata->notify_event) | |
1527 | ci->platdata->notify_event(ci, | |
8e22978c | 1528 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1529 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1530 | pm_runtime_put_sync(&_gadget->dev); |
10775eb1 | 1531 | usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); |
f01ef574 PK |
1532 | } |
1533 | } | |
1534 | ||
1535 | return 0; | |
1536 | } | |
1537 | ||
8e22978c | 1538 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1539 | { |
8e22978c | 1540 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1541 | unsigned long flags; |
1542 | int ret = 0; | |
1543 | ||
26c696c6 RZ |
1544 | spin_lock_irqsave(&ci->lock, flags); |
1545 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1546 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1547 | goto out; |
1548 | } | |
26c696c6 | 1549 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1550 | ret = -EINVAL; |
e2b61c1d PK |
1551 | goto out; |
1552 | } | |
26c696c6 | 1553 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1554 | out: |
26c696c6 | 1555 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1556 | return ret; |
1557 | } | |
1558 | ||
8e22978c | 1559 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1560 | { |
8e22978c | 1561 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1562 | |
ef44cb42 AT |
1563 | if (ci->usb_phy) |
1564 | return usb_phy_set_power(ci->usb_phy, ma); | |
d860852e PK |
1565 | return -ENOTSUPP; |
1566 | } | |
1567 | ||
1009f9a3 PC |
1568 | static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on) |
1569 | { | |
1570 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); | |
1571 | struct ci_hw_ep *hwep = ci->ep0in; | |
1572 | unsigned long flags; | |
1573 | ||
1574 | spin_lock_irqsave(hwep->lock, flags); | |
1575 | _gadget->is_selfpowered = (is_on != 0); | |
1576 | spin_unlock_irqrestore(hwep->lock, flags); | |
1577 | ||
1578 | return 0; | |
1579 | } | |
1580 | ||
c0a48e6c MG |
1581 | /* Change Data+ pullup status |
1582 | * this func is used by usb_gadget_connect/disconnet | |
1583 | */ | |
8e22978c | 1584 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1585 | { |
8e22978c | 1586 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1587 | |
9b6567e1 LJ |
1588 | /* Data+ pullup controlled by OTG state machine in OTG fsm mode */ |
1589 | if (ci_otg_is_fsm_mode(ci)) | |
1590 | return 0; | |
1591 | ||
467a78c8 | 1592 | pm_runtime_get_sync(&ci->gadget.dev); |
c0a48e6c MG |
1593 | if (is_on) |
1594 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1595 | else | |
1596 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
467a78c8 | 1597 | pm_runtime_put_sync(&ci->gadget.dev); |
c0a48e6c MG |
1598 | |
1599 | return 0; | |
1600 | } | |
1601 | ||
8e22978c | 1602 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1603 | struct usb_gadget_driver *driver); |
22835b80 | 1604 | static int ci_udc_stop(struct usb_gadget *gadget); |
aa69a809 DL |
1605 | /** |
1606 | * Device operations part of the API to the USB controller hardware, | |
1607 | * which don't involve endpoints (or i/o) | |
1608 | * Check "usb_gadget.h" for details | |
1609 | */ | |
f01ef574 | 1610 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1611 | .vbus_session = ci_udc_vbus_session, |
1612 | .wakeup = ci_udc_wakeup, | |
1009f9a3 | 1613 | .set_selfpowered = ci_udc_selfpowered, |
8e22978c AS |
1614 | .pullup = ci_udc_pullup, |
1615 | .vbus_draw = ci_udc_vbus_draw, | |
1616 | .udc_start = ci_udc_start, | |
1617 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1618 | }; |
aa69a809 | 1619 | |
8e22978c | 1620 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1621 | { |
790c2d52 | 1622 | int retval = 0, i, j; |
aa69a809 | 1623 | |
26c696c6 | 1624 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1625 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1626 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1627 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1628 | |
2dbc5c4c | 1629 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1630 | (j == TX) ? "in" : "out"); |
aa69a809 | 1631 | |
2dbc5c4c AS |
1632 | hwep->ci = ci; |
1633 | hwep->lock = &ci->lock; | |
1634 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1635 | |
2dbc5c4c AS |
1636 | hwep->ep.name = hwep->name; |
1637 | hwep->ep.ops = &usb_ep_ops; | |
a7e3f141 RB |
1638 | |
1639 | if (i == 0) { | |
1640 | hwep->ep.caps.type_control = true; | |
1641 | } else { | |
1642 | hwep->ep.caps.type_iso = true; | |
1643 | hwep->ep.caps.type_bulk = true; | |
1644 | hwep->ep.caps.type_int = true; | |
1645 | } | |
1646 | ||
1647 | if (j == TX) | |
1648 | hwep->ep.caps.dir_in = true; | |
1649 | else | |
1650 | hwep->ep.caps.dir_out = true; | |
1651 | ||
7f67c38b MG |
1652 | /* |
1653 | * for ep0: maxP defined in desc, for other | |
1654 | * eps, maxP is set by epautoconfig() called | |
1655 | * by gadget layer | |
1656 | */ | |
e117e742 | 1657 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1658 | |
2dbc5c4c AS |
1659 | INIT_LIST_HEAD(&hwep->qh.queue); |
1660 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1661 | &hwep->qh.dma); | |
1662 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1663 | retval = -ENOMEM; |
1664 | else | |
2dbc5c4c | 1665 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1666 | |
d36ade60 AS |
1667 | /* |
1668 | * set up shorthands for ep0 out and in endpoints, | |
1669 | * don't add to gadget's ep_list | |
1670 | */ | |
1671 | if (i == 0) { | |
1672 | if (j == RX) | |
2dbc5c4c | 1673 | ci->ep0out = hwep; |
d36ade60 | 1674 | else |
2dbc5c4c | 1675 | ci->ep0in = hwep; |
d36ade60 | 1676 | |
e117e742 | 1677 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1678 | continue; |
d36ade60 | 1679 | } |
ca9cfea0 | 1680 | |
2dbc5c4c | 1681 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1682 | } |
790c2d52 AS |
1683 | |
1684 | return retval; | |
1685 | } | |
1686 | ||
8e22978c | 1687 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1688 | { |
1689 | int i; | |
1690 | ||
1691 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1692 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1693 | |
4a29567b PC |
1694 | if (hwep->pending_td) |
1695 | free_pending_td(hwep); | |
2dbc5c4c | 1696 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1697 | } |
1698 | } | |
1699 | ||
790c2d52 | 1700 | /** |
8e22978c | 1701 | * ci_udc_start: register a gadget driver |
1f339d84 | 1702 | * @gadget: our gadget |
790c2d52 | 1703 | * @driver: the driver being registered |
790c2d52 | 1704 | * |
790c2d52 AS |
1705 | * Interrupts are enabled here. |
1706 | */ | |
8e22978c | 1707 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1708 | struct usb_gadget_driver *driver) |
790c2d52 | 1709 | { |
8e22978c | 1710 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1711 | unsigned long flags; |
790c2d52 AS |
1712 | int retval = -ENOMEM; |
1713 | ||
1f339d84 | 1714 | if (driver->disconnect == NULL) |
790c2d52 | 1715 | return -EINVAL; |
790c2d52 | 1716 | |
790c2d52 | 1717 | |
26c696c6 RZ |
1718 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1719 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1720 | if (retval) |
1721 | return retval; | |
877c1f54 | 1722 | |
26c696c6 RZ |
1723 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1724 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1725 | if (retval) |
1726 | return retval; | |
26c696c6 RZ |
1727 | |
1728 | ci->driver = driver; | |
4dcf720c LJ |
1729 | |
1730 | /* Start otg fsm for B-device */ | |
1731 | if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { | |
1732 | ci_hdrc_otg_fsm_start(ci); | |
1733 | return retval; | |
1734 | } | |
1735 | ||
26c696c6 | 1736 | pm_runtime_get_sync(&ci->gadget.dev); |
d268e9bc | 1737 | if (ci->vbus_active) { |
65b2fb32 | 1738 | spin_lock_irqsave(&ci->lock, flags); |
5b157300 | 1739 | hw_device_reset(ci); |
d268e9bc | 1740 | } else { |
467a78c8 | 1741 | usb_udc_vbus_handler(&ci->gadget, false); |
d268e9bc | 1742 | pm_runtime_put_sync(&ci->gadget.dev); |
65b2fb32 | 1743 | return retval; |
f01ef574 PK |
1744 | } |
1745 | ||
26c696c6 | 1746 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1747 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1748 | if (retval) |
26c696c6 | 1749 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1750 | |
aa69a809 DL |
1751 | return retval; |
1752 | } | |
aa69a809 | 1753 | |
85da852d LJ |
1754 | static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci) |
1755 | { | |
1756 | if (!ci_otg_is_fsm_mode(ci)) | |
1757 | return; | |
1758 | ||
1759 | mutex_lock(&ci->fsm.lock); | |
1760 | if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { | |
1761 | ci->fsm.a_bidl_adis_tmout = 1; | |
1762 | ci_hdrc_otg_fsm_start(ci); | |
1763 | } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { | |
1764 | ci->fsm.protocol = PROTO_UNDEF; | |
1765 | ci->fsm.otg->state = OTG_STATE_UNDEFINED; | |
1766 | } | |
1767 | mutex_unlock(&ci->fsm.lock); | |
1768 | } | |
1769 | ||
aa69a809 | 1770 | /** |
8e22978c | 1771 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1772 | */ |
22835b80 | 1773 | static int ci_udc_stop(struct usb_gadget *gadget) |
aa69a809 | 1774 | { |
8e22978c | 1775 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1776 | unsigned long flags; |
aa69a809 | 1777 | |
26c696c6 | 1778 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1779 | |
d268e9bc | 1780 | if (ci->vbus_active) { |
26c696c6 RZ |
1781 | hw_device_state(ci, 0); |
1782 | if (ci->platdata->notify_event) | |
1783 | ci->platdata->notify_event(ci, | |
8e22978c | 1784 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1785 | spin_unlock_irqrestore(&ci->lock, flags); |
1786 | _gadget_stop_activity(&ci->gadget); | |
1787 | spin_lock_irqsave(&ci->lock, flags); | |
1788 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1789 | } |
aa69a809 | 1790 | |
f84839da | 1791 | ci->driver = NULL; |
26c696c6 | 1792 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1793 | |
85da852d | 1794 | ci_udc_stop_for_otg_fsm(ci); |
aa69a809 DL |
1795 | return 0; |
1796 | } | |
aa69a809 DL |
1797 | |
1798 | /****************************************************************************** | |
1799 | * BUS block | |
1800 | *****************************************************************************/ | |
1801 | /** | |
26c696c6 | 1802 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1803 | * |
1804 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1805 | * It locks access to registers | |
1806 | */ | |
8e22978c | 1807 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1808 | { |
aa69a809 DL |
1809 | irqreturn_t retval; |
1810 | u32 intr; | |
1811 | ||
26c696c6 | 1812 | if (ci == NULL) |
aa69a809 | 1813 | return IRQ_HANDLED; |
aa69a809 | 1814 | |
26c696c6 | 1815 | spin_lock(&ci->lock); |
f01ef574 | 1816 | |
8e22978c | 1817 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1818 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1819 | USBMODE_CM_DC) { |
26c696c6 | 1820 | spin_unlock(&ci->lock); |
f01ef574 PK |
1821 | return IRQ_NONE; |
1822 | } | |
1823 | } | |
26c696c6 | 1824 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1825 | |
e443b333 | 1826 | if (intr) { |
aa69a809 | 1827 | /* order defines priority - do NOT change it */ |
e443b333 | 1828 | if (USBi_URI & intr) |
26c696c6 | 1829 | isr_reset_handler(ci); |
e443b333 | 1830 | |
aa69a809 | 1831 | if (USBi_PCI & intr) { |
26c696c6 | 1832 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1833 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1834 | if (ci->suspended && ci->driver->resume) { |
1835 | spin_unlock(&ci->lock); | |
1836 | ci->driver->resume(&ci->gadget); | |
1837 | spin_lock(&ci->lock); | |
1838 | ci->suspended = 0; | |
e2b61c1d | 1839 | } |
aa69a809 | 1840 | } |
e443b333 AS |
1841 | |
1842 | if (USBi_UI & intr) | |
26c696c6 | 1843 | isr_tr_complete_handler(ci); |
e443b333 | 1844 | |
e2b61c1d | 1845 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1846 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1847 | ci->driver->suspend) { | |
1848 | ci->suspended = 1; | |
1849 | spin_unlock(&ci->lock); | |
1850 | ci->driver->suspend(&ci->gadget); | |
10775eb1 PC |
1851 | usb_gadget_set_state(&ci->gadget, |
1852 | USB_STATE_SUSPENDED); | |
26c696c6 | 1853 | spin_lock(&ci->lock); |
e2b61c1d | 1854 | } |
e2b61c1d | 1855 | } |
aa69a809 DL |
1856 | retval = IRQ_HANDLED; |
1857 | } else { | |
aa69a809 DL |
1858 | retval = IRQ_NONE; |
1859 | } | |
26c696c6 | 1860 | spin_unlock(&ci->lock); |
aa69a809 DL |
1861 | |
1862 | return retval; | |
1863 | } | |
1864 | ||
aa69a809 | 1865 | /** |
5f36e231 | 1866 | * udc_start: initialize gadget role |
26c696c6 | 1867 | * @ci: chipidea controller |
aa69a809 | 1868 | */ |
8e22978c | 1869 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1870 | { |
26c696c6 | 1871 | struct device *dev = ci->dev; |
79742351 | 1872 | struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; |
aa69a809 DL |
1873 | int retval = 0; |
1874 | ||
26c696c6 | 1875 | spin_lock_init(&ci->lock); |
aa69a809 | 1876 | |
26c696c6 RZ |
1877 | ci->gadget.ops = &usb_gadget_ops; |
1878 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1879 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
26c696c6 | 1880 | ci->gadget.name = ci->platdata->name; |
79742351 LJ |
1881 | ci->gadget.otg_caps = otg_caps; |
1882 | ||
3f217e9e LJ |
1883 | if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support || |
1884 | otg_caps->adp_support)) | |
79742351 | 1885 | ci->gadget.is_otg = 1; |
aa69a809 | 1886 | |
26c696c6 | 1887 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1888 | |
790c2d52 | 1889 | /* alloc resources */ |
8e22978c AS |
1890 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1891 | sizeof(struct ci_hw_qh), | |
1892 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1893 | if (ci->qh_pool == NULL) |
5f36e231 | 1894 | return -ENOMEM; |
790c2d52 | 1895 | |
8e22978c AS |
1896 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1897 | sizeof(struct ci_hw_td), | |
1898 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1899 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1900 | retval = -ENOMEM; |
1901 | goto free_qh_pool; | |
1902 | } | |
1903 | ||
26c696c6 | 1904 | retval = init_eps(ci); |
790c2d52 AS |
1905 | if (retval) |
1906 | goto free_pools; | |
1907 | ||
26c696c6 | 1908 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1909 | |
26c696c6 | 1910 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1911 | if (retval) |
74475ede | 1912 | goto destroy_eps; |
0f91349b | 1913 | |
26c696c6 RZ |
1914 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1915 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1916 | |
aa69a809 DL |
1917 | return retval; |
1918 | ||
ad6b1b97 MKB |
1919 | destroy_eps: |
1920 | destroy_eps(ci); | |
790c2d52 | 1921 | free_pools: |
26c696c6 | 1922 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1923 | free_qh_pool: |
26c696c6 | 1924 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1925 | return retval; |
1926 | } | |
1927 | ||
1928 | /** | |
3f124d23 | 1929 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1930 | * |
1931 | * No interrupts active, the IRQ has been released | |
1932 | */ | |
3f124d23 | 1933 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1934 | { |
3f124d23 | 1935 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1936 | return; |
0f089094 | 1937 | |
26c696c6 | 1938 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1939 | |
ad6b1b97 | 1940 | destroy_eps(ci); |
790c2d52 | 1941 | |
26c696c6 RZ |
1942 | dma_pool_destroy(ci->td_pool); |
1943 | dma_pool_destroy(ci->qh_pool); | |
3f124d23 PC |
1944 | } |
1945 | ||
1946 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1947 | { | |
0c33bf78 LJ |
1948 | if (ci->is_otg) |
1949 | /* Clear and enable BSV irq */ | |
1950 | hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, | |
1951 | OTGSC_BSVIS | OTGSC_BSVIE); | |
3f124d23 PC |
1952 | |
1953 | return 0; | |
1954 | } | |
1955 | ||
1956 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1957 | { | |
0c33bf78 LJ |
1958 | /* |
1959 | * host doesn't care B_SESSION_VALID event | |
1960 | * so clear and disbale BSV irq | |
1961 | */ | |
1962 | if (ci->is_otg) | |
1963 | hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); | |
5f36e231 AS |
1964 | } |
1965 | ||
1966 | /** | |
1967 | * ci_hdrc_gadget_init - initialize device related bits | |
1968 | * ci: the controller | |
1969 | * | |
3f124d23 | 1970 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1971 | */ |
8e22978c | 1972 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1973 | { |
1974 | struct ci_role_driver *rdrv; | |
1975 | ||
1976 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1977 | return -ENXIO; | |
1978 | ||
1979 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
1980 | if (!rdrv) | |
1981 | return -ENOMEM; | |
1982 | ||
3f124d23 PC |
1983 | rdrv->start = udc_id_switch_for_device; |
1984 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
1985 | rdrv->irq = udc_irq; |
1986 | rdrv->name = "gadget"; | |
1987 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 1988 | |
3f124d23 | 1989 | return udc_start(ci); |
aa69a809 | 1990 | } |