Merge remote-tracking branch 'asoc/topic/tegra' into asoc-next
[deliverable/linux.git] / drivers / usb / chipidea / udc.c
CommitLineData
aa69a809 1/*
eb70e5ab 2 * udc.c - ChipIdea UDC driver
aa69a809
DL
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
36825a2d 13#include <linux/delay.h>
aa69a809
DL
14#include <linux/device.h>
15#include <linux/dmapool.h>
ded017ee 16#include <linux/err.h>
5b08319f 17#include <linux/irqreturn.h>
aa69a809 18#include <linux/kernel.h>
5a0e3ad6 19#include <linux/slab.h>
c036019e 20#include <linux/pm_runtime.h>
aa69a809
DL
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
f01ef574 23#include <linux/usb/otg.h>
e443b333 24#include <linux/usb/chipidea.h>
aa69a809 25
e443b333
AS
26#include "ci.h"
27#include "udc.h"
28#include "bits.h"
29#include "debug.h"
3f124d23 30#include "otg.h"
954aad8c 31
aa69a809
DL
32/* control endpoint description */
33static const struct usb_endpoint_descriptor
ca9cfea0 34ctrl_endpt_out_desc = {
aa69a809
DL
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
ca9cfea0
PK
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41};
42
43static const struct usb_endpoint_descriptor
44ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51};
52
aa69a809
DL
53/**
54 * hw_ep_bit: calculates the bit number
55 * @num: endpoint number
56 * @dir: endpoint direction
57 *
58 * This function returns bit number
59 */
60static inline int hw_ep_bit(int num, int dir)
61{
62 return num + (dir ? 16 : 0);
63}
64
8e22978c 65static inline int ep_to_bit(struct ci_hdrc *ci, int n)
dd39c358 66{
26c696c6 67 int fill = 16 - ci->hw_ep_max / 2;
dd39c358 68
26c696c6 69 if (n >= ci->hw_ep_max / 2)
dd39c358
MKB
70 n += fill;
71
72 return n;
73}
74
aa69a809 75/**
c0a48e6c 76 * hw_device_state: enables/disables interrupts (execute without interruption)
aa69a809
DL
77 * @dma: 0 => disable, !0 => enable and set dma engine
78 *
79 * This function returns an error code
80 */
8e22978c 81static int hw_device_state(struct ci_hdrc *ci, u32 dma)
aa69a809
DL
82{
83 if (dma) {
26c696c6 84 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
aa69a809 85 /* interrupt, error, port change, reset, sleep/suspend */
26c696c6 86 hw_write(ci, OP_USBINTR, ~0,
aa69a809 87 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
a107f8c5 88 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
aa69a809 89 } else {
26c696c6 90 hw_write(ci, OP_USBINTR, ~0, 0);
a107f8c5 91 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
aa69a809
DL
92 }
93 return 0;
94}
95
96/**
97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
98 * @num: endpoint number
99 * @dir: endpoint direction
100 *
101 * This function returns an error code
102 */
8e22978c 103static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
104{
105 int n = hw_ep_bit(num, dir);
106
107 do {
108 /* flush any pending transfer */
26c696c6
RZ
109 hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
110 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
aa69a809 111 cpu_relax();
26c696c6 112 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
aa69a809
DL
113
114 return 0;
115}
116
117/**
118 * hw_ep_disable: disables endpoint (execute without interruption)
119 * @num: endpoint number
120 * @dir: endpoint direction
121 *
122 * This function returns an error code
123 */
8e22978c 124static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
aa69a809 125{
26c696c6
RZ
126 hw_ep_flush(ci, num, dir);
127 hw_write(ci, OP_ENDPTCTRL + num,
d3595d13 128 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
aa69a809
DL
129 return 0;
130}
131
132/**
133 * hw_ep_enable: enables endpoint (execute without interruption)
134 * @num: endpoint number
135 * @dir: endpoint direction
136 * @type: endpoint type
137 *
138 * This function returns an error code
139 */
8e22978c 140static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
aa69a809
DL
141{
142 u32 mask, data;
143
144 if (dir) {
145 mask = ENDPTCTRL_TXT; /* type */
727b4ddb 146 data = type << __ffs(mask);
aa69a809
DL
147
148 mask |= ENDPTCTRL_TXS; /* unstall */
149 mask |= ENDPTCTRL_TXR; /* reset data toggle */
150 data |= ENDPTCTRL_TXR;
151 mask |= ENDPTCTRL_TXE; /* enable */
152 data |= ENDPTCTRL_TXE;
153 } else {
154 mask = ENDPTCTRL_RXT; /* type */
727b4ddb 155 data = type << __ffs(mask);
aa69a809
DL
156
157 mask |= ENDPTCTRL_RXS; /* unstall */
158 mask |= ENDPTCTRL_RXR; /* reset data toggle */
159 data |= ENDPTCTRL_RXR;
160 mask |= ENDPTCTRL_RXE; /* enable */
161 data |= ENDPTCTRL_RXE;
162 }
26c696c6 163 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
aa69a809
DL
164 return 0;
165}
166
167/**
168 * hw_ep_get_halt: return endpoint halt status
169 * @num: endpoint number
170 * @dir: endpoint direction
171 *
172 * This function returns 1 if endpoint halted
173 */
8e22978c 174static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
175{
176 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
177
26c696c6 178 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
aa69a809
DL
179}
180
aa69a809
DL
181/**
182 * hw_test_and_clear_setup_status: test & clear setup status (execute without
183 * interruption)
dd39c358 184 * @n: endpoint number
aa69a809
DL
185 *
186 * This function returns setup status
187 */
8e22978c 188static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n)
aa69a809 189{
26c696c6
RZ
190 n = ep_to_bit(ci, n);
191 return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
aa69a809
DL
192}
193
194/**
195 * hw_ep_prime: primes endpoint (execute without interruption)
196 * @num: endpoint number
197 * @dir: endpoint direction
198 * @is_ctrl: true if control endpoint
199 *
200 * This function returns an error code
201 */
8e22978c 202static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
aa69a809
DL
203{
204 int n = hw_ep_bit(num, dir);
205
26c696c6 206 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
207 return -EAGAIN;
208
26c696c6 209 hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
aa69a809 210
26c696c6 211 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
aa69a809 212 cpu_relax();
26c696c6 213 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
214 return -EAGAIN;
215
216 /* status shoult be tested according with manual but it doesn't work */
217 return 0;
218}
219
220/**
221 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
222 * without interruption)
223 * @num: endpoint number
224 * @dir: endpoint direction
225 * @value: true => stall, false => unstall
226 *
227 * This function returns an error code
228 */
8e22978c 229static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
aa69a809
DL
230{
231 if (value != 0 && value != 1)
232 return -EINVAL;
233
234 do {
8e22978c 235 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
aa69a809
DL
236 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
237 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
238
239 /* data toggle - reserved for EP0 but it's in ESS */
26c696c6 240 hw_write(ci, reg, mask_xs|mask_xr,
262c1632 241 value ? mask_xs : mask_xr);
26c696c6 242 } while (value != hw_ep_get_halt(ci, num, dir));
aa69a809
DL
243
244 return 0;
245}
246
aa69a809
DL
247/**
248 * hw_is_port_high_speed: test if port is high speed
249 *
250 * This function returns true if high speed port
251 */
8e22978c 252static int hw_port_is_high_speed(struct ci_hdrc *ci)
aa69a809 253{
26c696c6
RZ
254 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
255 hw_read(ci, OP_PORTSC, PORTSC_HSP);
aa69a809
DL
256}
257
aa69a809
DL
258/**
259 * hw_read_intr_enable: returns interrupt enable register
260 *
261 * This function returns register data
262 */
8e22978c 263static u32 hw_read_intr_enable(struct ci_hdrc *ci)
aa69a809 264{
26c696c6 265 return hw_read(ci, OP_USBINTR, ~0);
aa69a809
DL
266}
267
268/**
269 * hw_read_intr_status: returns interrupt status register
270 *
271 * This function returns register data
272 */
8e22978c 273static u32 hw_read_intr_status(struct ci_hdrc *ci)
aa69a809 274{
26c696c6 275 return hw_read(ci, OP_USBSTS, ~0);
aa69a809
DL
276}
277
aa69a809
DL
278/**
279 * hw_test_and_clear_complete: test & clear complete status (execute without
280 * interruption)
dd39c358 281 * @n: endpoint number
aa69a809
DL
282 *
283 * This function returns complete status
284 */
8e22978c 285static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
aa69a809 286{
26c696c6
RZ
287 n = ep_to_bit(ci, n);
288 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
aa69a809
DL
289}
290
291/**
292 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
293 * without interruption)
294 *
295 * This function returns active interrutps
296 */
8e22978c 297static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
aa69a809 298{
26c696c6 299 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
aa69a809 300
26c696c6 301 hw_write(ci, OP_USBSTS, ~0, reg);
aa69a809
DL
302 return reg;
303}
304
305/**
306 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
307 * interruption)
308 *
309 * This function returns guard value
310 */
8e22978c 311static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
aa69a809 312{
26c696c6 313 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
aa69a809
DL
314}
315
316/**
317 * hw_test_and_set_setup_guard: test & set setup guard (execute without
318 * interruption)
319 *
320 * This function returns guard value
321 */
8e22978c 322static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
aa69a809 323{
26c696c6 324 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
aa69a809
DL
325}
326
327/**
328 * hw_usb_set_address: configures USB address (execute without interruption)
329 * @value: new USB address
330 *
ef15e549
AS
331 * This function explicitly sets the address, without the "USBADRA" (advance)
332 * feature, which is not supported by older versions of the controller.
aa69a809 333 */
8e22978c 334static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
aa69a809 335{
26c696c6 336 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
727b4ddb 337 value << __ffs(DEVICEADDR_USBADR));
aa69a809
DL
338}
339
340/**
341 * hw_usb_reset: restart device after a bus reset (execute without
342 * interruption)
343 *
344 * This function returns an error code
345 */
8e22978c 346static int hw_usb_reset(struct ci_hdrc *ci)
aa69a809 347{
26c696c6 348 hw_usb_set_address(ci, 0);
aa69a809
DL
349
350 /* ESS flushes only at end?!? */
26c696c6 351 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
aa69a809
DL
352
353 /* clear setup token semaphores */
26c696c6 354 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
aa69a809
DL
355
356 /* clear complete status */
26c696c6 357 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
aa69a809
DL
358
359 /* wait until all bits cleared */
26c696c6 360 while (hw_read(ci, OP_ENDPTPRIME, ~0))
aa69a809
DL
361 udelay(10); /* not RTOS friendly */
362
363 /* reset all endpoints ? */
364
365 /* reset internal status and wait for further instructions
366 no need to verify the port reset status (ESS does it) */
367
368 return 0;
369}
370
aa69a809
DL
371/******************************************************************************
372 * UTIL block
373 *****************************************************************************/
cc9e6c49 374
8e22978c 375static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
cc9e6c49
MG
376 unsigned length)
377{
2e270412
MG
378 int i;
379 u32 temp;
cc9e6c49
MG
380 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
381 GFP_ATOMIC);
382
383 if (node == NULL)
384 return -ENOMEM;
385
2dbc5c4c 386 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
cc9e6c49
MG
387 &node->dma);
388 if (node->ptr == NULL) {
389 kfree(node);
390 return -ENOMEM;
391 }
392
8e22978c 393 memset(node->ptr, 0, sizeof(struct ci_hw_td));
2e270412
MG
394 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
395 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
396 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
397
2dbc5c4c 398 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
2e270412
MG
399 if (length) {
400 node->ptr->page[0] = cpu_to_le32(temp);
401 for (i = 1; i < TD_PAGE_COUNT; i++) {
8e22978c 402 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
2e270412
MG
403 page &= ~TD_RESERVED_MASK;
404 node->ptr->page[i] = cpu_to_le32(page);
405 }
406 }
407
2dbc5c4c 408 hwreq->req.actual += length;
cc9e6c49 409
2dbc5c4c 410 if (!list_empty(&hwreq->tds)) {
cc9e6c49 411 /* get the last entry */
2dbc5c4c 412 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
413 struct td_node, td);
414 lastnode->ptr->next = cpu_to_le32(node->dma);
415 }
416
417 INIT_LIST_HEAD(&node->td);
2dbc5c4c 418 list_add_tail(&node->td, &hwreq->tds);
cc9e6c49
MG
419
420 return 0;
421}
422
aa69a809
DL
423/**
424 * _usb_addr: calculates endpoint address from direction & number
425 * @ep: endpoint
426 */
8e22978c 427static inline u8 _usb_addr(struct ci_hw_ep *ep)
aa69a809
DL
428{
429 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
430}
431
432/**
433 * _hardware_queue: configures a request at hardware level
434 * @gadget: gadget
2dbc5c4c 435 * @hwep: endpoint
aa69a809
DL
436 *
437 * This function returns an error code
438 */
8e22978c 439static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 440{
8e22978c 441 struct ci_hdrc *ci = hwep->ci;
0e6ca199 442 int ret = 0;
2dbc5c4c 443 unsigned rest = hwreq->req.length;
2e270412 444 int pages = TD_PAGE_COUNT;
cc9e6c49 445 struct td_node *firstnode, *lastnode;
aa69a809 446
aa69a809 447 /* don't queue twice */
2dbc5c4c 448 if (hwreq->req.status == -EALREADY)
aa69a809
DL
449 return -EALREADY;
450
2dbc5c4c 451 hwreq->req.status = -EALREADY;
aa69a809 452
2dbc5c4c 453 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
5e0aa49e
AS
454 if (ret)
455 return ret;
456
2e270412
MG
457 /*
458 * The first buffer could be not page aligned.
459 * In that case we have to span into one extra td.
460 */
2dbc5c4c 461 if (hwreq->req.dma % PAGE_SIZE)
2e270412 462 pages--;
cc9e6c49 463
2e270412 464 if (rest == 0)
2dbc5c4c 465 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 466
2e270412 467 while (rest > 0) {
2dbc5c4c 468 unsigned count = min(hwreq->req.length - hwreq->req.actual,
8e22978c 469 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
2dbc5c4c 470 add_td_to_list(hwep, hwreq, count);
2e270412 471 rest -= count;
0e6ca199 472 }
aa69a809 473
2dbc5c4c
AS
474 if (hwreq->req.zero && hwreq->req.length
475 && (hwreq->req.length % hwep->ep.maxpacket == 0))
476 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 477
2dbc5c4c 478 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
2e270412 479
2dbc5c4c 480 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
481 struct td_node, td);
482
483 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
2dbc5c4c 484 if (!hwreq->req.no_interrupt)
cc9e6c49 485 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
a9c17430
MG
486 wmb();
487
2dbc5c4c
AS
488 hwreq->req.actual = 0;
489 if (!list_empty(&hwep->qh.queue)) {
8e22978c 490 struct ci_hw_req *hwreqprev;
2dbc5c4c 491 int n = hw_ep_bit(hwep->num, hwep->dir);
0e6ca199 492 int tmp_stat;
cc9e6c49
MG
493 struct td_node *prevlastnode;
494 u32 next = firstnode->dma & TD_ADDR_MASK;
0e6ca199 495
2dbc5c4c 496 hwreqprev = list_entry(hwep->qh.queue.prev,
8e22978c 497 struct ci_hw_req, queue);
2dbc5c4c 498 prevlastnode = list_entry(hwreqprev->tds.prev,
cc9e6c49
MG
499 struct td_node, td);
500
501 prevlastnode->ptr->next = cpu_to_le32(next);
0e6ca199 502 wmb();
26c696c6 503 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
0e6ca199
PK
504 goto done;
505 do {
26c696c6
RZ
506 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
507 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
508 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
509 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
0e6ca199
PK
510 if (tmp_stat)
511 goto done;
512 }
513
514 /* QH configuration */
2dbc5c4c
AS
515 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
516 hwep->qh.ptr->td.token &=
080ff5f4 517 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
aa69a809 518
2dbc5c4c
AS
519 if (hwep->type == USB_ENDPOINT_XFER_ISOC) {
520 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
e4ce4ecd 521
2dbc5c4c 522 if (hwreq->req.length % hwep->ep.maxpacket)
e4ce4ecd 523 mul++;
2dbc5c4c 524 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
e4ce4ecd
MG
525 }
526
aa69a809
DL
527 wmb(); /* synchronize before ep prime */
528
2dbc5c4c
AS
529 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
530 hwep->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK
531done:
532 return ret;
aa69a809
DL
533}
534
2e270412
MG
535/*
536 * free_pending_td: remove a pending request for the endpoint
2dbc5c4c 537 * @hwep: endpoint
2e270412 538 */
8e22978c 539static void free_pending_td(struct ci_hw_ep *hwep)
2e270412 540{
2dbc5c4c 541 struct td_node *pending = hwep->pending_td;
2e270412 542
2dbc5c4c
AS
543 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
544 hwep->pending_td = NULL;
2e270412
MG
545 kfree(pending);
546}
547
aa69a809
DL
548/**
549 * _hardware_dequeue: handles a request at hardware level
550 * @gadget: gadget
2dbc5c4c 551 * @hwep: endpoint
aa69a809
DL
552 *
553 * This function returns an error code
554 */
8e22978c 555static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 556{
cc9e6c49 557 u32 tmptoken;
2e270412
MG
558 struct td_node *node, *tmpnode;
559 unsigned remaining_length;
2dbc5c4c 560 unsigned actual = hwreq->req.length;
9e506438 561
2dbc5c4c 562 if (hwreq->req.status != -EALREADY)
aa69a809
DL
563 return -EINVAL;
564
2dbc5c4c 565 hwreq->req.status = 0;
0e6ca199 566
2dbc5c4c 567 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
cc9e6c49 568 tmptoken = le32_to_cpu(node->ptr->token);
2e270412 569 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
2dbc5c4c 570 hwreq->req.status = -EALREADY;
0e6ca199 571 return -EBUSY;
cc9e6c49 572 }
aa69a809 573
2e270412
MG
574 remaining_length = (tmptoken & TD_TOTAL_BYTES);
575 remaining_length >>= __ffs(TD_TOTAL_BYTES);
576 actual -= remaining_length;
577
2dbc5c4c
AS
578 hwreq->req.status = tmptoken & TD_STATUS;
579 if ((TD_STATUS_HALTED & hwreq->req.status)) {
580 hwreq->req.status = -EPIPE;
2e270412 581 break;
2dbc5c4c
AS
582 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
583 hwreq->req.status = -EPROTO;
2e270412 584 break;
2dbc5c4c
AS
585 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
586 hwreq->req.status = -EILSEQ;
2e270412
MG
587 break;
588 }
589
590 if (remaining_length) {
2dbc5c4c
AS
591 if (hwep->dir) {
592 hwreq->req.status = -EPROTO;
2e270412
MG
593 break;
594 }
595 }
596 /*
597 * As the hardware could still address the freed td
598 * which will run the udc unusable, the cleanup of the
599 * td has to be delayed by one.
600 */
2dbc5c4c
AS
601 if (hwep->pending_td)
602 free_pending_td(hwep);
2e270412 603
2dbc5c4c 604 hwep->pending_td = node;
2e270412
MG
605 list_del_init(&node->td);
606 }
aa69a809 607
2dbc5c4c 608 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
aa69a809 609
2dbc5c4c 610 hwreq->req.actual += actual;
aa69a809 611
2dbc5c4c
AS
612 if (hwreq->req.status)
613 return hwreq->req.status;
aa69a809 614
2dbc5c4c 615 return hwreq->req.actual;
aa69a809
DL
616}
617
618/**
619 * _ep_nuke: dequeues all endpoint requests
2dbc5c4c 620 * @hwep: endpoint
aa69a809
DL
621 *
622 * This function returns an error code
623 * Caller must hold lock
624 */
8e22978c 625static int _ep_nuke(struct ci_hw_ep *hwep)
2dbc5c4c
AS
626__releases(hwep->lock)
627__acquires(hwep->lock)
aa69a809 628{
2e270412 629 struct td_node *node, *tmpnode;
2dbc5c4c 630 if (hwep == NULL)
aa69a809
DL
631 return -EINVAL;
632
2dbc5c4c 633 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 634
2dbc5c4c 635 while (!list_empty(&hwep->qh.queue)) {
aa69a809
DL
636
637 /* pop oldest request */
8e22978c
AS
638 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
639 struct ci_hw_req, queue);
7ca2cd29 640
2dbc5c4c
AS
641 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
642 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
643 list_del_init(&node->td);
644 node->ptr = NULL;
645 kfree(node);
7ca2cd29
MG
646 }
647
2dbc5c4c
AS
648 list_del_init(&hwreq->queue);
649 hwreq->req.status = -ESHUTDOWN;
aa69a809 650
2dbc5c4c
AS
651 if (hwreq->req.complete != NULL) {
652 spin_unlock(hwep->lock);
653 hwreq->req.complete(&hwep->ep, &hwreq->req);
654 spin_lock(hwep->lock);
aa69a809
DL
655 }
656 }
2e270412 657
2dbc5c4c
AS
658 if (hwep->pending_td)
659 free_pending_td(hwep);
2e270412 660
aa69a809
DL
661 return 0;
662}
663
664/**
665 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
666 * @gadget: gadget
667 *
668 * This function returns an error code
aa69a809
DL
669 */
670static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL
671{
672 struct usb_ep *ep;
8e22978c 673 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
e2b61c1d 674 unsigned long flags;
aa69a809 675
26c696c6
RZ
676 spin_lock_irqsave(&ci->lock, flags);
677 ci->gadget.speed = USB_SPEED_UNKNOWN;
678 ci->remote_wakeup = 0;
679 ci->suspended = 0;
680 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d 681
aa69a809
DL
682 /* flush all endpoints */
683 gadget_for_each_ep(ep, gadget) {
684 usb_ep_fifo_flush(ep);
685 }
26c696c6
RZ
686 usb_ep_fifo_flush(&ci->ep0out->ep);
687 usb_ep_fifo_flush(&ci->ep0in->ep);
aa69a809 688
26c696c6
RZ
689 if (ci->driver)
690 ci->driver->disconnect(gadget);
aa69a809
DL
691
692 /* make sure to disable all endpoints */
693 gadget_for_each_ep(ep, gadget) {
694 usb_ep_disable(ep);
695 }
aa69a809 696
26c696c6
RZ
697 if (ci->status != NULL) {
698 usb_ep_free_request(&ci->ep0in->ep, ci->status);
699 ci->status = NULL;
aa69a809
DL
700 }
701
aa69a809
DL
702 return 0;
703}
704
705/******************************************************************************
706 * ISR block
707 *****************************************************************************/
708/**
709 * isr_reset_handler: USB reset interrupt handler
26c696c6 710 * @ci: UDC device
aa69a809
DL
711 *
712 * This function resets USB engine after a bus reset occurred
713 */
8e22978c 714static void isr_reset_handler(struct ci_hdrc *ci)
26c696c6
RZ
715__releases(ci->lock)
716__acquires(ci->lock)
aa69a809 717{
aa69a809
DL
718 int retval;
719
26c696c6
RZ
720 spin_unlock(&ci->lock);
721 retval = _gadget_stop_activity(&ci->gadget);
aa69a809
DL
722 if (retval)
723 goto done;
724
26c696c6 725 retval = hw_usb_reset(ci);
aa69a809
DL
726 if (retval)
727 goto done;
728
26c696c6
RZ
729 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
730 if (ci->status == NULL)
ac1aa6a2 731 retval = -ENOMEM;
ca9cfea0 732
b9322252 733done:
26c696c6 734 spin_lock(&ci->lock);
aa69a809 735
aa69a809 736 if (retval)
26c696c6 737 dev_err(ci->dev, "error: %i\n", retval);
aa69a809
DL
738}
739
740/**
741 * isr_get_status_complete: get_status request complete function
742 * @ep: endpoint
743 * @req: request handled
744 *
745 * Caller must release lock
746 */
747static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
748{
0f089094 749 if (ep == NULL || req == NULL)
aa69a809 750 return;
aa69a809
DL
751
752 kfree(req->buf);
753 usb_ep_free_request(ep, req);
754}
755
dd064e9d
MG
756/**
757 * _ep_queue: queues (submits) an I/O request to an endpoint
758 *
759 * Caller must hold lock
760 */
761static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
762 gfp_t __maybe_unused gfp_flags)
763{
8e22978c
AS
764 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
765 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
766 struct ci_hdrc *ci = hwep->ci;
dd064e9d
MG
767 int retval = 0;
768
2dbc5c4c 769 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
dd064e9d
MG
770 return -EINVAL;
771
2dbc5c4c 772 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
dd064e9d 773 if (req->length)
2dbc5c4c 774 hwep = (ci->ep0_dir == RX) ?
dd064e9d 775 ci->ep0out : ci->ep0in;
2dbc5c4c
AS
776 if (!list_empty(&hwep->qh.queue)) {
777 _ep_nuke(hwep);
dd064e9d 778 retval = -EOVERFLOW;
2dbc5c4c
AS
779 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
780 _usb_addr(hwep));
dd064e9d
MG
781 }
782 }
783
2dbc5c4c
AS
784 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
785 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
786 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
e4ce4ecd
MG
787 return -EMSGSIZE;
788 }
789
dd064e9d 790 /* first nuke then test link, e.g. previous status has not sent */
2dbc5c4c
AS
791 if (!list_empty(&hwreq->queue)) {
792 dev_err(hwep->ci->dev, "request already in queue\n");
dd064e9d
MG
793 return -EBUSY;
794 }
795
dd064e9d 796 /* push request */
2dbc5c4c
AS
797 hwreq->req.status = -EINPROGRESS;
798 hwreq->req.actual = 0;
dd064e9d 799
2dbc5c4c 800 retval = _hardware_enqueue(hwep, hwreq);
dd064e9d
MG
801
802 if (retval == -EALREADY)
803 retval = 0;
804 if (!retval)
2dbc5c4c 805 list_add_tail(&hwreq->queue, &hwep->qh.queue);
dd064e9d
MG
806
807 return retval;
808}
809
aa69a809
DL
810/**
811 * isr_get_status_response: get_status request response
26c696c6 812 * @ci: ci struct
aa69a809
DL
813 * @setup: setup request packet
814 *
815 * This function returns an error code
816 */
8e22978c 817static int isr_get_status_response(struct ci_hdrc *ci,
aa69a809 818 struct usb_ctrlrequest *setup)
2dbc5c4c
AS
819__releases(hwep->lock)
820__acquires(hwep->lock)
aa69a809 821{
8e22978c 822 struct ci_hw_ep *hwep = ci->ep0in;
aa69a809
DL
823 struct usb_request *req = NULL;
824 gfp_t gfp_flags = GFP_ATOMIC;
825 int dir, num, retval;
826
2dbc5c4c 827 if (hwep == NULL || setup == NULL)
aa69a809
DL
828 return -EINVAL;
829
2dbc5c4c
AS
830 spin_unlock(hwep->lock);
831 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
832 spin_lock(hwep->lock);
aa69a809
DL
833 if (req == NULL)
834 return -ENOMEM;
835
836 req->complete = isr_get_status_complete;
837 req->length = 2;
838 req->buf = kzalloc(req->length, gfp_flags);
839 if (req->buf == NULL) {
840 retval = -ENOMEM;
841 goto err_free_req;
842 }
843
844 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
e2b61c1d 845 /* Assume that device is bus powered for now. */
26c696c6 846 *(u16 *)req->buf = ci->remote_wakeup << 1;
aa69a809
DL
847 retval = 0;
848 } else if ((setup->bRequestType & USB_RECIP_MASK) \
849 == USB_RECIP_ENDPOINT) {
850 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
851 TX : RX;
852 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
26c696c6 853 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
aa69a809
DL
854 }
855 /* else do nothing; reserved for future use */
856
2dbc5c4c 857 retval = _ep_queue(&hwep->ep, req, gfp_flags);
aa69a809
DL
858 if (retval)
859 goto err_free_buf;
860
861 return 0;
862
863 err_free_buf:
864 kfree(req->buf);
865 err_free_req:
2dbc5c4c
AS
866 spin_unlock(hwep->lock);
867 usb_ep_free_request(&hwep->ep, req);
868 spin_lock(hwep->lock);
aa69a809
DL
869 return retval;
870}
871
541cace8
PK
872/**
873 * isr_setup_status_complete: setup_status request complete function
874 * @ep: endpoint
875 * @req: request handled
876 *
877 * Caller must release lock. Put the port in test mode if test mode
878 * feature is selected.
879 */
880static void
881isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
882{
8e22978c 883 struct ci_hdrc *ci = req->context;
541cace8
PK
884 unsigned long flags;
885
26c696c6
RZ
886 if (ci->setaddr) {
887 hw_usb_set_address(ci, ci->address);
888 ci->setaddr = false;
ef15e549
AS
889 }
890
26c696c6
RZ
891 spin_lock_irqsave(&ci->lock, flags);
892 if (ci->test_mode)
893 hw_port_test_set(ci, ci->test_mode);
894 spin_unlock_irqrestore(&ci->lock, flags);
541cace8
PK
895}
896
aa69a809
DL
897/**
898 * isr_setup_status_phase: queues the status phase of a setup transation
26c696c6 899 * @ci: ci struct
aa69a809
DL
900 *
901 * This function returns an error code
902 */
8e22978c 903static int isr_setup_status_phase(struct ci_hdrc *ci)
aa69a809
DL
904{
905 int retval;
8e22978c 906 struct ci_hw_ep *hwep;
aa69a809 907
2dbc5c4c 908 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
26c696c6
RZ
909 ci->status->context = ci;
910 ci->status->complete = isr_setup_status_complete;
aa69a809 911
2dbc5c4c 912 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
aa69a809
DL
913
914 return retval;
915}
916
917/**
918 * isr_tr_complete_low: transaction complete low level handler
2dbc5c4c 919 * @hwep: endpoint
aa69a809
DL
920 *
921 * This function returns an error code
922 * Caller must hold lock
923 */
8e22978c 924static int isr_tr_complete_low(struct ci_hw_ep *hwep)
2dbc5c4c
AS
925__releases(hwep->lock)
926__acquires(hwep->lock)
aa69a809 927{
8e22978c
AS
928 struct ci_hw_req *hwreq, *hwreqtemp;
929 struct ci_hw_ep *hweptemp = hwep;
db89960e 930 int retval = 0;
aa69a809 931
2dbc5c4c 932 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
0e6ca199 933 queue) {
2dbc5c4c 934 retval = _hardware_dequeue(hwep, hwreq);
0e6ca199
PK
935 if (retval < 0)
936 break;
2dbc5c4c
AS
937 list_del_init(&hwreq->queue);
938 if (hwreq->req.complete != NULL) {
939 spin_unlock(hwep->lock);
940 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
941 hwreq->req.length)
942 hweptemp = hwep->ci->ep0in;
943 hwreq->req.complete(&hweptemp->ep, &hwreq->req);
944 spin_lock(hwep->lock);
0e6ca199 945 }
d9bb9c18
AL
946 }
947
ef907482 948 if (retval == -EBUSY)
0e6ca199 949 retval = 0;
aa69a809 950
aa69a809
DL
951 return retval;
952}
953
954/**
955 * isr_tr_complete_handler: transaction complete interrupt handler
26c696c6 956 * @ci: UDC descriptor
aa69a809
DL
957 *
958 * This function handles traffic events
959 */
8e22978c 960static void isr_tr_complete_handler(struct ci_hdrc *ci)
26c696c6
RZ
961__releases(ci->lock)
962__acquires(ci->lock)
aa69a809
DL
963{
964 unsigned i;
541cace8 965 u8 tmode = 0;
aa69a809 966
26c696c6 967 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 968 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
4c5212b7 969 int type, num, dir, err = -EINVAL;
aa69a809
DL
970 struct usb_ctrlrequest req;
971
2dbc5c4c 972 if (hwep->ep.desc == NULL)
aa69a809
DL
973 continue; /* not configured */
974
26c696c6 975 if (hw_test_and_clear_complete(ci, i)) {
2dbc5c4c
AS
976 err = isr_tr_complete_low(hwep);
977 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
aa69a809 978 if (err > 0) /* needs status phase */
26c696c6 979 err = isr_setup_status_phase(ci);
aa69a809 980 if (err < 0) {
26c696c6 981 spin_unlock(&ci->lock);
2dbc5c4c 982 if (usb_ep_set_halt(&hwep->ep))
26c696c6 983 dev_err(ci->dev,
0917ba84 984 "error: ep_set_halt\n");
26c696c6 985 spin_lock(&ci->lock);
aa69a809
DL
986 }
987 }
988 }
989
2dbc5c4c 990 if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
26c696c6 991 !hw_test_and_clear_setup_status(ci, i))
aa69a809
DL
992 continue;
993
994 if (i != 0) {
26c696c6 995 dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
aa69a809
DL
996 continue;
997 }
998
ca9cfea0
PK
999 /*
1000 * Flush data and handshake transactions of previous
1001 * setup packet.
1002 */
26c696c6
RZ
1003 _ep_nuke(ci->ep0out);
1004 _ep_nuke(ci->ep0in);
ca9cfea0 1005
aa69a809
DL
1006 /* read_setup_packet */
1007 do {
26c696c6 1008 hw_test_and_set_setup_guard(ci);
2dbc5c4c 1009 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
26c696c6 1010 } while (!hw_test_and_clear_setup_guard(ci));
aa69a809
DL
1011
1012 type = req.bRequestType;
1013
26c696c6 1014 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
aa69a809 1015
aa69a809
DL
1016 switch (req.bRequest) {
1017 case USB_REQ_CLEAR_FEATURE:
e2b61c1d
PK
1018 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1019 le16_to_cpu(req.wValue) ==
1020 USB_ENDPOINT_HALT) {
1021 if (req.wLength != 0)
1022 break;
1023 num = le16_to_cpu(req.wIndex);
4c5212b7 1024 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 1025 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7 1026 if (dir) /* TX */
26c696c6 1027 num += ci->hw_ep_max/2;
8e22978c 1028 if (!ci->ci_hw_ep[num].wedge) {
26c696c6 1029 spin_unlock(&ci->lock);
e2b61c1d 1030 err = usb_ep_clear_halt(
8e22978c 1031 &ci->ci_hw_ep[num].ep);
26c696c6 1032 spin_lock(&ci->lock);
e2b61c1d
PK
1033 if (err)
1034 break;
1035 }
26c696c6 1036 err = isr_setup_status_phase(ci);
e2b61c1d
PK
1037 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1038 le16_to_cpu(req.wValue) ==
1039 USB_DEVICE_REMOTE_WAKEUP) {
1040 if (req.wLength != 0)
aa69a809 1041 break;
26c696c6
RZ
1042 ci->remote_wakeup = 0;
1043 err = isr_setup_status_phase(ci);
e2b61c1d
PK
1044 } else {
1045 goto delegate;
aa69a809 1046 }
aa69a809
DL
1047 break;
1048 case USB_REQ_GET_STATUS:
1049 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1050 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1051 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1052 goto delegate;
1053 if (le16_to_cpu(req.wLength) != 2 ||
1054 le16_to_cpu(req.wValue) != 0)
1055 break;
26c696c6 1056 err = isr_get_status_response(ci, &req);
aa69a809
DL
1057 break;
1058 case USB_REQ_SET_ADDRESS:
1059 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1060 goto delegate;
1061 if (le16_to_cpu(req.wLength) != 0 ||
1062 le16_to_cpu(req.wIndex) != 0)
1063 break;
26c696c6
RZ
1064 ci->address = (u8)le16_to_cpu(req.wValue);
1065 ci->setaddr = true;
1066 err = isr_setup_status_phase(ci);
aa69a809
DL
1067 break;
1068 case USB_REQ_SET_FEATURE:
e2b61c1d
PK
1069 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1070 le16_to_cpu(req.wValue) ==
1071 USB_ENDPOINT_HALT) {
1072 if (req.wLength != 0)
1073 break;
1074 num = le16_to_cpu(req.wIndex);
4c5212b7 1075 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 1076 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7 1077 if (dir) /* TX */
26c696c6 1078 num += ci->hw_ep_max/2;
aa69a809 1079
26c696c6 1080 spin_unlock(&ci->lock);
8e22978c 1081 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
26c696c6 1082 spin_lock(&ci->lock);
e2b61c1d 1083 if (!err)
26c696c6 1084 isr_setup_status_phase(ci);
541cace8 1085 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
e2b61c1d
PK
1086 if (req.wLength != 0)
1087 break;
541cace8
PK
1088 switch (le16_to_cpu(req.wValue)) {
1089 case USB_DEVICE_REMOTE_WAKEUP:
26c696c6
RZ
1090 ci->remote_wakeup = 1;
1091 err = isr_setup_status_phase(ci);
541cace8
PK
1092 break;
1093 case USB_DEVICE_TEST_MODE:
1094 tmode = le16_to_cpu(req.wIndex) >> 8;
1095 switch (tmode) {
1096 case TEST_J:
1097 case TEST_K:
1098 case TEST_SE0_NAK:
1099 case TEST_PACKET:
1100 case TEST_FORCE_EN:
26c696c6 1101 ci->test_mode = tmode;
541cace8 1102 err = isr_setup_status_phase(
26c696c6 1103 ci);
541cace8
PK
1104 break;
1105 default:
1106 break;
1107 }
1108 default:
1109 goto delegate;
1110 }
e2b61c1d
PK
1111 } else {
1112 goto delegate;
1113 }
aa69a809
DL
1114 break;
1115 default:
1116delegate:
1117 if (req.wLength == 0) /* no data phase */
26c696c6 1118 ci->ep0_dir = TX;
aa69a809 1119
26c696c6
RZ
1120 spin_unlock(&ci->lock);
1121 err = ci->driver->setup(&ci->gadget, &req);
1122 spin_lock(&ci->lock);
aa69a809
DL
1123 break;
1124 }
1125
1126 if (err < 0) {
26c696c6 1127 spin_unlock(&ci->lock);
2dbc5c4c 1128 if (usb_ep_set_halt(&hwep->ep))
26c696c6
RZ
1129 dev_err(ci->dev, "error: ep_set_halt\n");
1130 spin_lock(&ci->lock);
aa69a809
DL
1131 }
1132 }
1133}
1134
1135/******************************************************************************
1136 * ENDPT block
1137 *****************************************************************************/
1138/**
1139 * ep_enable: configure endpoint, making it usable
1140 *
1141 * Check usb_ep_enable() at "usb_gadget.h" for details
1142 */
1143static int ep_enable(struct usb_ep *ep,
1144 const struct usb_endpoint_descriptor *desc)
1145{
8e22978c 1146 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
ca9cfea0 1147 int retval = 0;
aa69a809 1148 unsigned long flags;
1cd12a9c 1149 u32 cap = 0;
aa69a809 1150
aa69a809
DL
1151 if (ep == NULL || desc == NULL)
1152 return -EINVAL;
1153
2dbc5c4c 1154 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1155
1156 /* only internal SW should enable ctrl endpts */
1157
2dbc5c4c 1158 hwep->ep.desc = desc;
aa69a809 1159
2dbc5c4c
AS
1160 if (!list_empty(&hwep->qh.queue))
1161 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
aa69a809 1162
2dbc5c4c
AS
1163 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1164 hwep->num = usb_endpoint_num(desc);
1165 hwep->type = usb_endpoint_type(desc);
aa69a809 1166
2dbc5c4c
AS
1167 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1168 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
aa69a809 1169
2dbc5c4c 1170 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1cd12a9c 1171 cap |= QH_IOS;
2dbc5c4c 1172 if (hwep->num)
776ffc16 1173 cap |= QH_ZLT;
2dbc5c4c 1174 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1cd12a9c 1175
2dbc5c4c 1176 hwep->qh.ptr->cap = cpu_to_le32(cap);
1cd12a9c 1177
2dbc5c4c 1178 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
aa69a809 1179
ac1aa6a2
A
1180 /*
1181 * Enable endpoints in the HW other than ep0 as ep0
1182 * is always enabled
1183 */
2dbc5c4c
AS
1184 if (hwep->num)
1185 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1186 hwep->type);
aa69a809 1187
2dbc5c4c 1188 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1189 return retval;
1190}
1191
1192/**
1193 * ep_disable: endpoint is no longer usable
1194 *
1195 * Check usb_ep_disable() at "usb_gadget.h" for details
1196 */
1197static int ep_disable(struct usb_ep *ep)
1198{
8e22978c 1199 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1200 int direction, retval = 0;
1201 unsigned long flags;
1202
aa69a809
DL
1203 if (ep == NULL)
1204 return -EINVAL;
2dbc5c4c 1205 else if (hwep->ep.desc == NULL)
aa69a809
DL
1206 return -EBUSY;
1207
2dbc5c4c 1208 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1209
1210 /* only internal SW should disable ctrl endpts */
1211
2dbc5c4c 1212 direction = hwep->dir;
aa69a809 1213 do {
2dbc5c4c
AS
1214 retval |= _ep_nuke(hwep);
1215 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
aa69a809 1216
2dbc5c4c
AS
1217 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1218 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1219
2dbc5c4c 1220 } while (hwep->dir != direction);
aa69a809 1221
2dbc5c4c 1222 hwep->ep.desc = NULL;
aa69a809 1223
2dbc5c4c 1224 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1225 return retval;
1226}
1227
1228/**
1229 * ep_alloc_request: allocate a request object to use with this endpoint
1230 *
1231 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1232 */
1233static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1234{
8e22978c 1235 struct ci_hw_req *hwreq = NULL;
aa69a809 1236
0f089094 1237 if (ep == NULL)
aa69a809 1238 return NULL;
aa69a809 1239
8e22978c 1240 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
2dbc5c4c
AS
1241 if (hwreq != NULL) {
1242 INIT_LIST_HEAD(&hwreq->queue);
1243 INIT_LIST_HEAD(&hwreq->tds);
aa69a809
DL
1244 }
1245
2dbc5c4c 1246 return (hwreq == NULL) ? NULL : &hwreq->req;
aa69a809
DL
1247}
1248
1249/**
1250 * ep_free_request: frees a request object
1251 *
1252 * Check usb_ep_free_request() at "usb_gadget.h" for details
1253 */
1254static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1255{
8e22978c
AS
1256 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1257 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
2e270412 1258 struct td_node *node, *tmpnode;
aa69a809
DL
1259 unsigned long flags;
1260
aa69a809 1261 if (ep == NULL || req == NULL) {
aa69a809 1262 return;
2dbc5c4c
AS
1263 } else if (!list_empty(&hwreq->queue)) {
1264 dev_err(hwep->ci->dev, "freeing queued request\n");
aa69a809
DL
1265 return;
1266 }
1267
2dbc5c4c 1268 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1269
2dbc5c4c
AS
1270 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1271 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
1272 list_del_init(&node->td);
1273 node->ptr = NULL;
1274 kfree(node);
1275 }
cc9e6c49 1276
2dbc5c4c 1277 kfree(hwreq);
aa69a809 1278
2dbc5c4c 1279 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1280}
1281
1282/**
1283 * ep_queue: queues (submits) an I/O request to an endpoint
1284 *
1285 * Check usb_ep_queue()* at usb_gadget.h" for details
1286 */
1287static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1288 gfp_t __maybe_unused gfp_flags)
1289{
8e22978c 1290 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1291 int retval = 0;
1292 unsigned long flags;
1293
2dbc5c4c 1294 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1295 return -EINVAL;
1296
2dbc5c4c 1297 spin_lock_irqsave(hwep->lock, flags);
dd064e9d 1298 retval = _ep_queue(ep, req, gfp_flags);
2dbc5c4c 1299 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1300 return retval;
1301}
1302
1303/**
1304 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1305 *
1306 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1307 */
1308static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1309{
8e22978c
AS
1310 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1311 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
aa69a809
DL
1312 unsigned long flags;
1313
2dbc5c4c
AS
1314 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1315 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1316 list_empty(&hwep->qh.queue))
aa69a809
DL
1317 return -EINVAL;
1318
2dbc5c4c 1319 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1320
2dbc5c4c 1321 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809
DL
1322
1323 /* pop request */
2dbc5c4c 1324 list_del_init(&hwreq->queue);
5e0aa49e 1325
2dbc5c4c 1326 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
5e0aa49e 1327
aa69a809
DL
1328 req->status = -ECONNRESET;
1329
2dbc5c4c
AS
1330 if (hwreq->req.complete != NULL) {
1331 spin_unlock(hwep->lock);
1332 hwreq->req.complete(&hwep->ep, &hwreq->req);
1333 spin_lock(hwep->lock);
aa69a809
DL
1334 }
1335
2dbc5c4c 1336 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1337 return 0;
1338}
1339
1340/**
1341 * ep_set_halt: sets the endpoint halt feature
1342 *
1343 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1344 */
1345static int ep_set_halt(struct usb_ep *ep, int value)
1346{
8e22978c 1347 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1348 int direction, retval = 0;
1349 unsigned long flags;
1350
2dbc5c4c 1351 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1352 return -EINVAL;
1353
2dbc5c4c 1354 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
e4ce4ecd
MG
1355 return -EOPNOTSUPP;
1356
2dbc5c4c 1357 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1358
1359#ifndef STALL_IN
1360 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2dbc5c4c
AS
1361 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1362 !list_empty(&hwep->qh.queue)) {
1363 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1364 return -EAGAIN;
1365 }
1366#endif
1367
2dbc5c4c 1368 direction = hwep->dir;
aa69a809 1369 do {
2dbc5c4c 1370 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
aa69a809
DL
1371
1372 if (!value)
2dbc5c4c 1373 hwep->wedge = 0;
aa69a809 1374
2dbc5c4c
AS
1375 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1376 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1377
2dbc5c4c 1378 } while (hwep->dir != direction);
aa69a809 1379
2dbc5c4c 1380 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1381 return retval;
1382}
1383
1384/**
1385 * ep_set_wedge: sets the halt feature and ignores clear requests
1386 *
1387 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1388 */
1389static int ep_set_wedge(struct usb_ep *ep)
1390{
8e22978c 1391 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1392 unsigned long flags;
1393
2dbc5c4c 1394 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1395 return -EINVAL;
1396
2dbc5c4c
AS
1397 spin_lock_irqsave(hwep->lock, flags);
1398 hwep->wedge = 1;
1399 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1400
1401 return usb_ep_set_halt(ep);
1402}
1403
1404/**
1405 * ep_fifo_flush: flushes contents of a fifo
1406 *
1407 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1408 */
1409static void ep_fifo_flush(struct usb_ep *ep)
1410{
8e22978c 1411 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1412 unsigned long flags;
1413
aa69a809 1414 if (ep == NULL) {
2dbc5c4c 1415 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
aa69a809
DL
1416 return;
1417 }
1418
2dbc5c4c 1419 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1420
2dbc5c4c 1421 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1422
2dbc5c4c 1423 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1424}
1425
1426/**
1427 * Endpoint-specific part of the API to the USB controller hardware
1428 * Check "usb_gadget.h" for details
1429 */
1430static const struct usb_ep_ops usb_ep_ops = {
1431 .enable = ep_enable,
1432 .disable = ep_disable,
1433 .alloc_request = ep_alloc_request,
1434 .free_request = ep_free_request,
1435 .queue = ep_queue,
1436 .dequeue = ep_dequeue,
1437 .set_halt = ep_set_halt,
1438 .set_wedge = ep_set_wedge,
1439 .fifo_flush = ep_fifo_flush,
1440};
1441
1442/******************************************************************************
1443 * GADGET block
1444 *****************************************************************************/
8e22978c 1445static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
f01ef574 1446{
8e22978c 1447 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
f01ef574
PK
1448 unsigned long flags;
1449 int gadget_ready = 0;
1450
26c696c6
RZ
1451 spin_lock_irqsave(&ci->lock, flags);
1452 ci->vbus_active = is_active;
1453 if (ci->driver)
f01ef574 1454 gadget_ready = 1;
26c696c6 1455 spin_unlock_irqrestore(&ci->lock, flags);
f01ef574
PK
1456
1457 if (gadget_ready) {
1458 if (is_active) {
c036019e 1459 pm_runtime_get_sync(&_gadget->dev);
26c696c6
RZ
1460 hw_device_reset(ci, USBMODE_CM_DC);
1461 hw_device_state(ci, ci->ep0out->qh.dma);
a107f8c5 1462 dev_dbg(ci->dev, "Connected to host\n");
f01ef574 1463 } else {
26c696c6
RZ
1464 hw_device_state(ci, 0);
1465 if (ci->platdata->notify_event)
1466 ci->platdata->notify_event(ci,
8e22978c 1467 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6 1468 _gadget_stop_activity(&ci->gadget);
c036019e 1469 pm_runtime_put_sync(&_gadget->dev);
a107f8c5 1470 dev_dbg(ci->dev, "Disconnected from host\n");
f01ef574
PK
1471 }
1472 }
1473
1474 return 0;
1475}
1476
8e22978c 1477static int ci_udc_wakeup(struct usb_gadget *_gadget)
e2b61c1d 1478{
8e22978c 1479 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
e2b61c1d
PK
1480 unsigned long flags;
1481 int ret = 0;
1482
26c696c6
RZ
1483 spin_lock_irqsave(&ci->lock, flags);
1484 if (!ci->remote_wakeup) {
e2b61c1d 1485 ret = -EOPNOTSUPP;
e2b61c1d
PK
1486 goto out;
1487 }
26c696c6 1488 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
e2b61c1d 1489 ret = -EINVAL;
e2b61c1d
PK
1490 goto out;
1491 }
26c696c6 1492 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
e2b61c1d 1493out:
26c696c6 1494 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d
PK
1495 return ret;
1496}
1497
8e22978c 1498static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
d860852e 1499{
8e22978c 1500 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
d860852e 1501
26c696c6 1502 if (ci->transceiver)
2dbc5c4c 1503 return usb_phy_set_power(ci->transceiver, ma);
d860852e
PK
1504 return -ENOTSUPP;
1505}
1506
c0a48e6c
MG
1507/* Change Data+ pullup status
1508 * this func is used by usb_gadget_connect/disconnet
1509 */
8e22978c 1510static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
c0a48e6c 1511{
8e22978c 1512 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
c0a48e6c 1513
4a64783b
PC
1514 if (!ci->vbus_active)
1515 return -EOPNOTSUPP;
1516
c0a48e6c
MG
1517 if (is_on)
1518 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1519 else
1520 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1521
1522 return 0;
1523}
1524
8e22978c 1525static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1526 struct usb_gadget_driver *driver);
8e22978c 1527static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1528 struct usb_gadget_driver *driver);
aa69a809
DL
1529/**
1530 * Device operations part of the API to the USB controller hardware,
1531 * which don't involve endpoints (or i/o)
1532 * Check "usb_gadget.h" for details
1533 */
f01ef574 1534static const struct usb_gadget_ops usb_gadget_ops = {
8e22978c
AS
1535 .vbus_session = ci_udc_vbus_session,
1536 .wakeup = ci_udc_wakeup,
1537 .pullup = ci_udc_pullup,
1538 .vbus_draw = ci_udc_vbus_draw,
1539 .udc_start = ci_udc_start,
1540 .udc_stop = ci_udc_stop,
f01ef574 1541};
aa69a809 1542
8e22978c 1543static int init_eps(struct ci_hdrc *ci)
aa69a809 1544{
790c2d52 1545 int retval = 0, i, j;
aa69a809 1546
26c696c6 1547 for (i = 0; i < ci->hw_ep_max/2; i++)
ca9cfea0 1548 for (j = RX; j <= TX; j++) {
26c696c6 1549 int k = i + j * ci->hw_ep_max/2;
8e22978c 1550 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
aa69a809 1551
2dbc5c4c 1552 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
ca9cfea0 1553 (j == TX) ? "in" : "out");
aa69a809 1554
2dbc5c4c
AS
1555 hwep->ci = ci;
1556 hwep->lock = &ci->lock;
1557 hwep->td_pool = ci->td_pool;
aa69a809 1558
2dbc5c4c
AS
1559 hwep->ep.name = hwep->name;
1560 hwep->ep.ops = &usb_ep_ops;
7f67c38b
MG
1561 /*
1562 * for ep0: maxP defined in desc, for other
1563 * eps, maxP is set by epautoconfig() called
1564 * by gadget layer
1565 */
2dbc5c4c 1566 hwep->ep.maxpacket = (unsigned short)~0;
aa69a809 1567
2dbc5c4c
AS
1568 INIT_LIST_HEAD(&hwep->qh.queue);
1569 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1570 &hwep->qh.dma);
1571 if (hwep->qh.ptr == NULL)
aa69a809
DL
1572 retval = -ENOMEM;
1573 else
2dbc5c4c 1574 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
ca9cfea0 1575
d36ade60
AS
1576 /*
1577 * set up shorthands for ep0 out and in endpoints,
1578 * don't add to gadget's ep_list
1579 */
1580 if (i == 0) {
1581 if (j == RX)
2dbc5c4c 1582 ci->ep0out = hwep;
d36ade60 1583 else
2dbc5c4c 1584 ci->ep0in = hwep;
d36ade60 1585
2dbc5c4c 1586 hwep->ep.maxpacket = CTRL_PAYLOAD_MAX;
ca9cfea0 1587 continue;
d36ade60 1588 }
ca9cfea0 1589
2dbc5c4c 1590 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
ca9cfea0 1591 }
790c2d52
AS
1592
1593 return retval;
1594}
1595
8e22978c 1596static void destroy_eps(struct ci_hdrc *ci)
ad6b1b97
MKB
1597{
1598 int i;
1599
1600 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1601 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
ad6b1b97 1602
e7ef5265
PC
1603 if (hwep->pending_td)
1604 free_pending_td(hwep);
2dbc5c4c 1605 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
ad6b1b97
MKB
1606 }
1607}
1608
790c2d52 1609/**
8e22978c 1610 * ci_udc_start: register a gadget driver
1f339d84 1611 * @gadget: our gadget
790c2d52 1612 * @driver: the driver being registered
790c2d52 1613 *
790c2d52
AS
1614 * Interrupts are enabled here.
1615 */
8e22978c 1616static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1617 struct usb_gadget_driver *driver)
790c2d52 1618{
8e22978c 1619 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
790c2d52 1620 unsigned long flags;
790c2d52
AS
1621 int retval = -ENOMEM;
1622
1f339d84 1623 if (driver->disconnect == NULL)
790c2d52 1624 return -EINVAL;
790c2d52 1625
790c2d52 1626
26c696c6
RZ
1627 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1628 retval = usb_ep_enable(&ci->ep0out->ep);
ac1aa6a2
A
1629 if (retval)
1630 return retval;
877c1f54 1631
26c696c6
RZ
1632 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1633 retval = usb_ep_enable(&ci->ep0in->ep);
ac1aa6a2
A
1634 if (retval)
1635 return retval;
26c696c6
RZ
1636 spin_lock_irqsave(&ci->lock, flags);
1637
1638 ci->driver = driver;
1639 pm_runtime_get_sync(&ci->gadget.dev);
d268e9bc
PC
1640 if (ci->vbus_active) {
1641 hw_device_reset(ci, USBMODE_CM_DC);
1642 } else {
1643 pm_runtime_put_sync(&ci->gadget.dev);
1644 goto done;
f01ef574
PK
1645 }
1646
26c696c6 1647 retval = hw_device_state(ci, ci->ep0out->qh.dma);
c036019e 1648 if (retval)
26c696c6 1649 pm_runtime_put_sync(&ci->gadget.dev);
aa69a809
DL
1650
1651 done:
26c696c6 1652 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809
DL
1653 return retval;
1654}
aa69a809
DL
1655
1656/**
8e22978c 1657 * ci_udc_stop: unregister a gadget driver
aa69a809 1658 */
8e22978c 1659static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1660 struct usb_gadget_driver *driver)
aa69a809 1661{
8e22978c 1662 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1f339d84 1663 unsigned long flags;
aa69a809 1664
26c696c6 1665 spin_lock_irqsave(&ci->lock, flags);
aa69a809 1666
d268e9bc 1667 if (ci->vbus_active) {
26c696c6
RZ
1668 hw_device_state(ci, 0);
1669 if (ci->platdata->notify_event)
1670 ci->platdata->notify_event(ci,
8e22978c 1671 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6
RZ
1672 spin_unlock_irqrestore(&ci->lock, flags);
1673 _gadget_stop_activity(&ci->gadget);
1674 spin_lock_irqsave(&ci->lock, flags);
1675 pm_runtime_put(&ci->gadget.dev);
f01ef574 1676 }
aa69a809 1677
f84839da 1678 ci->driver = NULL;
26c696c6 1679 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809 1680
aa69a809
DL
1681 return 0;
1682}
aa69a809
DL
1683
1684/******************************************************************************
1685 * BUS block
1686 *****************************************************************************/
1687/**
26c696c6 1688 * udc_irq: ci interrupt handler
aa69a809
DL
1689 *
1690 * This function returns IRQ_HANDLED if the IRQ has been handled
1691 * It locks access to registers
1692 */
8e22978c 1693static irqreturn_t udc_irq(struct ci_hdrc *ci)
aa69a809 1694{
aa69a809
DL
1695 irqreturn_t retval;
1696 u32 intr;
1697
26c696c6 1698 if (ci == NULL)
aa69a809 1699 return IRQ_HANDLED;
aa69a809 1700
26c696c6 1701 spin_lock(&ci->lock);
f01ef574 1702
8e22978c 1703 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
26c696c6 1704 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
758fc986 1705 USBMODE_CM_DC) {
26c696c6 1706 spin_unlock(&ci->lock);
f01ef574
PK
1707 return IRQ_NONE;
1708 }
1709 }
26c696c6 1710 intr = hw_test_and_clear_intr_active(ci);
aa69a809 1711
e443b333 1712 if (intr) {
aa69a809 1713 /* order defines priority - do NOT change it */
e443b333 1714 if (USBi_URI & intr)
26c696c6 1715 isr_reset_handler(ci);
e443b333 1716
aa69a809 1717 if (USBi_PCI & intr) {
26c696c6 1718 ci->gadget.speed = hw_port_is_high_speed(ci) ?
aa69a809 1719 USB_SPEED_HIGH : USB_SPEED_FULL;
26c696c6
RZ
1720 if (ci->suspended && ci->driver->resume) {
1721 spin_unlock(&ci->lock);
1722 ci->driver->resume(&ci->gadget);
1723 spin_lock(&ci->lock);
1724 ci->suspended = 0;
e2b61c1d 1725 }
aa69a809 1726 }
e443b333
AS
1727
1728 if (USBi_UI & intr)
26c696c6 1729 isr_tr_complete_handler(ci);
e443b333 1730
e2b61c1d 1731 if (USBi_SLI & intr) {
26c696c6
RZ
1732 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1733 ci->driver->suspend) {
1734 ci->suspended = 1;
1735 spin_unlock(&ci->lock);
1736 ci->driver->suspend(&ci->gadget);
1737 spin_lock(&ci->lock);
e2b61c1d 1738 }
e2b61c1d 1739 }
aa69a809
DL
1740 retval = IRQ_HANDLED;
1741 } else {
aa69a809
DL
1742 retval = IRQ_NONE;
1743 }
26c696c6 1744 spin_unlock(&ci->lock);
aa69a809
DL
1745
1746 return retval;
1747}
1748
aa69a809 1749/**
5f36e231 1750 * udc_start: initialize gadget role
26c696c6 1751 * @ci: chipidea controller
aa69a809 1752 */
8e22978c 1753static int udc_start(struct ci_hdrc *ci)
aa69a809 1754{
26c696c6 1755 struct device *dev = ci->dev;
aa69a809
DL
1756 int retval = 0;
1757
26c696c6 1758 spin_lock_init(&ci->lock);
aa69a809 1759
26c696c6
RZ
1760 ci->gadget.ops = &usb_gadget_ops;
1761 ci->gadget.speed = USB_SPEED_UNKNOWN;
1762 ci->gadget.max_speed = USB_SPEED_HIGH;
1763 ci->gadget.is_otg = 0;
1764 ci->gadget.name = ci->platdata->name;
aa69a809 1765
26c696c6 1766 INIT_LIST_HEAD(&ci->gadget.ep_list);
aa69a809 1767
790c2d52 1768 /* alloc resources */
8e22978c
AS
1769 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1770 sizeof(struct ci_hw_qh),
1771 64, CI_HDRC_PAGE_SIZE);
26c696c6 1772 if (ci->qh_pool == NULL)
5f36e231 1773 return -ENOMEM;
790c2d52 1774
8e22978c
AS
1775 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1776 sizeof(struct ci_hw_td),
1777 64, CI_HDRC_PAGE_SIZE);
26c696c6 1778 if (ci->td_pool == NULL) {
790c2d52
AS
1779 retval = -ENOMEM;
1780 goto free_qh_pool;
1781 }
1782
26c696c6 1783 retval = init_eps(ci);
790c2d52
AS
1784 if (retval)
1785 goto free_pools;
1786
26c696c6 1787 ci->gadget.ep0 = &ci->ep0in->ep;
f01ef574 1788
d343f4e8 1789 if (ci->global_phy) {
a2c3d690 1790 ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
d343f4e8
AS
1791 if (IS_ERR(ci->transceiver))
1792 ci->transceiver = NULL;
1793 }
f01ef574 1794
8e22978c 1795 if (ci->platdata->flags & CI_HDRC_REQUIRE_TRANSCEIVER) {
26c696c6 1796 if (ci->transceiver == NULL) {
f01ef574 1797 retval = -ENODEV;
ad6b1b97 1798 goto destroy_eps;
f01ef574
PK
1799 }
1800 }
1801
d343f4e8 1802 if (ci->transceiver) {
26c696c6
RZ
1803 retval = otg_set_peripheral(ci->transceiver->otg,
1804 &ci->gadget);
d66895f9
PC
1805 /*
1806 * If we implement all USB functions using chipidea drivers,
1807 * it doesn't need to call above API, meanwhile, if we only
1808 * use gadget function, calling above API is useless.
1809 */
1810 if (retval && retval != -ENOTSUPP)
64dc9e2e 1811 goto put_transceiver;
aa69a809 1812 }
0f91349b 1813
26c696c6 1814 retval = usb_add_gadget_udc(dev, &ci->gadget);
0f91349b
SAS
1815 if (retval)
1816 goto remove_trans;
1817
26c696c6
RZ
1818 pm_runtime_no_callbacks(&ci->gadget.dev);
1819 pm_runtime_enable(&ci->gadget.dev);
aa69a809 1820
a107f8c5
PC
1821 /* Update ci->vbus_active */
1822 ci_handle_vbus_change(ci);
1823
aa69a809
DL
1824 return retval;
1825
0f91349b 1826remove_trans:
d343f4e8 1827 if (ci->transceiver) {
c9d1f947 1828 otg_set_peripheral(ci->transceiver->otg, NULL);
a2c3d690
RZ
1829 if (ci->global_phy)
1830 usb_put_phy(ci->transceiver);
0f91349b
SAS
1831 }
1832
0917ba84 1833 dev_err(dev, "error = %i\n", retval);
f01ef574 1834put_transceiver:
d343f4e8 1835 if (ci->transceiver && ci->global_phy)
26c696c6 1836 usb_put_phy(ci->transceiver);
ad6b1b97
MKB
1837destroy_eps:
1838 destroy_eps(ci);
790c2d52 1839free_pools:
26c696c6 1840 dma_pool_destroy(ci->td_pool);
790c2d52 1841free_qh_pool:
26c696c6 1842 dma_pool_destroy(ci->qh_pool);
aa69a809
DL
1843 return retval;
1844}
1845
1846/**
3f124d23 1847 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
aa69a809
DL
1848 *
1849 * No interrupts active, the IRQ has been released
1850 */
3f124d23 1851void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
aa69a809 1852{
3f124d23 1853 if (!ci->roles[CI_ROLE_GADGET])
aa69a809 1854 return;
0f089094 1855
26c696c6 1856 usb_del_gadget_udc(&ci->gadget);
aa69a809 1857
ad6b1b97 1858 destroy_eps(ci);
790c2d52 1859
26c696c6
RZ
1860 dma_pool_destroy(ci->td_pool);
1861 dma_pool_destroy(ci->qh_pool);
790c2d52 1862
d343f4e8 1863 if (ci->transceiver) {
26c696c6 1864 otg_set_peripheral(ci->transceiver->otg, NULL);
a2c3d690
RZ
1865 if (ci->global_phy)
1866 usb_put_phy(ci->transceiver);
f01ef574 1867 }
3f124d23
PC
1868}
1869
1870static int udc_id_switch_for_device(struct ci_hdrc *ci)
1871{
1872 if (ci->is_otg) {
1873 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1874 ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
1875 }
1876
1877 return 0;
1878}
1879
1880static void udc_id_switch_for_host(struct ci_hdrc *ci)
1881{
1882 if (ci->is_otg) {
1883 /* host doesn't care B_SESSION_VALID event */
1884 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1885 ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
1886 }
5f36e231
AS
1887}
1888
1889/**
1890 * ci_hdrc_gadget_init - initialize device related bits
1891 * ci: the controller
1892 *
3f124d23 1893 * This function initializes the gadget, if the device is "device capable".
5f36e231 1894 */
8e22978c 1895int ci_hdrc_gadget_init(struct ci_hdrc *ci)
5f36e231
AS
1896{
1897 struct ci_role_driver *rdrv;
1898
1899 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1900 return -ENXIO;
1901
1902 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1903 if (!rdrv)
1904 return -ENOMEM;
1905
3f124d23
PC
1906 rdrv->start = udc_id_switch_for_device;
1907 rdrv->stop = udc_id_switch_for_host;
5f36e231
AS
1908 rdrv->irq = udc_irq;
1909 rdrv->name = "gadget";
1910 ci->roles[CI_ROLE_GADGET] = rdrv;
aa69a809 1911
3f124d23 1912 return udc_start(ci);
aa69a809 1913}
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