usb: chipidea: udc: add ep capabilities support
[deliverable/linux.git] / drivers / usb / chipidea / udc.c
CommitLineData
aa69a809 1/*
eb70e5ab 2 * udc.c - ChipIdea UDC driver
aa69a809
DL
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
36825a2d 13#include <linux/delay.h>
aa69a809
DL
14#include <linux/device.h>
15#include <linux/dmapool.h>
ded017ee 16#include <linux/err.h>
5b08319f 17#include <linux/irqreturn.h>
aa69a809 18#include <linux/kernel.h>
5a0e3ad6 19#include <linux/slab.h>
c036019e 20#include <linux/pm_runtime.h>
aa69a809
DL
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
95f5555f 23#include <linux/usb/otg-fsm.h>
e443b333 24#include <linux/usb/chipidea.h>
aa69a809 25
e443b333
AS
26#include "ci.h"
27#include "udc.h"
28#include "bits.h"
29#include "debug.h"
3f124d23 30#include "otg.h"
4dcf720c 31#include "otg_fsm.h"
954aad8c 32
aa69a809
DL
33/* control endpoint description */
34static const struct usb_endpoint_descriptor
ca9cfea0 35ctrl_endpt_out_desc = {
aa69a809
DL
36 .bLength = USB_DT_ENDPOINT_SIZE,
37 .bDescriptorType = USB_DT_ENDPOINT,
38
ca9cfea0
PK
39 .bEndpointAddress = USB_DIR_OUT,
40 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
41 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
42};
43
44static const struct usb_endpoint_descriptor
45ctrl_endpt_in_desc = {
46 .bLength = USB_DT_ENDPOINT_SIZE,
47 .bDescriptorType = USB_DT_ENDPOINT,
48
49 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL
50 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
51 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
52};
53
aa69a809
DL
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + (dir ? 16 : 0);
64}
65
8e22978c 66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
dd39c358 67{
26c696c6 68 int fill = 16 - ci->hw_ep_max / 2;
dd39c358 69
26c696c6 70 if (n >= ci->hw_ep_max / 2)
dd39c358
MKB
71 n += fill;
72
73 return n;
74}
75
aa69a809 76/**
c0a48e6c 77 * hw_device_state: enables/disables interrupts (execute without interruption)
aa69a809
DL
78 * @dma: 0 => disable, !0 => enable and set dma engine
79 *
80 * This function returns an error code
81 */
8e22978c 82static int hw_device_state(struct ci_hdrc *ci, u32 dma)
aa69a809
DL
83{
84 if (dma) {
26c696c6 85 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
aa69a809 86 /* interrupt, error, port change, reset, sleep/suspend */
26c696c6 87 hw_write(ci, OP_USBINTR, ~0,
aa69a809 88 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
aa69a809 89 } else {
26c696c6 90 hw_write(ci, OP_USBINTR, ~0, 0);
aa69a809
DL
91 }
92 return 0;
93}
94
95/**
96 * hw_ep_flush: flush endpoint fifo (execute without interruption)
97 * @num: endpoint number
98 * @dir: endpoint direction
99 *
100 * This function returns an error code
101 */
8e22978c 102static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
103{
104 int n = hw_ep_bit(num, dir);
105
106 do {
107 /* flush any pending transfer */
5bf5dbed 108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
26c696c6 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
aa69a809 110 cpu_relax();
26c696c6 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
aa69a809
DL
112
113 return 0;
114}
115
116/**
117 * hw_ep_disable: disables endpoint (execute without interruption)
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
8e22978c 123static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
aa69a809 124{
26c696c6
RZ
125 hw_ep_flush(ci, num, dir);
126 hw_write(ci, OP_ENDPTCTRL + num,
d3595d13 127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
aa69a809
DL
128 return 0;
129}
130
131/**
132 * hw_ep_enable: enables endpoint (execute without interruption)
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
8e22978c 139static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
aa69a809
DL
140{
141 u32 mask, data;
142
143 if (dir) {
144 mask = ENDPTCTRL_TXT; /* type */
727b4ddb 145 data = type << __ffs(mask);
aa69a809
DL
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
727b4ddb 154 data = type << __ffs(mask);
aa69a809
DL
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
26c696c6 162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
aa69a809
DL
163 return 0;
164}
165
166/**
167 * hw_ep_get_halt: return endpoint halt status
168 * @num: endpoint number
169 * @dir: endpoint direction
170 *
171 * This function returns 1 if endpoint halted
172 */
8e22978c 173static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
174{
175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176
26c696c6 177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
aa69a809
DL
178}
179
aa69a809
DL
180/**
181 * hw_ep_prime: primes endpoint (execute without interruption)
182 * @num: endpoint number
183 * @dir: endpoint direction
184 * @is_ctrl: true if control endpoint
185 *
186 * This function returns an error code
187 */
8e22978c 188static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
aa69a809
DL
189{
190 int n = hw_ep_bit(num, dir);
191
26c696c6 192 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
193 return -EAGAIN;
194
5bf5dbed 195 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
aa69a809 196
26c696c6 197 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
aa69a809 198 cpu_relax();
26c696c6 199 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
200 return -EAGAIN;
201
202 /* status shoult be tested according with manual but it doesn't work */
203 return 0;
204}
205
206/**
207 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
208 * without interruption)
209 * @num: endpoint number
210 * @dir: endpoint direction
211 * @value: true => stall, false => unstall
212 *
213 * This function returns an error code
214 */
8e22978c 215static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
aa69a809
DL
216{
217 if (value != 0 && value != 1)
218 return -EINVAL;
219
220 do {
8e22978c 221 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
aa69a809
DL
222 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
223 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
224
225 /* data toggle - reserved for EP0 but it's in ESS */
26c696c6 226 hw_write(ci, reg, mask_xs|mask_xr,
262c1632 227 value ? mask_xs : mask_xr);
26c696c6 228 } while (value != hw_ep_get_halt(ci, num, dir));
aa69a809
DL
229
230 return 0;
231}
232
aa69a809
DL
233/**
234 * hw_is_port_high_speed: test if port is high speed
235 *
236 * This function returns true if high speed port
237 */
8e22978c 238static int hw_port_is_high_speed(struct ci_hdrc *ci)
aa69a809 239{
26c696c6
RZ
240 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
241 hw_read(ci, OP_PORTSC, PORTSC_HSP);
aa69a809
DL
242}
243
aa69a809
DL
244/**
245 * hw_test_and_clear_complete: test & clear complete status (execute without
246 * interruption)
dd39c358 247 * @n: endpoint number
aa69a809
DL
248 *
249 * This function returns complete status
250 */
8e22978c 251static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
aa69a809 252{
26c696c6
RZ
253 n = ep_to_bit(ci, n);
254 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
aa69a809
DL
255}
256
257/**
258 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
259 * without interruption)
260 *
261 * This function returns active interrutps
262 */
8e22978c 263static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
aa69a809 264{
26c696c6 265 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
aa69a809 266
26c696c6 267 hw_write(ci, OP_USBSTS, ~0, reg);
aa69a809
DL
268 return reg;
269}
270
271/**
272 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
273 * interruption)
274 *
275 * This function returns guard value
276 */
8e22978c 277static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
aa69a809 278{
26c696c6 279 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
aa69a809
DL
280}
281
282/**
283 * hw_test_and_set_setup_guard: test & set setup guard (execute without
284 * interruption)
285 *
286 * This function returns guard value
287 */
8e22978c 288static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
aa69a809 289{
26c696c6 290 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
aa69a809
DL
291}
292
293/**
294 * hw_usb_set_address: configures USB address (execute without interruption)
295 * @value: new USB address
296 *
ef15e549
AS
297 * This function explicitly sets the address, without the "USBADRA" (advance)
298 * feature, which is not supported by older versions of the controller.
aa69a809 299 */
8e22978c 300static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
aa69a809 301{
26c696c6 302 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
727b4ddb 303 value << __ffs(DEVICEADDR_USBADR));
aa69a809
DL
304}
305
306/**
307 * hw_usb_reset: restart device after a bus reset (execute without
308 * interruption)
309 *
310 * This function returns an error code
311 */
8e22978c 312static int hw_usb_reset(struct ci_hdrc *ci)
aa69a809 313{
26c696c6 314 hw_usb_set_address(ci, 0);
aa69a809
DL
315
316 /* ESS flushes only at end?!? */
26c696c6 317 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
aa69a809
DL
318
319 /* clear setup token semaphores */
26c696c6 320 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
aa69a809
DL
321
322 /* clear complete status */
26c696c6 323 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
aa69a809
DL
324
325 /* wait until all bits cleared */
26c696c6 326 while (hw_read(ci, OP_ENDPTPRIME, ~0))
aa69a809
DL
327 udelay(10); /* not RTOS friendly */
328
329 /* reset all endpoints ? */
330
331 /* reset internal status and wait for further instructions
332 no need to verify the port reset status (ESS does it) */
333
334 return 0;
335}
336
aa69a809
DL
337/******************************************************************************
338 * UTIL block
339 *****************************************************************************/
cc9e6c49 340
8e22978c 341static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
cc9e6c49
MG
342 unsigned length)
343{
2e270412
MG
344 int i;
345 u32 temp;
cc9e6c49
MG
346 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
347 GFP_ATOMIC);
348
349 if (node == NULL)
350 return -ENOMEM;
351
2dbc5c4c 352 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
cc9e6c49
MG
353 &node->dma);
354 if (node->ptr == NULL) {
355 kfree(node);
356 return -ENOMEM;
357 }
358
8e22978c 359 memset(node->ptr, 0, sizeof(struct ci_hw_td));
2e270412
MG
360 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
361 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
362 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
2fc5a7da
PC
363 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
364 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
365
366 if (hwreq->req.length == 0
367 || hwreq->req.length % hwep->ep.maxpacket)
368 mul++;
369 node->ptr->token |= mul << __ffs(TD_MULTO);
370 }
2e270412 371
2dbc5c4c 372 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
2e270412
MG
373 if (length) {
374 node->ptr->page[0] = cpu_to_le32(temp);
375 for (i = 1; i < TD_PAGE_COUNT; i++) {
8e22978c 376 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
2e270412
MG
377 page &= ~TD_RESERVED_MASK;
378 node->ptr->page[i] = cpu_to_le32(page);
379 }
380 }
381
2dbc5c4c 382 hwreq->req.actual += length;
cc9e6c49 383
2dbc5c4c 384 if (!list_empty(&hwreq->tds)) {
cc9e6c49 385 /* get the last entry */
2dbc5c4c 386 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
387 struct td_node, td);
388 lastnode->ptr->next = cpu_to_le32(node->dma);
389 }
390
391 INIT_LIST_HEAD(&node->td);
2dbc5c4c 392 list_add_tail(&node->td, &hwreq->tds);
cc9e6c49
MG
393
394 return 0;
395}
396
aa69a809
DL
397/**
398 * _usb_addr: calculates endpoint address from direction & number
399 * @ep: endpoint
400 */
8e22978c 401static inline u8 _usb_addr(struct ci_hw_ep *ep)
aa69a809
DL
402{
403 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
404}
405
406/**
407 * _hardware_queue: configures a request at hardware level
408 * @gadget: gadget
2dbc5c4c 409 * @hwep: endpoint
aa69a809
DL
410 *
411 * This function returns an error code
412 */
8e22978c 413static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 414{
8e22978c 415 struct ci_hdrc *ci = hwep->ci;
0e6ca199 416 int ret = 0;
2dbc5c4c 417 unsigned rest = hwreq->req.length;
2e270412 418 int pages = TD_PAGE_COUNT;
cc9e6c49 419 struct td_node *firstnode, *lastnode;
aa69a809 420
aa69a809 421 /* don't queue twice */
2dbc5c4c 422 if (hwreq->req.status == -EALREADY)
aa69a809
DL
423 return -EALREADY;
424
2dbc5c4c 425 hwreq->req.status = -EALREADY;
aa69a809 426
2dbc5c4c 427 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
5e0aa49e
AS
428 if (ret)
429 return ret;
430
2e270412
MG
431 /*
432 * The first buffer could be not page aligned.
433 * In that case we have to span into one extra td.
434 */
2dbc5c4c 435 if (hwreq->req.dma % PAGE_SIZE)
2e270412 436 pages--;
cc9e6c49 437
2e270412 438 if (rest == 0)
2dbc5c4c 439 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 440
2e270412 441 while (rest > 0) {
2dbc5c4c 442 unsigned count = min(hwreq->req.length - hwreq->req.actual,
8e22978c 443 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
2dbc5c4c 444 add_td_to_list(hwep, hwreq, count);
2e270412 445 rest -= count;
0e6ca199 446 }
aa69a809 447
2dbc5c4c
AS
448 if (hwreq->req.zero && hwreq->req.length
449 && (hwreq->req.length % hwep->ep.maxpacket == 0))
450 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 451
2dbc5c4c 452 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
2e270412 453
2dbc5c4c 454 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
455 struct td_node, td);
456
457 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
2dbc5c4c 458 if (!hwreq->req.no_interrupt)
cc9e6c49 459 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
a9c17430
MG
460 wmb();
461
2dbc5c4c
AS
462 hwreq->req.actual = 0;
463 if (!list_empty(&hwep->qh.queue)) {
8e22978c 464 struct ci_hw_req *hwreqprev;
2dbc5c4c 465 int n = hw_ep_bit(hwep->num, hwep->dir);
0e6ca199 466 int tmp_stat;
cc9e6c49
MG
467 struct td_node *prevlastnode;
468 u32 next = firstnode->dma & TD_ADDR_MASK;
0e6ca199 469
2dbc5c4c 470 hwreqprev = list_entry(hwep->qh.queue.prev,
8e22978c 471 struct ci_hw_req, queue);
2dbc5c4c 472 prevlastnode = list_entry(hwreqprev->tds.prev,
cc9e6c49
MG
473 struct td_node, td);
474
475 prevlastnode->ptr->next = cpu_to_le32(next);
0e6ca199 476 wmb();
26c696c6 477 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
0e6ca199
PK
478 goto done;
479 do {
26c696c6
RZ
480 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
481 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
482 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
483 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
0e6ca199
PK
484 if (tmp_stat)
485 goto done;
486 }
487
488 /* QH configuration */
2dbc5c4c
AS
489 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
490 hwep->qh.ptr->td.token &=
080ff5f4 491 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
aa69a809 492
2fc5a7da 493 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
2dbc5c4c 494 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
e4ce4ecd 495
2fc5a7da
PC
496 if (hwreq->req.length == 0
497 || hwreq->req.length % hwep->ep.maxpacket)
e4ce4ecd 498 mul++;
2dbc5c4c 499 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
e4ce4ecd
MG
500 }
501
aa69a809
DL
502 wmb(); /* synchronize before ep prime */
503
2dbc5c4c
AS
504 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
505 hwep->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK
506done:
507 return ret;
aa69a809
DL
508}
509
2e270412
MG
510/*
511 * free_pending_td: remove a pending request for the endpoint
2dbc5c4c 512 * @hwep: endpoint
2e270412 513 */
8e22978c 514static void free_pending_td(struct ci_hw_ep *hwep)
2e270412 515{
2dbc5c4c 516 struct td_node *pending = hwep->pending_td;
2e270412 517
2dbc5c4c
AS
518 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
519 hwep->pending_td = NULL;
2e270412
MG
520 kfree(pending);
521}
522
06bdfcdb
SM
523static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
524 struct td_node *node)
525{
526 hwep->qh.ptr->td.next = node->dma;
527 hwep->qh.ptr->td.token &=
528 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
529
530 /* Synchronize before ep prime */
531 wmb();
532
533 return hw_ep_prime(ci, hwep->num, hwep->dir,
534 hwep->type == USB_ENDPOINT_XFER_CONTROL);
535}
536
aa69a809
DL
537/**
538 * _hardware_dequeue: handles a request at hardware level
539 * @gadget: gadget
2dbc5c4c 540 * @hwep: endpoint
aa69a809
DL
541 *
542 * This function returns an error code
543 */
8e22978c 544static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 545{
cc9e6c49 546 u32 tmptoken;
2e270412
MG
547 struct td_node *node, *tmpnode;
548 unsigned remaining_length;
2dbc5c4c 549 unsigned actual = hwreq->req.length;
06bdfcdb 550 struct ci_hdrc *ci = hwep->ci;
9e506438 551
2dbc5c4c 552 if (hwreq->req.status != -EALREADY)
aa69a809
DL
553 return -EINVAL;
554
2dbc5c4c 555 hwreq->req.status = 0;
0e6ca199 556
2dbc5c4c 557 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
cc9e6c49 558 tmptoken = le32_to_cpu(node->ptr->token);
2e270412 559 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
06bdfcdb
SM
560 int n = hw_ep_bit(hwep->num, hwep->dir);
561
562 if (ci->rev == CI_REVISION_24)
563 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
564 reprime_dtd(ci, hwep, node);
2dbc5c4c 565 hwreq->req.status = -EALREADY;
0e6ca199 566 return -EBUSY;
cc9e6c49 567 }
aa69a809 568
2e270412
MG
569 remaining_length = (tmptoken & TD_TOTAL_BYTES);
570 remaining_length >>= __ffs(TD_TOTAL_BYTES);
571 actual -= remaining_length;
572
2dbc5c4c
AS
573 hwreq->req.status = tmptoken & TD_STATUS;
574 if ((TD_STATUS_HALTED & hwreq->req.status)) {
575 hwreq->req.status = -EPIPE;
2e270412 576 break;
2dbc5c4c
AS
577 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
578 hwreq->req.status = -EPROTO;
2e270412 579 break;
2dbc5c4c
AS
580 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
581 hwreq->req.status = -EILSEQ;
2e270412
MG
582 break;
583 }
584
585 if (remaining_length) {
2dbc5c4c
AS
586 if (hwep->dir) {
587 hwreq->req.status = -EPROTO;
2e270412
MG
588 break;
589 }
590 }
591 /*
592 * As the hardware could still address the freed td
593 * which will run the udc unusable, the cleanup of the
594 * td has to be delayed by one.
595 */
2dbc5c4c
AS
596 if (hwep->pending_td)
597 free_pending_td(hwep);
2e270412 598
2dbc5c4c 599 hwep->pending_td = node;
2e270412
MG
600 list_del_init(&node->td);
601 }
aa69a809 602
2dbc5c4c 603 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
aa69a809 604
2dbc5c4c 605 hwreq->req.actual += actual;
aa69a809 606
2dbc5c4c
AS
607 if (hwreq->req.status)
608 return hwreq->req.status;
aa69a809 609
2dbc5c4c 610 return hwreq->req.actual;
aa69a809
DL
611}
612
613/**
614 * _ep_nuke: dequeues all endpoint requests
2dbc5c4c 615 * @hwep: endpoint
aa69a809
DL
616 *
617 * This function returns an error code
618 * Caller must hold lock
619 */
8e22978c 620static int _ep_nuke(struct ci_hw_ep *hwep)
2dbc5c4c
AS
621__releases(hwep->lock)
622__acquires(hwep->lock)
aa69a809 623{
2e270412 624 struct td_node *node, *tmpnode;
2dbc5c4c 625 if (hwep == NULL)
aa69a809
DL
626 return -EINVAL;
627
2dbc5c4c 628 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 629
2dbc5c4c 630 while (!list_empty(&hwep->qh.queue)) {
aa69a809
DL
631
632 /* pop oldest request */
8e22978c
AS
633 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
634 struct ci_hw_req, queue);
7ca2cd29 635
2dbc5c4c
AS
636 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
637 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
638 list_del_init(&node->td);
639 node->ptr = NULL;
640 kfree(node);
7ca2cd29
MG
641 }
642
2dbc5c4c
AS
643 list_del_init(&hwreq->queue);
644 hwreq->req.status = -ESHUTDOWN;
aa69a809 645
2dbc5c4c
AS
646 if (hwreq->req.complete != NULL) {
647 spin_unlock(hwep->lock);
304f7e5e 648 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 649 spin_lock(hwep->lock);
aa69a809
DL
650 }
651 }
2e270412 652
2dbc5c4c
AS
653 if (hwep->pending_td)
654 free_pending_td(hwep);
2e270412 655
aa69a809
DL
656 return 0;
657}
658
659/**
660 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
661 * @gadget: gadget
662 *
663 * This function returns an error code
aa69a809
DL
664 */
665static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL
666{
667 struct usb_ep *ep;
8e22978c 668 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
e2b61c1d 669 unsigned long flags;
aa69a809 670
26c696c6
RZ
671 spin_lock_irqsave(&ci->lock, flags);
672 ci->gadget.speed = USB_SPEED_UNKNOWN;
673 ci->remote_wakeup = 0;
674 ci->suspended = 0;
675 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d 676
aa69a809
DL
677 /* flush all endpoints */
678 gadget_for_each_ep(ep, gadget) {
679 usb_ep_fifo_flush(ep);
680 }
26c696c6
RZ
681 usb_ep_fifo_flush(&ci->ep0out->ep);
682 usb_ep_fifo_flush(&ci->ep0in->ep);
aa69a809 683
aa69a809
DL
684 /* make sure to disable all endpoints */
685 gadget_for_each_ep(ep, gadget) {
686 usb_ep_disable(ep);
687 }
aa69a809 688
26c696c6
RZ
689 if (ci->status != NULL) {
690 usb_ep_free_request(&ci->ep0in->ep, ci->status);
691 ci->status = NULL;
aa69a809
DL
692 }
693
aa69a809
DL
694 return 0;
695}
696
697/******************************************************************************
698 * ISR block
699 *****************************************************************************/
700/**
701 * isr_reset_handler: USB reset interrupt handler
26c696c6 702 * @ci: UDC device
aa69a809
DL
703 *
704 * This function resets USB engine after a bus reset occurred
705 */
8e22978c 706static void isr_reset_handler(struct ci_hdrc *ci)
26c696c6
RZ
707__releases(ci->lock)
708__acquires(ci->lock)
aa69a809 709{
aa69a809
DL
710 int retval;
711
a3aee368 712 spin_unlock(&ci->lock);
afbe4775
PC
713 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
714 usb_gadget_udc_reset(&ci->gadget, ci->driver);
92b336d7 715
26c696c6 716 retval = _gadget_stop_activity(&ci->gadget);
aa69a809
DL
717 if (retval)
718 goto done;
719
26c696c6 720 retval = hw_usb_reset(ci);
aa69a809
DL
721 if (retval)
722 goto done;
723
26c696c6
RZ
724 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
725 if (ci->status == NULL)
ac1aa6a2 726 retval = -ENOMEM;
ca9cfea0 727
b9322252 728done:
26c696c6 729 spin_lock(&ci->lock);
aa69a809 730
aa69a809 731 if (retval)
26c696c6 732 dev_err(ci->dev, "error: %i\n", retval);
aa69a809
DL
733}
734
735/**
736 * isr_get_status_complete: get_status request complete function
737 * @ep: endpoint
738 * @req: request handled
739 *
740 * Caller must release lock
741 */
742static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
743{
0f089094 744 if (ep == NULL || req == NULL)
aa69a809 745 return;
aa69a809
DL
746
747 kfree(req->buf);
748 usb_ep_free_request(ep, req);
749}
750
dd064e9d
MG
751/**
752 * _ep_queue: queues (submits) an I/O request to an endpoint
753 *
754 * Caller must hold lock
755 */
756static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
757 gfp_t __maybe_unused gfp_flags)
758{
8e22978c
AS
759 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
760 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
761 struct ci_hdrc *ci = hwep->ci;
dd064e9d
MG
762 int retval = 0;
763
2dbc5c4c 764 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
dd064e9d
MG
765 return -EINVAL;
766
2dbc5c4c 767 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
dd064e9d 768 if (req->length)
2dbc5c4c 769 hwep = (ci->ep0_dir == RX) ?
dd064e9d 770 ci->ep0out : ci->ep0in;
2dbc5c4c
AS
771 if (!list_empty(&hwep->qh.queue)) {
772 _ep_nuke(hwep);
dd064e9d 773 retval = -EOVERFLOW;
2dbc5c4c
AS
774 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
775 _usb_addr(hwep));
dd064e9d
MG
776 }
777 }
778
2dbc5c4c
AS
779 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
780 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
781 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
e4ce4ecd
MG
782 return -EMSGSIZE;
783 }
784
dd064e9d 785 /* first nuke then test link, e.g. previous status has not sent */
2dbc5c4c
AS
786 if (!list_empty(&hwreq->queue)) {
787 dev_err(hwep->ci->dev, "request already in queue\n");
dd064e9d
MG
788 return -EBUSY;
789 }
790
dd064e9d 791 /* push request */
2dbc5c4c
AS
792 hwreq->req.status = -EINPROGRESS;
793 hwreq->req.actual = 0;
dd064e9d 794
2dbc5c4c 795 retval = _hardware_enqueue(hwep, hwreq);
dd064e9d
MG
796
797 if (retval == -EALREADY)
798 retval = 0;
799 if (!retval)
2dbc5c4c 800 list_add_tail(&hwreq->queue, &hwep->qh.queue);
dd064e9d
MG
801
802 return retval;
803}
804
aa69a809
DL
805/**
806 * isr_get_status_response: get_status request response
26c696c6 807 * @ci: ci struct
aa69a809
DL
808 * @setup: setup request packet
809 *
810 * This function returns an error code
811 */
8e22978c 812static int isr_get_status_response(struct ci_hdrc *ci,
aa69a809 813 struct usb_ctrlrequest *setup)
2dbc5c4c
AS
814__releases(hwep->lock)
815__acquires(hwep->lock)
aa69a809 816{
8e22978c 817 struct ci_hw_ep *hwep = ci->ep0in;
aa69a809
DL
818 struct usb_request *req = NULL;
819 gfp_t gfp_flags = GFP_ATOMIC;
820 int dir, num, retval;
821
2dbc5c4c 822 if (hwep == NULL || setup == NULL)
aa69a809
DL
823 return -EINVAL;
824
2dbc5c4c
AS
825 spin_unlock(hwep->lock);
826 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
827 spin_lock(hwep->lock);
aa69a809
DL
828 if (req == NULL)
829 return -ENOMEM;
830
831 req->complete = isr_get_status_complete;
832 req->length = 2;
833 req->buf = kzalloc(req->length, gfp_flags);
834 if (req->buf == NULL) {
835 retval = -ENOMEM;
836 goto err_free_req;
837 }
838
839 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1009f9a3
PC
840 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
841 ci->gadget.is_selfpowered;
aa69a809
DL
842 } else if ((setup->bRequestType & USB_RECIP_MASK) \
843 == USB_RECIP_ENDPOINT) {
844 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
845 TX : RX;
846 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
26c696c6 847 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
aa69a809
DL
848 }
849 /* else do nothing; reserved for future use */
850
2dbc5c4c 851 retval = _ep_queue(&hwep->ep, req, gfp_flags);
aa69a809
DL
852 if (retval)
853 goto err_free_buf;
854
855 return 0;
856
857 err_free_buf:
858 kfree(req->buf);
859 err_free_req:
2dbc5c4c
AS
860 spin_unlock(hwep->lock);
861 usb_ep_free_request(&hwep->ep, req);
862 spin_lock(hwep->lock);
aa69a809
DL
863 return retval;
864}
865
541cace8
PK
866/**
867 * isr_setup_status_complete: setup_status request complete function
868 * @ep: endpoint
869 * @req: request handled
870 *
871 * Caller must release lock. Put the port in test mode if test mode
872 * feature is selected.
873 */
874static void
875isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
876{
8e22978c 877 struct ci_hdrc *ci = req->context;
541cace8
PK
878 unsigned long flags;
879
26c696c6
RZ
880 if (ci->setaddr) {
881 hw_usb_set_address(ci, ci->address);
882 ci->setaddr = false;
10775eb1
PC
883 if (ci->address)
884 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
ef15e549
AS
885 }
886
26c696c6
RZ
887 spin_lock_irqsave(&ci->lock, flags);
888 if (ci->test_mode)
889 hw_port_test_set(ci, ci->test_mode);
890 spin_unlock_irqrestore(&ci->lock, flags);
541cace8
PK
891}
892
aa69a809
DL
893/**
894 * isr_setup_status_phase: queues the status phase of a setup transation
26c696c6 895 * @ci: ci struct
aa69a809
DL
896 *
897 * This function returns an error code
898 */
8e22978c 899static int isr_setup_status_phase(struct ci_hdrc *ci)
aa69a809
DL
900{
901 int retval;
8e22978c 902 struct ci_hw_ep *hwep;
aa69a809 903
2dbc5c4c 904 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
26c696c6
RZ
905 ci->status->context = ci;
906 ci->status->complete = isr_setup_status_complete;
aa69a809 907
2dbc5c4c 908 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
aa69a809
DL
909
910 return retval;
911}
912
913/**
914 * isr_tr_complete_low: transaction complete low level handler
2dbc5c4c 915 * @hwep: endpoint
aa69a809
DL
916 *
917 * This function returns an error code
918 * Caller must hold lock
919 */
8e22978c 920static int isr_tr_complete_low(struct ci_hw_ep *hwep)
2dbc5c4c
AS
921__releases(hwep->lock)
922__acquires(hwep->lock)
aa69a809 923{
8e22978c
AS
924 struct ci_hw_req *hwreq, *hwreqtemp;
925 struct ci_hw_ep *hweptemp = hwep;
db89960e 926 int retval = 0;
aa69a809 927
2dbc5c4c 928 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
0e6ca199 929 queue) {
2dbc5c4c 930 retval = _hardware_dequeue(hwep, hwreq);
0e6ca199
PK
931 if (retval < 0)
932 break;
2dbc5c4c
AS
933 list_del_init(&hwreq->queue);
934 if (hwreq->req.complete != NULL) {
935 spin_unlock(hwep->lock);
936 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
937 hwreq->req.length)
938 hweptemp = hwep->ci->ep0in;
304f7e5e 939 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
2dbc5c4c 940 spin_lock(hwep->lock);
0e6ca199 941 }
d9bb9c18
AL
942 }
943
ef907482 944 if (retval == -EBUSY)
0e6ca199 945 retval = 0;
aa69a809 946
aa69a809
DL
947 return retval;
948}
949
d20f7807
LJ
950static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
951{
952 dev_warn(&ci->gadget.dev,
953 "connect the device to an alternate port if you want HNP\n");
954 return isr_setup_status_phase(ci);
955}
956
d7b00e31
PC
957/**
958 * isr_setup_packet_handler: setup packet handler
959 * @ci: UDC descriptor
960 *
961 * This function handles setup packet
962 */
963static void isr_setup_packet_handler(struct ci_hdrc *ci)
964__releases(ci->lock)
965__acquires(ci->lock)
966{
967 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
968 struct usb_ctrlrequest req;
969 int type, num, dir, err = -EINVAL;
970 u8 tmode = 0;
971
972 /*
973 * Flush data and handshake transactions of previous
974 * setup packet.
975 */
976 _ep_nuke(ci->ep0out);
977 _ep_nuke(ci->ep0in);
978
979 /* read_setup_packet */
980 do {
981 hw_test_and_set_setup_guard(ci);
982 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
983 } while (!hw_test_and_clear_setup_guard(ci));
984
985 type = req.bRequestType;
986
987 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
988
989 switch (req.bRequest) {
990 case USB_REQ_CLEAR_FEATURE:
991 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
992 le16_to_cpu(req.wValue) ==
993 USB_ENDPOINT_HALT) {
994 if (req.wLength != 0)
995 break;
996 num = le16_to_cpu(req.wIndex);
997 dir = num & USB_ENDPOINT_DIR_MASK;
998 num &= USB_ENDPOINT_NUMBER_MASK;
999 if (dir) /* TX */
1000 num += ci->hw_ep_max / 2;
1001 if (!ci->ci_hw_ep[num].wedge) {
1002 spin_unlock(&ci->lock);
1003 err = usb_ep_clear_halt(
1004 &ci->ci_hw_ep[num].ep);
1005 spin_lock(&ci->lock);
1006 if (err)
1007 break;
1008 }
1009 err = isr_setup_status_phase(ci);
1010 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1011 le16_to_cpu(req.wValue) ==
1012 USB_DEVICE_REMOTE_WAKEUP) {
1013 if (req.wLength != 0)
1014 break;
1015 ci->remote_wakeup = 0;
1016 err = isr_setup_status_phase(ci);
1017 } else {
1018 goto delegate;
1019 }
1020 break;
1021 case USB_REQ_GET_STATUS:
1022 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1023 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1024 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1025 goto delegate;
1026 if (le16_to_cpu(req.wLength) != 2 ||
1027 le16_to_cpu(req.wValue) != 0)
1028 break;
1029 err = isr_get_status_response(ci, &req);
1030 break;
1031 case USB_REQ_SET_ADDRESS:
1032 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1033 goto delegate;
1034 if (le16_to_cpu(req.wLength) != 0 ||
1035 le16_to_cpu(req.wIndex) != 0)
1036 break;
1037 ci->address = (u8)le16_to_cpu(req.wValue);
1038 ci->setaddr = true;
1039 err = isr_setup_status_phase(ci);
1040 break;
1041 case USB_REQ_SET_FEATURE:
1042 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1043 le16_to_cpu(req.wValue) ==
1044 USB_ENDPOINT_HALT) {
1045 if (req.wLength != 0)
1046 break;
1047 num = le16_to_cpu(req.wIndex);
1048 dir = num & USB_ENDPOINT_DIR_MASK;
1049 num &= USB_ENDPOINT_NUMBER_MASK;
1050 if (dir) /* TX */
1051 num += ci->hw_ep_max / 2;
1052
1053 spin_unlock(&ci->lock);
1054 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
1055 spin_lock(&ci->lock);
1056 if (!err)
1057 isr_setup_status_phase(ci);
1058 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1059 if (req.wLength != 0)
1060 break;
1061 switch (le16_to_cpu(req.wValue)) {
1062 case USB_DEVICE_REMOTE_WAKEUP:
1063 ci->remote_wakeup = 1;
1064 err = isr_setup_status_phase(ci);
1065 break;
1066 case USB_DEVICE_TEST_MODE:
1067 tmode = le16_to_cpu(req.wIndex) >> 8;
1068 switch (tmode) {
1069 case TEST_J:
1070 case TEST_K:
1071 case TEST_SE0_NAK:
1072 case TEST_PACKET:
1073 case TEST_FORCE_EN:
1074 ci->test_mode = tmode;
1075 err = isr_setup_status_phase(
1076 ci);
1077 break;
1078 default:
1079 break;
1080 }
95f5555f
LJ
1081 break;
1082 case USB_DEVICE_B_HNP_ENABLE:
1083 if (ci_otg_is_fsm_mode(ci)) {
1084 ci->gadget.b_hnp_enable = 1;
1085 err = isr_setup_status_phase(
1086 ci);
1087 }
1088 break;
d20f7807
LJ
1089 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1090 if (ci_otg_is_fsm_mode(ci))
1091 err = otg_a_alt_hnp_support(ci);
1092 break;
d7b00e31
PC
1093 default:
1094 goto delegate;
1095 }
1096 } else {
1097 goto delegate;
1098 }
1099 break;
1100 default:
1101delegate:
1102 if (req.wLength == 0) /* no data phase */
1103 ci->ep0_dir = TX;
1104
1105 spin_unlock(&ci->lock);
1106 err = ci->driver->setup(&ci->gadget, &req);
1107 spin_lock(&ci->lock);
1108 break;
1109 }
1110
1111 if (err < 0) {
1112 spin_unlock(&ci->lock);
1113 if (usb_ep_set_halt(&hwep->ep))
1114 dev_err(ci->dev, "error: ep_set_halt\n");
1115 spin_lock(&ci->lock);
1116 }
1117}
1118
aa69a809
DL
1119/**
1120 * isr_tr_complete_handler: transaction complete interrupt handler
26c696c6 1121 * @ci: UDC descriptor
aa69a809
DL
1122 *
1123 * This function handles traffic events
1124 */
8e22978c 1125static void isr_tr_complete_handler(struct ci_hdrc *ci)
26c696c6
RZ
1126__releases(ci->lock)
1127__acquires(ci->lock)
aa69a809
DL
1128{
1129 unsigned i;
d7b00e31 1130 int err;
aa69a809 1131
26c696c6 1132 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1133 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
aa69a809 1134
2dbc5c4c 1135 if (hwep->ep.desc == NULL)
aa69a809
DL
1136 continue; /* not configured */
1137
26c696c6 1138 if (hw_test_and_clear_complete(ci, i)) {
2dbc5c4c
AS
1139 err = isr_tr_complete_low(hwep);
1140 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
aa69a809 1141 if (err > 0) /* needs status phase */
26c696c6 1142 err = isr_setup_status_phase(ci);
aa69a809 1143 if (err < 0) {
26c696c6 1144 spin_unlock(&ci->lock);
2dbc5c4c 1145 if (usb_ep_set_halt(&hwep->ep))
26c696c6 1146 dev_err(ci->dev,
0917ba84 1147 "error: ep_set_halt\n");
26c696c6 1148 spin_lock(&ci->lock);
aa69a809
DL
1149 }
1150 }
1151 }
1152
64fc06c4 1153 /* Only handle setup packet below */
d7b00e31
PC
1154 if (i == 0 &&
1155 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1156 isr_setup_packet_handler(ci);
aa69a809
DL
1157 }
1158}
1159
1160/******************************************************************************
1161 * ENDPT block
1162 *****************************************************************************/
1163/**
1164 * ep_enable: configure endpoint, making it usable
1165 *
1166 * Check usb_ep_enable() at "usb_gadget.h" for details
1167 */
1168static int ep_enable(struct usb_ep *ep,
1169 const struct usb_endpoint_descriptor *desc)
1170{
8e22978c 1171 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
ca9cfea0 1172 int retval = 0;
aa69a809 1173 unsigned long flags;
1cd12a9c 1174 u32 cap = 0;
aa69a809 1175
aa69a809
DL
1176 if (ep == NULL || desc == NULL)
1177 return -EINVAL;
1178
2dbc5c4c 1179 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1180
1181 /* only internal SW should enable ctrl endpts */
1182
d5d1e1be 1183 if (!list_empty(&hwep->qh.queue)) {
2dbc5c4c 1184 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
d5d1e1be
PC
1185 spin_unlock_irqrestore(hwep->lock, flags);
1186 return -EBUSY;
1187 }
1188
1189 hwep->ep.desc = desc;
aa69a809 1190
2dbc5c4c
AS
1191 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1192 hwep->num = usb_endpoint_num(desc);
1193 hwep->type = usb_endpoint_type(desc);
aa69a809 1194
2dbc5c4c
AS
1195 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1196 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
aa69a809 1197
2dbc5c4c 1198 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1cd12a9c 1199 cap |= QH_IOS;
953c6646
AR
1200
1201 cap |= QH_ZLT;
2dbc5c4c 1202 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
2fc5a7da
PC
1203 /*
1204 * For ISO-TX, we set mult at QH as the largest value, and use
1205 * MultO at TD as real mult value.
1206 */
1207 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1208 cap |= 3 << __ffs(QH_MULT);
1cd12a9c 1209
2dbc5c4c 1210 hwep->qh.ptr->cap = cpu_to_le32(cap);
1cd12a9c 1211
2dbc5c4c 1212 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
aa69a809 1213
64fc06c4
PC
1214 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1215 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1216 retval = -EINVAL;
1217 }
1218
ac1aa6a2
A
1219 /*
1220 * Enable endpoints in the HW other than ep0 as ep0
1221 * is always enabled
1222 */
2dbc5c4c
AS
1223 if (hwep->num)
1224 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1225 hwep->type);
aa69a809 1226
2dbc5c4c 1227 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1228 return retval;
1229}
1230
1231/**
1232 * ep_disable: endpoint is no longer usable
1233 *
1234 * Check usb_ep_disable() at "usb_gadget.h" for details
1235 */
1236static int ep_disable(struct usb_ep *ep)
1237{
8e22978c 1238 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1239 int direction, retval = 0;
1240 unsigned long flags;
1241
aa69a809
DL
1242 if (ep == NULL)
1243 return -EINVAL;
2dbc5c4c 1244 else if (hwep->ep.desc == NULL)
aa69a809
DL
1245 return -EBUSY;
1246
2dbc5c4c 1247 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1248
1249 /* only internal SW should disable ctrl endpts */
1250
2dbc5c4c 1251 direction = hwep->dir;
aa69a809 1252 do {
2dbc5c4c
AS
1253 retval |= _ep_nuke(hwep);
1254 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
aa69a809 1255
2dbc5c4c
AS
1256 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1257 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1258
2dbc5c4c 1259 } while (hwep->dir != direction);
aa69a809 1260
2dbc5c4c 1261 hwep->ep.desc = NULL;
aa69a809 1262
2dbc5c4c 1263 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1264 return retval;
1265}
1266
1267/**
1268 * ep_alloc_request: allocate a request object to use with this endpoint
1269 *
1270 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1271 */
1272static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1273{
8e22978c 1274 struct ci_hw_req *hwreq = NULL;
aa69a809 1275
0f089094 1276 if (ep == NULL)
aa69a809 1277 return NULL;
aa69a809 1278
8e22978c 1279 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
2dbc5c4c
AS
1280 if (hwreq != NULL) {
1281 INIT_LIST_HEAD(&hwreq->queue);
1282 INIT_LIST_HEAD(&hwreq->tds);
aa69a809
DL
1283 }
1284
2dbc5c4c 1285 return (hwreq == NULL) ? NULL : &hwreq->req;
aa69a809
DL
1286}
1287
1288/**
1289 * ep_free_request: frees a request object
1290 *
1291 * Check usb_ep_free_request() at "usb_gadget.h" for details
1292 */
1293static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1294{
8e22978c
AS
1295 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1296 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
2e270412 1297 struct td_node *node, *tmpnode;
aa69a809
DL
1298 unsigned long flags;
1299
aa69a809 1300 if (ep == NULL || req == NULL) {
aa69a809 1301 return;
2dbc5c4c
AS
1302 } else if (!list_empty(&hwreq->queue)) {
1303 dev_err(hwep->ci->dev, "freeing queued request\n");
aa69a809
DL
1304 return;
1305 }
1306
2dbc5c4c 1307 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1308
2dbc5c4c
AS
1309 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1310 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
1311 list_del_init(&node->td);
1312 node->ptr = NULL;
1313 kfree(node);
1314 }
cc9e6c49 1315
2dbc5c4c 1316 kfree(hwreq);
aa69a809 1317
2dbc5c4c 1318 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1319}
1320
1321/**
1322 * ep_queue: queues (submits) an I/O request to an endpoint
1323 *
1324 * Check usb_ep_queue()* at usb_gadget.h" for details
1325 */
1326static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1327 gfp_t __maybe_unused gfp_flags)
1328{
8e22978c 1329 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1330 int retval = 0;
1331 unsigned long flags;
1332
2dbc5c4c 1333 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1334 return -EINVAL;
1335
2dbc5c4c 1336 spin_lock_irqsave(hwep->lock, flags);
dd064e9d 1337 retval = _ep_queue(ep, req, gfp_flags);
2dbc5c4c 1338 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1339 return retval;
1340}
1341
1342/**
1343 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1344 *
1345 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1346 */
1347static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1348{
8e22978c
AS
1349 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1350 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
aa69a809 1351 unsigned long flags;
e4adcff0 1352 struct td_node *node, *tmpnode;
aa69a809 1353
2dbc5c4c
AS
1354 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1355 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1356 list_empty(&hwep->qh.queue))
aa69a809
DL
1357 return -EINVAL;
1358
2dbc5c4c 1359 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1360
2dbc5c4c 1361 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1362
e4adcff0
PC
1363 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1364 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1365 list_del(&node->td);
1366 kfree(node);
1367 }
1368
aa69a809 1369 /* pop request */
2dbc5c4c 1370 list_del_init(&hwreq->queue);
5e0aa49e 1371
2dbc5c4c 1372 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
5e0aa49e 1373
aa69a809
DL
1374 req->status = -ECONNRESET;
1375
2dbc5c4c
AS
1376 if (hwreq->req.complete != NULL) {
1377 spin_unlock(hwep->lock);
304f7e5e 1378 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 1379 spin_lock(hwep->lock);
aa69a809
DL
1380 }
1381
2dbc5c4c 1382 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1383 return 0;
1384}
1385
1386/**
1387 * ep_set_halt: sets the endpoint halt feature
1388 *
1389 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1390 */
1391static int ep_set_halt(struct usb_ep *ep, int value)
1392{
8e22978c 1393 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1394 int direction, retval = 0;
1395 unsigned long flags;
1396
2dbc5c4c 1397 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1398 return -EINVAL;
1399
2dbc5c4c 1400 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
e4ce4ecd
MG
1401 return -EOPNOTSUPP;
1402
2dbc5c4c 1403 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1404
1405#ifndef STALL_IN
1406 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2dbc5c4c
AS
1407 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1408 !list_empty(&hwep->qh.queue)) {
1409 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1410 return -EAGAIN;
1411 }
1412#endif
1413
2dbc5c4c 1414 direction = hwep->dir;
aa69a809 1415 do {
2dbc5c4c 1416 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
aa69a809
DL
1417
1418 if (!value)
2dbc5c4c 1419 hwep->wedge = 0;
aa69a809 1420
2dbc5c4c
AS
1421 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1422 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1423
2dbc5c4c 1424 } while (hwep->dir != direction);
aa69a809 1425
2dbc5c4c 1426 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1427 return retval;
1428}
1429
1430/**
1431 * ep_set_wedge: sets the halt feature and ignores clear requests
1432 *
1433 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1434 */
1435static int ep_set_wedge(struct usb_ep *ep)
1436{
8e22978c 1437 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1438 unsigned long flags;
1439
2dbc5c4c 1440 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1441 return -EINVAL;
1442
2dbc5c4c
AS
1443 spin_lock_irqsave(hwep->lock, flags);
1444 hwep->wedge = 1;
1445 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1446
1447 return usb_ep_set_halt(ep);
1448}
1449
1450/**
1451 * ep_fifo_flush: flushes contents of a fifo
1452 *
1453 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1454 */
1455static void ep_fifo_flush(struct usb_ep *ep)
1456{
8e22978c 1457 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1458 unsigned long flags;
1459
aa69a809 1460 if (ep == NULL) {
2dbc5c4c 1461 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
aa69a809
DL
1462 return;
1463 }
1464
2dbc5c4c 1465 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1466
2dbc5c4c 1467 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1468
2dbc5c4c 1469 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1470}
1471
1472/**
1473 * Endpoint-specific part of the API to the USB controller hardware
1474 * Check "usb_gadget.h" for details
1475 */
1476static const struct usb_ep_ops usb_ep_ops = {
1477 .enable = ep_enable,
1478 .disable = ep_disable,
1479 .alloc_request = ep_alloc_request,
1480 .free_request = ep_free_request,
1481 .queue = ep_queue,
1482 .dequeue = ep_dequeue,
1483 .set_halt = ep_set_halt,
1484 .set_wedge = ep_set_wedge,
1485 .fifo_flush = ep_fifo_flush,
1486};
1487
1488/******************************************************************************
1489 * GADGET block
1490 *****************************************************************************/
8e22978c 1491static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
f01ef574 1492{
8e22978c 1493 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
f01ef574
PK
1494 unsigned long flags;
1495 int gadget_ready = 0;
1496
26c696c6
RZ
1497 spin_lock_irqsave(&ci->lock, flags);
1498 ci->vbus_active = is_active;
1499 if (ci->driver)
f01ef574 1500 gadget_ready = 1;
26c696c6 1501 spin_unlock_irqrestore(&ci->lock, flags);
f01ef574
PK
1502
1503 if (gadget_ready) {
1504 if (is_active) {
c036019e 1505 pm_runtime_get_sync(&_gadget->dev);
5b157300 1506 hw_device_reset(ci);
26c696c6 1507 hw_device_state(ci, ci->ep0out->qh.dma);
10775eb1 1508 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
467a78c8 1509 usb_udc_vbus_handler(_gadget, true);
f01ef574 1510 } else {
467a78c8 1511 usb_udc_vbus_handler(_gadget, false);
92b336d7
PC
1512 if (ci->driver)
1513 ci->driver->disconnect(&ci->gadget);
26c696c6
RZ
1514 hw_device_state(ci, 0);
1515 if (ci->platdata->notify_event)
1516 ci->platdata->notify_event(ci,
8e22978c 1517 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6 1518 _gadget_stop_activity(&ci->gadget);
c036019e 1519 pm_runtime_put_sync(&_gadget->dev);
10775eb1 1520 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
f01ef574
PK
1521 }
1522 }
1523
1524 return 0;
1525}
1526
8e22978c 1527static int ci_udc_wakeup(struct usb_gadget *_gadget)
e2b61c1d 1528{
8e22978c 1529 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
e2b61c1d
PK
1530 unsigned long flags;
1531 int ret = 0;
1532
26c696c6
RZ
1533 spin_lock_irqsave(&ci->lock, flags);
1534 if (!ci->remote_wakeup) {
e2b61c1d 1535 ret = -EOPNOTSUPP;
e2b61c1d
PK
1536 goto out;
1537 }
26c696c6 1538 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
e2b61c1d 1539 ret = -EINVAL;
e2b61c1d
PK
1540 goto out;
1541 }
26c696c6 1542 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
e2b61c1d 1543out:
26c696c6 1544 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d
PK
1545 return ret;
1546}
1547
8e22978c 1548static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
d860852e 1549{
8e22978c 1550 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
d860852e 1551
ef44cb42
AT
1552 if (ci->usb_phy)
1553 return usb_phy_set_power(ci->usb_phy, ma);
d860852e
PK
1554 return -ENOTSUPP;
1555}
1556
1009f9a3
PC
1557static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1558{
1559 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1560 struct ci_hw_ep *hwep = ci->ep0in;
1561 unsigned long flags;
1562
1563 spin_lock_irqsave(hwep->lock, flags);
1564 _gadget->is_selfpowered = (is_on != 0);
1565 spin_unlock_irqrestore(hwep->lock, flags);
1566
1567 return 0;
1568}
1569
c0a48e6c
MG
1570/* Change Data+ pullup status
1571 * this func is used by usb_gadget_connect/disconnet
1572 */
8e22978c 1573static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
c0a48e6c 1574{
8e22978c 1575 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
c0a48e6c 1576
9b6567e1
LJ
1577 /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
1578 if (ci_otg_is_fsm_mode(ci))
1579 return 0;
1580
467a78c8 1581 pm_runtime_get_sync(&ci->gadget.dev);
c0a48e6c
MG
1582 if (is_on)
1583 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1584 else
1585 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
467a78c8 1586 pm_runtime_put_sync(&ci->gadget.dev);
c0a48e6c
MG
1587
1588 return 0;
1589}
1590
8e22978c 1591static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1592 struct usb_gadget_driver *driver);
22835b80 1593static int ci_udc_stop(struct usb_gadget *gadget);
aa69a809
DL
1594/**
1595 * Device operations part of the API to the USB controller hardware,
1596 * which don't involve endpoints (or i/o)
1597 * Check "usb_gadget.h" for details
1598 */
f01ef574 1599static const struct usb_gadget_ops usb_gadget_ops = {
8e22978c
AS
1600 .vbus_session = ci_udc_vbus_session,
1601 .wakeup = ci_udc_wakeup,
1009f9a3 1602 .set_selfpowered = ci_udc_selfpowered,
8e22978c
AS
1603 .pullup = ci_udc_pullup,
1604 .vbus_draw = ci_udc_vbus_draw,
1605 .udc_start = ci_udc_start,
1606 .udc_stop = ci_udc_stop,
f01ef574 1607};
aa69a809 1608
8e22978c 1609static int init_eps(struct ci_hdrc *ci)
aa69a809 1610{
790c2d52 1611 int retval = 0, i, j;
aa69a809 1612
26c696c6 1613 for (i = 0; i < ci->hw_ep_max/2; i++)
ca9cfea0 1614 for (j = RX; j <= TX; j++) {
26c696c6 1615 int k = i + j * ci->hw_ep_max/2;
8e22978c 1616 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
aa69a809 1617
2dbc5c4c 1618 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
ca9cfea0 1619 (j == TX) ? "in" : "out");
aa69a809 1620
2dbc5c4c
AS
1621 hwep->ci = ci;
1622 hwep->lock = &ci->lock;
1623 hwep->td_pool = ci->td_pool;
aa69a809 1624
2dbc5c4c
AS
1625 hwep->ep.name = hwep->name;
1626 hwep->ep.ops = &usb_ep_ops;
a7e3f141
RB
1627
1628 if (i == 0) {
1629 hwep->ep.caps.type_control = true;
1630 } else {
1631 hwep->ep.caps.type_iso = true;
1632 hwep->ep.caps.type_bulk = true;
1633 hwep->ep.caps.type_int = true;
1634 }
1635
1636 if (j == TX)
1637 hwep->ep.caps.dir_in = true;
1638 else
1639 hwep->ep.caps.dir_out = true;
1640
7f67c38b
MG
1641 /*
1642 * for ep0: maxP defined in desc, for other
1643 * eps, maxP is set by epautoconfig() called
1644 * by gadget layer
1645 */
e117e742 1646 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
aa69a809 1647
2dbc5c4c
AS
1648 INIT_LIST_HEAD(&hwep->qh.queue);
1649 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1650 &hwep->qh.dma);
1651 if (hwep->qh.ptr == NULL)
aa69a809
DL
1652 retval = -ENOMEM;
1653 else
2dbc5c4c 1654 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
ca9cfea0 1655
d36ade60
AS
1656 /*
1657 * set up shorthands for ep0 out and in endpoints,
1658 * don't add to gadget's ep_list
1659 */
1660 if (i == 0) {
1661 if (j == RX)
2dbc5c4c 1662 ci->ep0out = hwep;
d36ade60 1663 else
2dbc5c4c 1664 ci->ep0in = hwep;
d36ade60 1665
e117e742 1666 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
ca9cfea0 1667 continue;
d36ade60 1668 }
ca9cfea0 1669
2dbc5c4c 1670 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
ca9cfea0 1671 }
790c2d52
AS
1672
1673 return retval;
1674}
1675
8e22978c 1676static void destroy_eps(struct ci_hdrc *ci)
ad6b1b97
MKB
1677{
1678 int i;
1679
1680 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1681 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
ad6b1b97 1682
4a29567b
PC
1683 if (hwep->pending_td)
1684 free_pending_td(hwep);
2dbc5c4c 1685 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
ad6b1b97
MKB
1686 }
1687}
1688
790c2d52 1689/**
8e22978c 1690 * ci_udc_start: register a gadget driver
1f339d84 1691 * @gadget: our gadget
790c2d52 1692 * @driver: the driver being registered
790c2d52 1693 *
790c2d52
AS
1694 * Interrupts are enabled here.
1695 */
8e22978c 1696static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1697 struct usb_gadget_driver *driver)
790c2d52 1698{
8e22978c 1699 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
790c2d52 1700 unsigned long flags;
790c2d52
AS
1701 int retval = -ENOMEM;
1702
1f339d84 1703 if (driver->disconnect == NULL)
790c2d52 1704 return -EINVAL;
790c2d52 1705
790c2d52 1706
26c696c6
RZ
1707 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1708 retval = usb_ep_enable(&ci->ep0out->ep);
ac1aa6a2
A
1709 if (retval)
1710 return retval;
877c1f54 1711
26c696c6
RZ
1712 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1713 retval = usb_ep_enable(&ci->ep0in->ep);
ac1aa6a2
A
1714 if (retval)
1715 return retval;
26c696c6
RZ
1716
1717 ci->driver = driver;
4dcf720c
LJ
1718
1719 /* Start otg fsm for B-device */
1720 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1721 ci_hdrc_otg_fsm_start(ci);
1722 return retval;
1723 }
1724
26c696c6 1725 pm_runtime_get_sync(&ci->gadget.dev);
d268e9bc 1726 if (ci->vbus_active) {
65b2fb32 1727 spin_lock_irqsave(&ci->lock, flags);
5b157300 1728 hw_device_reset(ci);
d268e9bc 1729 } else {
467a78c8 1730 usb_udc_vbus_handler(&ci->gadget, false);
d268e9bc 1731 pm_runtime_put_sync(&ci->gadget.dev);
65b2fb32 1732 return retval;
f01ef574
PK
1733 }
1734
26c696c6 1735 retval = hw_device_state(ci, ci->ep0out->qh.dma);
65b2fb32 1736 spin_unlock_irqrestore(&ci->lock, flags);
c036019e 1737 if (retval)
26c696c6 1738 pm_runtime_put_sync(&ci->gadget.dev);
aa69a809 1739
aa69a809
DL
1740 return retval;
1741}
aa69a809
DL
1742
1743/**
8e22978c 1744 * ci_udc_stop: unregister a gadget driver
aa69a809 1745 */
22835b80 1746static int ci_udc_stop(struct usb_gadget *gadget)
aa69a809 1747{
8e22978c 1748 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1f339d84 1749 unsigned long flags;
aa69a809 1750
26c696c6 1751 spin_lock_irqsave(&ci->lock, flags);
aa69a809 1752
d268e9bc 1753 if (ci->vbus_active) {
26c696c6
RZ
1754 hw_device_state(ci, 0);
1755 if (ci->platdata->notify_event)
1756 ci->platdata->notify_event(ci,
8e22978c 1757 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6
RZ
1758 spin_unlock_irqrestore(&ci->lock, flags);
1759 _gadget_stop_activity(&ci->gadget);
1760 spin_lock_irqsave(&ci->lock, flags);
1761 pm_runtime_put(&ci->gadget.dev);
f01ef574 1762 }
aa69a809 1763
f84839da 1764 ci->driver = NULL;
26c696c6 1765 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809 1766
aa69a809
DL
1767 return 0;
1768}
aa69a809
DL
1769
1770/******************************************************************************
1771 * BUS block
1772 *****************************************************************************/
1773/**
26c696c6 1774 * udc_irq: ci interrupt handler
aa69a809
DL
1775 *
1776 * This function returns IRQ_HANDLED if the IRQ has been handled
1777 * It locks access to registers
1778 */
8e22978c 1779static irqreturn_t udc_irq(struct ci_hdrc *ci)
aa69a809 1780{
aa69a809
DL
1781 irqreturn_t retval;
1782 u32 intr;
1783
26c696c6 1784 if (ci == NULL)
aa69a809 1785 return IRQ_HANDLED;
aa69a809 1786
26c696c6 1787 spin_lock(&ci->lock);
f01ef574 1788
8e22978c 1789 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
26c696c6 1790 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
758fc986 1791 USBMODE_CM_DC) {
26c696c6 1792 spin_unlock(&ci->lock);
f01ef574
PK
1793 return IRQ_NONE;
1794 }
1795 }
26c696c6 1796 intr = hw_test_and_clear_intr_active(ci);
aa69a809 1797
e443b333 1798 if (intr) {
aa69a809 1799 /* order defines priority - do NOT change it */
e443b333 1800 if (USBi_URI & intr)
26c696c6 1801 isr_reset_handler(ci);
e443b333 1802
aa69a809 1803 if (USBi_PCI & intr) {
26c696c6 1804 ci->gadget.speed = hw_port_is_high_speed(ci) ?
aa69a809 1805 USB_SPEED_HIGH : USB_SPEED_FULL;
26c696c6
RZ
1806 if (ci->suspended && ci->driver->resume) {
1807 spin_unlock(&ci->lock);
1808 ci->driver->resume(&ci->gadget);
1809 spin_lock(&ci->lock);
1810 ci->suspended = 0;
e2b61c1d 1811 }
aa69a809 1812 }
e443b333
AS
1813
1814 if (USBi_UI & intr)
26c696c6 1815 isr_tr_complete_handler(ci);
e443b333 1816
e2b61c1d 1817 if (USBi_SLI & intr) {
26c696c6
RZ
1818 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1819 ci->driver->suspend) {
1820 ci->suspended = 1;
1821 spin_unlock(&ci->lock);
1822 ci->driver->suspend(&ci->gadget);
10775eb1
PC
1823 usb_gadget_set_state(&ci->gadget,
1824 USB_STATE_SUSPENDED);
26c696c6 1825 spin_lock(&ci->lock);
e2b61c1d 1826 }
e2b61c1d 1827 }
aa69a809
DL
1828 retval = IRQ_HANDLED;
1829 } else {
aa69a809
DL
1830 retval = IRQ_NONE;
1831 }
26c696c6 1832 spin_unlock(&ci->lock);
aa69a809
DL
1833
1834 return retval;
1835}
1836
aa69a809 1837/**
5f36e231 1838 * udc_start: initialize gadget role
26c696c6 1839 * @ci: chipidea controller
aa69a809 1840 */
8e22978c 1841static int udc_start(struct ci_hdrc *ci)
aa69a809 1842{
26c696c6 1843 struct device *dev = ci->dev;
79742351 1844 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
aa69a809
DL
1845 int retval = 0;
1846
26c696c6 1847 spin_lock_init(&ci->lock);
aa69a809 1848
26c696c6
RZ
1849 ci->gadget.ops = &usb_gadget_ops;
1850 ci->gadget.speed = USB_SPEED_UNKNOWN;
1851 ci->gadget.max_speed = USB_SPEED_HIGH;
26c696c6 1852 ci->gadget.name = ci->platdata->name;
79742351
LJ
1853 ci->gadget.otg_caps = otg_caps;
1854
3f217e9e
LJ
1855 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1856 otg_caps->adp_support))
79742351 1857 ci->gadget.is_otg = 1;
aa69a809 1858
26c696c6 1859 INIT_LIST_HEAD(&ci->gadget.ep_list);
aa69a809 1860
790c2d52 1861 /* alloc resources */
8e22978c
AS
1862 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1863 sizeof(struct ci_hw_qh),
1864 64, CI_HDRC_PAGE_SIZE);
26c696c6 1865 if (ci->qh_pool == NULL)
5f36e231 1866 return -ENOMEM;
790c2d52 1867
8e22978c
AS
1868 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1869 sizeof(struct ci_hw_td),
1870 64, CI_HDRC_PAGE_SIZE);
26c696c6 1871 if (ci->td_pool == NULL) {
790c2d52
AS
1872 retval = -ENOMEM;
1873 goto free_qh_pool;
1874 }
1875
26c696c6 1876 retval = init_eps(ci);
790c2d52
AS
1877 if (retval)
1878 goto free_pools;
1879
26c696c6 1880 ci->gadget.ep0 = &ci->ep0in->ep;
f01ef574 1881
26c696c6 1882 retval = usb_add_gadget_udc(dev, &ci->gadget);
0f91349b 1883 if (retval)
74475ede 1884 goto destroy_eps;
0f91349b 1885
26c696c6
RZ
1886 pm_runtime_no_callbacks(&ci->gadget.dev);
1887 pm_runtime_enable(&ci->gadget.dev);
aa69a809 1888
aa69a809
DL
1889 return retval;
1890
ad6b1b97
MKB
1891destroy_eps:
1892 destroy_eps(ci);
790c2d52 1893free_pools:
26c696c6 1894 dma_pool_destroy(ci->td_pool);
790c2d52 1895free_qh_pool:
26c696c6 1896 dma_pool_destroy(ci->qh_pool);
aa69a809
DL
1897 return retval;
1898}
1899
1900/**
3f124d23 1901 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
aa69a809
DL
1902 *
1903 * No interrupts active, the IRQ has been released
1904 */
3f124d23 1905void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
aa69a809 1906{
3f124d23 1907 if (!ci->roles[CI_ROLE_GADGET])
aa69a809 1908 return;
0f089094 1909
26c696c6 1910 usb_del_gadget_udc(&ci->gadget);
aa69a809 1911
ad6b1b97 1912 destroy_eps(ci);
790c2d52 1913
26c696c6
RZ
1914 dma_pool_destroy(ci->td_pool);
1915 dma_pool_destroy(ci->qh_pool);
3f124d23
PC
1916}
1917
1918static int udc_id_switch_for_device(struct ci_hdrc *ci)
1919{
0c33bf78
LJ
1920 if (ci->is_otg)
1921 /* Clear and enable BSV irq */
1922 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1923 OTGSC_BSVIS | OTGSC_BSVIE);
3f124d23
PC
1924
1925 return 0;
1926}
1927
1928static void udc_id_switch_for_host(struct ci_hdrc *ci)
1929{
0c33bf78
LJ
1930 /*
1931 * host doesn't care B_SESSION_VALID event
1932 * so clear and disbale BSV irq
1933 */
1934 if (ci->is_otg)
1935 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
5f36e231
AS
1936}
1937
1938/**
1939 * ci_hdrc_gadget_init - initialize device related bits
1940 * ci: the controller
1941 *
3f124d23 1942 * This function initializes the gadget, if the device is "device capable".
5f36e231 1943 */
8e22978c 1944int ci_hdrc_gadget_init(struct ci_hdrc *ci)
5f36e231
AS
1945{
1946 struct ci_role_driver *rdrv;
1947
1948 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1949 return -ENXIO;
1950
1951 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1952 if (!rdrv)
1953 return -ENOMEM;
1954
3f124d23
PC
1955 rdrv->start = udc_id_switch_for_device;
1956 rdrv->stop = udc_id_switch_for_host;
5f36e231
AS
1957 rdrv->irq = udc_irq;
1958 rdrv->name = "gadget";
1959 ci->roles[CI_ROLE_GADGET] = rdrv;
aa69a809 1960
3f124d23 1961 return udc_start(ci);
aa69a809 1962}
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