MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / drivers / usb / chipidea / usbmisc_imx.c
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1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/module.h>
13#include <linux/of_platform.h>
14#include <linux/clk.h>
15#include <linux/err.h>
16#include <linux/io.h>
a0685330 17#include <linux/delay.h>
d142d6be 18
8e22978c 19#include "ci_hdrc_imx.h"
d142d6be 20
a0685330
MG
21#define MX25_USB_PHY_CTRL_OFFSET 0x08
22#define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
23
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24#define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
25#define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
26#define MX25_EHCI_INTERFACE_MASK (0xf)
27
28#define MX25_OTG_SIC_SHIFT 29
29#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
30#define MX25_OTG_PM_BIT BIT(24)
31#define MX25_OTG_PP_BIT BIT(11)
32#define MX25_OTG_OCPOL_BIT BIT(3)
33
34#define MX25_H1_SIC_SHIFT 21
35#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
36#define MX25_H1_PP_BIT BIT(18)
37#define MX25_H1_PM_BIT BIT(16)
38#define MX25_H1_IPPUE_UP_BIT BIT(7)
39#define MX25_H1_IPPUE_DOWN_BIT BIT(6)
40#define MX25_H1_TLL_BIT BIT(5)
41#define MX25_H1_USBTE_BIT BIT(4)
42#define MX25_H1_OCPOL_BIT BIT(2)
43
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44#define MX27_H1_PM_BIT BIT(8)
45#define MX27_H2_PM_BIT BIT(16)
46#define MX27_OTG_PM_BIT BIT(24)
47
f0c910b6 48#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
33f92a8a 49#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
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50#define MX53_USB_UH2_CTRL_OFFSET 0x14
51#define MX53_USB_UH3_CTRL_OFFSET 0x18
52#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
53#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
54#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
33f92a8a
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55#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
56#define MX53_USB_PLL_DIV_24_MHZ 0x01
f0c910b6 57
e609108a 58#define MX6_BM_OVER_CUR_DIS BIT(7)
d142d6be 59
f40017e0
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60#define VF610_OVER_CUR_DIS BIT(7)
61
05986ba9
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62struct usbmisc_ops {
63 /* It's called once when probe a usb device */
64 int (*init)(struct imx_usbmisc_data *data);
65 /* It's called once after adding a usb device */
66 int (*post)(struct imx_usbmisc_data *data);
67};
68
a7bc2fdf 69struct imx_usbmisc {
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70 void __iomem *base;
71 spinlock_t lock;
72 struct clk *clk;
e609108a 73 const struct usbmisc_ops *ops;
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74};
75
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76static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
77{
f40017e0 78 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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DC
79 unsigned long flags;
80 u32 val = 0;
81
82 if (data->index > 1)
83 return -EINVAL;
84
85 spin_lock_irqsave(&usbmisc->lock, flags);
86 switch (data->index) {
87 case 0:
88 val = readl(usbmisc->base);
89 val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
90 val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
91 val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
92 writel(val, usbmisc->base);
93 break;
94 case 1:
95 val = readl(usbmisc->base);
96 val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT);
97 val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
98 val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
99 MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);
100
101 writel(val, usbmisc->base);
102
103 break;
104 }
105 spin_unlock_irqrestore(&usbmisc->lock, flags);
106
107 return 0;
108}
109
05986ba9 110static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
a0685330 111{
f40017e0 112 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
a0685330
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113 void __iomem *reg;
114 unsigned long flags;
115 u32 val;
116
05986ba9
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117 if (data->index > 2)
118 return -EINVAL;
a0685330 119
05986ba9 120 if (data->evdo) {
a0685330 121 spin_lock_irqsave(&usbmisc->lock, flags);
8d1dc4d0 122 reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
a0685330
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123 val = readl(reg);
124 writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
125 spin_unlock_irqrestore(&usbmisc->lock, flags);
126 usleep_range(5000, 10000); /* needed to stabilize voltage */
127 }
128
129 return 0;
130}
131
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132static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
133{
f40017e0 134 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
9f90e111
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135 unsigned long flags;
136 u32 val;
137
138 switch (data->index) {
139 case 0:
140 val = MX27_OTG_PM_BIT;
141 break;
142 case 1:
143 val = MX27_H1_PM_BIT;
144 break;
145 case 2:
146 val = MX27_H2_PM_BIT;
147 break;
148 default:
149 return -EINVAL;
150 };
151
152 spin_lock_irqsave(&usbmisc->lock, flags);
153 if (data->disable_oc)
154 val = readl(usbmisc->base) | val;
155 else
156 val = readl(usbmisc->base) & ~val;
157 writel(val, usbmisc->base);
158 spin_unlock_irqrestore(&usbmisc->lock, flags);
159
160 return 0;
161}
162
05986ba9 163static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
f0c910b6 164{
f40017e0 165 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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166 void __iomem *reg = NULL;
167 unsigned long flags;
168 u32 val = 0;
169
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170 if (data->index > 3)
171 return -EINVAL;
f0c910b6 172
33f92a8a 173 /* Select a 24 MHz reference clock for the PHY */
4a1d6cf1 174 val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
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175 val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
176 val |= MX53_USB_PLL_DIV_24_MHZ;
177 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
178
05986ba9 179 if (data->disable_oc) {
f0c910b6 180 spin_lock_irqsave(&usbmisc->lock, flags);
05986ba9 181 switch (data->index) {
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182 case 0:
183 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
184 val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
185 break;
186 case 1:
187 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
188 val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
189 break;
190 case 2:
191 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
192 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
193 break;
194 case 3:
195 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
196 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
197 break;
198 }
199 if (reg && val)
200 writel(val, reg);
201 spin_unlock_irqrestore(&usbmisc->lock, flags);
202 }
203
204 return 0;
205}
206
05986ba9 207static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
d142d6be 208{
f40017e0 209 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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210 unsigned long flags;
211 u32 reg;
212
05986ba9
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213 if (data->index > 3)
214 return -EINVAL;
d142d6be 215
05986ba9 216 if (data->disable_oc) {
d142d6be 217 spin_lock_irqsave(&usbmisc->lock, flags);
05986ba9 218 reg = readl(usbmisc->base + data->index * 4);
e609108a 219 writel(reg | MX6_BM_OVER_CUR_DIS,
05986ba9 220 usbmisc->base + data->index * 4);
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221 spin_unlock_irqrestore(&usbmisc->lock, flags);
222 }
223
224 return 0;
225}
226
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227static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
228{
229 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
230 u32 reg;
231
232 /*
233 * Vybrid only has one misc register set, but in two different
234 * areas. These is reflected in two instances of this driver.
235 */
236 if (data->index >= 1)
237 return -EINVAL;
238
239 if (data->disable_oc) {
240 reg = readl(usbmisc->base);
241 writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
242 }
243
244 return 0;
245}
246
a0685330 247static const struct usbmisc_ops imx25_usbmisc_ops = {
72ee92d1 248 .init = usbmisc_imx25_init,
a0685330
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249 .post = usbmisc_imx25_post,
250};
251
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252static const struct usbmisc_ops imx27_usbmisc_ops = {
253 .init = usbmisc_imx27_init,
254};
255
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256static const struct usbmisc_ops imx53_usbmisc_ops = {
257 .init = usbmisc_imx53_init,
258};
259
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260static const struct usbmisc_ops imx6q_usbmisc_ops = {
261 .init = usbmisc_imx6q_init,
262};
263
f40017e0
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264static const struct usbmisc_ops vf610_usbmisc_ops = {
265 .init = usbmisc_vf610_init,
266};
267
05986ba9
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268int imx_usbmisc_init(struct imx_usbmisc_data *data)
269{
f40017e0
SA
270 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
271
05986ba9
SH
272 if (!usbmisc->ops->init)
273 return 0;
274 return usbmisc->ops->init(data);
275}
276EXPORT_SYMBOL_GPL(imx_usbmisc_init);
277
278int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
279{
f40017e0
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280 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
281
05986ba9
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282 if (!usbmisc->ops->post)
283 return 0;
284 return usbmisc->ops->post(data);
285}
286EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
287
a7bc2fdf 288static const struct of_device_id usbmisc_imx_dt_ids[] = {
a0685330
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289 {
290 .compatible = "fsl,imx25-usbmisc",
291 .data = &imx25_usbmisc_ops,
292 },
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293 {
294 .compatible = "fsl,imx35-usbmisc",
295 .data = &imx25_usbmisc_ops,
296 },
9f90e111
AS
297 {
298 .compatible = "fsl,imx27-usbmisc",
299 .data = &imx27_usbmisc_ops,
300 },
c4962e03
AS
301 {
302 .compatible = "fsl,imx51-usbmisc",
303 .data = &imx53_usbmisc_ops,
304 },
f0c910b6
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305 {
306 .compatible = "fsl,imx53-usbmisc",
307 .data = &imx53_usbmisc_ops,
308 },
e609108a
MKB
309 {
310 .compatible = "fsl,imx6q-usbmisc",
311 .data = &imx6q_usbmisc_ops,
312 },
f40017e0
SA
313 {
314 .compatible = "fsl,vf610-usbmisc",
315 .data = &vf610_usbmisc_ops,
316 },
d142d6be
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317 { /* sentinel */ }
318};
269b83dc 319MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
d142d6be 320
a7bc2fdf 321static int usbmisc_imx_probe(struct platform_device *pdev)
d142d6be
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322{
323 struct resource *res;
a7bc2fdf 324 struct imx_usbmisc *data;
d142d6be 325 int ret;
e609108a 326 struct of_device_id *tmp_dev;
d142d6be 327
d142d6be
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328 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
329 if (!data)
330 return -ENOMEM;
331
332 spin_lock_init(&data->lock);
333
334 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148e1134
TR
335 data->base = devm_ioremap_resource(&pdev->dev, res);
336 if (IS_ERR(data->base))
337 return PTR_ERR(data->base);
d142d6be
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338
339 data->clk = devm_clk_get(&pdev->dev, NULL);
340 if (IS_ERR(data->clk)) {
341 dev_err(&pdev->dev,
342 "failed to get clock, err=%ld\n", PTR_ERR(data->clk));
343 return PTR_ERR(data->clk);
344 }
345
346 ret = clk_prepare_enable(data->clk);
347 if (ret) {
348 dev_err(&pdev->dev,
349 "clk_prepare_enable failed, err=%d\n", ret);
350 return ret;
351 }
352
e609108a
MKB
353 tmp_dev = (struct of_device_id *)
354 of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
355 data->ops = (const struct usbmisc_ops *)tmp_dev->data;
f40017e0 356 platform_set_drvdata(pdev, data);
d142d6be 357
d142d6be
RZ
358 return 0;
359}
360
a7bc2fdf 361static int usbmisc_imx_remove(struct platform_device *pdev)
d142d6be 362{
f40017e0 363 struct imx_usbmisc *usbmisc = dev_get_drvdata(&pdev->dev);
d142d6be
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364 clk_disable_unprepare(usbmisc->clk);
365 return 0;
366}
367
a7bc2fdf
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368static struct platform_driver usbmisc_imx_driver = {
369 .probe = usbmisc_imx_probe,
370 .remove = usbmisc_imx_remove,
d142d6be 371 .driver = {
a7bc2fdf 372 .name = "usbmisc_imx",
a7bc2fdf 373 .of_match_table = usbmisc_imx_dt_ids,
d142d6be
RZ
374 },
375};
376
0404ae03 377module_platform_driver(usbmisc_imx_driver);
d142d6be 378
a7bc2fdf 379MODULE_ALIAS("platform:usbmisc-imx");
d142d6be 380MODULE_LICENSE("GPL v2");
a7bc2fdf 381MODULE_DESCRIPTION("driver for imx usb non-core registers");
d142d6be 382MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");
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