Commit | Line | Data |
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d142d6be RZ |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/of_platform.h> | |
d142d6be RZ |
14 | #include <linux/err.h> |
15 | #include <linux/io.h> | |
a0685330 | 16 | #include <linux/delay.h> |
d142d6be | 17 | |
8e22978c | 18 | #include "ci_hdrc_imx.h" |
d142d6be | 19 | |
a0685330 MG |
20 | #define MX25_USB_PHY_CTRL_OFFSET 0x08 |
21 | #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23) | |
22 | ||
72ee92d1 DC |
23 | #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0) |
24 | #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0) | |
25 | #define MX25_EHCI_INTERFACE_MASK (0xf) | |
26 | ||
27 | #define MX25_OTG_SIC_SHIFT 29 | |
28 | #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) | |
29 | #define MX25_OTG_PM_BIT BIT(24) | |
30 | #define MX25_OTG_PP_BIT BIT(11) | |
31 | #define MX25_OTG_OCPOL_BIT BIT(3) | |
32 | ||
33 | #define MX25_H1_SIC_SHIFT 21 | |
34 | #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) | |
35 | #define MX25_H1_PP_BIT BIT(18) | |
36 | #define MX25_H1_PM_BIT BIT(16) | |
37 | #define MX25_H1_IPPUE_UP_BIT BIT(7) | |
38 | #define MX25_H1_IPPUE_DOWN_BIT BIT(6) | |
39 | #define MX25_H1_TLL_BIT BIT(5) | |
40 | #define MX25_H1_USBTE_BIT BIT(4) | |
41 | #define MX25_H1_OCPOL_BIT BIT(2) | |
42 | ||
9f90e111 AS |
43 | #define MX27_H1_PM_BIT BIT(8) |
44 | #define MX27_H2_PM_BIT BIT(16) | |
45 | #define MX27_OTG_PM_BIT BIT(24) | |
46 | ||
f0c910b6 | 47 | #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 |
33f92a8a | 48 | #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c |
f0c910b6 MG |
49 | #define MX53_USB_UH2_CTRL_OFFSET 0x14 |
50 | #define MX53_USB_UH3_CTRL_OFFSET 0x18 | |
51 | #define MX53_BM_OVER_CUR_DIS_H1 BIT(5) | |
52 | #define MX53_BM_OVER_CUR_DIS_OTG BIT(8) | |
53 | #define MX53_BM_OVER_CUR_DIS_UHx BIT(30) | |
33f92a8a FE |
54 | #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 |
55 | #define MX53_USB_PLL_DIV_24_MHZ 0x01 | |
f0c910b6 | 56 | |
e609108a | 57 | #define MX6_BM_OVER_CUR_DIS BIT(7) |
d142d6be | 58 | |
f40017e0 SA |
59 | #define VF610_OVER_CUR_DIS BIT(7) |
60 | ||
05986ba9 SH |
61 | struct usbmisc_ops { |
62 | /* It's called once when probe a usb device */ | |
63 | int (*init)(struct imx_usbmisc_data *data); | |
64 | /* It's called once after adding a usb device */ | |
65 | int (*post)(struct imx_usbmisc_data *data); | |
66 | }; | |
67 | ||
a7bc2fdf | 68 | struct imx_usbmisc { |
d142d6be RZ |
69 | void __iomem *base; |
70 | spinlock_t lock; | |
e609108a | 71 | const struct usbmisc_ops *ops; |
d142d6be RZ |
72 | }; |
73 | ||
72ee92d1 DC |
74 | static int usbmisc_imx25_init(struct imx_usbmisc_data *data) |
75 | { | |
f40017e0 | 76 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
72ee92d1 DC |
77 | unsigned long flags; |
78 | u32 val = 0; | |
79 | ||
80 | if (data->index > 1) | |
81 | return -EINVAL; | |
82 | ||
83 | spin_lock_irqsave(&usbmisc->lock, flags); | |
84 | switch (data->index) { | |
85 | case 0: | |
86 | val = readl(usbmisc->base); | |
87 | val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT); | |
88 | val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; | |
89 | val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT); | |
90 | writel(val, usbmisc->base); | |
91 | break; | |
92 | case 1: | |
93 | val = readl(usbmisc->base); | |
94 | val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT); | |
95 | val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; | |
96 | val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | | |
97 | MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT); | |
98 | ||
99 | writel(val, usbmisc->base); | |
100 | ||
101 | break; | |
102 | } | |
103 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
104 | ||
105 | return 0; | |
106 | } | |
107 | ||
05986ba9 | 108 | static int usbmisc_imx25_post(struct imx_usbmisc_data *data) |
a0685330 | 109 | { |
f40017e0 | 110 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
a0685330 MG |
111 | void __iomem *reg; |
112 | unsigned long flags; | |
113 | u32 val; | |
114 | ||
05986ba9 SH |
115 | if (data->index > 2) |
116 | return -EINVAL; | |
a0685330 | 117 | |
05986ba9 | 118 | if (data->evdo) { |
a0685330 | 119 | spin_lock_irqsave(&usbmisc->lock, flags); |
8d1dc4d0 | 120 | reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET; |
a0685330 MG |
121 | val = readl(reg); |
122 | writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg); | |
123 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
124 | usleep_range(5000, 10000); /* needed to stabilize voltage */ | |
125 | } | |
126 | ||
127 | return 0; | |
128 | } | |
129 | ||
9f90e111 AS |
130 | static int usbmisc_imx27_init(struct imx_usbmisc_data *data) |
131 | { | |
f40017e0 | 132 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
9f90e111 AS |
133 | unsigned long flags; |
134 | u32 val; | |
135 | ||
136 | switch (data->index) { | |
137 | case 0: | |
138 | val = MX27_OTG_PM_BIT; | |
139 | break; | |
140 | case 1: | |
141 | val = MX27_H1_PM_BIT; | |
142 | break; | |
143 | case 2: | |
144 | val = MX27_H2_PM_BIT; | |
145 | break; | |
146 | default: | |
147 | return -EINVAL; | |
148 | }; | |
149 | ||
150 | spin_lock_irqsave(&usbmisc->lock, flags); | |
151 | if (data->disable_oc) | |
152 | val = readl(usbmisc->base) | val; | |
153 | else | |
154 | val = readl(usbmisc->base) & ~val; | |
155 | writel(val, usbmisc->base); | |
156 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
157 | ||
158 | return 0; | |
159 | } | |
160 | ||
05986ba9 | 161 | static int usbmisc_imx53_init(struct imx_usbmisc_data *data) |
f0c910b6 | 162 | { |
f40017e0 | 163 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
f0c910b6 MG |
164 | void __iomem *reg = NULL; |
165 | unsigned long flags; | |
166 | u32 val = 0; | |
167 | ||
05986ba9 SH |
168 | if (data->index > 3) |
169 | return -EINVAL; | |
f0c910b6 | 170 | |
33f92a8a | 171 | /* Select a 24 MHz reference clock for the PHY */ |
4a1d6cf1 | 172 | val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); |
33f92a8a FE |
173 | val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK; |
174 | val |= MX53_USB_PLL_DIV_24_MHZ; | |
175 | writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); | |
176 | ||
05986ba9 | 177 | if (data->disable_oc) { |
f0c910b6 | 178 | spin_lock_irqsave(&usbmisc->lock, flags); |
05986ba9 | 179 | switch (data->index) { |
f0c910b6 MG |
180 | case 0: |
181 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; | |
182 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; | |
183 | break; | |
184 | case 1: | |
185 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; | |
186 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; | |
187 | break; | |
188 | case 2: | |
189 | reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; | |
190 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; | |
191 | break; | |
192 | case 3: | |
193 | reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; | |
194 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; | |
195 | break; | |
196 | } | |
197 | if (reg && val) | |
198 | writel(val, reg); | |
199 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
200 | } | |
201 | ||
202 | return 0; | |
203 | } | |
204 | ||
05986ba9 | 205 | static int usbmisc_imx6q_init(struct imx_usbmisc_data *data) |
d142d6be | 206 | { |
f40017e0 | 207 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
d142d6be RZ |
208 | unsigned long flags; |
209 | u32 reg; | |
210 | ||
05986ba9 SH |
211 | if (data->index > 3) |
212 | return -EINVAL; | |
d142d6be | 213 | |
05986ba9 | 214 | if (data->disable_oc) { |
d142d6be | 215 | spin_lock_irqsave(&usbmisc->lock, flags); |
05986ba9 | 216 | reg = readl(usbmisc->base + data->index * 4); |
e609108a | 217 | writel(reg | MX6_BM_OVER_CUR_DIS, |
05986ba9 | 218 | usbmisc->base + data->index * 4); |
d142d6be RZ |
219 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
220 | } | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
f40017e0 SA |
225 | static int usbmisc_vf610_init(struct imx_usbmisc_data *data) |
226 | { | |
227 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); | |
228 | u32 reg; | |
229 | ||
230 | /* | |
231 | * Vybrid only has one misc register set, but in two different | |
232 | * areas. These is reflected in two instances of this driver. | |
233 | */ | |
234 | if (data->index >= 1) | |
235 | return -EINVAL; | |
236 | ||
237 | if (data->disable_oc) { | |
238 | reg = readl(usbmisc->base); | |
239 | writel(reg | VF610_OVER_CUR_DIS, usbmisc->base); | |
240 | } | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
a0685330 | 245 | static const struct usbmisc_ops imx25_usbmisc_ops = { |
72ee92d1 | 246 | .init = usbmisc_imx25_init, |
a0685330 MG |
247 | .post = usbmisc_imx25_post, |
248 | }; | |
249 | ||
9f90e111 AS |
250 | static const struct usbmisc_ops imx27_usbmisc_ops = { |
251 | .init = usbmisc_imx27_init, | |
252 | }; | |
253 | ||
f0c910b6 MG |
254 | static const struct usbmisc_ops imx53_usbmisc_ops = { |
255 | .init = usbmisc_imx53_init, | |
256 | }; | |
257 | ||
d142d6be RZ |
258 | static const struct usbmisc_ops imx6q_usbmisc_ops = { |
259 | .init = usbmisc_imx6q_init, | |
260 | }; | |
261 | ||
f40017e0 SA |
262 | static const struct usbmisc_ops vf610_usbmisc_ops = { |
263 | .init = usbmisc_vf610_init, | |
264 | }; | |
265 | ||
05986ba9 SH |
266 | int imx_usbmisc_init(struct imx_usbmisc_data *data) |
267 | { | |
f40017e0 SA |
268 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
269 | ||
05986ba9 SH |
270 | if (!usbmisc->ops->init) |
271 | return 0; | |
272 | return usbmisc->ops->init(data); | |
273 | } | |
274 | EXPORT_SYMBOL_GPL(imx_usbmisc_init); | |
275 | ||
276 | int imx_usbmisc_init_post(struct imx_usbmisc_data *data) | |
277 | { | |
f40017e0 SA |
278 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
279 | ||
05986ba9 SH |
280 | if (!usbmisc->ops->post) |
281 | return 0; | |
282 | return usbmisc->ops->post(data); | |
283 | } | |
284 | EXPORT_SYMBOL_GPL(imx_usbmisc_init_post); | |
285 | ||
a7bc2fdf | 286 | static const struct of_device_id usbmisc_imx_dt_ids[] = { |
a0685330 MG |
287 | { |
288 | .compatible = "fsl,imx25-usbmisc", | |
289 | .data = &imx25_usbmisc_ops, | |
290 | }, | |
72ee92d1 DC |
291 | { |
292 | .compatible = "fsl,imx35-usbmisc", | |
293 | .data = &imx25_usbmisc_ops, | |
294 | }, | |
9f90e111 AS |
295 | { |
296 | .compatible = "fsl,imx27-usbmisc", | |
297 | .data = &imx27_usbmisc_ops, | |
298 | }, | |
c4962e03 AS |
299 | { |
300 | .compatible = "fsl,imx51-usbmisc", | |
301 | .data = &imx53_usbmisc_ops, | |
302 | }, | |
f0c910b6 MG |
303 | { |
304 | .compatible = "fsl,imx53-usbmisc", | |
305 | .data = &imx53_usbmisc_ops, | |
306 | }, | |
e609108a MKB |
307 | { |
308 | .compatible = "fsl,imx6q-usbmisc", | |
309 | .data = &imx6q_usbmisc_ops, | |
310 | }, | |
f40017e0 SA |
311 | { |
312 | .compatible = "fsl,vf610-usbmisc", | |
313 | .data = &vf610_usbmisc_ops, | |
314 | }, | |
d142d6be RZ |
315 | { /* sentinel */ } |
316 | }; | |
269b83dc | 317 | MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids); |
d142d6be | 318 | |
a7bc2fdf | 319 | static int usbmisc_imx_probe(struct platform_device *pdev) |
d142d6be RZ |
320 | { |
321 | struct resource *res; | |
a7bc2fdf | 322 | struct imx_usbmisc *data; |
e609108a | 323 | struct of_device_id *tmp_dev; |
d142d6be | 324 | |
d142d6be RZ |
325 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
326 | if (!data) | |
327 | return -ENOMEM; | |
328 | ||
329 | spin_lock_init(&data->lock); | |
330 | ||
331 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
148e1134 TR |
332 | data->base = devm_ioremap_resource(&pdev->dev, res); |
333 | if (IS_ERR(data->base)) | |
334 | return PTR_ERR(data->base); | |
d142d6be | 335 | |
e609108a MKB |
336 | tmp_dev = (struct of_device_id *) |
337 | of_match_device(usbmisc_imx_dt_ids, &pdev->dev); | |
338 | data->ops = (const struct usbmisc_ops *)tmp_dev->data; | |
f40017e0 | 339 | platform_set_drvdata(pdev, data); |
d142d6be | 340 | |
d142d6be RZ |
341 | return 0; |
342 | } | |
343 | ||
a7bc2fdf | 344 | static int usbmisc_imx_remove(struct platform_device *pdev) |
d142d6be | 345 | { |
d142d6be RZ |
346 | return 0; |
347 | } | |
348 | ||
a7bc2fdf MG |
349 | static struct platform_driver usbmisc_imx_driver = { |
350 | .probe = usbmisc_imx_probe, | |
351 | .remove = usbmisc_imx_remove, | |
d142d6be | 352 | .driver = { |
a7bc2fdf | 353 | .name = "usbmisc_imx", |
a7bc2fdf | 354 | .of_match_table = usbmisc_imx_dt_ids, |
d142d6be RZ |
355 | }, |
356 | }; | |
357 | ||
0404ae03 | 358 | module_platform_driver(usbmisc_imx_driver); |
d142d6be | 359 | |
a7bc2fdf | 360 | MODULE_ALIAS("platform:usbmisc-imx"); |
d142d6be | 361 | MODULE_LICENSE("GPL v2"); |
a7bc2fdf | 362 | MODULE_DESCRIPTION("driver for imx usb non-core registers"); |
d142d6be | 363 | MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>"); |