Commit | Line | Data |
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d142d6be RZ |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/of_platform.h> | |
d142d6be RZ |
14 | #include <linux/err.h> |
15 | #include <linux/io.h> | |
a0685330 | 16 | #include <linux/delay.h> |
d142d6be | 17 | |
8e22978c | 18 | #include "ci_hdrc_imx.h" |
d142d6be | 19 | |
a0685330 MG |
20 | #define MX25_USB_PHY_CTRL_OFFSET 0x08 |
21 | #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23) | |
22 | ||
72ee92d1 DC |
23 | #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0) |
24 | #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0) | |
25 | #define MX25_EHCI_INTERFACE_MASK (0xf) | |
26 | ||
27 | #define MX25_OTG_SIC_SHIFT 29 | |
28 | #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) | |
29 | #define MX25_OTG_PM_BIT BIT(24) | |
30 | #define MX25_OTG_PP_BIT BIT(11) | |
31 | #define MX25_OTG_OCPOL_BIT BIT(3) | |
32 | ||
33 | #define MX25_H1_SIC_SHIFT 21 | |
34 | #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) | |
35 | #define MX25_H1_PP_BIT BIT(18) | |
36 | #define MX25_H1_PM_BIT BIT(16) | |
37 | #define MX25_H1_IPPUE_UP_BIT BIT(7) | |
38 | #define MX25_H1_IPPUE_DOWN_BIT BIT(6) | |
39 | #define MX25_H1_TLL_BIT BIT(5) | |
40 | #define MX25_H1_USBTE_BIT BIT(4) | |
41 | #define MX25_H1_OCPOL_BIT BIT(2) | |
42 | ||
9f90e111 AS |
43 | #define MX27_H1_PM_BIT BIT(8) |
44 | #define MX27_H2_PM_BIT BIT(16) | |
45 | #define MX27_OTG_PM_BIT BIT(24) | |
46 | ||
f0c910b6 | 47 | #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 |
33f92a8a | 48 | #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c |
f0c910b6 MG |
49 | #define MX53_USB_UH2_CTRL_OFFSET 0x14 |
50 | #define MX53_USB_UH3_CTRL_OFFSET 0x18 | |
51 | #define MX53_BM_OVER_CUR_DIS_H1 BIT(5) | |
52 | #define MX53_BM_OVER_CUR_DIS_OTG BIT(8) | |
53 | #define MX53_BM_OVER_CUR_DIS_UHx BIT(30) | |
33f92a8a FE |
54 | #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 |
55 | #define MX53_USB_PLL_DIV_24_MHZ 0x01 | |
f0c910b6 | 56 | |
e609108a | 57 | #define MX6_BM_OVER_CUR_DIS BIT(7) |
f636cec5 PC |
58 | #define MX6_BM_WAKEUP_ENABLE BIT(10) |
59 | #define MX6_BM_ID_WAKEUP BIT(16) | |
60 | #define MX6_BM_VBUS_WAKEUP BIT(17) | |
61 | #define MX6_BM_WAKEUP_INTR BIT(31) | |
d142d6be | 62 | |
f40017e0 SA |
63 | #define VF610_OVER_CUR_DIS BIT(7) |
64 | ||
05986ba9 SH |
65 | struct usbmisc_ops { |
66 | /* It's called once when probe a usb device */ | |
67 | int (*init)(struct imx_usbmisc_data *data); | |
68 | /* It's called once after adding a usb device */ | |
69 | int (*post)(struct imx_usbmisc_data *data); | |
f636cec5 PC |
70 | /* It's called when we need to enable/disable usb wakeup */ |
71 | int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled); | |
05986ba9 SH |
72 | }; |
73 | ||
a7bc2fdf | 74 | struct imx_usbmisc { |
d142d6be RZ |
75 | void __iomem *base; |
76 | spinlock_t lock; | |
e609108a | 77 | const struct usbmisc_ops *ops; |
d142d6be RZ |
78 | }; |
79 | ||
72ee92d1 DC |
80 | static int usbmisc_imx25_init(struct imx_usbmisc_data *data) |
81 | { | |
f40017e0 | 82 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
72ee92d1 DC |
83 | unsigned long flags; |
84 | u32 val = 0; | |
85 | ||
86 | if (data->index > 1) | |
87 | return -EINVAL; | |
88 | ||
89 | spin_lock_irqsave(&usbmisc->lock, flags); | |
90 | switch (data->index) { | |
91 | case 0: | |
92 | val = readl(usbmisc->base); | |
93 | val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT); | |
94 | val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; | |
95 | val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT); | |
96 | writel(val, usbmisc->base); | |
97 | break; | |
98 | case 1: | |
99 | val = readl(usbmisc->base); | |
100 | val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT); | |
101 | val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; | |
102 | val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | | |
103 | MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT); | |
104 | ||
105 | writel(val, usbmisc->base); | |
106 | ||
107 | break; | |
108 | } | |
109 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
110 | ||
111 | return 0; | |
112 | } | |
113 | ||
05986ba9 | 114 | static int usbmisc_imx25_post(struct imx_usbmisc_data *data) |
a0685330 | 115 | { |
f40017e0 | 116 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
a0685330 MG |
117 | void __iomem *reg; |
118 | unsigned long flags; | |
119 | u32 val; | |
120 | ||
05986ba9 SH |
121 | if (data->index > 2) |
122 | return -EINVAL; | |
a0685330 | 123 | |
05986ba9 | 124 | if (data->evdo) { |
a0685330 | 125 | spin_lock_irqsave(&usbmisc->lock, flags); |
8d1dc4d0 | 126 | reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET; |
a0685330 MG |
127 | val = readl(reg); |
128 | writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg); | |
129 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
130 | usleep_range(5000, 10000); /* needed to stabilize voltage */ | |
131 | } | |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
9f90e111 AS |
136 | static int usbmisc_imx27_init(struct imx_usbmisc_data *data) |
137 | { | |
f40017e0 | 138 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
9f90e111 AS |
139 | unsigned long flags; |
140 | u32 val; | |
141 | ||
142 | switch (data->index) { | |
143 | case 0: | |
144 | val = MX27_OTG_PM_BIT; | |
145 | break; | |
146 | case 1: | |
147 | val = MX27_H1_PM_BIT; | |
148 | break; | |
149 | case 2: | |
150 | val = MX27_H2_PM_BIT; | |
151 | break; | |
152 | default: | |
153 | return -EINVAL; | |
154 | }; | |
155 | ||
156 | spin_lock_irqsave(&usbmisc->lock, flags); | |
157 | if (data->disable_oc) | |
158 | val = readl(usbmisc->base) | val; | |
159 | else | |
160 | val = readl(usbmisc->base) & ~val; | |
161 | writel(val, usbmisc->base); | |
162 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
163 | ||
164 | return 0; | |
165 | } | |
166 | ||
05986ba9 | 167 | static int usbmisc_imx53_init(struct imx_usbmisc_data *data) |
f0c910b6 | 168 | { |
f40017e0 | 169 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
f0c910b6 MG |
170 | void __iomem *reg = NULL; |
171 | unsigned long flags; | |
172 | u32 val = 0; | |
173 | ||
05986ba9 SH |
174 | if (data->index > 3) |
175 | return -EINVAL; | |
f0c910b6 | 176 | |
33f92a8a | 177 | /* Select a 24 MHz reference clock for the PHY */ |
4a1d6cf1 | 178 | val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); |
33f92a8a FE |
179 | val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK; |
180 | val |= MX53_USB_PLL_DIV_24_MHZ; | |
181 | writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); | |
182 | ||
05986ba9 | 183 | if (data->disable_oc) { |
f0c910b6 | 184 | spin_lock_irqsave(&usbmisc->lock, flags); |
05986ba9 | 185 | switch (data->index) { |
f0c910b6 MG |
186 | case 0: |
187 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; | |
188 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; | |
189 | break; | |
190 | case 1: | |
191 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; | |
192 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; | |
193 | break; | |
194 | case 2: | |
195 | reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; | |
196 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; | |
197 | break; | |
198 | case 3: | |
199 | reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; | |
200 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; | |
201 | break; | |
202 | } | |
203 | if (reg && val) | |
204 | writel(val, reg); | |
205 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
206 | } | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
f636cec5 PC |
211 | static int usbmisc_imx6q_set_wakeup |
212 | (struct imx_usbmisc_data *data, bool enabled) | |
213 | { | |
214 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); | |
215 | unsigned long flags; | |
216 | u32 val; | |
217 | u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | | |
218 | MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); | |
219 | int ret = 0; | |
220 | ||
221 | if (data->index > 3) | |
222 | return -EINVAL; | |
223 | ||
224 | spin_lock_irqsave(&usbmisc->lock, flags); | |
225 | val = readl(usbmisc->base + data->index * 4); | |
226 | if (enabled) { | |
227 | val |= wakeup_setting; | |
228 | writel(val, usbmisc->base + data->index * 4); | |
229 | } else { | |
230 | if (val & MX6_BM_WAKEUP_INTR) | |
231 | pr_debug("wakeup int at ci_hdrc.%d\n", data->index); | |
232 | val &= ~wakeup_setting; | |
233 | writel(val, usbmisc->base + data->index * 4); | |
234 | } | |
235 | spin_unlock_irqrestore(&usbmisc->lock, flags); | |
236 | ||
237 | return ret; | |
238 | } | |
239 | ||
05986ba9 | 240 | static int usbmisc_imx6q_init(struct imx_usbmisc_data *data) |
d142d6be | 241 | { |
f40017e0 | 242 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
d142d6be RZ |
243 | unsigned long flags; |
244 | u32 reg; | |
245 | ||
05986ba9 SH |
246 | if (data->index > 3) |
247 | return -EINVAL; | |
d142d6be | 248 | |
05986ba9 | 249 | if (data->disable_oc) { |
d142d6be | 250 | spin_lock_irqsave(&usbmisc->lock, flags); |
05986ba9 | 251 | reg = readl(usbmisc->base + data->index * 4); |
e609108a | 252 | writel(reg | MX6_BM_OVER_CUR_DIS, |
05986ba9 | 253 | usbmisc->base + data->index * 4); |
d142d6be RZ |
254 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
255 | } | |
256 | ||
f636cec5 PC |
257 | usbmisc_imx6q_set_wakeup(data, false); |
258 | ||
d142d6be RZ |
259 | return 0; |
260 | } | |
261 | ||
f40017e0 SA |
262 | static int usbmisc_vf610_init(struct imx_usbmisc_data *data) |
263 | { | |
264 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); | |
265 | u32 reg; | |
266 | ||
267 | /* | |
268 | * Vybrid only has one misc register set, but in two different | |
269 | * areas. These is reflected in two instances of this driver. | |
270 | */ | |
271 | if (data->index >= 1) | |
272 | return -EINVAL; | |
273 | ||
274 | if (data->disable_oc) { | |
275 | reg = readl(usbmisc->base); | |
276 | writel(reg | VF610_OVER_CUR_DIS, usbmisc->base); | |
277 | } | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
a0685330 | 282 | static const struct usbmisc_ops imx25_usbmisc_ops = { |
72ee92d1 | 283 | .init = usbmisc_imx25_init, |
a0685330 MG |
284 | .post = usbmisc_imx25_post, |
285 | }; | |
286 | ||
9f90e111 AS |
287 | static const struct usbmisc_ops imx27_usbmisc_ops = { |
288 | .init = usbmisc_imx27_init, | |
289 | }; | |
290 | ||
f0c910b6 MG |
291 | static const struct usbmisc_ops imx53_usbmisc_ops = { |
292 | .init = usbmisc_imx53_init, | |
293 | }; | |
294 | ||
d142d6be | 295 | static const struct usbmisc_ops imx6q_usbmisc_ops = { |
f636cec5 | 296 | .set_wakeup = usbmisc_imx6q_set_wakeup, |
d142d6be RZ |
297 | .init = usbmisc_imx6q_init, |
298 | }; | |
299 | ||
f40017e0 SA |
300 | static const struct usbmisc_ops vf610_usbmisc_ops = { |
301 | .init = usbmisc_vf610_init, | |
302 | }; | |
303 | ||
05986ba9 SH |
304 | int imx_usbmisc_init(struct imx_usbmisc_data *data) |
305 | { | |
a4cf1b14 PC |
306 | struct imx_usbmisc *usbmisc; |
307 | ||
308 | if (!data) | |
309 | return 0; | |
f40017e0 | 310 | |
a4cf1b14 | 311 | usbmisc = dev_get_drvdata(data->dev); |
05986ba9 SH |
312 | if (!usbmisc->ops->init) |
313 | return 0; | |
314 | return usbmisc->ops->init(data); | |
315 | } | |
316 | EXPORT_SYMBOL_GPL(imx_usbmisc_init); | |
317 | ||
318 | int imx_usbmisc_init_post(struct imx_usbmisc_data *data) | |
319 | { | |
a4cf1b14 PC |
320 | struct imx_usbmisc *usbmisc; |
321 | ||
322 | if (!data) | |
323 | return 0; | |
f40017e0 | 324 | |
a4cf1b14 | 325 | usbmisc = dev_get_drvdata(data->dev); |
05986ba9 SH |
326 | if (!usbmisc->ops->post) |
327 | return 0; | |
328 | return usbmisc->ops->post(data); | |
329 | } | |
330 | EXPORT_SYMBOL_GPL(imx_usbmisc_init_post); | |
331 | ||
f636cec5 PC |
332 | int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled) |
333 | { | |
334 | struct imx_usbmisc *usbmisc; | |
335 | ||
336 | if (!data) | |
337 | return 0; | |
338 | ||
339 | usbmisc = dev_get_drvdata(data->dev); | |
340 | if (!usbmisc->ops->set_wakeup) | |
341 | return 0; | |
342 | return usbmisc->ops->set_wakeup(data, enabled); | |
343 | } | |
344 | EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup); | |
345 | ||
a7bc2fdf | 346 | static const struct of_device_id usbmisc_imx_dt_ids[] = { |
a0685330 MG |
347 | { |
348 | .compatible = "fsl,imx25-usbmisc", | |
349 | .data = &imx25_usbmisc_ops, | |
350 | }, | |
72ee92d1 DC |
351 | { |
352 | .compatible = "fsl,imx35-usbmisc", | |
353 | .data = &imx25_usbmisc_ops, | |
354 | }, | |
9f90e111 AS |
355 | { |
356 | .compatible = "fsl,imx27-usbmisc", | |
357 | .data = &imx27_usbmisc_ops, | |
358 | }, | |
c4962e03 AS |
359 | { |
360 | .compatible = "fsl,imx51-usbmisc", | |
361 | .data = &imx53_usbmisc_ops, | |
362 | }, | |
f0c910b6 MG |
363 | { |
364 | .compatible = "fsl,imx53-usbmisc", | |
365 | .data = &imx53_usbmisc_ops, | |
366 | }, | |
e609108a MKB |
367 | { |
368 | .compatible = "fsl,imx6q-usbmisc", | |
369 | .data = &imx6q_usbmisc_ops, | |
370 | }, | |
f40017e0 SA |
371 | { |
372 | .compatible = "fsl,vf610-usbmisc", | |
373 | .data = &vf610_usbmisc_ops, | |
374 | }, | |
d142d6be RZ |
375 | { /* sentinel */ } |
376 | }; | |
269b83dc | 377 | MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids); |
d142d6be | 378 | |
a7bc2fdf | 379 | static int usbmisc_imx_probe(struct platform_device *pdev) |
d142d6be RZ |
380 | { |
381 | struct resource *res; | |
a7bc2fdf | 382 | struct imx_usbmisc *data; |
e609108a | 383 | struct of_device_id *tmp_dev; |
d142d6be | 384 | |
d142d6be RZ |
385 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
386 | if (!data) | |
387 | return -ENOMEM; | |
388 | ||
389 | spin_lock_init(&data->lock); | |
390 | ||
391 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
148e1134 TR |
392 | data->base = devm_ioremap_resource(&pdev->dev, res); |
393 | if (IS_ERR(data->base)) | |
394 | return PTR_ERR(data->base); | |
d142d6be | 395 | |
e609108a MKB |
396 | tmp_dev = (struct of_device_id *) |
397 | of_match_device(usbmisc_imx_dt_ids, &pdev->dev); | |
398 | data->ops = (const struct usbmisc_ops *)tmp_dev->data; | |
f40017e0 | 399 | platform_set_drvdata(pdev, data); |
d142d6be | 400 | |
d142d6be RZ |
401 | return 0; |
402 | } | |
403 | ||
a7bc2fdf | 404 | static int usbmisc_imx_remove(struct platform_device *pdev) |
d142d6be | 405 | { |
d142d6be RZ |
406 | return 0; |
407 | } | |
408 | ||
a7bc2fdf MG |
409 | static struct platform_driver usbmisc_imx_driver = { |
410 | .probe = usbmisc_imx_probe, | |
411 | .remove = usbmisc_imx_remove, | |
d142d6be | 412 | .driver = { |
a7bc2fdf | 413 | .name = "usbmisc_imx", |
a7bc2fdf | 414 | .of_match_table = usbmisc_imx_dt_ids, |
d142d6be RZ |
415 | }, |
416 | }; | |
417 | ||
0404ae03 | 418 | module_platform_driver(usbmisc_imx_driver); |
d142d6be | 419 | |
a7bc2fdf | 420 | MODULE_ALIAS("platform:usbmisc-imx"); |
d142d6be | 421 | MODULE_LICENSE("GPL v2"); |
a7bc2fdf | 422 | MODULE_DESCRIPTION("driver for imx usb non-core registers"); |
d142d6be | 423 | MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>"); |