Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * (C) Copyright David Brownell 2000-2002 | |
34bbe4c1 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
1da177e4 LT |
19 | #include <linux/kernel.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/pci.h> | |
21b1861f DB |
22 | #include <linux/usb.h> |
23 | ||
1da177e4 LT |
24 | #include <asm/io.h> |
25 | #include <asm/irq.h> | |
21b1861f DB |
26 | |
27 | #ifdef CONFIG_PPC_PMAC | |
28 | #include <asm/machdep.h> | |
29 | #include <asm/pmac_feature.h> | |
30 | #include <asm/pci-bridge.h> | |
31 | #include <asm/prom.h> | |
32 | #endif | |
5f827ea3 DB |
33 | |
34 | #include "usb.h" | |
1da177e4 LT |
35 | #include "hcd.h" |
36 | ||
37 | ||
c6053ecf | 38 | /* PCI-based HCs are common, but plenty of non-PCI HCs are used too */ |
1da177e4 LT |
39 | |
40 | ||
41 | /*-------------------------------------------------------------------------*/ | |
42 | ||
43 | /* configure so an HC device and id are always provided */ | |
44 | /* always called with process context; sleeping is OK */ | |
45 | ||
46 | /** | |
47 | * usb_hcd_pci_probe - initialize PCI-based HCDs | |
48 | * @dev: USB Host Controller being probed | |
49 | * @id: pci hotplug id connecting controller to HCD framework | |
50 | * Context: !in_interrupt() | |
51 | * | |
52 | * Allocates basic PCI resources for this USB host controller, and | |
53 | * then invokes the start() method for the HCD associated with it | |
54 | * through the hotplug entry's driver_data. | |
55 | * | |
56 | * Store this function in the HCD's struct pci_driver as probe(). | |
57 | */ | |
34bbe4c1 | 58 | int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
59 | { |
60 | struct hc_driver *driver; | |
61 | struct usb_hcd *hcd; | |
62 | int retval; | |
63 | ||
64 | if (usb_disabled()) | |
65 | return -ENODEV; | |
66 | ||
34bbe4c1 GKH |
67 | if (!id) |
68 | return -EINVAL; | |
69 | driver = (struct hc_driver *)id->driver_data; | |
70 | if (!driver) | |
1da177e4 LT |
71 | return -EINVAL; |
72 | ||
34bbe4c1 | 73 | if (pci_enable_device(dev) < 0) |
1da177e4 | 74 | return -ENODEV; |
c6053ecf | 75 | dev->current_state = PCI_D0; |
34bbe4c1 GKH |
76 | |
77 | if (!dev->irq) { | |
78 | dev_err(&dev->dev, | |
1da177e4 LT |
79 | "Found HC with no IRQ. Check BIOS/PCI %s setup!\n", |
80 | pci_name(dev)); | |
34bbe4c1 | 81 | retval = -ENODEV; |
1da177e4 | 82 | goto err1; |
34bbe4c1 | 83 | } |
1da177e4 | 84 | |
34bbe4c1 | 85 | hcd = usb_create_hcd(driver, &dev->dev, pci_name(dev)); |
1da177e4 LT |
86 | if (!hcd) { |
87 | retval = -ENOMEM; | |
88 | goto err1; | |
89 | } | |
90 | ||
34bbe4c1 GKH |
91 | if (driver->flags & HCD_MEMORY) { |
92 | /* EHCI, OHCI */ | |
93 | hcd->rsrc_start = pci_resource_start(dev, 0); | |
94 | hcd->rsrc_len = pci_resource_len(dev, 0); | |
95 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | |
1da177e4 | 96 | driver->description)) { |
34bbe4c1 | 97 | dev_dbg(&dev->dev, "controller already in use\n"); |
1da177e4 LT |
98 | retval = -EBUSY; |
99 | goto err2; | |
100 | } | |
34bbe4c1 | 101 | hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len); |
1da177e4 | 102 | if (hcd->regs == NULL) { |
34bbe4c1 | 103 | dev_dbg(&dev->dev, "error mapping memory\n"); |
1da177e4 LT |
104 | retval = -EFAULT; |
105 | goto err3; | |
106 | } | |
107 | ||
34bbe4c1 GKH |
108 | } else { |
109 | /* UHCI */ | |
1da177e4 LT |
110 | int region; |
111 | ||
112 | for (region = 0; region < PCI_ROM_RESOURCE; region++) { | |
34bbe4c1 | 113 | if (!(pci_resource_flags(dev, region) & |
1da177e4 LT |
114 | IORESOURCE_IO)) |
115 | continue; | |
116 | ||
34bbe4c1 GKH |
117 | hcd->rsrc_start = pci_resource_start(dev, region); |
118 | hcd->rsrc_len = pci_resource_len(dev, region); | |
119 | if (request_region(hcd->rsrc_start, hcd->rsrc_len, | |
1da177e4 LT |
120 | driver->description)) |
121 | break; | |
122 | } | |
123 | if (region == PCI_ROM_RESOURCE) { | |
34bbe4c1 | 124 | dev_dbg(&dev->dev, "no i/o regions available\n"); |
1da177e4 LT |
125 | retval = -EBUSY; |
126 | goto err1; | |
127 | } | |
128 | } | |
129 | ||
34bbe4c1 | 130 | pci_set_master(dev); |
1da177e4 | 131 | |
442258e2 | 132 | retval = usb_add_hcd(hcd, dev->irq, IRQF_DISABLED | IRQF_SHARED); |
1da177e4 LT |
133 | if (retval != 0) |
134 | goto err4; | |
135 | return retval; | |
136 | ||
137 | err4: | |
138 | if (driver->flags & HCD_MEMORY) { | |
34bbe4c1 | 139 | iounmap(hcd->regs); |
1da177e4 | 140 | err3: |
34bbe4c1 | 141 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
1da177e4 | 142 | } else |
34bbe4c1 | 143 | release_region(hcd->rsrc_start, hcd->rsrc_len); |
1da177e4 | 144 | err2: |
34bbe4c1 | 145 | usb_put_hcd(hcd); |
1da177e4 | 146 | err1: |
34bbe4c1 GKH |
147 | pci_disable_device(dev); |
148 | dev_err(&dev->dev, "init %s fail, %d\n", pci_name(dev), retval); | |
1da177e4 | 149 | return retval; |
34bbe4c1 | 150 | } |
782e70c6 | 151 | EXPORT_SYMBOL_GPL(usb_hcd_pci_probe); |
1da177e4 LT |
152 | |
153 | ||
154 | /* may be called without controller electrically present */ | |
155 | /* may be called with controller, bus, and devices active */ | |
156 | ||
157 | /** | |
158 | * usb_hcd_pci_remove - shutdown processing for PCI-based HCDs | |
159 | * @dev: USB Host Controller being removed | |
160 | * Context: !in_interrupt() | |
161 | * | |
162 | * Reverses the effect of usb_hcd_pci_probe(), first invoking | |
163 | * the HCD's stop() method. It is always called from a thread | |
164 | * context, normally "rmmod", "apmd", or something similar. | |
165 | * | |
166 | * Store this function in the HCD's struct pci_driver as remove(). | |
167 | */ | |
34bbe4c1 | 168 | void usb_hcd_pci_remove(struct pci_dev *dev) |
1da177e4 LT |
169 | { |
170 | struct usb_hcd *hcd; | |
171 | ||
172 | hcd = pci_get_drvdata(dev); | |
173 | if (!hcd) | |
174 | return; | |
175 | ||
34bbe4c1 | 176 | usb_remove_hcd(hcd); |
1da177e4 | 177 | if (hcd->driver->flags & HCD_MEMORY) { |
34bbe4c1 GKH |
178 | iounmap(hcd->regs); |
179 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
1da177e4 | 180 | } else { |
34bbe4c1 | 181 | release_region(hcd->rsrc_start, hcd->rsrc_len); |
1da177e4 | 182 | } |
34bbe4c1 | 183 | usb_put_hcd(hcd); |
1da177e4 LT |
184 | pci_disable_device(dev); |
185 | } | |
782e70c6 | 186 | EXPORT_SYMBOL_GPL(usb_hcd_pci_remove); |
1da177e4 LT |
187 | |
188 | ||
189 | #ifdef CONFIG_PM | |
190 | ||
1da177e4 LT |
191 | /** |
192 | * usb_hcd_pci_suspend - power management suspend of a PCI-based HCD | |
193 | * @dev: USB Host Controller being suspended | |
c6053ecf | 194 | * @message: semantics in flux |
1da177e4 LT |
195 | * |
196 | * Store this function in the HCD's struct pci_driver as suspend(). | |
197 | */ | |
34bbe4c1 | 198 | int usb_hcd_pci_suspend(struct pci_dev *dev, pm_message_t message) |
1da177e4 LT |
199 | { |
200 | struct usb_hcd *hcd; | |
201 | int retval = 0; | |
202 | int has_pci_pm; | |
203 | ||
204 | hcd = pci_get_drvdata(dev); | |
205 | ||
5f827ea3 DB |
206 | /* Root hub suspend should have stopped all downstream traffic, |
207 | * and all bus master traffic. And done so for both the interface | |
208 | * and the stub usb_device (which we check here). But maybe it | |
209 | * didn't; writing sysfs power/state files ignores such rules... | |
210 | * | |
211 | * We must ignore the FREEZE vs SUSPEND distinction here, because | |
212 | * otherwise the swsusp will save (and restore) garbage state. | |
213 | */ | |
f3fd77cd AS |
214 | if (!(hcd->state == HC_STATE_SUSPENDED || |
215 | hcd->state == HC_STATE_HALT)) | |
5f827ea3 DB |
216 | return -EBUSY; |
217 | ||
218 | if (hcd->driver->suspend) { | |
219 | retval = hcd->driver->suspend(hcd, message); | |
02669492 AM |
220 | suspend_report_result(hcd->driver->suspend, retval); |
221 | if (retval) | |
5f827ea3 | 222 | goto done; |
5f827ea3 | 223 | } |
8de98402 | 224 | synchronize_irq(dev->irq); |
5f827ea3 | 225 | |
c6053ecf DB |
226 | /* FIXME until the generic PM interfaces change a lot more, this |
227 | * can't use PCI D1 and D2 states. For example, the confusion | |
228 | * between messages and states will need to vanish, and messages | |
229 | * will need to provide a target system state again. | |
230 | * | |
231 | * It'll be important to learn characteristics of the target state, | |
232 | * especially on embedded hardware where the HCD will often be in | |
233 | * charge of an external VBUS power supply and one or more clocks. | |
234 | * Some target system states will leave them active; others won't. | |
235 | * (With PCI, that's often handled by platform BIOS code.) | |
236 | */ | |
237 | ||
1da177e4 LT |
238 | /* even when the PCI layer rejects some of the PCI calls |
239 | * below, HCs can try global suspend and reduce DMA traffic. | |
240 | * PM-sensitive HCDs may already have done this. | |
241 | */ | |
242 | has_pci_pm = pci_find_capability(dev, PCI_CAP_ID_PM); | |
1da177e4 | 243 | |
5f827ea3 DB |
244 | /* Downstream ports from this root hub should already be quiesced, so |
245 | * there will be no DMA activity. Now we can shut down the upstream | |
246 | * link (except maybe for PME# resume signaling) and enter some PCI | |
247 | * low power state, if the hardware allows. | |
1da177e4 | 248 | */ |
5f827ea3 | 249 | if (hcd->state == HC_STATE_SUSPENDED) { |
1da177e4 | 250 | |
c6053ecf DB |
251 | /* no DMA or IRQs except when HC is active */ |
252 | if (dev->current_state == PCI_D0) { | |
34bbe4c1 GKH |
253 | pci_save_state(dev); |
254 | pci_disable_device(dev); | |
1da177e4 LT |
255 | } |
256 | ||
269954e5 AS |
257 | if (message.event == PM_EVENT_FREEZE || |
258 | message.event == PM_EVENT_PRETHAW) { | |
259 | dev_dbg(hcd->self.controller, "--> no state change\n"); | |
260 | goto done; | |
261 | } | |
262 | ||
1da177e4 | 263 | if (!has_pci_pm) { |
34bbe4c1 | 264 | dev_dbg(hcd->self.controller, "--> PCI D0/legacy\n"); |
5f827ea3 | 265 | goto done; |
1da177e4 LT |
266 | } |
267 | ||
c6053ecf DB |
268 | /* NOTE: dev->current_state becomes nonzero only here, and |
269 | * only for devices that support PCI PM. Also, exiting | |
270 | * PCI_D3 (but not PCI_D1 or PCI_D2) is allowed to reset | |
271 | * some device state (e.g. as part of clock reinit). | |
1da177e4 | 272 | */ |
34bbe4c1 | 273 | retval = pci_set_power_state(dev, PCI_D3hot); |
02669492 | 274 | suspend_report_result(pci_set_power_state, retval); |
1da177e4 | 275 | if (retval == 0) { |
fb669cc0 DB |
276 | int wake = device_can_wakeup(&hcd->self.root_hub->dev); |
277 | ||
278 | wake = wake && device_may_wakeup(hcd->self.controller); | |
279 | ||
34bbe4c1 | 280 | dev_dbg(hcd->self.controller, "--> PCI D3%s\n", |
fb669cc0 | 281 | wake ? "/wakeup" : ""); |
5f827ea3 DB |
282 | |
283 | /* Ignore these return values. We rely on pci code to | |
284 | * reject requests the hardware can't implement, rather | |
285 | * than coding the same thing. | |
286 | */ | |
34bbe4c1 GKH |
287 | (void) pci_enable_wake(dev, PCI_D3hot, wake); |
288 | (void) pci_enable_wake(dev, PCI_D3cold, wake); | |
5f827ea3 | 289 | } else { |
34bbe4c1 | 290 | dev_dbg(&dev->dev, "PCI D3 suspend fail, %d\n", |
c6053ecf | 291 | retval); |
34bbe4c1 | 292 | (void) usb_hcd_pci_resume(dev); |
1da177e4 | 293 | } |
5f827ea3 | 294 | |
18584999 | 295 | } else if (hcd->state != HC_STATE_HALT) { |
34bbe4c1 | 296 | dev_dbg(hcd->self.controller, "hcd state %d; not suspended\n", |
1da177e4 | 297 | hcd->state); |
c6053ecf | 298 | WARN_ON(1); |
1da177e4 | 299 | retval = -EINVAL; |
1da177e4 LT |
300 | } |
301 | ||
5f827ea3 | 302 | done: |
21b1861f | 303 | if (retval == 0) { |
21b1861f DB |
304 | #ifdef CONFIG_PPC_PMAC |
305 | /* Disable ASIC clocks for USB */ | |
e8222502 | 306 | if (machine_is(powermac)) { |
21b1861f DB |
307 | struct device_node *of_node; |
308 | ||
34bbe4c1 | 309 | of_node = pci_device_to_OF_node(dev); |
21b1861f DB |
310 | if (of_node) |
311 | pmac_call_feature(PMAC_FTR_USB_ENABLE, | |
312 | of_node, 0, 0); | |
313 | } | |
314 | #endif | |
315 | } | |
316 | ||
1da177e4 LT |
317 | return retval; |
318 | } | |
782e70c6 | 319 | EXPORT_SYMBOL_GPL(usb_hcd_pci_suspend); |
1da177e4 LT |
320 | |
321 | /** | |
322 | * usb_hcd_pci_resume - power management resume of a PCI-based HCD | |
323 | * @dev: USB Host Controller being resumed | |
324 | * | |
325 | * Store this function in the HCD's struct pci_driver as resume(). | |
326 | */ | |
34bbe4c1 | 327 | int usb_hcd_pci_resume(struct pci_dev *dev) |
1da177e4 LT |
328 | { |
329 | struct usb_hcd *hcd; | |
330 | int retval; | |
1da177e4 LT |
331 | |
332 | hcd = pci_get_drvdata(dev); | |
333 | if (hcd->state != HC_STATE_SUSPENDED) { | |
34bbe4c1 | 334 | dev_dbg(hcd->self.controller, |
1da177e4 LT |
335 | "can't resume, not suspended!\n"); |
336 | return 0; | |
337 | } | |
1da177e4 | 338 | |
21b1861f DB |
339 | #ifdef CONFIG_PPC_PMAC |
340 | /* Reenable ASIC clocks for USB */ | |
e8222502 | 341 | if (machine_is(powermac)) { |
21b1861f DB |
342 | struct device_node *of_node; |
343 | ||
34bbe4c1 | 344 | of_node = pci_device_to_OF_node(dev); |
21b1861f | 345 | if (of_node) |
34bbe4c1 | 346 | pmac_call_feature(PMAC_FTR_USB_ENABLE, |
21b1861f DB |
347 | of_node, 0, 1); |
348 | } | |
349 | #endif | |
350 | ||
c6053ecf DB |
351 | /* NOTE: chip docs cover clean "real suspend" cases (what Linux |
352 | * calls "standby", "suspend to RAM", and so on). There are also | |
353 | * dirty cases when swsusp fakes a suspend in "shutdown" mode. | |
354 | */ | |
355 | if (dev->current_state != PCI_D0) { | |
356 | #ifdef DEBUG | |
357 | int pci_pm; | |
358 | u16 pmcr; | |
359 | ||
360 | pci_pm = pci_find_capability(dev, PCI_CAP_ID_PM); | |
361 | pci_read_config_word(dev, pci_pm + PCI_PM_CTRL, &pmcr); | |
362 | pmcr &= PCI_PM_CTRL_STATE_MASK; | |
363 | if (pmcr) { | |
364 | /* Clean case: power to USB and to HC registers was | |
365 | * maintained; remote wakeup is easy. | |
366 | */ | |
367 | dev_dbg(hcd->self.controller, "resume from PCI D%d\n", | |
368 | pmcr); | |
369 | } else { | |
370 | /* Clean: HC lost Vcc power, D0 uninitialized | |
371 | * + Vaux may have preserved port and transceiver | |
372 | * state ... for remote wakeup from D3cold | |
373 | * + or not; HCD must reinit + re-enumerate | |
374 | * | |
375 | * Dirty: D0 semi-initialized cases with swsusp | |
376 | * + after BIOS init | |
377 | * + after Linux init (HCD statically linked) | |
378 | */ | |
379 | dev_dbg(hcd->self.controller, | |
380 | "PCI D0, from previous PCI D%d\n", | |
381 | dev->current_state); | |
382 | } | |
383 | #endif | |
5f827ea3 | 384 | /* yes, ignore these results too... */ |
34bbe4c1 GKH |
385 | (void) pci_enable_wake(dev, dev->current_state, 0); |
386 | (void) pci_enable_wake(dev, PCI_D3cold, 0); | |
c6053ecf DB |
387 | } else { |
388 | /* Same basic cases: clean (powered/not), dirty */ | |
389 | dev_dbg(hcd->self.controller, "PCI legacy resume\n"); | |
390 | } | |
391 | ||
392 | /* NOTE: the PCI API itself is asymmetric here. We don't need to | |
393 | * pci_set_power_state(PCI_D0) since that's part of re-enabling; | |
394 | * but that won't re-enable bus mastering. Yet pci_disable_device() | |
395 | * explicitly disables bus mastering... | |
396 | */ | |
34bbe4c1 | 397 | retval = pci_enable_device(dev); |
c6053ecf | 398 | if (retval < 0) { |
34bbe4c1 | 399 | dev_err(hcd->self.controller, |
c6053ecf DB |
400 | "can't re-enable after resume, %d!\n", retval); |
401 | return retval; | |
402 | } | |
34bbe4c1 GKH |
403 | pci_set_master(dev); |
404 | pci_restore_state(dev); | |
c6053ecf | 405 | |
8de98402 | 406 | clear_bit(HCD_FLAG_SAW_IRQ, &hcd->flags); |
1da177e4 | 407 | |
5f827ea3 DB |
408 | if (hcd->driver->resume) { |
409 | retval = hcd->driver->resume(hcd); | |
410 | if (retval) { | |
34bbe4c1 | 411 | dev_err(hcd->self.controller, |
5f827ea3 | 412 | "PCI post-resume error %d!\n", retval); |
34bbe4c1 | 413 | usb_hc_died(hcd); |
5f827ea3 | 414 | } |
1da177e4 LT |
415 | } |
416 | ||
417 | return retval; | |
418 | } | |
782e70c6 | 419 | EXPORT_SYMBOL_GPL(usb_hcd_pci_resume); |
1da177e4 LT |
420 | |
421 | #endif /* CONFIG_PM */ | |
422 | ||
64a21d02 AG |
423 | /** |
424 | * usb_hcd_pci_shutdown - shutdown host controller | |
425 | * @dev: USB Host Controller being shutdown | |
426 | */ | |
34bbe4c1 | 427 | void usb_hcd_pci_shutdown(struct pci_dev *dev) |
64a21d02 AG |
428 | { |
429 | struct usb_hcd *hcd; | |
430 | ||
431 | hcd = pci_get_drvdata(dev); | |
432 | if (!hcd) | |
433 | return; | |
434 | ||
435 | if (hcd->driver->shutdown) | |
436 | hcd->driver->shutdown(hcd); | |
437 | } | |
782e70c6 | 438 | EXPORT_SYMBOL_GPL(usb_hcd_pci_shutdown); |
1da177e4 | 439 |