drm/radeon/atpx: hybrid platforms use d3cold
[deliverable/linux.git] / drivers / usb / dwc3 / Kconfig
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1config USB_DWC3
2 tristate "DesignWare USB3 DRD Core Support"
0244ad00 3 depends on (USB || USB_GADGET) && HAS_DMA
b8cacf33 4 select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
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5 help
6 Say Y or M here if your system has a Dual Role SuperSpeed
7 USB controller based on the DesignWare USB3 IP Core.
8
9 If you choose to build this driver is a dynamically linked
10 module, the module will be called dwc3.ko.
11
12if USB_DWC3
13
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14config USB_DWC3_ULPI
15 bool "Register ULPI PHY Interface"
50641056 16 depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
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17 help
18 Select this if you have ULPI type PHY attached to your DWC3
19 controller.
20
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21choice
22 bool "DWC3 Mode Selection"
23 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
24 default USB_DWC3_HOST if (USB && !USB_GADGET)
25 default USB_DWC3_GADGET if (!USB && USB_GADGET)
26
27config USB_DWC3_HOST
28 bool "Host only mode"
1bc0d926 29 depends on USB=y || USB=USB_DWC3
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30 help
31 Select this when you want to use DWC3 in host mode only,
32 thereby the gadget feature will be regressed.
33
34config USB_DWC3_GADGET
35 bool "Gadget only mode"
1bc0d926 36 depends on USB_GADGET=y || USB_GADGET=USB_DWC3
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37 help
38 Select this when you want to use DWC3 in gadget mode only,
39 thereby the host feature will be regressed.
40
41config USB_DWC3_DUAL_ROLE
42 bool "Dual Role mode"
1bc0d926 43 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
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44 help
45 This is the default mode of working of DWC3 controller where
46 both host and gadget features are enabled.
47
48endchoice
49
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50comment "Platform Glue Driver Support"
51
52config USB_DWC3_OMAP
53 tristate "Texas Instruments OMAP5 and similar Platforms"
aea8928a 54 depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
c5a1fbca 55 depends on OF
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56 default USB_DWC3
57 help
58 Some platforms from Texas Instruments like OMAP5, DRA7xxx and
59 AM437x use this IP for USB2/3 functionality.
60
61 Say 'Y' or 'M' here if you have one such device
62
63config USB_DWC3_EXYNOS
64 tristate "Samsung Exynos Platform"
b4c9f578 65 depends on ARCH_EXYNOS && OF || COMPILE_TEST
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66 default USB_DWC3
67 help
68 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
69 say 'Y' or 'M' if you have one such device.
70
71config USB_DWC3_PCI
72 tristate "PCIe-based Platforms"
73 depends on PCI
74 default USB_DWC3
75 help
76 If you're using the DesignWare Core IP with a PCIe, please say
77 'Y' or 'M' here.
78
79 One such PCIe-based platform is Synopsys' PCIe HAPS model of
80 this IP.
81
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82config USB_DWC3_KEYSTONE
83 tristate "Texas Instruments Keystone2 Platforms"
aea8928a 84 depends on ARCH_KEYSTONE || COMPILE_TEST
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85 default USB_DWC3
86 help
87 Support of USB2/3 functionality in TI Keystone2 platforms.
88 Say 'Y' or 'M' here if you have one such device
89
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90config USB_DWC3_OF_SIMPLE
91 tristate "Generic OF Simple Glue Layer"
92 depends on OF && COMMON_CLK
93 default USB_DWC3
94 help
95 Support USB2/3 functionality in simple SoC integrations.
96 Currently supports Xilinx and Qualcomm DWC USB3 IP.
97 Say 'Y' or 'M' if you have one such device.
98
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99config USB_DWC3_ST
100 tristate "STMicroelectronics Platforms"
101 depends on ARCH_STI && OF
102 default USB_DWC3
103 help
104 STMicroelectronics SoCs with one DesignWare Core USB3 IP
105 inside (i.e. STiH407).
106 Say 'Y' or 'M' if you have one such device.
107
72246da4 108endif
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