[deliverable/linux.git] / drivers / usb / dwc3 / dwc3-exynos.c

/**
 * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2  of
 * the License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/platform_data/dwc3-exynos.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/usb/otg.h>
#include <linux/usb/usb_phy_gen_xceiv.h>
#include <linux/of.h>
#include <linux/of_platform.h>

struct dwc3_exynos {
	struct platform_device	*usb2_phy;
	struct platform_device	*usb3_phy;
	struct device		*dev;

	struct clk		*clk;
};

static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
{
	struct usb_phy_gen_xceiv_platform_data pdata;
	struct platform_device	*pdev;
	int			ret;

	memset(&pdata, 0x00, sizeof(pdata));

	pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO);
	if (!pdev)
		return -ENOMEM;

	exynos->usb2_phy = pdev;
	pdata.type = USB_PHY_TYPE_USB2;

	ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
	if (ret)
		goto err1;

	pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO);
	if (!pdev) {
		ret = -ENOMEM;
		goto err1;
	}

	exynos->usb3_phy = pdev;
	pdata.type = USB_PHY_TYPE_USB3;

	ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
	if (ret)
		goto err2;

	ret = platform_device_add(exynos->usb2_phy);
	if (ret)
		goto err2;

	ret = platform_device_add(exynos->usb3_phy);
	if (ret)
		goto err3;

	return 0;

err3:
	platform_device_del(exynos->usb2_phy);

err2:
	platform_device_put(exynos->usb3_phy);

err1:
	platform_device_put(exynos->usb2_phy);

	return ret;
}

static int dwc3_exynos_remove_child(struct device *dev, void *unused)
{
	struct platform_device *pdev = to_platform_device(dev);

	platform_device_unregister(pdev);

	return 0;
}

static int dwc3_exynos_probe(struct platform_device *pdev)
{
	struct dwc3_exynos	*exynos;
	struct clk		*clk;
	struct device		*dev = &pdev->dev;
	struct device_node	*node = dev->of_node;

	int			ret = -ENOMEM;

	exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
	if (!exynos) {
		dev_err(dev, "not enough memory\n");
		goto err1;
	}

	/*
	 * Right now device-tree probed devices don't get dma_mask set.
	 * Since shared usb code relies on it, set it here for now.
	 * Once we move to full device tree support this will vanish off.
	 */
	if (!dev->dma_mask)
		dev->dma_mask = &dev->coherent_dma_mask;
	if (!dev->coherent_dma_mask)
		dev->coherent_dma_mask = DMA_BIT_MASK(32);

	platform_set_drvdata(pdev, exynos);

	ret = dwc3_exynos_register_phys(exynos);
	if (ret) {
		dev_err(dev, "couldn't register PHYs\n");
		goto err1;
	}

	clk = devm_clk_get(dev, "usbdrd30");
	if (IS_ERR(clk)) {
		dev_err(dev, "couldn't get clock\n");
		ret = -EINVAL;
		goto err1;
	}

	exynos->dev	= dev;
	exynos->clk	= clk;

	clk_prepare_enable(exynos->clk);

	if (node) {
		ret = of_platform_populate(node, NULL, NULL, dev);
		if (ret) {
			dev_err(dev, "failed to add dwc3 core\n");
			goto err2;
		}
	} else {
		dev_err(dev, "no device node, failed to add dwc3 core\n");
		ret = -ENODEV;
		goto err2;
	}

	return 0;

err2:
	clk_disable_unprepare(clk);
err1:
	return ret;
}

static int dwc3_exynos_remove(struct platform_device *pdev)
{
	struct dwc3_exynos	*exynos = platform_get_drvdata(pdev);

	device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
	platform_device_unregister(exynos->usb2_phy);
	platform_device_unregister(exynos->usb3_phy);

	clk_disable_unprepare(exynos->clk);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id exynos_dwc3_match[] = {
	{ .compatible = "samsung,exynos5250-dwusb3" },
	{},
};
MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
#endif

#ifdef CONFIG_PM_SLEEP
static int dwc3_exynos_suspend(struct device *dev)
{
	struct dwc3_exynos *exynos = dev_get_drvdata(dev);

	clk_disable(exynos->clk);

	return 0;
}

static int dwc3_exynos_resume(struct device *dev)
{
	struct dwc3_exynos *exynos = dev_get_drvdata(dev);

	clk_enable(exynos->clk);

	/* runtime set active to reflect active state. */
	pm_runtime_disable(dev);
	pm_runtime_set_active(dev);
	pm_runtime_enable(dev);

	return 0;
}

static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
};

#define DEV_PM_OPS	(&dwc3_exynos_dev_pm_ops)
#else
#define DEV_PM_OPS	NULL
#endif /* CONFIG_PM_SLEEP */

static struct platform_driver dwc3_exynos_driver = {
	.probe		= dwc3_exynos_probe,
	.remove		= dwc3_exynos_remove,
	.driver		= {
		.name	= "exynos-dwc3",
		.of_match_table = of_match_ptr(exynos_dwc3_match),
		.pm	= DEV_PM_OPS,
	},
};

module_platform_driver(dwc3_exynos_driver);

MODULE_ALIAS("platform:exynos-dwc3");
MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
Commit	Line	Data
d28a9689 AT	1	/**
	2	* dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	*
	7	* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
	8	*
5945f789 FB	9	* This program is free software: you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 of
	11	* the License as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
d28a9689 AT	17	*/
	18
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/slab.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/platform_data/dwc3-exynos.h>
	24	#include <linux/dma-mapping.h>
d28a9689	25	#include <linux/clk.h>
d720f057	26	#include <linux/usb/otg.h>
3fa4d734	27	#include <linux/usb/usb_phy_gen_xceiv.h>
accefdd4	28	#include <linux/of.h>
adcf20dc	29	#include <linux/of_platform.h>
d28a9689	30
d28a9689	31	struct dwc3_exynos {
d720f057 FB	32	struct platform_device *usb2_phy;
d720f057 FB	33	struct platform_device *usb3_phy;
d28a9689 AT	34	struct device *dev;
	35
	36	struct clk *clk;
	37	};
	38
41ac7b3a	39	static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
d720f057	40	{
3fa4d734	41	struct usb_phy_gen_xceiv_platform_data pdata;
d720f057 FB	42	struct platform_device *pdev;
	43	int ret;
	44
	45	memset(&pdata, 0x00, sizeof(pdata));
	46
3fa4d734	47	pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO);
d720f057 FB	48	if (!pdev)
	49	return -ENOMEM;
	50
	51	exynos->usb2_phy = pdev;
	52	pdata.type = USB_PHY_TYPE_USB2;
	53
	54	ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
	55	if (ret)
	56	goto err1;
	57
3fa4d734	58	pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO);
d720f057 FB	59	if (!pdev) {
	60	ret = -ENOMEM;
	61	goto err1;
	62	}
	63
	64	exynos->usb3_phy = pdev;
	65	pdata.type = USB_PHY_TYPE_USB3;
	66
	67	ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
	68	if (ret)
	69	goto err2;
	70
	71	ret = platform_device_add(exynos->usb2_phy);
	72	if (ret)
	73	goto err2;
	74
	75	ret = platform_device_add(exynos->usb3_phy);
	76	if (ret)
	77	goto err3;
	78
	79	return 0;
	80
	81	err3:
	82	platform_device_del(exynos->usb2_phy);
	83
	84	err2:
	85	platform_device_put(exynos->usb3_phy);
	86
	87	err1:
	88	platform_device_put(exynos->usb2_phy);
	89
	90	return ret;
	91	}
	92
adcf20dc VG	93	static int dwc3_exynos_remove_child(struct device dev, void unused)
	94	{
	95	struct platform_device *pdev = to_platform_device(dev);
	96
	97	platform_device_unregister(pdev);
	98
	99	return 0;
	100	}
	101
41ac7b3a	102	static int dwc3_exynos_probe(struct platform_device *pdev)
d28a9689	103	{
d28a9689 AT	104	struct dwc3_exynos *exynos;
d28a9689 AT	105	struct clk *clk;
20b97dc1	106	struct device *dev = &pdev->dev;
adcf20dc	107	struct device_node *node = dev->of_node;
d28a9689	108
d28a9689 AT	109	int ret = -ENOMEM;
d28a9689 AT	110
20b97dc1	111	exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
d28a9689	112	if (!exynos) {
20b97dc1	113	dev_err(dev, "not enough memory\n");
adcf20dc	114	goto err1;
d28a9689 AT	115	}
d28a9689 AT	116
accefdd4 VG	117	/*
	118	* Right now device-tree probed devices don't get dma_mask set.
	119	* Since shared usb code relies on it, set it here for now.
	120	* Once we move to full device tree support this will vanish off.
	121	*/
adcf20dc	122	if (!dev->dma_mask)
3b9561e9 SW	123	dev->dma_mask = &dev->coherent_dma_mask;
	124	if (!dev->coherent_dma_mask)
	125	dev->coherent_dma_mask = DMA_BIT_MASK(32);
accefdd4	126
d28a9689 AT	127	platform_set_drvdata(pdev, exynos);
d28a9689 AT	128
d720f057 FB	129	ret = dwc3_exynos_register_phys(exynos);
d720f057 FB	130	if (ret) {
20b97dc1	131	dev_err(dev, "couldn't register PHYs\n");
adcf20dc	132	goto err1;
d28a9689 AT	133	}
d28a9689 AT	134
20b97dc1	135	clk = devm_clk_get(dev, "usbdrd30");
d28a9689	136	if (IS_ERR(clk)) {
20b97dc1	137	dev_err(dev, "couldn't get clock\n");
d28a9689	138	ret = -EINVAL;
20b97dc1	139	goto err1;
d28a9689 AT	140	}
d28a9689 AT	141
20b97dc1	142	exynos->dev = dev;
d28a9689 AT	143	exynos->clk = clk;
d28a9689 AT	144
ddb5147c	145	clk_prepare_enable(exynos->clk);
d28a9689	146
adcf20dc VG	147	if (node) {
	148	ret = of_platform_populate(node, NULL, NULL, dev);
	149	if (ret) {
	150	dev_err(dev, "failed to add dwc3 core\n");
	151	goto err2;
	152	}
	153	} else {
	154	dev_err(dev, "no device node, failed to add dwc3 core\n");
	155	ret = -ENODEV;
20b97dc1	156	goto err2;
d28a9689 AT	157	}
	158
	159	return 0;
	160
20b97dc1	161	err2:
ddb5147c	162	clk_disable_unprepare(clk);
d28a9689	163	err1:
d28a9689 AT	164	return ret;
	165	}
	166
fb4e98ab	167	static int dwc3_exynos_remove(struct platform_device *pdev)
d28a9689 AT	168	{
d28a9689 AT	169	struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
d28a9689	170
022d0547	171	device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
d720f057 FB	172	platform_device_unregister(exynos->usb2_phy);
d720f057 FB	173	platform_device_unregister(exynos->usb3_phy);
d28a9689	174
ddb5147c	175	clk_disable_unprepare(exynos->clk);
d28a9689 AT	176
	177	return 0;
	178	}
	179
accefdd4 VG	180	#ifdef CONFIG_OF
accefdd4 VG	181	static const struct of_device_id exynos_dwc3_match[] = {
fe29db8f	182	{ .compatible = "samsung,exynos5250-dwusb3" },
accefdd4 VG	183	{},
	184	};
	185	MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
	186	#endif
	187
19fda7cd	188	#ifdef CONFIG_PM_SLEEP
0646caf7 VS	189	static int dwc3_exynos_suspend(struct device *dev)
	190	{
	191	struct dwc3_exynos *exynos = dev_get_drvdata(dev);
	192
	193	clk_disable(exynos->clk);
	194
	195	return 0;
	196	}
	197
	198	static int dwc3_exynos_resume(struct device *dev)
	199	{
	200	struct dwc3_exynos *exynos = dev_get_drvdata(dev);
	201
	202	clk_enable(exynos->clk);
	203
	204	/* runtime set active to reflect active state. */
	205	pm_runtime_disable(dev);
	206	pm_runtime_set_active(dev);
	207	pm_runtime_enable(dev);
	208
	209	return 0;
	210	}
	211
	212	static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
	213	SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
	214	};
	215
	216	#define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops)
	217	#else
	218	#define DEV_PM_OPS NULL
19fda7cd	219	#endif /* CONFIG_PM_SLEEP */
0646caf7	220
d28a9689 AT	221	static struct platform_driver dwc3_exynos_driver = {
d28a9689 AT	222	.probe = dwc3_exynos_probe,
7690417d	223	.remove = dwc3_exynos_remove,
d28a9689 AT	224	.driver = {
d28a9689 AT	225	.name = "exynos-dwc3",
accefdd4	226	.of_match_table = of_match_ptr(exynos_dwc3_match),
0646caf7	227	.pm = DEV_PM_OPS,
d28a9689 AT	228	},
	229	};
	230
	231	module_platform_driver(dwc3_exynos_driver);
	232
	233	MODULE_ALIAS("platform:exynos-dwc3");
	234	MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
5945f789	235	MODULE_LICENSE("GPL v2");
d28a9689	236	MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");