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bae4bd84 DB |
1 | /* |
2 | * at91_udc -- driver for at91-series USB peripheral controller | |
3 | * | |
4 | * Copyright (C) 2004 by Thomas Rathbone | |
5 | * Copyright (C) 2005 by HP Labs | |
6 | * Copyright (C) 2005 by David Brownell | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
bae4bd84 DB |
12 | */ |
13 | ||
f3db6e82 | 14 | #undef VERBOSE_DEBUG |
bae4bd84 DB |
15 | #undef PACKET_TRACE |
16 | ||
bae4bd84 DB |
17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/ioport.h> | |
bae4bd84 | 22 | #include <linux/slab.h> |
bae4bd84 DB |
23 | #include <linux/errno.h> |
24 | #include <linux/init.h> | |
25 | #include <linux/list.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/proc_fs.h> | |
eed39366 | 28 | #include <linux/prefetch.h> |
bae4bd84 | 29 | #include <linux/clk.h> |
5f848137 | 30 | #include <linux/usb/ch9.h> |
9454a57a | 31 | #include <linux/usb/gadget.h> |
b38b03b3 | 32 | #include <linux/prefetch.h> |
d1494a34 JCPV |
33 | #include <linux/of.h> |
34 | #include <linux/of_gpio.h> | |
bae4bd84 DB |
35 | |
36 | #include <asm/byteorder.h> | |
a09e64fb | 37 | #include <mach/hardware.h> |
bae4bd84 DB |
38 | #include <asm/io.h> |
39 | #include <asm/irq.h> | |
40 | #include <asm/system.h> | |
f3db6e82 | 41 | #include <asm/gpio.h> |
bae4bd84 | 42 | |
a09e64fb RK |
43 | #include <mach/board.h> |
44 | #include <mach/cpu.h> | |
45 | #include <mach/at91sam9261_matrix.h> | |
4342d647 | 46 | #include <mach/at91_matrix.h> |
bae4bd84 DB |
47 | |
48 | #include "at91_udc.h" | |
49 | ||
50 | ||
51 | /* | |
52 | * This controller is simple and PIO-only. It's used in many AT91-series | |
8b2e7668 DB |
53 | * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), |
54 | * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. | |
bae4bd84 DB |
55 | * |
56 | * This driver expects the board has been wired with two GPIOs suppporting | |
57 | * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the | |
8b2e7668 DB |
58 | * testing hasn't covered such cases.) |
59 | * | |
60 | * The pullup is most important (so it's integrated on sam926x parts). It | |
bae4bd84 | 61 | * provides software control over whether the host enumerates the device. |
8b2e7668 | 62 | * |
bae4bd84 DB |
63 | * The VBUS sensing helps during enumeration, and allows both USB clocks |
64 | * (and the transceiver) to stay gated off until they're necessary, saving | |
8b2e7668 DB |
65 | * power. During USB suspend, the 48 MHz clock is gated off in hardware; |
66 | * it may also be gated off by software during some Linux sleep states. | |
bae4bd84 DB |
67 | */ |
68 | ||
8b2e7668 | 69 | #define DRIVER_VERSION "3 May 2006" |
bae4bd84 DB |
70 | |
71 | static const char driver_name [] = "at91_udc"; | |
72 | static const char ep0name[] = "ep0"; | |
73 | ||
4037242c | 74 | #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000) |
bae4bd84 | 75 | |
4f4c5e36 HH |
76 | #define at91_udp_read(udc, reg) \ |
77 | __raw_readl((udc)->udp_baseaddr + (reg)) | |
78 | #define at91_udp_write(udc, reg, val) \ | |
79 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) | |
bae4bd84 DB |
80 | |
81 | /*-------------------------------------------------------------------------*/ | |
82 | ||
83 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
84 | ||
85 | #include <linux/seq_file.h> | |
86 | ||
87 | static const char debug_filename[] = "driver/udc"; | |
88 | ||
89 | #define FOURBITS "%s%s%s%s" | |
90 | #define EIGHTBITS FOURBITS FOURBITS | |
91 | ||
92 | static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |
93 | { | |
94 | static char *types[] = { | |
95 | "control", "out-iso", "out-bulk", "out-int", | |
96 | "BOGUS", "in-iso", "in-bulk", "in-int"}; | |
97 | ||
98 | u32 csr; | |
99 | struct at91_request *req; | |
100 | unsigned long flags; | |
4f4c5e36 | 101 | struct at91_udc *udc = ep->udc; |
bae4bd84 | 102 | |
4f4c5e36 | 103 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
104 | |
105 | csr = __raw_readl(ep->creg); | |
106 | ||
107 | /* NOTE: not collecting per-endpoint irq statistics... */ | |
108 | ||
109 | seq_printf(s, "\n"); | |
110 | seq_printf(s, "%s, maxpacket %d %s%s %s%s\n", | |
111 | ep->ep.name, ep->ep.maxpacket, | |
112 | ep->is_in ? "in" : "out", | |
113 | ep->is_iso ? " iso" : "", | |
114 | ep->is_pingpong | |
115 | ? (ep->fifo_bank ? "pong" : "ping") | |
116 | : "", | |
117 | ep->stopped ? " stopped" : ""); | |
118 | seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n", | |
119 | csr, | |
120 | (csr & 0x07ff0000) >> 16, | |
121 | (csr & (1 << 15)) ? "enabled" : "disabled", | |
122 | (csr & (1 << 11)) ? "DATA1" : "DATA0", | |
123 | types[(csr & 0x700) >> 8], | |
124 | ||
125 | /* iff type is control then print current direction */ | |
126 | (!(csr & 0x700)) | |
127 | ? ((csr & (1 << 7)) ? " IN" : " OUT") | |
128 | : "", | |
129 | (csr & (1 << 6)) ? " rxdatabk1" : "", | |
130 | (csr & (1 << 5)) ? " forcestall" : "", | |
131 | (csr & (1 << 4)) ? " txpktrdy" : "", | |
132 | ||
133 | (csr & (1 << 3)) ? " stallsent" : "", | |
134 | (csr & (1 << 2)) ? " rxsetup" : "", | |
135 | (csr & (1 << 1)) ? " rxdatabk0" : "", | |
136 | (csr & (1 << 0)) ? " txcomp" : ""); | |
137 | if (list_empty (&ep->queue)) | |
138 | seq_printf(s, "\t(queue empty)\n"); | |
139 | ||
140 | else list_for_each_entry (req, &ep->queue, queue) { | |
141 | unsigned length = req->req.actual; | |
142 | ||
143 | seq_printf(s, "\treq %p len %d/%d buf %p\n", | |
144 | &req->req, length, | |
145 | req->req.length, req->req.buf); | |
146 | } | |
4f4c5e36 | 147 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
148 | } |
149 | ||
150 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) | |
151 | { | |
152 | int i; | |
153 | ||
154 | seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask, | |
155 | (mask & (1 << 13)) ? " wakeup" : "", | |
156 | (mask & (1 << 12)) ? " endbusres" : "", | |
157 | ||
158 | (mask & (1 << 11)) ? " sofint" : "", | |
159 | (mask & (1 << 10)) ? " extrsm" : "", | |
160 | (mask & (1 << 9)) ? " rxrsm" : "", | |
161 | (mask & (1 << 8)) ? " rxsusp" : ""); | |
162 | for (i = 0; i < 8; i++) { | |
163 | if (mask & (1 << i)) | |
164 | seq_printf(s, " ep%d", i); | |
165 | } | |
166 | seq_printf(s, "\n"); | |
167 | } | |
168 | ||
169 | static int proc_udc_show(struct seq_file *s, void *unused) | |
170 | { | |
171 | struct at91_udc *udc = s->private; | |
172 | struct at91_ep *ep; | |
173 | u32 tmp; | |
174 | ||
175 | seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION); | |
176 | ||
177 | seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n", | |
178 | udc->vbus ? "present" : "off", | |
179 | udc->enabled | |
180 | ? (udc->vbus ? "active" : "enabled") | |
181 | : "disabled", | |
182 | udc->selfpowered ? "self" : "VBUS", | |
183 | udc->suspended ? ", suspended" : "", | |
184 | udc->driver ? udc->driver->driver.name : "(none)"); | |
185 | ||
186 | /* don't access registers when interface isn't clocked */ | |
187 | if (!udc->clocked) { | |
188 | seq_printf(s, "(not clocked)\n"); | |
189 | return 0; | |
190 | } | |
191 | ||
ffd3326b | 192 | tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM); |
bae4bd84 DB |
193 | seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp, |
194 | (tmp & AT91_UDP_FRM_OK) ? " ok" : "", | |
195 | (tmp & AT91_UDP_FRM_ERR) ? " err" : "", | |
196 | (tmp & AT91_UDP_NUM)); | |
197 | ||
ffd3326b | 198 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
199 | seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp, |
200 | (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "", | |
201 | (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "", | |
202 | (tmp & AT91_UDP_ESR) ? " esr" : "", | |
203 | (tmp & AT91_UDP_CONFG) ? " confg" : "", | |
204 | (tmp & AT91_UDP_FADDEN) ? " fadden" : ""); | |
205 | ||
ffd3326b | 206 | tmp = at91_udp_read(udc, AT91_UDP_FADDR); |
bae4bd84 DB |
207 | seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp, |
208 | (tmp & AT91_UDP_FEN) ? " fen" : "", | |
209 | (tmp & AT91_UDP_FADD)); | |
210 | ||
ffd3326b AV |
211 | proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR)); |
212 | proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR)); | |
bae4bd84 DB |
213 | |
214 | if (udc->enabled && udc->vbus) { | |
215 | proc_ep_show(s, &udc->ep[0]); | |
216 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
217 | if (ep->desc) | |
218 | proc_ep_show(s, ep); | |
219 | } | |
220 | } | |
221 | return 0; | |
222 | } | |
223 | ||
224 | static int proc_udc_open(struct inode *inode, struct file *file) | |
225 | { | |
226 | return single_open(file, proc_udc_show, PDE(inode)->data); | |
227 | } | |
228 | ||
066202dd | 229 | static const struct file_operations proc_ops = { |
cdefa185 | 230 | .owner = THIS_MODULE, |
bae4bd84 DB |
231 | .open = proc_udc_open, |
232 | .read = seq_read, | |
233 | .llseek = seq_lseek, | |
234 | .release = single_release, | |
235 | }; | |
236 | ||
237 | static void create_debug_file(struct at91_udc *udc) | |
238 | { | |
cdefa185 | 239 | udc->pde = proc_create_data(debug_filename, 0, NULL, &proc_ops, udc); |
bae4bd84 DB |
240 | } |
241 | ||
242 | static void remove_debug_file(struct at91_udc *udc) | |
243 | { | |
244 | if (udc->pde) | |
245 | remove_proc_entry(debug_filename, NULL); | |
246 | } | |
247 | ||
248 | #else | |
249 | ||
250 | static inline void create_debug_file(struct at91_udc *udc) {} | |
251 | static inline void remove_debug_file(struct at91_udc *udc) {} | |
252 | ||
253 | #endif | |
254 | ||
255 | ||
256 | /*-------------------------------------------------------------------------*/ | |
257 | ||
258 | static void done(struct at91_ep *ep, struct at91_request *req, int status) | |
259 | { | |
260 | unsigned stopped = ep->stopped; | |
ffd3326b | 261 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
262 | |
263 | list_del_init(&req->queue); | |
264 | if (req->req.status == -EINPROGRESS) | |
265 | req->req.status = status; | |
266 | else | |
267 | status = req->req.status; | |
268 | if (status && status != -ESHUTDOWN) | |
269 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); | |
270 | ||
271 | ep->stopped = 1; | |
4f4c5e36 | 272 | spin_unlock(&udc->lock); |
bae4bd84 | 273 | req->req.complete(&ep->ep, &req->req); |
4f4c5e36 | 274 | spin_lock(&udc->lock); |
bae4bd84 DB |
275 | ep->stopped = stopped; |
276 | ||
277 | /* ep0 is always ready; other endpoints need a non-empty queue */ | |
278 | if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) | |
ffd3326b | 279 | at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); |
bae4bd84 DB |
280 | } |
281 | ||
282 | /*-------------------------------------------------------------------------*/ | |
283 | ||
284 | /* bits indicating OUT fifo has data ready */ | |
285 | #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) | |
286 | ||
287 | /* | |
288 | * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write | |
289 | * back most of the value you just read (because of side effects, including | |
290 | * bits that may change after reading and before writing). | |
291 | * | |
292 | * Except when changing a specific bit, always write values which: | |
293 | * - clear SET_FX bits (setting them could change something) | |
294 | * - set CLR_FX bits (clearing them could change something) | |
295 | * | |
296 | * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE | |
297 | * that shouldn't normally be changed. | |
8b2e7668 DB |
298 | * |
299 | * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, | |
300 | * implying a need to wait for one write to complete (test relevant bits) | |
301 | * before starting the next write. This shouldn't be an issue given how | |
302 | * infrequently we write, except maybe for write-then-read idioms. | |
bae4bd84 DB |
303 | */ |
304 | #define SET_FX (AT91_UDP_TXPKTRDY) | |
8b2e7668 DB |
305 | #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ |
306 | | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) | |
bae4bd84 DB |
307 | |
308 | /* pull OUT packet data from the endpoint's fifo */ | |
309 | static int read_fifo (struct at91_ep *ep, struct at91_request *req) | |
310 | { | |
311 | u32 __iomem *creg = ep->creg; | |
312 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
313 | u32 csr; | |
314 | u8 *buf; | |
315 | unsigned int count, bufferspace, is_done; | |
316 | ||
317 | buf = req->req.buf + req->req.actual; | |
318 | bufferspace = req->req.length - req->req.actual; | |
319 | ||
320 | /* | |
321 | * there might be nothing to read if ep_queue() calls us, | |
322 | * or if we already emptied both pingpong buffers | |
323 | */ | |
324 | rescan: | |
325 | csr = __raw_readl(creg); | |
326 | if ((csr & RX_DATA_READY) == 0) | |
327 | return 0; | |
328 | ||
329 | count = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
330 | if (count > ep->ep.maxpacket) | |
331 | count = ep->ep.maxpacket; | |
332 | if (count > bufferspace) { | |
333 | DBG("%s buffer overflow\n", ep->ep.name); | |
334 | req->req.status = -EOVERFLOW; | |
335 | count = bufferspace; | |
336 | } | |
337 | __raw_readsb(dreg, buf, count); | |
338 | ||
339 | /* release and swap pingpong mem bank */ | |
340 | csr |= CLR_FX; | |
341 | if (ep->is_pingpong) { | |
342 | if (ep->fifo_bank == 0) { | |
343 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
344 | ep->fifo_bank = 1; | |
345 | } else { | |
346 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); | |
347 | ep->fifo_bank = 0; | |
348 | } | |
349 | } else | |
350 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
351 | __raw_writel(csr, creg); | |
352 | ||
353 | req->req.actual += count; | |
354 | is_done = (count < ep->ep.maxpacket); | |
355 | if (count == bufferspace) | |
356 | is_done = 1; | |
357 | ||
358 | PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, | |
359 | is_done ? " (done)" : ""); | |
360 | ||
361 | /* | |
362 | * avoid extra trips through IRQ logic for packets already in | |
363 | * the fifo ... maybe preventing an extra (expensive) OUT-NAK | |
364 | */ | |
365 | if (is_done) | |
366 | done(ep, req, 0); | |
367 | else if (ep->is_pingpong) { | |
76225374 HH |
368 | /* |
369 | * One dummy read to delay the code because of a HW glitch: | |
370 | * CSR returns bad RXCOUNT when read too soon after updating | |
371 | * RX_DATA_BK flags. | |
372 | */ | |
373 | csr = __raw_readl(creg); | |
374 | ||
bae4bd84 DB |
375 | bufferspace -= count; |
376 | buf += count; | |
377 | goto rescan; | |
378 | } | |
379 | ||
380 | return is_done; | |
381 | } | |
382 | ||
383 | /* load fifo for an IN packet */ | |
384 | static int write_fifo(struct at91_ep *ep, struct at91_request *req) | |
385 | { | |
386 | u32 __iomem *creg = ep->creg; | |
387 | u32 csr = __raw_readl(creg); | |
388 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
389 | unsigned total, count, is_last; | |
3cf27234 | 390 | u8 *buf; |
bae4bd84 DB |
391 | |
392 | /* | |
393 | * TODO: allow for writing two packets to the fifo ... that'll | |
394 | * reduce the amount of IN-NAKing, but probably won't affect | |
395 | * throughput much. (Unlike preventing OUT-NAKing!) | |
396 | */ | |
397 | ||
398 | /* | |
399 | * If ep_queue() calls us, the queue is empty and possibly in | |
400 | * odd states like TXCOMP not yet cleared (we do it, saving at | |
401 | * least one IRQ) or the fifo not yet being free. Those aren't | |
402 | * issues normally (IRQ handler fast path). | |
403 | */ | |
404 | if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { | |
405 | if (csr & AT91_UDP_TXCOMP) { | |
406 | csr |= CLR_FX; | |
407 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
408 | __raw_writel(csr, creg); | |
409 | csr = __raw_readl(creg); | |
410 | } | |
411 | if (csr & AT91_UDP_TXPKTRDY) | |
412 | return 0; | |
413 | } | |
414 | ||
3cf27234 DB |
415 | buf = req->req.buf + req->req.actual; |
416 | prefetch(buf); | |
bae4bd84 DB |
417 | total = req->req.length - req->req.actual; |
418 | if (ep->ep.maxpacket < total) { | |
419 | count = ep->ep.maxpacket; | |
420 | is_last = 0; | |
421 | } else { | |
422 | count = total; | |
423 | is_last = (count < ep->ep.maxpacket) || !req->req.zero; | |
424 | } | |
425 | ||
426 | /* | |
427 | * Write the packet, maybe it's a ZLP. | |
428 | * | |
429 | * NOTE: incrementing req->actual before we receive the ACK means | |
430 | * gadget driver IN bytecounts can be wrong in fault cases. That's | |
431 | * fixable with PIO drivers like this one (save "count" here, and | |
432 | * do the increment later on TX irq), but not for most DMA hardware. | |
433 | * | |
434 | * So all gadget drivers must accept that potential error. Some | |
435 | * hardware supports precise fifo status reporting, letting them | |
436 | * recover when the actual bytecount matters (e.g. for USB Test | |
437 | * and Measurement Class devices). | |
438 | */ | |
3cf27234 | 439 | __raw_writesb(dreg, buf, count); |
bae4bd84 DB |
440 | csr &= ~SET_FX; |
441 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
442 | __raw_writel(csr, creg); | |
443 | req->req.actual += count; | |
444 | ||
445 | PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, | |
446 | is_last ? " (done)" : ""); | |
447 | if (is_last) | |
448 | done(ep, req, 0); | |
449 | return is_last; | |
450 | } | |
451 | ||
452 | static void nuke(struct at91_ep *ep, int status) | |
453 | { | |
454 | struct at91_request *req; | |
455 | ||
1a8060d9 | 456 | /* terminate any request in the queue */ |
bae4bd84 DB |
457 | ep->stopped = 1; |
458 | if (list_empty(&ep->queue)) | |
459 | return; | |
460 | ||
441b62c1 | 461 | VDBG("%s %s\n", __func__, ep->ep.name); |
bae4bd84 DB |
462 | while (!list_empty(&ep->queue)) { |
463 | req = list_entry(ep->queue.next, struct at91_request, queue); | |
464 | done(ep, req, status); | |
465 | } | |
466 | } | |
467 | ||
468 | /*-------------------------------------------------------------------------*/ | |
469 | ||
8b2e7668 DB |
470 | static int at91_ep_enable(struct usb_ep *_ep, |
471 | const struct usb_endpoint_descriptor *desc) | |
bae4bd84 DB |
472 | { |
473 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
4f4c5e36 | 474 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
475 | u16 maxpacket; |
476 | u32 tmp; | |
477 | unsigned long flags; | |
478 | ||
479 | if (!_ep || !ep | |
480 | || !desc || ep->desc | |
481 | || _ep->name == ep0name | |
482 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
29cc8897 | 483 | || (maxpacket = usb_endpoint_maxp(desc)) == 0 |
bae4bd84 DB |
484 | || maxpacket > ep->maxpacket) { |
485 | DBG("bad ep or descriptor\n"); | |
486 | return -EINVAL; | |
487 | } | |
488 | ||
4f4c5e36 | 489 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
490 | DBG("bogus device state\n"); |
491 | return -ESHUTDOWN; | |
492 | } | |
493 | ||
81c8d8d2 | 494 | tmp = usb_endpoint_type(desc); |
bae4bd84 DB |
495 | switch (tmp) { |
496 | case USB_ENDPOINT_XFER_CONTROL: | |
497 | DBG("only one control endpoint\n"); | |
498 | return -EINVAL; | |
499 | case USB_ENDPOINT_XFER_INT: | |
500 | if (maxpacket > 64) | |
501 | goto bogus_max; | |
502 | break; | |
503 | case USB_ENDPOINT_XFER_BULK: | |
504 | switch (maxpacket) { | |
505 | case 8: | |
506 | case 16: | |
507 | case 32: | |
508 | case 64: | |
509 | goto ok; | |
510 | } | |
511 | bogus_max: | |
512 | DBG("bogus maxpacket %d\n", maxpacket); | |
513 | return -EINVAL; | |
514 | case USB_ENDPOINT_XFER_ISOC: | |
515 | if (!ep->is_pingpong) { | |
516 | DBG("iso requires double buffering\n"); | |
517 | return -EINVAL; | |
518 | } | |
519 | break; | |
520 | } | |
521 | ||
522 | ok: | |
4f4c5e36 | 523 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
524 | |
525 | /* initialize endpoint to match this descriptor */ | |
81c8d8d2 | 526 | ep->is_in = usb_endpoint_dir_in(desc); |
bae4bd84 DB |
527 | ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); |
528 | ep->stopped = 0; | |
529 | if (ep->is_in) | |
530 | tmp |= 0x04; | |
531 | tmp <<= 8; | |
532 | tmp |= AT91_UDP_EPEDS; | |
533 | __raw_writel(tmp, ep->creg); | |
534 | ||
535 | ep->desc = desc; | |
536 | ep->ep.maxpacket = maxpacket; | |
537 | ||
538 | /* | |
539 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, | |
540 | * since endpoint resets don't reset hw pingpong state. | |
541 | */ | |
4f4c5e36 HH |
542 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
543 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 | 544 | |
4f4c5e36 | 545 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
546 | return 0; |
547 | } | |
548 | ||
549 | static int at91_ep_disable (struct usb_ep * _ep) | |
550 | { | |
551 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 552 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
553 | unsigned long flags; |
554 | ||
555 | if (ep == &ep->udc->ep[0]) | |
556 | return -EINVAL; | |
557 | ||
4f4c5e36 | 558 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
559 | |
560 | nuke(ep, -ESHUTDOWN); | |
561 | ||
562 | /* restore the endpoint's pristine config */ | |
563 | ep->desc = NULL; | |
564 | ep->ep.maxpacket = ep->maxpacket; | |
565 | ||
566 | /* reset fifos and endpoint */ | |
567 | if (ep->udc->clocked) { | |
ffd3326b AV |
568 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
569 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
570 | __raw_writel(0, ep->creg); |
571 | } | |
572 | ||
4f4c5e36 | 573 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
574 | return 0; |
575 | } | |
576 | ||
577 | /* | |
578 | * this is a PIO-only driver, so there's nothing | |
579 | * interesting for request or buffer allocation. | |
580 | */ | |
581 | ||
8b2e7668 | 582 | static struct usb_request * |
f3db6e82 | 583 | at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) |
bae4bd84 DB |
584 | { |
585 | struct at91_request *req; | |
586 | ||
cd861280 | 587 | req = kzalloc(sizeof (struct at91_request), gfp_flags); |
bae4bd84 DB |
588 | if (!req) |
589 | return NULL; | |
590 | ||
591 | INIT_LIST_HEAD(&req->queue); | |
592 | return &req->req; | |
593 | } | |
594 | ||
595 | static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
596 | { | |
597 | struct at91_request *req; | |
598 | ||
599 | req = container_of(_req, struct at91_request, req); | |
600 | BUG_ON(!list_empty(&req->queue)); | |
601 | kfree(req); | |
602 | } | |
603 | ||
bae4bd84 DB |
604 | static int at91_ep_queue(struct usb_ep *_ep, |
605 | struct usb_request *_req, gfp_t gfp_flags) | |
606 | { | |
607 | struct at91_request *req; | |
608 | struct at91_ep *ep; | |
4f4c5e36 | 609 | struct at91_udc *udc; |
bae4bd84 DB |
610 | int status; |
611 | unsigned long flags; | |
612 | ||
613 | req = container_of(_req, struct at91_request, req); | |
614 | ep = container_of(_ep, struct at91_ep, ep); | |
615 | ||
616 | if (!_req || !_req->complete | |
617 | || !_req->buf || !list_empty(&req->queue)) { | |
618 | DBG("invalid request\n"); | |
619 | return -EINVAL; | |
620 | } | |
621 | ||
622 | if (!_ep || (!ep->desc && ep->ep.name != ep0name)) { | |
623 | DBG("invalid ep\n"); | |
624 | return -EINVAL; | |
625 | } | |
626 | ||
4f4c5e36 | 627 | udc = ep->udc; |
bae4bd84 | 628 | |
4f4c5e36 | 629 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
630 | DBG("invalid device\n"); |
631 | return -EINVAL; | |
632 | } | |
633 | ||
634 | _req->status = -EINPROGRESS; | |
635 | _req->actual = 0; | |
636 | ||
4f4c5e36 | 637 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
638 | |
639 | /* try to kickstart any empty and idle queue */ | |
640 | if (list_empty(&ep->queue) && !ep->stopped) { | |
641 | int is_ep0; | |
642 | ||
643 | /* | |
644 | * If this control request has a non-empty DATA stage, this | |
645 | * will start that stage. It works just like a non-control | |
646 | * request (until the status stage starts, maybe early). | |
647 | * | |
648 | * If the data stage is empty, then this starts a successful | |
649 | * IN/STATUS stage. (Unsuccessful ones use set_halt.) | |
650 | */ | |
651 | is_ep0 = (ep->ep.name == ep0name); | |
652 | if (is_ep0) { | |
653 | u32 tmp; | |
654 | ||
4f4c5e36 | 655 | if (!udc->req_pending) { |
bae4bd84 DB |
656 | status = -EINVAL; |
657 | goto done; | |
658 | } | |
659 | ||
660 | /* | |
661 | * defer changing CONFG until after the gadget driver | |
662 | * reconfigures the endpoints. | |
663 | */ | |
4f4c5e36 HH |
664 | if (udc->wait_for_config_ack) { |
665 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); | |
bae4bd84 DB |
666 | tmp ^= AT91_UDP_CONFG; |
667 | VDBG("toggle config\n"); | |
4f4c5e36 | 668 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
669 | } |
670 | if (req->req.length == 0) { | |
671 | ep0_in_status: | |
672 | PACKET("ep0 in/status\n"); | |
673 | status = 0; | |
674 | tmp = __raw_readl(ep->creg); | |
675 | tmp &= ~SET_FX; | |
676 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; | |
677 | __raw_writel(tmp, ep->creg); | |
4f4c5e36 | 678 | udc->req_pending = 0; |
bae4bd84 DB |
679 | goto done; |
680 | } | |
681 | } | |
682 | ||
683 | if (ep->is_in) | |
684 | status = write_fifo(ep, req); | |
685 | else { | |
686 | status = read_fifo(ep, req); | |
687 | ||
688 | /* IN/STATUS stage is otherwise triggered by irq */ | |
689 | if (status && is_ep0) | |
690 | goto ep0_in_status; | |
691 | } | |
692 | } else | |
693 | status = 0; | |
694 | ||
695 | if (req && !status) { | |
696 | list_add_tail (&req->queue, &ep->queue); | |
4f4c5e36 | 697 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
bae4bd84 DB |
698 | } |
699 | done: | |
4f4c5e36 | 700 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
701 | return (status < 0) ? status : 0; |
702 | } | |
703 | ||
704 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
705 | { | |
4f4c5e36 | 706 | struct at91_ep *ep; |
bae4bd84 | 707 | struct at91_request *req; |
4f4c5e36 HH |
708 | unsigned long flags; |
709 | struct at91_udc *udc; | |
bae4bd84 DB |
710 | |
711 | ep = container_of(_ep, struct at91_ep, ep); | |
712 | if (!_ep || ep->ep.name == ep0name) | |
713 | return -EINVAL; | |
714 | ||
4f4c5e36 HH |
715 | udc = ep->udc; |
716 | ||
717 | spin_lock_irqsave(&udc->lock, flags); | |
718 | ||
bae4bd84 DB |
719 | /* make sure it's actually queued on this endpoint */ |
720 | list_for_each_entry (req, &ep->queue, queue) { | |
721 | if (&req->req == _req) | |
722 | break; | |
723 | } | |
4f4c5e36 HH |
724 | if (&req->req != _req) { |
725 | spin_unlock_irqrestore(&udc->lock, flags); | |
bae4bd84 | 726 | return -EINVAL; |
4f4c5e36 | 727 | } |
bae4bd84 DB |
728 | |
729 | done(ep, req, -ECONNRESET); | |
4f4c5e36 | 730 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
731 | return 0; |
732 | } | |
733 | ||
734 | static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |
735 | { | |
736 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 737 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
738 | u32 __iomem *creg; |
739 | u32 csr; | |
740 | unsigned long flags; | |
741 | int status = 0; | |
742 | ||
743 | if (!_ep || ep->is_iso || !ep->udc->clocked) | |
744 | return -EINVAL; | |
745 | ||
746 | creg = ep->creg; | |
4f4c5e36 | 747 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
748 | |
749 | csr = __raw_readl(creg); | |
750 | ||
751 | /* | |
752 | * fail with still-busy IN endpoints, ensuring correct sequencing | |
753 | * of data tx then stall. note that the fifo rx bytecount isn't | |
754 | * completely accurate as a tx bytecount. | |
755 | */ | |
756 | if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) | |
757 | status = -EAGAIN; | |
758 | else { | |
759 | csr |= CLR_FX; | |
760 | csr &= ~SET_FX; | |
761 | if (value) { | |
762 | csr |= AT91_UDP_FORCESTALL; | |
763 | VDBG("halt %s\n", ep->ep.name); | |
764 | } else { | |
ffd3326b AV |
765 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
766 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
767 | csr &= ~AT91_UDP_FORCESTALL; |
768 | } | |
769 | __raw_writel(csr, creg); | |
770 | } | |
771 | ||
4f4c5e36 | 772 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
773 | return status; |
774 | } | |
775 | ||
398acce7 | 776 | static const struct usb_ep_ops at91_ep_ops = { |
bae4bd84 DB |
777 | .enable = at91_ep_enable, |
778 | .disable = at91_ep_disable, | |
779 | .alloc_request = at91_ep_alloc_request, | |
780 | .free_request = at91_ep_free_request, | |
bae4bd84 DB |
781 | .queue = at91_ep_queue, |
782 | .dequeue = at91_ep_dequeue, | |
783 | .set_halt = at91_ep_set_halt, | |
1a8060d9 | 784 | /* there's only imprecise fifo status reporting */ |
bae4bd84 DB |
785 | }; |
786 | ||
787 | /*-------------------------------------------------------------------------*/ | |
788 | ||
789 | static int at91_get_frame(struct usb_gadget *gadget) | |
790 | { | |
ffd3326b AV |
791 | struct at91_udc *udc = to_udc(gadget); |
792 | ||
bae4bd84 DB |
793 | if (!to_udc(gadget)->clocked) |
794 | return -EINVAL; | |
ffd3326b | 795 | return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; |
bae4bd84 DB |
796 | } |
797 | ||
798 | static int at91_wakeup(struct usb_gadget *gadget) | |
799 | { | |
800 | struct at91_udc *udc = to_udc(gadget); | |
801 | u32 glbstate; | |
802 | int status = -EINVAL; | |
803 | unsigned long flags; | |
804 | ||
441b62c1 | 805 | DBG("%s\n", __func__ ); |
4f4c5e36 | 806 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
807 | |
808 | if (!udc->clocked || !udc->suspended) | |
809 | goto done; | |
810 | ||
811 | /* NOTE: some "early versions" handle ESR differently ... */ | |
812 | ||
ffd3326b | 813 | glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
814 | if (!(glbstate & AT91_UDP_ESR)) |
815 | goto done; | |
816 | glbstate |= AT91_UDP_ESR; | |
ffd3326b | 817 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
bae4bd84 DB |
818 | |
819 | done: | |
4f4c5e36 | 820 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
821 | return status; |
822 | } | |
823 | ||
25985edc | 824 | /* reinit == restore initial software state */ |
bae4bd84 DB |
825 | static void udc_reinit(struct at91_udc *udc) |
826 | { | |
827 | u32 i; | |
828 | ||
829 | INIT_LIST_HEAD(&udc->gadget.ep_list); | |
830 | INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); | |
831 | ||
832 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
833 | struct at91_ep *ep = &udc->ep[i]; | |
834 | ||
835 | if (i != 0) | |
836 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
837 | ep->desc = NULL; | |
838 | ep->stopped = 0; | |
839 | ep->fifo_bank = 0; | |
840 | ep->ep.maxpacket = ep->maxpacket; | |
ffd3326b | 841 | ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); |
1a8060d9 | 842 | /* initialize one queue per endpoint */ |
bae4bd84 DB |
843 | INIT_LIST_HEAD(&ep->queue); |
844 | } | |
845 | } | |
846 | ||
847 | static void stop_activity(struct at91_udc *udc) | |
848 | { | |
849 | struct usb_gadget_driver *driver = udc->driver; | |
850 | int i; | |
851 | ||
852 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
853 | driver = NULL; | |
854 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
8b2e7668 | 855 | udc->suspended = 0; |
bae4bd84 DB |
856 | |
857 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
858 | struct at91_ep *ep = &udc->ep[i]; | |
859 | ep->stopped = 1; | |
860 | nuke(ep, -ESHUTDOWN); | |
861 | } | |
4f4c5e36 HH |
862 | if (driver) { |
863 | spin_unlock(&udc->lock); | |
bae4bd84 | 864 | driver->disconnect(&udc->gadget); |
4f4c5e36 HH |
865 | spin_lock(&udc->lock); |
866 | } | |
bae4bd84 DB |
867 | |
868 | udc_reinit(udc); | |
869 | } | |
870 | ||
871 | static void clk_on(struct at91_udc *udc) | |
872 | { | |
873 | if (udc->clocked) | |
874 | return; | |
875 | udc->clocked = 1; | |
876 | clk_enable(udc->iclk); | |
877 | clk_enable(udc->fclk); | |
878 | } | |
879 | ||
880 | static void clk_off(struct at91_udc *udc) | |
881 | { | |
882 | if (!udc->clocked) | |
883 | return; | |
884 | udc->clocked = 0; | |
885 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
bae4bd84 | 886 | clk_disable(udc->fclk); |
8b2e7668 | 887 | clk_disable(udc->iclk); |
bae4bd84 DB |
888 | } |
889 | ||
890 | /* | |
891 | * activate/deactivate link with host; minimize power usage for | |
892 | * inactive links by cutting clocks and transceiver power. | |
893 | */ | |
894 | static void pullup(struct at91_udc *udc, int is_on) | |
895 | { | |
f3db6e82 DB |
896 | int active = !udc->board.pullup_active_low; |
897 | ||
bae4bd84 DB |
898 | if (!udc->enabled || !udc->vbus) |
899 | is_on = 0; | |
900 | DBG("%sactive\n", is_on ? "" : "in"); | |
ffd3326b | 901 | |
bae4bd84 DB |
902 | if (is_on) { |
903 | clk_on(udc); | |
08cbc706 | 904 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
ffd3326b | 905 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
29ba4b53 | 906 | if (cpu_is_at91rm9200()) |
f3db6e82 | 907 | gpio_set_value(udc->board.pullup_pin, active); |
61352667 | 908 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
909 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
910 | ||
911 | txvc |= AT91_UDP_TXVC_PUON; | |
912 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 913 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
914 | u32 usbpucr; |
915 | ||
4342d647 | 916 | usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); |
29ba4b53 | 917 | usbpucr |= AT91_MATRIX_USBPUCR_PUON; |
4342d647 | 918 | at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); |
29ba4b53 | 919 | } |
ffd3326b | 920 | } else { |
bae4bd84 | 921 | stop_activity(udc); |
08cbc706 | 922 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
ffd3326b | 923 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
29ba4b53 | 924 | if (cpu_is_at91rm9200()) |
f3db6e82 | 925 | gpio_set_value(udc->board.pullup_pin, !active); |
61352667 | 926 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
927 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
928 | ||
929 | txvc &= ~AT91_UDP_TXVC_PUON; | |
930 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 931 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
932 | u32 usbpucr; |
933 | ||
4342d647 | 934 | usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); |
29ba4b53 | 935 | usbpucr &= ~AT91_MATRIX_USBPUCR_PUON; |
4342d647 | 936 | at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); |
29ba4b53 | 937 | } |
bae4bd84 | 938 | clk_off(udc); |
bae4bd84 DB |
939 | } |
940 | } | |
941 | ||
942 | /* vbus is here! turn everything on that's ready */ | |
943 | static int at91_vbus_session(struct usb_gadget *gadget, int is_active) | |
944 | { | |
945 | struct at91_udc *udc = to_udc(gadget); | |
946 | unsigned long flags; | |
947 | ||
1a8060d9 | 948 | /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ |
4f4c5e36 | 949 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 950 | udc->vbus = (is_active != 0); |
bfb7fb79 WK |
951 | if (udc->driver) |
952 | pullup(udc, is_active); | |
953 | else | |
954 | pullup(udc, 0); | |
4f4c5e36 | 955 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
956 | return 0; |
957 | } | |
958 | ||
959 | static int at91_pullup(struct usb_gadget *gadget, int is_on) | |
960 | { | |
961 | struct at91_udc *udc = to_udc(gadget); | |
962 | unsigned long flags; | |
963 | ||
4f4c5e36 | 964 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
965 | udc->enabled = is_on = !!is_on; |
966 | pullup(udc, is_on); | |
4f4c5e36 | 967 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
968 | return 0; |
969 | } | |
970 | ||
971 | static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) | |
972 | { | |
973 | struct at91_udc *udc = to_udc(gadget); | |
974 | unsigned long flags; | |
975 | ||
4f4c5e36 | 976 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 977 | udc->selfpowered = (is_on != 0); |
4f4c5e36 | 978 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
979 | return 0; |
980 | } | |
981 | ||
0f91349b SAS |
982 | static int at91_start(struct usb_gadget_driver *driver, |
983 | int (*bind)(struct usb_gadget *)); | |
984 | static int at91_stop(struct usb_gadget_driver *driver); | |
985 | ||
bae4bd84 DB |
986 | static const struct usb_gadget_ops at91_udc_ops = { |
987 | .get_frame = at91_get_frame, | |
988 | .wakeup = at91_wakeup, | |
989 | .set_selfpowered = at91_set_selfpowered, | |
990 | .vbus_session = at91_vbus_session, | |
991 | .pullup = at91_pullup, | |
0f91349b SAS |
992 | .start = at91_start, |
993 | .stop = at91_stop, | |
bae4bd84 DB |
994 | |
995 | /* | |
996 | * VBUS-powered devices may also also want to support bigger | |
997 | * power budgets after an appropriate SET_CONFIGURATION. | |
998 | */ | |
1a8060d9 | 999 | /* .vbus_power = at91_vbus_power, */ |
bae4bd84 DB |
1000 | }; |
1001 | ||
1002 | /*-------------------------------------------------------------------------*/ | |
1003 | ||
1004 | static int handle_ep(struct at91_ep *ep) | |
1005 | { | |
1006 | struct at91_request *req; | |
1007 | u32 __iomem *creg = ep->creg; | |
1008 | u32 csr = __raw_readl(creg); | |
1009 | ||
1010 | if (!list_empty(&ep->queue)) | |
1011 | req = list_entry(ep->queue.next, | |
1012 | struct at91_request, queue); | |
1013 | else | |
1014 | req = NULL; | |
1015 | ||
1016 | if (ep->is_in) { | |
1017 | if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { | |
1018 | csr |= CLR_FX; | |
1019 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); | |
1020 | __raw_writel(csr, creg); | |
1021 | } | |
1022 | if (req) | |
1023 | return write_fifo(ep, req); | |
1024 | ||
1025 | } else { | |
1026 | if (csr & AT91_UDP_STALLSENT) { | |
1027 | /* STALLSENT bit == ISOERR */ | |
1028 | if (ep->is_iso && req) | |
1029 | req->req.status = -EILSEQ; | |
1030 | csr |= CLR_FX; | |
1031 | csr &= ~(SET_FX | AT91_UDP_STALLSENT); | |
1032 | __raw_writel(csr, creg); | |
1033 | csr = __raw_readl(creg); | |
1034 | } | |
1035 | if (req && (csr & RX_DATA_READY)) | |
1036 | return read_fifo(ep, req); | |
1037 | } | |
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | union setup { | |
1042 | u8 raw[8]; | |
1043 | struct usb_ctrlrequest r; | |
1044 | }; | |
1045 | ||
1046 | static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) | |
1047 | { | |
1048 | u32 __iomem *creg = ep->creg; | |
1049 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
1050 | unsigned rxcount, i = 0; | |
1051 | u32 tmp; | |
1052 | union setup pkt; | |
1053 | int status = 0; | |
1054 | ||
1055 | /* read and ack SETUP; hard-fail for bogus packets */ | |
1056 | rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
1057 | if (likely(rxcount == 8)) { | |
1058 | while (rxcount--) | |
1059 | pkt.raw[i++] = __raw_readb(dreg); | |
1060 | if (pkt.r.bRequestType & USB_DIR_IN) { | |
1061 | csr |= AT91_UDP_DIR; | |
1062 | ep->is_in = 1; | |
1063 | } else { | |
1064 | csr &= ~AT91_UDP_DIR; | |
1065 | ep->is_in = 0; | |
1066 | } | |
1067 | } else { | |
1a8060d9 | 1068 | /* REVISIT this happens sometimes under load; why?? */ |
bae4bd84 DB |
1069 | ERR("SETUP len %d, csr %08x\n", rxcount, csr); |
1070 | status = -EINVAL; | |
1071 | } | |
1072 | csr |= CLR_FX; | |
1073 | csr &= ~(SET_FX | AT91_UDP_RXSETUP); | |
1074 | __raw_writel(csr, creg); | |
1075 | udc->wait_for_addr_ack = 0; | |
1076 | udc->wait_for_config_ack = 0; | |
1077 | ep->stopped = 0; | |
1078 | if (unlikely(status != 0)) | |
1079 | goto stall; | |
1080 | ||
1081 | #define w_index le16_to_cpu(pkt.r.wIndex) | |
1082 | #define w_value le16_to_cpu(pkt.r.wValue) | |
1083 | #define w_length le16_to_cpu(pkt.r.wLength) | |
1084 | ||
1085 | VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", | |
1086 | pkt.r.bRequestType, pkt.r.bRequest, | |
1087 | w_value, w_index, w_length); | |
1088 | ||
1089 | /* | |
1090 | * A few standard requests get handled here, ones that touch | |
1091 | * hardware ... notably for device and endpoint features. | |
1092 | */ | |
1093 | udc->req_pending = 1; | |
1094 | csr = __raw_readl(creg); | |
1095 | csr |= CLR_FX; | |
1096 | csr &= ~SET_FX; | |
1097 | switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { | |
1098 | ||
1099 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1100 | | USB_REQ_SET_ADDRESS: | |
1101 | __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); | |
1102 | udc->addr = w_value; | |
1103 | udc->wait_for_addr_ack = 1; | |
1104 | udc->req_pending = 0; | |
1105 | /* FADDR is set later, when we ack host STATUS */ | |
1106 | return; | |
1107 | ||
1108 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1109 | | USB_REQ_SET_CONFIGURATION: | |
ffd3326b | 1110 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; |
bae4bd84 DB |
1111 | if (pkt.r.wValue) |
1112 | udc->wait_for_config_ack = (tmp == 0); | |
1113 | else | |
1114 | udc->wait_for_config_ack = (tmp != 0); | |
1115 | if (udc->wait_for_config_ack) | |
1116 | VDBG("wait for config\n"); | |
1117 | /* CONFG is toggled later, if gadget driver succeeds */ | |
1118 | break; | |
1119 | ||
1120 | /* | |
1121 | * Hosts may set or clear remote wakeup status, and | |
1122 | * devices may report they're VBUS powered. | |
1123 | */ | |
1124 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1125 | | USB_REQ_GET_STATUS: | |
1126 | tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); | |
ffd3326b | 1127 | if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) |
bae4bd84 DB |
1128 | tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); |
1129 | PACKET("get device status\n"); | |
1130 | __raw_writeb(tmp, dreg); | |
1131 | __raw_writeb(0, dreg); | |
1132 | goto write_in; | |
1133 | /* then STATUS starts later, automatically */ | |
1134 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1135 | | USB_REQ_SET_FEATURE: | |
1136 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1137 | goto stall; | |
ffd3326b | 1138 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1139 | tmp |= AT91_UDP_ESR; |
ffd3326b | 1140 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1141 | goto succeed; |
1142 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1143 | | USB_REQ_CLEAR_FEATURE: | |
1144 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1145 | goto stall; | |
ffd3326b | 1146 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1147 | tmp &= ~AT91_UDP_ESR; |
ffd3326b | 1148 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1149 | goto succeed; |
1150 | ||
1151 | /* | |
1152 | * Interfaces have no feature settings; this is pretty useless. | |
1153 | * we won't even insist the interface exists... | |
1154 | */ | |
1155 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1156 | | USB_REQ_GET_STATUS: | |
1157 | PACKET("get interface status\n"); | |
1158 | __raw_writeb(0, dreg); | |
1159 | __raw_writeb(0, dreg); | |
1160 | goto write_in; | |
1161 | /* then STATUS starts later, automatically */ | |
1162 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1163 | | USB_REQ_SET_FEATURE: | |
1164 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1165 | | USB_REQ_CLEAR_FEATURE: | |
1166 | goto stall; | |
1167 | ||
1168 | /* | |
1169 | * Hosts may clear bulk/intr endpoint halt after the gadget | |
1170 | * driver sets it (not widely used); or set it (for testing) | |
1171 | */ | |
1172 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1173 | | USB_REQ_GET_STATUS: | |
1174 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1175 | ep = &udc->ep[tmp]; | |
1440e096 | 1176 | if (tmp >= NUM_ENDPOINTS || (tmp && !ep->desc)) |
bae4bd84 DB |
1177 | goto stall; |
1178 | ||
1179 | if (tmp) { | |
1180 | if ((w_index & USB_DIR_IN)) { | |
1181 | if (!ep->is_in) | |
1182 | goto stall; | |
1183 | } else if (ep->is_in) | |
1184 | goto stall; | |
1185 | } | |
1186 | PACKET("get %s status\n", ep->ep.name); | |
1187 | if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) | |
1188 | tmp = (1 << USB_ENDPOINT_HALT); | |
1189 | else | |
1190 | tmp = 0; | |
1191 | __raw_writeb(tmp, dreg); | |
1192 | __raw_writeb(0, dreg); | |
1193 | goto write_in; | |
1194 | /* then STATUS starts later, automatically */ | |
1195 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1196 | | USB_REQ_SET_FEATURE: | |
1197 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1198 | ep = &udc->ep[tmp]; | |
1440e096 | 1199 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1200 | goto stall; |
1201 | if (!ep->desc || ep->is_iso) | |
1202 | goto stall; | |
1203 | if ((w_index & USB_DIR_IN)) { | |
1204 | if (!ep->is_in) | |
1205 | goto stall; | |
1206 | } else if (ep->is_in) | |
1207 | goto stall; | |
1208 | ||
1209 | tmp = __raw_readl(ep->creg); | |
1210 | tmp &= ~SET_FX; | |
1211 | tmp |= CLR_FX | AT91_UDP_FORCESTALL; | |
1212 | __raw_writel(tmp, ep->creg); | |
1213 | goto succeed; | |
1214 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1215 | | USB_REQ_CLEAR_FEATURE: | |
1216 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1217 | ep = &udc->ep[tmp]; | |
1440e096 | 1218 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1219 | goto stall; |
1220 | if (tmp == 0) | |
1221 | goto succeed; | |
1222 | if (!ep->desc || ep->is_iso) | |
1223 | goto stall; | |
1224 | if ((w_index & USB_DIR_IN)) { | |
1225 | if (!ep->is_in) | |
1226 | goto stall; | |
1227 | } else if (ep->is_in) | |
1228 | goto stall; | |
1229 | ||
ffd3326b AV |
1230 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
1231 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
1232 | tmp = __raw_readl(ep->creg); |
1233 | tmp |= CLR_FX; | |
1234 | tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); | |
1235 | __raw_writel(tmp, ep->creg); | |
1236 | if (!list_empty(&ep->queue)) | |
1237 | handle_ep(ep); | |
1238 | goto succeed; | |
1239 | } | |
1240 | ||
1241 | #undef w_value | |
1242 | #undef w_index | |
1243 | #undef w_length | |
1244 | ||
1245 | /* pass request up to the gadget driver */ | |
4f4c5e36 HH |
1246 | if (udc->driver) { |
1247 | spin_unlock(&udc->lock); | |
bfb7fb79 | 1248 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
4f4c5e36 HH |
1249 | spin_lock(&udc->lock); |
1250 | } | |
bfb7fb79 WK |
1251 | else |
1252 | status = -ENODEV; | |
bae4bd84 DB |
1253 | if (status < 0) { |
1254 | stall: | |
1255 | VDBG("req %02x.%02x protocol STALL; stat %d\n", | |
1256 | pkt.r.bRequestType, pkt.r.bRequest, status); | |
1257 | csr |= AT91_UDP_FORCESTALL; | |
1258 | __raw_writel(csr, creg); | |
1259 | udc->req_pending = 0; | |
1260 | } | |
1261 | return; | |
1262 | ||
1263 | succeed: | |
1264 | /* immediate successful (IN) STATUS after zero length DATA */ | |
1265 | PACKET("ep0 in/status\n"); | |
1266 | write_in: | |
1267 | csr |= AT91_UDP_TXPKTRDY; | |
1268 | __raw_writel(csr, creg); | |
1269 | udc->req_pending = 0; | |
bae4bd84 DB |
1270 | } |
1271 | ||
1272 | static void handle_ep0(struct at91_udc *udc) | |
1273 | { | |
1274 | struct at91_ep *ep0 = &udc->ep[0]; | |
1275 | u32 __iomem *creg = ep0->creg; | |
1276 | u32 csr = __raw_readl(creg); | |
1277 | struct at91_request *req; | |
1278 | ||
1279 | if (unlikely(csr & AT91_UDP_STALLSENT)) { | |
1280 | nuke(ep0, -EPROTO); | |
1281 | udc->req_pending = 0; | |
1282 | csr |= CLR_FX; | |
1283 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); | |
1284 | __raw_writel(csr, creg); | |
1285 | VDBG("ep0 stalled\n"); | |
1286 | csr = __raw_readl(creg); | |
1287 | } | |
1288 | if (csr & AT91_UDP_RXSETUP) { | |
1289 | nuke(ep0, 0); | |
1290 | udc->req_pending = 0; | |
1291 | handle_setup(udc, ep0, csr); | |
1292 | return; | |
1293 | } | |
1294 | ||
1295 | if (list_empty(&ep0->queue)) | |
1296 | req = NULL; | |
1297 | else | |
1298 | req = list_entry(ep0->queue.next, struct at91_request, queue); | |
1299 | ||
1300 | /* host ACKed an IN packet that we sent */ | |
1301 | if (csr & AT91_UDP_TXCOMP) { | |
1302 | csr |= CLR_FX; | |
1303 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
1304 | ||
1305 | /* write more IN DATA? */ | |
1306 | if (req && ep0->is_in) { | |
1307 | if (handle_ep(ep0)) | |
1308 | udc->req_pending = 0; | |
1309 | ||
1310 | /* | |
1311 | * Ack after: | |
1312 | * - last IN DATA packet (including GET_STATUS) | |
1313 | * - IN/STATUS for OUT DATA | |
1314 | * - IN/STATUS for any zero-length DATA stage | |
1315 | * except for the IN DATA case, the host should send | |
1316 | * an OUT status later, which we'll ack. | |
1317 | */ | |
1318 | } else { | |
1319 | udc->req_pending = 0; | |
1320 | __raw_writel(csr, creg); | |
1321 | ||
1322 | /* | |
1323 | * SET_ADDRESS takes effect only after the STATUS | |
1324 | * (to the original address) gets acked. | |
1325 | */ | |
1326 | if (udc->wait_for_addr_ack) { | |
1327 | u32 tmp; | |
1328 | ||
ffd3326b | 1329 | at91_udp_write(udc, AT91_UDP_FADDR, |
8b2e7668 | 1330 | AT91_UDP_FEN | udc->addr); |
ffd3326b | 1331 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
1332 | tmp &= ~AT91_UDP_FADDEN; |
1333 | if (udc->addr) | |
1334 | tmp |= AT91_UDP_FADDEN; | |
ffd3326b | 1335 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1336 | |
1337 | udc->wait_for_addr_ack = 0; | |
1338 | VDBG("address %d\n", udc->addr); | |
1339 | } | |
1340 | } | |
1341 | } | |
1342 | ||
1343 | /* OUT packet arrived ... */ | |
1344 | else if (csr & AT91_UDP_RX_DATA_BK0) { | |
1345 | csr |= CLR_FX; | |
1346 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
1347 | ||
1348 | /* OUT DATA stage */ | |
1349 | if (!ep0->is_in) { | |
1350 | if (req) { | |
1351 | if (handle_ep(ep0)) { | |
1352 | /* send IN/STATUS */ | |
1353 | PACKET("ep0 in/status\n"); | |
1354 | csr = __raw_readl(creg); | |
1355 | csr &= ~SET_FX; | |
1356 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
1357 | __raw_writel(csr, creg); | |
1358 | udc->req_pending = 0; | |
1359 | } | |
1360 | } else if (udc->req_pending) { | |
1361 | /* | |
1362 | * AT91 hardware has a hard time with this | |
1363 | * "deferred response" mode for control-OUT | |
1364 | * transfers. (For control-IN it's fine.) | |
1365 | * | |
1366 | * The normal solution leaves OUT data in the | |
1367 | * fifo until the gadget driver is ready. | |
1368 | * We couldn't do that here without disabling | |
1369 | * the IRQ that tells about SETUP packets, | |
1370 | * e.g. when the host gets impatient... | |
1371 | * | |
1372 | * Working around it by copying into a buffer | |
1373 | * would almost be a non-deferred response, | |
1374 | * except that it wouldn't permit reliable | |
1375 | * stalling of the request. Instead, demand | |
1376 | * that gadget drivers not use this mode. | |
1377 | */ | |
1378 | DBG("no control-OUT deferred responses!\n"); | |
1379 | __raw_writel(csr | AT91_UDP_FORCESTALL, creg); | |
1380 | udc->req_pending = 0; | |
1381 | } | |
1382 | ||
1383 | /* STATUS stage for control-IN; ack. */ | |
1384 | } else { | |
1385 | PACKET("ep0 out/status ACK\n"); | |
1386 | __raw_writel(csr, creg); | |
1387 | ||
1388 | /* "early" status stage */ | |
1389 | if (req) | |
1390 | done(ep0, req, 0); | |
1391 | } | |
1392 | } | |
1393 | } | |
1394 | ||
7d12e780 | 1395 | static irqreturn_t at91_udc_irq (int irq, void *_udc) |
bae4bd84 DB |
1396 | { |
1397 | struct at91_udc *udc = _udc; | |
1398 | u32 rescans = 5; | |
c6c35237 | 1399 | int disable_clock = 0; |
4f4c5e36 HH |
1400 | unsigned long flags; |
1401 | ||
1402 | spin_lock_irqsave(&udc->lock, flags); | |
c6c35237 HH |
1403 | |
1404 | if (!udc->clocked) { | |
1405 | clk_on(udc); | |
1406 | disable_clock = 1; | |
1407 | } | |
bae4bd84 DB |
1408 | |
1409 | while (rescans--) { | |
8b2e7668 | 1410 | u32 status; |
bae4bd84 | 1411 | |
ffd3326b AV |
1412 | status = at91_udp_read(udc, AT91_UDP_ISR) |
1413 | & at91_udp_read(udc, AT91_UDP_IMR); | |
bae4bd84 DB |
1414 | if (!status) |
1415 | break; | |
1416 | ||
1417 | /* USB reset irq: not maskable */ | |
1418 | if (status & AT91_UDP_ENDBUSRES) { | |
ffd3326b AV |
1419 | at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); |
1420 | at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); | |
bae4bd84 | 1421 | /* Atmel code clears this irq twice */ |
ffd3326b AV |
1422 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
1423 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); | |
bae4bd84 DB |
1424 | VDBG("end bus reset\n"); |
1425 | udc->addr = 0; | |
1426 | stop_activity(udc); | |
1427 | ||
1428 | /* enable ep0 */ | |
ffd3326b | 1429 | at91_udp_write(udc, AT91_UDP_CSR(0), |
8b2e7668 | 1430 | AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); |
bae4bd84 DB |
1431 | udc->gadget.speed = USB_SPEED_FULL; |
1432 | udc->suspended = 0; | |
ffd3326b | 1433 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); |
bae4bd84 DB |
1434 | |
1435 | /* | |
1436 | * NOTE: this driver keeps clocks off unless the | |
8b2e7668 DB |
1437 | * USB host is present. That saves power, but for |
1438 | * boards that don't support VBUS detection, both | |
1439 | * clocks need to be active most of the time. | |
bae4bd84 DB |
1440 | */ |
1441 | ||
1442 | /* host initiated suspend (3+ms bus idle) */ | |
1443 | } else if (status & AT91_UDP_RXSUSP) { | |
ffd3326b AV |
1444 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); |
1445 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); | |
1446 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); | |
1a8060d9 | 1447 | /* VDBG("bus suspend\n"); */ |
bae4bd84 DB |
1448 | if (udc->suspended) |
1449 | continue; | |
1450 | udc->suspended = 1; | |
1451 | ||
1452 | /* | |
1453 | * NOTE: when suspending a VBUS-powered device, the | |
1454 | * gadget driver should switch into slow clock mode | |
1455 | * and then into standby to avoid drawing more than | |
1456 | * 500uA power (2500uA for some high-power configs). | |
1457 | */ | |
4f4c5e36 HH |
1458 | if (udc->driver && udc->driver->suspend) { |
1459 | spin_unlock(&udc->lock); | |
bae4bd84 | 1460 | udc->driver->suspend(&udc->gadget); |
4f4c5e36 HH |
1461 | spin_lock(&udc->lock); |
1462 | } | |
bae4bd84 DB |
1463 | |
1464 | /* host initiated resume */ | |
1465 | } else if (status & AT91_UDP_RXRSM) { | |
ffd3326b AV |
1466 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
1467 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); | |
1468 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); | |
1a8060d9 | 1469 | /* VDBG("bus resume\n"); */ |
bae4bd84 DB |
1470 | if (!udc->suspended) |
1471 | continue; | |
1472 | udc->suspended = 0; | |
1473 | ||
1474 | /* | |
1475 | * NOTE: for a VBUS-powered device, the gadget driver | |
1476 | * would normally want to switch out of slow clock | |
1477 | * mode into normal mode. | |
1478 | */ | |
4f4c5e36 HH |
1479 | if (udc->driver && udc->driver->resume) { |
1480 | spin_unlock(&udc->lock); | |
bae4bd84 | 1481 | udc->driver->resume(&udc->gadget); |
4f4c5e36 HH |
1482 | spin_lock(&udc->lock); |
1483 | } | |
bae4bd84 DB |
1484 | |
1485 | /* endpoint IRQs are cleared by handling them */ | |
1486 | } else { | |
1487 | int i; | |
1488 | unsigned mask = 1; | |
1489 | struct at91_ep *ep = &udc->ep[1]; | |
1490 | ||
1491 | if (status & mask) | |
1492 | handle_ep0(udc); | |
1493 | for (i = 1; i < NUM_ENDPOINTS; i++) { | |
1494 | mask <<= 1; | |
1495 | if (status & mask) | |
1496 | handle_ep(ep); | |
1497 | ep++; | |
1498 | } | |
1499 | } | |
1500 | } | |
1501 | ||
c6c35237 HH |
1502 | if (disable_clock) |
1503 | clk_off(udc); | |
1504 | ||
4f4c5e36 HH |
1505 | spin_unlock_irqrestore(&udc->lock, flags); |
1506 | ||
bae4bd84 DB |
1507 | return IRQ_HANDLED; |
1508 | } | |
1509 | ||
1510 | /*-------------------------------------------------------------------------*/ | |
1511 | ||
8b2e7668 DB |
1512 | static void nop_release(struct device *dev) |
1513 | { | |
1514 | /* nothing to free */ | |
1515 | } | |
1516 | ||
bae4bd84 DB |
1517 | static struct at91_udc controller = { |
1518 | .gadget = { | |
8b2e7668 DB |
1519 | .ops = &at91_udc_ops, |
1520 | .ep0 = &controller.ep[0].ep, | |
1521 | .name = driver_name, | |
1522 | .dev = { | |
c682b170 | 1523 | .init_name = "gadget", |
8b2e7668 | 1524 | .release = nop_release, |
bae4bd84 DB |
1525 | } |
1526 | }, | |
1527 | .ep[0] = { | |
1528 | .ep = { | |
1529 | .name = ep0name, | |
1530 | .ops = &at91_ep_ops, | |
1531 | }, | |
1532 | .udc = &controller, | |
1533 | .maxpacket = 8, | |
bae4bd84 DB |
1534 | .int_mask = 1 << 0, |
1535 | }, | |
1536 | .ep[1] = { | |
1537 | .ep = { | |
1538 | .name = "ep1", | |
1539 | .ops = &at91_ep_ops, | |
1540 | }, | |
1541 | .udc = &controller, | |
1542 | .is_pingpong = 1, | |
1543 | .maxpacket = 64, | |
bae4bd84 DB |
1544 | .int_mask = 1 << 1, |
1545 | }, | |
1546 | .ep[2] = { | |
1547 | .ep = { | |
1548 | .name = "ep2", | |
1549 | .ops = &at91_ep_ops, | |
1550 | }, | |
1551 | .udc = &controller, | |
1552 | .is_pingpong = 1, | |
1553 | .maxpacket = 64, | |
bae4bd84 DB |
1554 | .int_mask = 1 << 2, |
1555 | }, | |
1556 | .ep[3] = { | |
1557 | .ep = { | |
1558 | /* could actually do bulk too */ | |
1559 | .name = "ep3-int", | |
1560 | .ops = &at91_ep_ops, | |
1561 | }, | |
1562 | .udc = &controller, | |
1563 | .maxpacket = 8, | |
bae4bd84 DB |
1564 | .int_mask = 1 << 3, |
1565 | }, | |
1566 | .ep[4] = { | |
1567 | .ep = { | |
1568 | .name = "ep4", | |
1569 | .ops = &at91_ep_ops, | |
1570 | }, | |
1571 | .udc = &controller, | |
1572 | .is_pingpong = 1, | |
1573 | .maxpacket = 256, | |
bae4bd84 DB |
1574 | .int_mask = 1 << 4, |
1575 | }, | |
1576 | .ep[5] = { | |
1577 | .ep = { | |
1578 | .name = "ep5", | |
1579 | .ops = &at91_ep_ops, | |
1580 | }, | |
1581 | .udc = &controller, | |
1582 | .is_pingpong = 1, | |
1583 | .maxpacket = 256, | |
bae4bd84 DB |
1584 | .int_mask = 1 << 5, |
1585 | }, | |
8b2e7668 | 1586 | /* ep6 and ep7 are also reserved (custom silicon might use them) */ |
bae4bd84 DB |
1587 | }; |
1588 | ||
4037242c RM |
1589 | static void at91_vbus_update(struct at91_udc *udc, unsigned value) |
1590 | { | |
1591 | value ^= udc->board.vbus_active_low; | |
1592 | if (value != udc->vbus) | |
1593 | at91_vbus_session(&udc->gadget, value); | |
1594 | } | |
1595 | ||
7d12e780 | 1596 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) |
bae4bd84 DB |
1597 | { |
1598 | struct at91_udc *udc = _udc; | |
bae4bd84 DB |
1599 | |
1600 | /* vbus needs at least brief debouncing */ | |
1601 | udelay(10); | |
4037242c | 1602 | at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin)); |
bae4bd84 DB |
1603 | |
1604 | return IRQ_HANDLED; | |
1605 | } | |
1606 | ||
4037242c RM |
1607 | static void at91_vbus_timer_work(struct work_struct *work) |
1608 | { | |
1609 | struct at91_udc *udc = container_of(work, struct at91_udc, | |
1610 | vbus_timer_work); | |
1611 | ||
1612 | at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin)); | |
1613 | ||
1614 | if (!timer_pending(&udc->vbus_timer)) | |
1615 | mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); | |
1616 | } | |
1617 | ||
1618 | static void at91_vbus_timer(unsigned long data) | |
1619 | { | |
1620 | struct at91_udc *udc = (struct at91_udc *)data; | |
1621 | ||
1622 | /* | |
1623 | * If we are polling vbus it is likely that the gpio is on an | |
1624 | * bus such as i2c or spi which may sleep, so schedule some work | |
1625 | * to read the vbus gpio | |
1626 | */ | |
1627 | if (!work_pending(&udc->vbus_timer_work)) | |
1628 | schedule_work(&udc->vbus_timer_work); | |
1629 | } | |
1630 | ||
0f91349b | 1631 | static int at91_start(struct usb_gadget_driver *driver, |
b0fca50f | 1632 | int (*bind)(struct usb_gadget *)) |
bae4bd84 DB |
1633 | { |
1634 | struct at91_udc *udc = &controller; | |
1635 | int retval; | |
4f4c5e36 | 1636 | unsigned long flags; |
bae4bd84 DB |
1637 | |
1638 | if (!driver | |
7177aed4 | 1639 | || driver->max_speed < USB_SPEED_FULL |
b0fca50f | 1640 | || !bind |
bae4bd84 DB |
1641 | || !driver->setup) { |
1642 | DBG("bad parameter.\n"); | |
1643 | return -EINVAL; | |
1644 | } | |
1645 | ||
1646 | if (udc->driver) { | |
1647 | DBG("UDC already has a gadget driver\n"); | |
1648 | return -EBUSY; | |
1649 | } | |
1650 | ||
1651 | udc->driver = driver; | |
1652 | udc->gadget.dev.driver = &driver->driver; | |
839214ae | 1653 | dev_set_drvdata(&udc->gadget.dev, &driver->driver); |
bae4bd84 DB |
1654 | udc->enabled = 1; |
1655 | udc->selfpowered = 1; | |
1656 | ||
b0fca50f | 1657 | retval = bind(&udc->gadget); |
bae4bd84 | 1658 | if (retval) { |
b0fca50f | 1659 | DBG("bind() returned %d\n", retval); |
bae4bd84 | 1660 | udc->driver = NULL; |
943c4419 | 1661 | udc->gadget.dev.driver = NULL; |
839214ae | 1662 | dev_set_drvdata(&udc->gadget.dev, NULL); |
943c4419 WK |
1663 | udc->enabled = 0; |
1664 | udc->selfpowered = 0; | |
bae4bd84 DB |
1665 | return retval; |
1666 | } | |
1667 | ||
4f4c5e36 | 1668 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1669 | pullup(udc, 1); |
4f4c5e36 | 1670 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1671 | |
1672 | DBG("bound to %s\n", driver->driver.name); | |
1673 | return 0; | |
1674 | } | |
bae4bd84 | 1675 | |
0f91349b | 1676 | static int at91_stop(struct usb_gadget_driver *driver) |
bae4bd84 DB |
1677 | { |
1678 | struct at91_udc *udc = &controller; | |
4f4c5e36 | 1679 | unsigned long flags; |
bae4bd84 | 1680 | |
6bea476c | 1681 | if (!driver || driver != udc->driver || !driver->unbind) |
bae4bd84 DB |
1682 | return -EINVAL; |
1683 | ||
4f4c5e36 | 1684 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1685 | udc->enabled = 0; |
ffd3326b | 1686 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
bae4bd84 | 1687 | pullup(udc, 0); |
4f4c5e36 | 1688 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1689 | |
1690 | driver->unbind(&udc->gadget); | |
eb0be47d | 1691 | udc->gadget.dev.driver = NULL; |
839214ae | 1692 | dev_set_drvdata(&udc->gadget.dev, NULL); |
bae4bd84 DB |
1693 | udc->driver = NULL; |
1694 | ||
1695 | DBG("unbound from %s\n", driver->driver.name); | |
1696 | return 0; | |
1697 | } | |
bae4bd84 DB |
1698 | |
1699 | /*-------------------------------------------------------------------------*/ | |
1700 | ||
1701 | static void at91udc_shutdown(struct platform_device *dev) | |
1702 | { | |
4f4c5e36 HH |
1703 | struct at91_udc *udc = platform_get_drvdata(dev); |
1704 | unsigned long flags; | |
1705 | ||
bae4bd84 | 1706 | /* force disconnect on reboot */ |
4f4c5e36 | 1707 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1708 | pullup(platform_get_drvdata(dev), 0); |
4f4c5e36 | 1709 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1710 | } |
1711 | ||
d1494a34 JCPV |
1712 | static void __devinit at91udc_of_init(struct at91_udc *udc, |
1713 | struct device_node *np) | |
1714 | { | |
1715 | struct at91_udc_data *board = &udc->board; | |
1716 | u32 val; | |
1717 | enum of_gpio_flags flags; | |
1718 | ||
1719 | if (of_property_read_u32(np, "atmel,vbus-polled", &val) == 0) | |
1720 | board->vbus_polled = 1; | |
1721 | ||
1722 | board->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0, | |
1723 | &flags); | |
1724 | board->vbus_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
1725 | ||
1726 | board->pullup_pin = of_get_named_gpio_flags(np, "atmel,pullup-gpio", 0, | |
1727 | &flags); | |
1728 | ||
1729 | board->pullup_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
1730 | } | |
1731 | ||
1732 | static int __devinit at91udc_probe(struct platform_device *pdev) | |
bae4bd84 DB |
1733 | { |
1734 | struct device *dev = &pdev->dev; | |
1735 | struct at91_udc *udc; | |
1736 | int retval; | |
ffd3326b | 1737 | struct resource *res; |
bae4bd84 DB |
1738 | |
1739 | if (!dev->platform_data) { | |
1740 | /* small (so we copy it) but critical! */ | |
1741 | DBG("missing platform_data\n"); | |
1742 | return -ENODEV; | |
1743 | } | |
1744 | ||
8b2e7668 | 1745 | if (pdev->num_resources != 2) { |
f3db6e82 | 1746 | DBG("invalid num_resources\n"); |
8b2e7668 DB |
1747 | return -ENODEV; |
1748 | } | |
1749 | if ((pdev->resource[0].flags != IORESOURCE_MEM) | |
1750 | || (pdev->resource[1].flags != IORESOURCE_IRQ)) { | |
f3db6e82 | 1751 | DBG("invalid resource type\n"); |
8b2e7668 DB |
1752 | return -ENODEV; |
1753 | } | |
1754 | ||
ffd3326b AV |
1755 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1756 | if (!res) | |
1757 | return -ENXIO; | |
1758 | ||
d8bb0fd2 | 1759 | if (!request_mem_region(res->start, resource_size(res), driver_name)) { |
bae4bd84 DB |
1760 | DBG("someone's using UDC memory\n"); |
1761 | return -EBUSY; | |
1762 | } | |
1763 | ||
1764 | /* init software state */ | |
1765 | udc = &controller; | |
1766 | udc->gadget.dev.parent = dev; | |
d1494a34 JCPV |
1767 | if (pdev->dev.of_node) |
1768 | at91udc_of_init(udc, pdev->dev.of_node); | |
1769 | else | |
1770 | memcpy(&udc->board, dev->platform_data, | |
1771 | sizeof(struct at91_udc_data)); | |
bae4bd84 | 1772 | udc->pdev = pdev; |
bae4bd84 | 1773 | udc->enabled = 0; |
4f4c5e36 | 1774 | spin_lock_init(&udc->lock); |
bae4bd84 | 1775 | |
f3db6e82 DB |
1776 | /* rm9200 needs manual D+ pullup; off by default */ |
1777 | if (cpu_is_at91rm9200()) { | |
3285e0ec | 1778 | if (gpio_is_valid(udc->board.pullup_pin)) { |
f3db6e82 DB |
1779 | DBG("no D+ pullup?\n"); |
1780 | retval = -ENODEV; | |
1781 | goto fail0; | |
1782 | } | |
1783 | retval = gpio_request(udc->board.pullup_pin, "udc_pullup"); | |
1784 | if (retval) { | |
1785 | DBG("D+ pullup is busy\n"); | |
1786 | goto fail0; | |
1787 | } | |
1788 | gpio_direction_output(udc->board.pullup_pin, | |
1789 | udc->board.pullup_active_low); | |
1790 | } | |
1791 | ||
bb24280f | 1792 | /* newer chips have more FIFO memory than rm9200 */ |
bf1f0a05 | 1793 | if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) { |
bb24280f DB |
1794 | udc->ep[0].maxpacket = 64; |
1795 | udc->ep[3].maxpacket = 64; | |
1796 | udc->ep[4].maxpacket = 512; | |
1797 | udc->ep[5].maxpacket = 512; | |
23f6d914 | 1798 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
bb24280f DB |
1799 | udc->ep[3].maxpacket = 64; |
1800 | } else if (cpu_is_at91sam9263()) { | |
1801 | udc->ep[0].maxpacket = 64; | |
1802 | udc->ep[3].maxpacket = 64; | |
1803 | } | |
1804 | ||
d8bb0fd2 | 1805 | udc->udp_baseaddr = ioremap(res->start, resource_size(res)); |
ffd3326b | 1806 | if (!udc->udp_baseaddr) { |
f3db6e82 DB |
1807 | retval = -ENOMEM; |
1808 | goto fail0a; | |
ffd3326b AV |
1809 | } |
1810 | ||
1811 | udc_reinit(udc); | |
1812 | ||
bae4bd84 DB |
1813 | /* get interface and function clocks */ |
1814 | udc->iclk = clk_get(dev, "udc_clk"); | |
1815 | udc->fclk = clk_get(dev, "udpck"); | |
1816 | if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk)) { | |
1817 | DBG("clocks missing\n"); | |
29ba4b53 | 1818 | retval = -ENODEV; |
f3db6e82 DB |
1819 | /* NOTE: we "know" here that refcounts on these are NOPs */ |
1820 | goto fail0b; | |
bae4bd84 DB |
1821 | } |
1822 | ||
1823 | retval = device_register(&udc->gadget.dev); | |
8ab10400 RR |
1824 | if (retval < 0) { |
1825 | put_device(&udc->gadget.dev); | |
f3db6e82 | 1826 | goto fail0b; |
8ab10400 | 1827 | } |
bae4bd84 | 1828 | |
8b2e7668 DB |
1829 | /* don't do anything until we have both gadget driver and VBUS */ |
1830 | clk_enable(udc->iclk); | |
ffd3326b AV |
1831 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
1832 | at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); | |
29ba4b53 AV |
1833 | /* Clear all pending interrupts - UDP may be used by bootloader. */ |
1834 | at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); | |
8b2e7668 | 1835 | clk_disable(udc->iclk); |
bae4bd84 DB |
1836 | |
1837 | /* request UDC and maybe VBUS irqs */ | |
8b2e7668 | 1838 | udc->udp_irq = platform_get_irq(pdev, 0); |
f3db6e82 | 1839 | retval = request_irq(udc->udp_irq, at91_udc_irq, |
b5dd18d8 | 1840 | 0, driver_name, udc); |
f3db6e82 | 1841 | if (retval < 0) { |
8b2e7668 | 1842 | DBG("request irq %d failed\n", udc->udp_irq); |
bae4bd84 DB |
1843 | goto fail1; |
1844 | } | |
3285e0ec | 1845 | if (gpio_is_valid(udc->board.vbus_pin)) { |
f3db6e82 DB |
1846 | retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); |
1847 | if (retval < 0) { | |
1848 | DBG("request vbus pin failed\n"); | |
1849 | goto fail2; | |
1850 | } | |
1851 | gpio_direction_input(udc->board.vbus_pin); | |
1852 | ||
29ba4b53 AV |
1853 | /* |
1854 | * Get the initial state of VBUS - we cannot expect | |
1855 | * a pending interrupt. | |
1856 | */ | |
4037242c RM |
1857 | udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^ |
1858 | udc->board.vbus_active_low; | |
1859 | ||
1860 | if (udc->board.vbus_polled) { | |
1861 | INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work); | |
1862 | setup_timer(&udc->vbus_timer, at91_vbus_timer, | |
1863 | (unsigned long)udc); | |
1864 | mod_timer(&udc->vbus_timer, | |
1865 | jiffies + VBUS_POLL_TIMEOUT); | |
1866 | } else { | |
1867 | if (request_irq(udc->board.vbus_pin, at91_vbus_irq, | |
b5dd18d8 | 1868 | 0, driver_name, udc)) { |
4037242c RM |
1869 | DBG("request vbus irq %d failed\n", |
1870 | udc->board.vbus_pin); | |
1871 | retval = -EBUSY; | |
1872 | goto fail3; | |
1873 | } | |
bae4bd84 DB |
1874 | } |
1875 | } else { | |
1876 | DBG("no VBUS detection, assuming always-on\n"); | |
1877 | udc->vbus = 1; | |
1878 | } | |
0f91349b SAS |
1879 | retval = usb_add_gadget_udc(dev, &udc->gadget); |
1880 | if (retval) | |
1881 | goto fail4; | |
bae4bd84 | 1882 | dev_set_drvdata(dev, udc); |
8b2e7668 | 1883 | device_init_wakeup(dev, 1); |
bae4bd84 DB |
1884 | create_debug_file(udc); |
1885 | ||
1886 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); | |
1887 | return 0; | |
0f91349b | 1888 | fail4: |
3285e0ec | 1889 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled) |
0f91349b | 1890 | free_irq(udc->board.vbus_pin, udc); |
f3db6e82 | 1891 | fail3: |
3285e0ec | 1892 | if (gpio_is_valid(udc->board.vbus_pin)) |
f3db6e82 DB |
1893 | gpio_free(udc->board.vbus_pin); |
1894 | fail2: | |
1895 | free_irq(udc->udp_irq, udc); | |
bae4bd84 DB |
1896 | fail1: |
1897 | device_unregister(&udc->gadget.dev); | |
f3db6e82 DB |
1898 | fail0b: |
1899 | iounmap(udc->udp_baseaddr); | |
1900 | fail0a: | |
1901 | if (cpu_is_at91rm9200()) | |
1902 | gpio_free(udc->board.pullup_pin); | |
bae4bd84 | 1903 | fail0: |
d8bb0fd2 | 1904 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 DB |
1905 | DBG("%s probe failed, %d\n", driver_name, retval); |
1906 | return retval; | |
1907 | } | |
1908 | ||
398acce7 | 1909 | static int __exit at91udc_remove(struct platform_device *pdev) |
bae4bd84 | 1910 | { |
8b2e7668 | 1911 | struct at91_udc *udc = platform_get_drvdata(pdev); |
ffd3326b | 1912 | struct resource *res; |
4f4c5e36 | 1913 | unsigned long flags; |
bae4bd84 DB |
1914 | |
1915 | DBG("remove\n"); | |
1916 | ||
0f91349b | 1917 | usb_del_gadget_udc(&udc->gadget); |
6bea476c DB |
1918 | if (udc->driver) |
1919 | return -EBUSY; | |
bae4bd84 | 1920 | |
4f4c5e36 | 1921 | spin_lock_irqsave(&udc->lock, flags); |
6bea476c | 1922 | pullup(udc, 0); |
4f4c5e36 | 1923 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1924 | |
8b2e7668 | 1925 | device_init_wakeup(&pdev->dev, 0); |
bae4bd84 | 1926 | remove_debug_file(udc); |
3285e0ec | 1927 | if (gpio_is_valid(udc->board.vbus_pin)) { |
bae4bd84 | 1928 | free_irq(udc->board.vbus_pin, udc); |
f3db6e82 DB |
1929 | gpio_free(udc->board.vbus_pin); |
1930 | } | |
8b2e7668 | 1931 | free_irq(udc->udp_irq, udc); |
bae4bd84 | 1932 | device_unregister(&udc->gadget.dev); |
ffd3326b AV |
1933 | |
1934 | iounmap(udc->udp_baseaddr); | |
f3db6e82 DB |
1935 | |
1936 | if (cpu_is_at91rm9200()) | |
1937 | gpio_free(udc->board.pullup_pin); | |
1938 | ||
ffd3326b | 1939 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
d8bb0fd2 | 1940 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 DB |
1941 | |
1942 | clk_put(udc->iclk); | |
1943 | clk_put(udc->fclk); | |
1944 | ||
1945 | return 0; | |
1946 | } | |
1947 | ||
1948 | #ifdef CONFIG_PM | |
8b2e7668 | 1949 | static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) |
bae4bd84 | 1950 | { |
8b2e7668 DB |
1951 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1952 | int wake = udc->driver && device_may_wakeup(&pdev->dev); | |
4f4c5e36 | 1953 | unsigned long flags; |
bae4bd84 | 1954 | |
8b2e7668 DB |
1955 | /* Unless we can act normally to the host (letting it wake us up |
1956 | * whenever it has work for us) force disconnect. Wakeup requires | |
1957 | * PLLB for USB events (signaling for reset, wakeup, or incoming | |
1958 | * tokens) and VBUS irqs (on systems which support them). | |
bae4bd84 | 1959 | */ |
8b2e7668 DB |
1960 | if ((!udc->suspended && udc->addr) |
1961 | || !wake | |
1962 | || at91_suspend_entering_slow_clock()) { | |
4f4c5e36 | 1963 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1964 | pullup(udc, 0); |
66e56ce7 | 1965 | wake = 0; |
4f4c5e36 | 1966 | spin_unlock_irqrestore(&udc->lock, flags); |
8b2e7668 DB |
1967 | } else |
1968 | enable_irq_wake(udc->udp_irq); | |
1969 | ||
66e56ce7 | 1970 | udc->active_suspend = wake; |
3285e0ec | 1971 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake) |
66e56ce7 | 1972 | enable_irq_wake(udc->board.vbus_pin); |
bae4bd84 DB |
1973 | return 0; |
1974 | } | |
1975 | ||
8b2e7668 | 1976 | static int at91udc_resume(struct platform_device *pdev) |
bae4bd84 | 1977 | { |
8b2e7668 | 1978 | struct at91_udc *udc = platform_get_drvdata(pdev); |
4f4c5e36 | 1979 | unsigned long flags; |
bae4bd84 | 1980 | |
3285e0ec | 1981 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && |
4037242c | 1982 | udc->active_suspend) |
66e56ce7 DB |
1983 | disable_irq_wake(udc->board.vbus_pin); |
1984 | ||
bae4bd84 | 1985 | /* maybe reconnect to host; if so, clocks on */ |
66e56ce7 DB |
1986 | if (udc->active_suspend) |
1987 | disable_irq_wake(udc->udp_irq); | |
4f4c5e36 HH |
1988 | else { |
1989 | spin_lock_irqsave(&udc->lock, flags); | |
66e56ce7 | 1990 | pullup(udc, 1); |
4f4c5e36 HH |
1991 | spin_unlock_irqrestore(&udc->lock, flags); |
1992 | } | |
bae4bd84 DB |
1993 | return 0; |
1994 | } | |
1995 | #else | |
1996 | #define at91udc_suspend NULL | |
1997 | #define at91udc_resume NULL | |
1998 | #endif | |
1999 | ||
d1494a34 JCPV |
2000 | #if defined(CONFIG_OF) |
2001 | static const struct of_device_id at91_udc_dt_ids[] = { | |
2002 | { .compatible = "atmel,at91rm9200-udc" }, | |
2003 | { /* sentinel */ } | |
2004 | }; | |
2005 | ||
2006 | MODULE_DEVICE_TABLE(of, at91_udc_dt_ids); | |
2007 | #endif | |
2008 | ||
dee497df | 2009 | static struct platform_driver at91_udc_driver = { |
398acce7 | 2010 | .remove = __exit_p(at91udc_remove), |
bae4bd84 DB |
2011 | .shutdown = at91udc_shutdown, |
2012 | .suspend = at91udc_suspend, | |
8b2e7668 | 2013 | .resume = at91udc_resume, |
bae4bd84 DB |
2014 | .driver = { |
2015 | .name = (char *) driver_name, | |
2016 | .owner = THIS_MODULE, | |
d1494a34 | 2017 | .of_match_table = of_match_ptr(at91_udc_dt_ids), |
bae4bd84 DB |
2018 | }, |
2019 | }; | |
2020 | ||
398acce7 | 2021 | static int __init udc_init_module(void) |
bae4bd84 | 2022 | { |
dee497df | 2023 | return platform_driver_probe(&at91_udc_driver, at91udc_probe); |
bae4bd84 DB |
2024 | } |
2025 | module_init(udc_init_module); | |
2026 | ||
398acce7 | 2027 | static void __exit udc_exit_module(void) |
bae4bd84 | 2028 | { |
dee497df | 2029 | platform_driver_unregister(&at91_udc_driver); |
bae4bd84 DB |
2030 | } |
2031 | module_exit(udc_exit_module); | |
2032 | ||
8b2e7668 | 2033 | MODULE_DESCRIPTION("AT91 udc driver"); |
bae4bd84 DB |
2034 | MODULE_AUTHOR("Thomas Rathbone, David Brownell"); |
2035 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2036 | MODULE_ALIAS("platform:at91_udc"); |