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1da177e4 LT |
1 | /* |
2 | * linux/drivers/usb/gadget/lh7a40x_udc.c | |
3 | * Sharp LH7A40x on-chip full speed USB device controllers | |
4 | * | |
5 | * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID | |
6 | * Copyright (C) 2004 Bo Henriksen, Nordic ID | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | ||
d052d1be RK |
24 | #include <linux/platform_device.h> |
25 | ||
1da177e4 LT |
26 | #include "lh7a40x_udc.h" |
27 | ||
28 | //#define DEBUG printk | |
29 | //#define DEBUG_EP0 printk | |
30 | //#define DEBUG_SETUP printk | |
31 | ||
32 | #ifndef DEBUG_EP0 | |
33 | # define DEBUG_EP0(fmt,args...) | |
34 | #endif | |
35 | #ifndef DEBUG_SETUP | |
36 | # define DEBUG_SETUP(fmt,args...) | |
37 | #endif | |
38 | #ifndef DEBUG | |
39 | # define NO_STATES | |
40 | # define DEBUG(fmt,args...) | |
41 | #endif | |
42 | ||
43 | #define DRIVER_DESC "LH7A40x USB Device Controller" | |
44 | #define DRIVER_VERSION __DATE__ | |
45 | ||
46 | #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */ | |
47 | #define _BIT(x) (1<<(x)) | |
48 | #endif | |
49 | ||
50 | struct lh7a40x_udc *the_controller; | |
51 | ||
52 | static const char driver_name[] = "lh7a40x_udc"; | |
53 | static const char driver_desc[] = DRIVER_DESC; | |
54 | static const char ep0name[] = "ep0-control"; | |
55 | ||
56 | /* | |
57 | Local definintions. | |
58 | */ | |
59 | ||
60 | #ifndef NO_STATES | |
61 | static char *state_names[] = { | |
62 | "WAIT_FOR_SETUP", | |
63 | "DATA_STATE_XMIT", | |
64 | "DATA_STATE_NEED_ZLP", | |
65 | "WAIT_FOR_OUT_STATUS", | |
66 | "DATA_STATE_RECV" | |
67 | }; | |
68 | #endif | |
69 | ||
70 | /* | |
71 | Local declarations. | |
72 | */ | |
73 | static int lh7a40x_ep_enable(struct usb_ep *ep, | |
74 | const struct usb_endpoint_descriptor *); | |
75 | static int lh7a40x_ep_disable(struct usb_ep *ep); | |
55016f10 | 76 | static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t); |
1da177e4 | 77 | static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *); |
55016f10 | 78 | static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t); |
1da177e4 LT |
79 | static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *); |
80 | static int lh7a40x_set_halt(struct usb_ep *ep, int); | |
81 | static int lh7a40x_fifo_status(struct usb_ep *ep); | |
1da177e4 LT |
82 | static void lh7a40x_fifo_flush(struct usb_ep *ep); |
83 | static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep); | |
84 | static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr); | |
85 | ||
86 | static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, | |
87 | int status); | |
88 | static void pio_irq_enable(int bEndpointAddress); | |
89 | static void pio_irq_disable(int bEndpointAddress); | |
90 | static void stop_activity(struct lh7a40x_udc *dev, | |
91 | struct usb_gadget_driver *driver); | |
92 | static void flush(struct lh7a40x_ep *ep); | |
93 | static void udc_enable(struct lh7a40x_udc *dev); | |
94 | static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address); | |
95 | ||
96 | static struct usb_ep_ops lh7a40x_ep_ops = { | |
97 | .enable = lh7a40x_ep_enable, | |
98 | .disable = lh7a40x_ep_disable, | |
99 | ||
100 | .alloc_request = lh7a40x_alloc_request, | |
101 | .free_request = lh7a40x_free_request, | |
102 | ||
1da177e4 LT |
103 | .queue = lh7a40x_queue, |
104 | .dequeue = lh7a40x_dequeue, | |
105 | ||
106 | .set_halt = lh7a40x_set_halt, | |
107 | .fifo_status = lh7a40x_fifo_status, | |
108 | .fifo_flush = lh7a40x_fifo_flush, | |
109 | }; | |
110 | ||
111 | /* Inline code */ | |
112 | ||
113 | static __inline__ int write_packet(struct lh7a40x_ep *ep, | |
114 | struct lh7a40x_request *req, int max) | |
115 | { | |
116 | u8 *buf; | |
117 | int length, count; | |
118 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
119 | ||
120 | buf = req->req.buf + req->req.actual; | |
121 | prefetch(buf); | |
122 | ||
123 | length = req->req.length - req->req.actual; | |
124 | length = min(length, max); | |
125 | req->req.actual += length; | |
126 | ||
127 | DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo); | |
128 | ||
129 | count = length; | |
130 | while (count--) { | |
131 | *fifo = *buf++; | |
132 | } | |
133 | ||
134 | return length; | |
135 | } | |
136 | ||
137 | static __inline__ void usb_set_index(u32 ep) | |
138 | { | |
139 | *(volatile u32 *)io_p2v(USB_INDEX) = ep; | |
140 | } | |
141 | ||
142 | static __inline__ u32 usb_read(u32 port) | |
143 | { | |
144 | return *(volatile u32 *)io_p2v(port); | |
145 | } | |
146 | ||
147 | static __inline__ void usb_write(u32 val, u32 port) | |
148 | { | |
149 | *(volatile u32 *)io_p2v(port) = val; | |
150 | } | |
151 | ||
152 | static __inline__ void usb_set(u32 val, u32 port) | |
153 | { | |
154 | volatile u32 *ioport = (volatile u32 *)io_p2v(port); | |
155 | u32 after = (*ioport) | val; | |
156 | *ioport = after; | |
157 | } | |
158 | ||
159 | static __inline__ void usb_clear(u32 val, u32 port) | |
160 | { | |
161 | volatile u32 *ioport = (volatile u32 *)io_p2v(port); | |
162 | u32 after = (*ioport) & ~val; | |
163 | *ioport = after; | |
164 | } | |
165 | ||
166 | /*-------------------------------------------------------------------------*/ | |
167 | ||
168 | #define GPIO_PORTC_DR (0x80000E08) | |
169 | #define GPIO_PORTC_DDR (0x80000E18) | |
170 | #define GPIO_PORTC_PDR (0x80000E70) | |
171 | ||
172 | /* get port C pin data register */ | |
173 | #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0) | |
174 | /* get port C data direction register */ | |
175 | #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0) | |
176 | /* set port C data register */ | |
177 | #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR)) | |
178 | /* set port C data direction register */ | |
179 | #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR)) | |
180 | ||
181 | /* | |
182 | * LPD7A404 GPIO's: | |
183 | * Port C bit 1 = USB Port 1 Power Enable | |
184 | * Port C bit 2 = USB Port 1 Data Carrier Detect | |
185 | */ | |
186 | #define is_usb_connected() get_portc_pdr(2) | |
187 | ||
188 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
189 | ||
190 | static const char proc_node_name[] = "driver/udc"; | |
191 | ||
192 | static int | |
193 | udc_proc_read(char *page, char **start, off_t off, int count, | |
194 | int *eof, void *_dev) | |
195 | { | |
196 | char *buf = page; | |
197 | struct lh7a40x_udc *dev = _dev; | |
198 | char *next = buf; | |
199 | unsigned size = count; | |
200 | unsigned long flags; | |
201 | int t; | |
202 | ||
203 | if (off != 0) | |
204 | return 0; | |
205 | ||
206 | local_irq_save(flags); | |
207 | ||
208 | /* basic device status */ | |
209 | t = scnprintf(next, size, | |
210 | DRIVER_DESC "\n" | |
211 | "%s version: %s\n" | |
212 | "Gadget driver: %s\n" | |
213 | "Host: %s\n\n", | |
214 | driver_name, DRIVER_VERSION, | |
215 | dev->driver ? dev->driver->driver.name : "(none)", | |
216 | is_usb_connected()? "full speed" : "disconnected"); | |
217 | size -= t; | |
218 | next += t; | |
219 | ||
220 | t = scnprintf(next, size, | |
221 | "GPIO:\n" | |
222 | " Port C bit 1: %d, dir %d\n" | |
223 | " Port C bit 2: %d, dir %d\n\n", | |
224 | get_portc_pdr(1), get_portc_ddr(1), | |
225 | get_portc_pdr(2), get_portc_ddr(2) | |
226 | ); | |
227 | size -= t; | |
228 | next += t; | |
229 | ||
230 | t = scnprintf(next, size, | |
231 | "DCP pullup: %d\n\n", | |
232 | (usb_read(USB_PM) & PM_USB_DCP) != 0); | |
233 | size -= t; | |
234 | next += t; | |
235 | ||
236 | local_irq_restore(flags); | |
237 | *eof = 1; | |
238 | return count - size; | |
239 | } | |
240 | ||
241 | #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev) | |
242 | #define remove_proc_files() remove_proc_entry(proc_node_name, NULL) | |
243 | ||
244 | #else /* !CONFIG_USB_GADGET_DEBUG_FILES */ | |
245 | ||
246 | #define create_proc_files() do {} while (0) | |
247 | #define remove_proc_files() do {} while (0) | |
248 | ||
249 | #endif /* CONFIG_USB_GADGET_DEBUG_FILES */ | |
250 | ||
251 | /* | |
252 | * udc_disable - disable USB device controller | |
253 | */ | |
254 | static void udc_disable(struct lh7a40x_udc *dev) | |
255 | { | |
441b62c1 | 256 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
257 | |
258 | udc_set_address(dev, 0); | |
259 | ||
260 | /* Disable interrupts */ | |
261 | usb_write(0, USB_IN_INT_EN); | |
262 | usb_write(0, USB_OUT_INT_EN); | |
263 | usb_write(0, USB_INT_EN); | |
264 | ||
265 | /* Disable the USB */ | |
266 | usb_write(0, USB_PM); | |
267 | ||
268 | #ifdef CONFIG_ARCH_LH7A404 | |
269 | /* Disable USB power */ | |
270 | set_portc_dr(1, 0); | |
271 | #endif | |
272 | ||
273 | /* if hardware supports it, disconnect from usb */ | |
274 | /* make_usb_disappear(); */ | |
275 | ||
276 | dev->ep0state = WAIT_FOR_SETUP; | |
277 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
278 | dev->usb_address = 0; | |
279 | } | |
280 | ||
281 | /* | |
282 | * udc_reinit - initialize software state | |
283 | */ | |
284 | static void udc_reinit(struct lh7a40x_udc *dev) | |
285 | { | |
286 | u32 i; | |
287 | ||
441b62c1 | 288 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
289 | |
290 | /* device/ep0 records init */ | |
291 | INIT_LIST_HEAD(&dev->gadget.ep_list); | |
292 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
293 | dev->ep0state = WAIT_FOR_SETUP; | |
294 | ||
295 | /* basic endpoint records init */ | |
296 | for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { | |
297 | struct lh7a40x_ep *ep = &dev->ep[i]; | |
298 | ||
299 | if (i != 0) | |
300 | list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); | |
301 | ||
302 | ep->desc = 0; | |
303 | ep->stopped = 0; | |
304 | INIT_LIST_HEAD(&ep->queue); | |
305 | ep->pio_irqs = 0; | |
306 | } | |
307 | ||
308 | /* the rest was statically initialized, and is read-only */ | |
309 | } | |
310 | ||
311 | #define BYTES2MAXP(x) (x / 8) | |
312 | #define MAXP2BYTES(x) (x * 8) | |
313 | ||
314 | /* until it's enabled, this UDC should be completely invisible | |
315 | * to any USB host. | |
316 | */ | |
317 | static void udc_enable(struct lh7a40x_udc *dev) | |
318 | { | |
319 | int ep; | |
320 | ||
441b62c1 | 321 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
322 | |
323 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
324 | ||
325 | #ifdef CONFIG_ARCH_LH7A404 | |
326 | /* Set Port C bit 1 & 2 as output */ | |
327 | set_portc_ddr(1, 1); | |
328 | set_portc_ddr(2, 1); | |
329 | ||
330 | /* Enable USB power */ | |
331 | set_portc_dr(1, 0); | |
332 | #endif | |
333 | ||
334 | /* | |
335 | * C.f Chapter 18.1.3.1 Initializing the USB | |
336 | */ | |
337 | ||
338 | /* Disable the USB */ | |
339 | usb_clear(PM_USB_ENABLE, USB_PM); | |
340 | ||
341 | /* Reset APB & I/O sides of the USB */ | |
342 | usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET); | |
343 | mdelay(5); | |
344 | usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET); | |
345 | ||
346 | /* Set MAXP values for each */ | |
347 | for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) { | |
348 | struct lh7a40x_ep *ep_reg = &dev->ep[ep]; | |
349 | u32 csr; | |
350 | ||
351 | usb_set_index(ep); | |
352 | ||
353 | switch (ep_reg->ep_type) { | |
354 | case ep_bulk_in: | |
355 | case ep_interrupt: | |
356 | usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET, | |
357 | ep_reg->csr2); | |
358 | /* Fall through */ | |
359 | case ep_control: | |
360 | usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)), | |
361 | USB_IN_MAXP); | |
362 | break; | |
363 | case ep_bulk_out: | |
364 | usb_clear(USB_OUT_CSR2_USB_DMA_EN | | |
365 | USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2); | |
366 | usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)), | |
367 | USB_OUT_MAXP); | |
368 | break; | |
369 | } | |
370 | ||
371 | /* Read & Write CSR1, just in case */ | |
372 | csr = usb_read(ep_reg->csr1); | |
373 | usb_write(csr, ep_reg->csr1); | |
374 | ||
375 | flush(ep_reg); | |
376 | } | |
377 | ||
378 | /* Disable interrupts */ | |
379 | usb_write(0, USB_IN_INT_EN); | |
380 | usb_write(0, USB_OUT_INT_EN); | |
381 | usb_write(0, USB_INT_EN); | |
382 | ||
383 | /* Enable interrupts */ | |
384 | usb_set(USB_IN_INT_EP0, USB_IN_INT_EN); | |
385 | usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN); | |
386 | /* Dont enable rest of the interrupts */ | |
387 | /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN); | |
388 | usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */ | |
389 | ||
390 | /* Enable SUSPEND */ | |
391 | usb_set(PM_ENABLE_SUSPEND, USB_PM); | |
392 | ||
393 | /* Enable the USB */ | |
394 | usb_set(PM_USB_ENABLE, USB_PM); | |
395 | ||
396 | #ifdef CONFIG_ARCH_LH7A404 | |
397 | /* NOTE: DOES NOT WORK! */ | |
398 | /* Let host detect UDC: | |
399 | * Software must write a 0 to the PMR:DCP_CTRL bit to turn this | |
400 | * transistor on and pull the USBDP pin HIGH. | |
401 | */ | |
402 | /* usb_clear(PM_USB_DCP, USB_PM); | |
403 | usb_set(PM_USB_DCP, USB_PM); */ | |
404 | #endif | |
405 | } | |
406 | ||
407 | /* | |
408 | Register entry point for the peripheral controller driver. | |
409 | */ | |
410 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
411 | { | |
412 | struct lh7a40x_udc *dev = the_controller; | |
413 | int retval; | |
414 | ||
441b62c1 | 415 | DEBUG("%s: %s\n", __func__, driver->driver.name); |
1da177e4 LT |
416 | |
417 | if (!driver | |
6bea476c DB |
418 | || driver->speed != USB_SPEED_FULL |
419 | || !driver->bind | |
420 | || !driver->disconnect | |
421 | || !driver->setup) | |
1da177e4 LT |
422 | return -EINVAL; |
423 | if (!dev) | |
424 | return -ENODEV; | |
425 | if (dev->driver) | |
426 | return -EBUSY; | |
427 | ||
428 | /* first hook up the driver ... */ | |
429 | dev->driver = driver; | |
430 | dev->gadget.dev.driver = &driver->driver; | |
431 | ||
432 | device_add(&dev->gadget.dev); | |
433 | retval = driver->bind(&dev->gadget); | |
434 | if (retval) { | |
435 | printk("%s: bind to driver %s --> error %d\n", dev->gadget.name, | |
436 | driver->driver.name, retval); | |
437 | device_del(&dev->gadget.dev); | |
438 | ||
439 | dev->driver = 0; | |
440 | dev->gadget.dev.driver = 0; | |
441 | return retval; | |
442 | } | |
443 | ||
444 | /* ... then enable host detection and ep0; and we're ready | |
445 | * for set_configuration as well as eventual disconnect. | |
446 | * NOTE: this shouldn't power up until later. | |
447 | */ | |
448 | printk("%s: registered gadget driver '%s'\n", dev->gadget.name, | |
449 | driver->driver.name); | |
450 | ||
451 | udc_enable(dev); | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
457 | ||
458 | /* | |
459 | Unregister entry point for the peripheral controller driver. | |
460 | */ | |
461 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
462 | { | |
463 | struct lh7a40x_udc *dev = the_controller; | |
464 | unsigned long flags; | |
465 | ||
466 | if (!dev) | |
467 | return -ENODEV; | |
6bea476c | 468 | if (!driver || driver != dev->driver || !driver->unbind) |
1da177e4 LT |
469 | return -EINVAL; |
470 | ||
471 | spin_lock_irqsave(&dev->lock, flags); | |
472 | dev->driver = 0; | |
473 | stop_activity(dev, driver); | |
474 | spin_unlock_irqrestore(&dev->lock, flags); | |
475 | ||
476 | driver->unbind(&dev->gadget); | |
eb0be47d | 477 | dev->gadget.dev.driver = NULL; |
1da177e4 LT |
478 | device_del(&dev->gadget.dev); |
479 | ||
480 | udc_disable(dev); | |
481 | ||
482 | DEBUG("unregistered gadget driver '%s'\n", driver->driver.name); | |
483 | return 0; | |
484 | } | |
485 | ||
486 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
487 | ||
488 | /*-------------------------------------------------------------------------*/ | |
489 | ||
490 | /** Write request to FIFO (max write == maxp size) | |
491 | * Return: 0 = still running, 1 = completed, negative = errno | |
492 | * NOTE: INDEX register must be set for EP | |
493 | */ | |
494 | static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
495 | { | |
496 | u32 max; | |
497 | u32 csr; | |
498 | ||
499 | max = le16_to_cpu(ep->desc->wMaxPacketSize); | |
500 | ||
501 | csr = usb_read(ep->csr1); | |
502 | DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY); | |
503 | ||
504 | if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) { | |
505 | unsigned count; | |
506 | int is_last, is_short; | |
507 | ||
508 | count = write_packet(ep, req, max); | |
509 | usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1); | |
510 | ||
511 | /* last packet is usually short (or a zlp) */ | |
512 | if (unlikely(count != max)) | |
513 | is_last = is_short = 1; | |
514 | else { | |
515 | if (likely(req->req.length != req->req.actual) | |
516 | || req->req.zero) | |
517 | is_last = 0; | |
518 | else | |
519 | is_last = 1; | |
520 | /* interrupt/iso maxpacket may not fill the fifo */ | |
521 | is_short = unlikely(max < ep_maxpacket(ep)); | |
522 | } | |
523 | ||
441b62c1 | 524 | DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__, |
1da177e4 LT |
525 | ep->ep.name, count, |
526 | is_last ? "/L" : "", is_short ? "/S" : "", | |
527 | req->req.length - req->req.actual, req); | |
528 | ||
529 | /* requests complete when all IN data is in the FIFO */ | |
530 | if (is_last) { | |
531 | done(ep, req, 0); | |
532 | if (list_empty(&ep->queue)) { | |
533 | pio_irq_disable(ep_index(ep)); | |
534 | } | |
535 | return 1; | |
536 | } | |
537 | } else { | |
538 | DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep)); | |
539 | } | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
544 | /** Read to request from FIFO (max read == bytes in fifo) | |
545 | * Return: 0 = still running, 1 = completed, negative = errno | |
546 | * NOTE: INDEX register must be set for EP | |
547 | */ | |
548 | static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
549 | { | |
550 | u32 csr; | |
551 | u8 *buf; | |
552 | unsigned bufferspace, count, is_short; | |
553 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
554 | ||
555 | /* make sure there's a packet in the FIFO. */ | |
556 | csr = usb_read(ep->csr1); | |
557 | if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) { | |
441b62c1 | 558 | DEBUG("%s: Packet NOT ready!\n", __func__); |
1da177e4 LT |
559 | return -EINVAL; |
560 | } | |
561 | ||
562 | buf = req->req.buf + req->req.actual; | |
563 | prefetchw(buf); | |
564 | bufferspace = req->req.length - req->req.actual; | |
565 | ||
566 | /* read all bytes from this packet */ | |
567 | count = usb_read(USB_OUT_FIFO_WC1); | |
568 | req->req.actual += min(count, bufferspace); | |
569 | ||
570 | is_short = (count < ep->ep.maxpacket); | |
571 | DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n", | |
572 | ep->ep.name, csr, count, | |
573 | is_short ? "/S" : "", req, req->req.actual, req->req.length); | |
574 | ||
575 | while (likely(count-- != 0)) { | |
576 | u8 byte = (u8) (*fifo & 0xff); | |
577 | ||
578 | if (unlikely(bufferspace == 0)) { | |
579 | /* this happens when the driver's buffer | |
580 | * is smaller than what the host sent. | |
581 | * discard the extra data. | |
582 | */ | |
583 | if (req->req.status != -EOVERFLOW) | |
584 | printk("%s overflow %d\n", ep->ep.name, count); | |
585 | req->req.status = -EOVERFLOW; | |
586 | } else { | |
587 | *buf++ = byte; | |
588 | bufferspace--; | |
589 | } | |
590 | } | |
591 | ||
592 | usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1); | |
593 | ||
594 | /* completion */ | |
595 | if (is_short || req->req.actual == req->req.length) { | |
596 | done(ep, req, 0); | |
597 | usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); | |
598 | ||
599 | if (list_empty(&ep->queue)) | |
600 | pio_irq_disable(ep_index(ep)); | |
601 | return 1; | |
602 | } | |
603 | ||
604 | /* finished that packet. the next one may be waiting... */ | |
605 | return 0; | |
606 | } | |
607 | ||
608 | /* | |
609 | * done - retire a request; caller blocked irqs | |
610 | * INDEX register is preserved to keep same | |
611 | */ | |
612 | static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status) | |
613 | { | |
614 | unsigned int stopped = ep->stopped; | |
615 | u32 index; | |
616 | ||
441b62c1 | 617 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
618 | list_del_init(&req->queue); |
619 | ||
620 | if (likely(req->req.status == -EINPROGRESS)) | |
621 | req->req.status = status; | |
622 | else | |
623 | status = req->req.status; | |
624 | ||
625 | if (status && status != -ESHUTDOWN) | |
626 | DEBUG("complete %s req %p stat %d len %u/%u\n", | |
627 | ep->ep.name, &req->req, status, | |
628 | req->req.actual, req->req.length); | |
629 | ||
630 | /* don't modify queue heads during completion callback */ | |
631 | ep->stopped = 1; | |
632 | /* Read current index (completion may modify it) */ | |
633 | index = usb_read(USB_INDEX); | |
634 | ||
635 | spin_unlock(&ep->dev->lock); | |
636 | req->req.complete(&ep->ep, &req->req); | |
637 | spin_lock(&ep->dev->lock); | |
638 | ||
639 | /* Restore index */ | |
640 | usb_set_index(index); | |
641 | ep->stopped = stopped; | |
642 | } | |
643 | ||
644 | /** Enable EP interrupt */ | |
645 | static void pio_irq_enable(int ep) | |
646 | { | |
441b62c1 | 647 | DEBUG("%s: %d\n", __func__, ep); |
1da177e4 LT |
648 | |
649 | switch (ep) { | |
650 | case 1: | |
651 | usb_set(USB_IN_INT_EP1, USB_IN_INT_EN); | |
652 | break; | |
653 | case 2: | |
654 | usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); | |
655 | break; | |
656 | case 3: | |
657 | usb_set(USB_IN_INT_EP3, USB_IN_INT_EN); | |
658 | break; | |
659 | default: | |
660 | DEBUG("Unknown endpoint: %d\n", ep); | |
661 | break; | |
662 | } | |
663 | } | |
664 | ||
665 | /** Disable EP interrupt */ | |
666 | static void pio_irq_disable(int ep) | |
667 | { | |
441b62c1 | 668 | DEBUG("%s: %d\n", __func__, ep); |
1da177e4 LT |
669 | |
670 | switch (ep) { | |
671 | case 1: | |
672 | usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN); | |
673 | break; | |
674 | case 2: | |
675 | usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN); | |
676 | break; | |
677 | case 3: | |
678 | usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN); | |
679 | break; | |
680 | default: | |
681 | DEBUG("Unknown endpoint: %d\n", ep); | |
682 | break; | |
683 | } | |
684 | } | |
685 | ||
686 | /* | |
687 | * nuke - dequeue ALL requests | |
688 | */ | |
689 | void nuke(struct lh7a40x_ep *ep, int status) | |
690 | { | |
691 | struct lh7a40x_request *req; | |
692 | ||
441b62c1 | 693 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
694 | |
695 | /* Flush FIFO */ | |
696 | flush(ep); | |
697 | ||
698 | /* called with irqs blocked */ | |
699 | while (!list_empty(&ep->queue)) { | |
700 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
701 | done(ep, req, status); | |
702 | } | |
703 | ||
093cf723 | 704 | /* Disable IRQ if EP is enabled (has descriptor) */ |
1da177e4 LT |
705 | if (ep->desc) |
706 | pio_irq_disable(ep_index(ep)); | |
707 | } | |
708 | ||
709 | /* | |
710 | void nuke_all(struct lh7a40x_udc *dev) | |
711 | { | |
712 | int n; | |
713 | for(n=0; n<UDC_MAX_ENDPOINTS; n++) { | |
714 | struct lh7a40x_ep *ep = &dev->ep[n]; | |
715 | usb_set_index(n); | |
716 | nuke(ep, 0); | |
717 | } | |
718 | }*/ | |
719 | ||
720 | /* | |
721 | static void flush_all(struct lh7a40x_udc *dev) | |
722 | { | |
723 | int n; | |
724 | for (n = 0; n < UDC_MAX_ENDPOINTS; n++) | |
725 | { | |
726 | struct lh7a40x_ep *ep = &dev->ep[n]; | |
727 | flush(ep); | |
728 | } | |
729 | } | |
730 | */ | |
731 | ||
732 | /** Flush EP | |
733 | * NOTE: INDEX register must be set before this call | |
734 | */ | |
735 | static void flush(struct lh7a40x_ep *ep) | |
736 | { | |
441b62c1 | 737 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
738 | |
739 | switch (ep->ep_type) { | |
740 | case ep_control: | |
741 | /* check, by implication c.f. 15.1.2.11 */ | |
742 | break; | |
743 | ||
744 | case ep_bulk_in: | |
745 | case ep_interrupt: | |
746 | /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */ | |
747 | usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1); | |
748 | break; | |
749 | ||
750 | case ep_bulk_out: | |
751 | /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */ | |
752 | usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); | |
753 | break; | |
754 | } | |
755 | } | |
756 | ||
757 | /** | |
758 | * lh7a40x_in_epn - handle IN interrupt | |
759 | */ | |
760 | static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr) | |
761 | { | |
762 | u32 csr; | |
763 | struct lh7a40x_ep *ep = &dev->ep[ep_idx]; | |
764 | struct lh7a40x_request *req; | |
765 | ||
766 | usb_set_index(ep_idx); | |
767 | ||
768 | csr = usb_read(ep->csr1); | |
441b62c1 | 769 | DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr); |
1da177e4 LT |
770 | |
771 | if (csr & USB_IN_CSR1_SENT_STALL) { | |
772 | DEBUG("USB_IN_CSR1_SENT_STALL\n"); | |
773 | usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ , | |
774 | ep->csr1); | |
775 | return; | |
776 | } | |
777 | ||
778 | if (!ep->desc) { | |
441b62c1 | 779 | DEBUG("%s: NO EP DESC\n", __func__); |
1da177e4 LT |
780 | return; |
781 | } | |
782 | ||
783 | if (list_empty(&ep->queue)) | |
784 | req = 0; | |
785 | else | |
786 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
787 | ||
788 | DEBUG("req: %p\n", req); | |
789 | ||
790 | if (!req) | |
791 | return; | |
792 | ||
793 | write_fifo(ep, req); | |
794 | } | |
795 | ||
796 | /* ********************************************************************************************* */ | |
797 | /* Bulk OUT (recv) | |
798 | */ | |
799 | ||
800 | static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr) | |
801 | { | |
802 | struct lh7a40x_ep *ep = &dev->ep[ep_idx]; | |
803 | struct lh7a40x_request *req; | |
804 | ||
441b62c1 | 805 | DEBUG("%s: %d\n", __func__, ep_idx); |
1da177e4 LT |
806 | |
807 | usb_set_index(ep_idx); | |
808 | ||
809 | if (ep->desc) { | |
810 | u32 csr; | |
811 | csr = usb_read(ep->csr1); | |
812 | ||
813 | while ((csr = | |
814 | usb_read(ep-> | |
815 | csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY | | |
816 | USB_OUT_CSR1_SENT_STALL)) { | |
441b62c1 | 817 | DEBUG("%s: %x\n", __func__, csr); |
1da177e4 LT |
818 | |
819 | if (csr & USB_OUT_CSR1_SENT_STALL) { | |
820 | DEBUG("%s: stall sent, flush fifo\n", | |
441b62c1 | 821 | __func__); |
1da177e4 LT |
822 | /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */ |
823 | flush(ep); | |
824 | } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) { | |
825 | if (list_empty(&ep->queue)) | |
826 | req = 0; | |
827 | else | |
828 | req = | |
829 | list_entry(ep->queue.next, | |
830 | struct lh7a40x_request, | |
831 | queue); | |
832 | ||
833 | if (!req) { | |
834 | printk("%s: NULL REQ %d\n", | |
441b62c1 | 835 | __func__, ep_idx); |
1da177e4 LT |
836 | flush(ep); |
837 | break; | |
838 | } else { | |
839 | read_fifo(ep, req); | |
840 | } | |
841 | } | |
842 | ||
843 | } | |
844 | ||
845 | } else { | |
846 | /* Throw packet away.. */ | |
441b62c1 | 847 | printk("%s: No descriptor?!?\n", __func__); |
1da177e4 LT |
848 | flush(ep); |
849 | } | |
850 | } | |
851 | ||
852 | static void stop_activity(struct lh7a40x_udc *dev, | |
853 | struct usb_gadget_driver *driver) | |
854 | { | |
855 | int i; | |
856 | ||
857 | /* don't disconnect drivers more than once */ | |
858 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
859 | driver = 0; | |
860 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
861 | ||
862 | /* prevent new request submissions, kill any outstanding requests */ | |
863 | for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { | |
864 | struct lh7a40x_ep *ep = &dev->ep[i]; | |
865 | ep->stopped = 1; | |
866 | ||
867 | usb_set_index(i); | |
868 | nuke(ep, -ESHUTDOWN); | |
869 | } | |
870 | ||
871 | /* report disconnect; the driver is already quiesced */ | |
872 | if (driver) { | |
873 | spin_unlock(&dev->lock); | |
874 | driver->disconnect(&dev->gadget); | |
875 | spin_lock(&dev->lock); | |
876 | } | |
877 | ||
878 | /* re-init driver-visible data structures */ | |
879 | udc_reinit(dev); | |
880 | } | |
881 | ||
882 | /** Handle USB RESET interrupt | |
883 | */ | |
884 | static void lh7a40x_reset_intr(struct lh7a40x_udc *dev) | |
885 | { | |
886 | #if 0 /* def CONFIG_ARCH_LH7A404 */ | |
887 | /* Does not work always... */ | |
888 | ||
441b62c1 | 889 | DEBUG("%s: %d\n", __func__, dev->usb_address); |
1da177e4 LT |
890 | |
891 | if (!dev->usb_address) { | |
892 | /*usb_set(USB_RESET_IO, USB_RESET); | |
893 | mdelay(5); | |
894 | usb_clear(USB_RESET_IO, USB_RESET); */ | |
895 | return; | |
896 | } | |
897 | /* Put the USB controller into reset. */ | |
898 | usb_set(USB_RESET_IO, USB_RESET); | |
899 | ||
900 | /* Set Device ID to 0 */ | |
901 | udc_set_address(dev, 0); | |
902 | ||
903 | /* Let PLL2 settle down */ | |
904 | mdelay(5); | |
905 | ||
906 | /* Release the USB controller from reset */ | |
907 | usb_clear(USB_RESET_IO, USB_RESET); | |
908 | ||
909 | /* Re-enable UDC */ | |
910 | udc_enable(dev); | |
911 | ||
912 | #endif | |
913 | dev->gadget.speed = USB_SPEED_FULL; | |
914 | } | |
915 | ||
916 | /* | |
917 | * lh7a40x usb client interrupt handler. | |
918 | */ | |
7d12e780 | 919 | static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev) |
1da177e4 LT |
920 | { |
921 | struct lh7a40x_udc *dev = _dev; | |
922 | ||
923 | DEBUG("\n\n"); | |
924 | ||
925 | spin_lock(&dev->lock); | |
926 | ||
927 | for (;;) { | |
928 | u32 intr_in = usb_read(USB_IN_INT); | |
929 | u32 intr_out = usb_read(USB_OUT_INT); | |
930 | u32 intr_int = usb_read(USB_INT); | |
931 | ||
932 | /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */ | |
933 | u32 in_en = usb_read(USB_IN_INT_EN); | |
934 | u32 out_en = usb_read(USB_OUT_INT_EN); | |
935 | ||
936 | if (!intr_out && !intr_in && !intr_int) | |
937 | break; | |
938 | ||
441b62c1 | 939 | DEBUG("%s (on state %s)\n", __func__, |
1da177e4 LT |
940 | state_names[dev->ep0state]); |
941 | DEBUG("intr_out = %x\n", intr_out); | |
942 | DEBUG("intr_in = %x\n", intr_in); | |
943 | DEBUG("intr_int = %x\n", intr_int); | |
944 | ||
945 | if (intr_in) { | |
946 | usb_write(intr_in, USB_IN_INT); | |
947 | ||
948 | if ((intr_in & USB_IN_INT_EP1) | |
949 | && (in_en & USB_IN_INT_EP1)) { | |
950 | DEBUG("USB_IN_INT_EP1\n"); | |
951 | lh7a40x_in_epn(dev, 1, intr_in); | |
952 | } | |
953 | if ((intr_in & USB_IN_INT_EP3) | |
954 | && (in_en & USB_IN_INT_EP3)) { | |
955 | DEBUG("USB_IN_INT_EP3\n"); | |
956 | lh7a40x_in_epn(dev, 3, intr_in); | |
957 | } | |
958 | if (intr_in & USB_IN_INT_EP0) { | |
959 | DEBUG("USB_IN_INT_EP0 (control)\n"); | |
960 | lh7a40x_handle_ep0(dev, intr_in); | |
961 | } | |
962 | } | |
963 | ||
964 | if (intr_out) { | |
965 | usb_write(intr_out, USB_OUT_INT); | |
966 | ||
967 | if ((intr_out & USB_OUT_INT_EP2) | |
968 | && (out_en & USB_OUT_INT_EP2)) { | |
969 | DEBUG("USB_OUT_INT_EP2\n"); | |
970 | lh7a40x_out_epn(dev, 2, intr_out); | |
971 | } | |
972 | } | |
973 | ||
974 | if (intr_int) { | |
975 | usb_write(intr_int, USB_INT); | |
976 | ||
977 | if (intr_int & USB_INT_RESET_INT) { | |
978 | lh7a40x_reset_intr(dev); | |
979 | } | |
980 | ||
981 | if (intr_int & USB_INT_RESUME_INT) { | |
982 | DEBUG("USB resume\n"); | |
983 | ||
984 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
985 | && dev->driver | |
986 | && dev->driver->resume | |
987 | && is_usb_connected()) { | |
988 | dev->driver->resume(&dev->gadget); | |
989 | } | |
990 | } | |
991 | ||
992 | if (intr_int & USB_INT_SUSPEND_INT) { | |
993 | DEBUG("USB suspend%s\n", | |
994 | is_usb_connected()? "" : "+disconnect"); | |
995 | if (!is_usb_connected()) { | |
996 | stop_activity(dev, dev->driver); | |
997 | } else if (dev->gadget.speed != | |
998 | USB_SPEED_UNKNOWN && dev->driver | |
999 | && dev->driver->suspend) { | |
1000 | dev->driver->suspend(&dev->gadget); | |
1001 | } | |
1002 | } | |
1003 | ||
1004 | } | |
1005 | } | |
1006 | ||
1007 | spin_unlock(&dev->lock); | |
1008 | ||
1009 | return IRQ_HANDLED; | |
1010 | } | |
1011 | ||
1012 | static int lh7a40x_ep_enable(struct usb_ep *_ep, | |
1013 | const struct usb_endpoint_descriptor *desc) | |
1014 | { | |
1015 | struct lh7a40x_ep *ep; | |
1016 | struct lh7a40x_udc *dev; | |
1017 | unsigned long flags; | |
1018 | ||
441b62c1 | 1019 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1020 | |
1021 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1022 | if (!_ep || !desc || ep->desc || _ep->name == ep0name | |
1023 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
1024 | || ep->bEndpointAddress != desc->bEndpointAddress | |
1025 | || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) { | |
441b62c1 | 1026 | DEBUG("%s, bad ep or descriptor\n", __func__); |
1da177e4 LT |
1027 | return -EINVAL; |
1028 | } | |
1029 | ||
1030 | /* xfer types must match, except that interrupt ~= bulk */ | |
1031 | if (ep->bmAttributes != desc->bmAttributes | |
1032 | && ep->bmAttributes != USB_ENDPOINT_XFER_BULK | |
1033 | && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { | |
441b62c1 | 1034 | DEBUG("%s, %s type mismatch\n", __func__, _ep->name); |
1da177e4 LT |
1035 | return -EINVAL; |
1036 | } | |
1037 | ||
1038 | /* hardware _could_ do smaller, but driver doesn't */ | |
1039 | if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK | |
1040 | && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep)) | |
1041 | || !desc->wMaxPacketSize) { | |
441b62c1 | 1042 | DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name); |
1da177e4 LT |
1043 | return -ERANGE; |
1044 | } | |
1045 | ||
1046 | dev = ep->dev; | |
1047 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
441b62c1 | 1048 | DEBUG("%s, bogus device state\n", __func__); |
1da177e4 LT |
1049 | return -ESHUTDOWN; |
1050 | } | |
1051 | ||
1052 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1053 | ||
1054 | ep->stopped = 0; | |
1055 | ep->desc = desc; | |
1056 | ep->pio_irqs = 0; | |
1057 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
1058 | ||
d5ec3349 FBH |
1059 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1060 | ||
1da177e4 LT |
1061 | /* Reset halt state (does flush) */ |
1062 | lh7a40x_set_halt(_ep, 0); | |
1063 | ||
441b62c1 | 1064 | DEBUG("%s: enabled %s\n", __func__, _ep->name); |
1da177e4 LT |
1065 | return 0; |
1066 | } | |
1067 | ||
1068 | /** Disable EP | |
1069 | * NOTE: Sets INDEX register | |
1070 | */ | |
1071 | static int lh7a40x_ep_disable(struct usb_ep *_ep) | |
1072 | { | |
1073 | struct lh7a40x_ep *ep; | |
1074 | unsigned long flags; | |
1075 | ||
441b62c1 | 1076 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1077 | |
1078 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1079 | if (!_ep || !ep->desc) { | |
441b62c1 | 1080 | DEBUG("%s, %s not enabled\n", __func__, |
1da177e4 LT |
1081 | _ep ? ep->ep.name : NULL); |
1082 | return -EINVAL; | |
1083 | } | |
1084 | ||
1085 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1086 | ||
1087 | usb_set_index(ep_index(ep)); | |
1088 | ||
1089 | /* Nuke all pending requests (does flush) */ | |
1090 | nuke(ep, -ESHUTDOWN); | |
1091 | ||
1092 | /* Disable ep IRQ */ | |
1093 | pio_irq_disable(ep_index(ep)); | |
1094 | ||
1095 | ep->desc = 0; | |
1096 | ep->stopped = 1; | |
1097 | ||
1098 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1099 | ||
441b62c1 | 1100 | DEBUG("%s: disabled %s\n", __func__, _ep->name); |
1da177e4 LT |
1101 | return 0; |
1102 | } | |
1103 | ||
1104 | static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, | |
55016f10 | 1105 | gfp_t gfp_flags) |
1da177e4 LT |
1106 | { |
1107 | struct lh7a40x_request *req; | |
1108 | ||
441b62c1 | 1109 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 | 1110 | |
7039f422 | 1111 | req = kzalloc(sizeof(*req), gfp_flags); |
1da177e4 LT |
1112 | if (!req) |
1113 | return 0; | |
1114 | ||
1da177e4 LT |
1115 | INIT_LIST_HEAD(&req->queue); |
1116 | ||
1117 | return &req->req; | |
1118 | } | |
1119 | ||
1120 | static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req) | |
1121 | { | |
1122 | struct lh7a40x_request *req; | |
1123 | ||
441b62c1 | 1124 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
1125 | |
1126 | req = container_of(_req, struct lh7a40x_request, req); | |
1127 | WARN_ON(!list_empty(&req->queue)); | |
1128 | kfree(req); | |
1129 | } | |
1130 | ||
1da177e4 LT |
1131 | /** Queue one request |
1132 | * Kickstart transfer if needed | |
1133 | * NOTE: Sets INDEX register | |
1134 | */ | |
1135 | static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req, | |
55016f10 | 1136 | gfp_t gfp_flags) |
1da177e4 LT |
1137 | { |
1138 | struct lh7a40x_request *req; | |
1139 | struct lh7a40x_ep *ep; | |
1140 | struct lh7a40x_udc *dev; | |
1141 | unsigned long flags; | |
1142 | ||
441b62c1 | 1143 | DEBUG("\n\n\n%s, %p\n", __func__, _ep); |
1da177e4 LT |
1144 | |
1145 | req = container_of(_req, struct lh7a40x_request, req); | |
1146 | if (unlikely | |
1147 | (!_req || !_req->complete || !_req->buf | |
1148 | || !list_empty(&req->queue))) { | |
441b62c1 | 1149 | DEBUG("%s, bad params\n", __func__); |
1da177e4 LT |
1150 | return -EINVAL; |
1151 | } | |
1152 | ||
1153 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1154 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1155 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1156 | return -EINVAL; |
1157 | } | |
1158 | ||
1159 | dev = ep->dev; | |
1160 | if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { | |
441b62c1 | 1161 | DEBUG("%s, bogus device state %p\n", __func__, dev->driver); |
1da177e4 LT |
1162 | return -ESHUTDOWN; |
1163 | } | |
1164 | ||
1165 | DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length, | |
1166 | _req->buf); | |
1167 | ||
1168 | spin_lock_irqsave(&dev->lock, flags); | |
1169 | ||
1170 | _req->status = -EINPROGRESS; | |
1171 | _req->actual = 0; | |
1172 | ||
1173 | /* kickstart this i/o queue? */ | |
1174 | DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue), | |
1175 | ep->stopped); | |
1176 | if (list_empty(&ep->queue) && likely(!ep->stopped)) { | |
1177 | u32 csr; | |
1178 | ||
1179 | if (unlikely(ep_index(ep) == 0)) { | |
1180 | /* EP0 */ | |
1181 | list_add_tail(&req->queue, &ep->queue); | |
1182 | lh7a40x_ep0_kick(dev, ep); | |
1183 | req = 0; | |
1184 | } else if (ep_is_in(ep)) { | |
1185 | /* EP1 & EP3 */ | |
1186 | usb_set_index(ep_index(ep)); | |
1187 | csr = usb_read(ep->csr1); | |
1188 | pio_irq_enable(ep_index(ep)); | |
1189 | if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) { | |
1190 | if (write_fifo(ep, req) == 1) | |
1191 | req = 0; | |
1192 | } | |
1193 | } else { | |
1194 | /* EP2 */ | |
1195 | usb_set_index(ep_index(ep)); | |
1196 | csr = usb_read(ep->csr1); | |
1197 | pio_irq_enable(ep_index(ep)); | |
1198 | if (!(csr & USB_OUT_CSR1_FIFO_FULL)) { | |
1199 | if (read_fifo(ep, req) == 1) | |
1200 | req = 0; | |
1201 | } | |
1202 | } | |
1203 | } | |
1204 | ||
1205 | /* pio or dma irq handler advances the queue. */ | |
1206 | if (likely(req != 0)) | |
1207 | list_add_tail(&req->queue, &ep->queue); | |
1208 | ||
1209 | spin_unlock_irqrestore(&dev->lock, flags); | |
1210 | ||
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | /* dequeue JUST ONE request */ | |
1215 | static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1216 | { | |
1217 | struct lh7a40x_ep *ep; | |
1218 | struct lh7a40x_request *req; | |
1219 | unsigned long flags; | |
1220 | ||
441b62c1 | 1221 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1222 | |
1223 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1224 | if (!_ep || ep->ep.name == ep0name) | |
1225 | return -EINVAL; | |
1226 | ||
1227 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1228 | ||
1229 | /* make sure it's actually queued on this endpoint */ | |
1230 | list_for_each_entry(req, &ep->queue, queue) { | |
1231 | if (&req->req == _req) | |
1232 | break; | |
1233 | } | |
1234 | if (&req->req != _req) { | |
1235 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1236 | return -EINVAL; | |
1237 | } | |
1238 | ||
1239 | done(ep, req, -ECONNRESET); | |
1240 | ||
1241 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | /** Halt specific EP | |
1246 | * Return 0 if success | |
1247 | * NOTE: Sets INDEX register to EP ! | |
1248 | */ | |
1249 | static int lh7a40x_set_halt(struct usb_ep *_ep, int value) | |
1250 | { | |
1251 | struct lh7a40x_ep *ep; | |
1252 | unsigned long flags; | |
1253 | ||
1254 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1255 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1256 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1257 | return -EINVAL; |
1258 | } | |
1259 | ||
1260 | usb_set_index(ep_index(ep)); | |
1261 | ||
441b62c1 | 1262 | DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value); |
1da177e4 LT |
1263 | |
1264 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1265 | ||
1266 | if (ep_index(ep) == 0) { | |
1267 | /* EP0 */ | |
1268 | usb_set(EP0_SEND_STALL, ep->csr1); | |
1269 | } else if (ep_is_in(ep)) { | |
1270 | u32 csr = usb_read(ep->csr1); | |
1271 | if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) | |
1272 | || !list_empty(&ep->queue))) { | |
1273 | /* | |
1274 | * Attempts to halt IN endpoints will fail (returning -EAGAIN) | |
1275 | * if any transfer requests are still queued, or if the controller | |
96de0e25 | 1276 | * FIFO still holds bytes that the host hasn't collected. |
1da177e4 LT |
1277 | */ |
1278 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1279 | DEBUG | |
1280 | ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n", | |
1281 | (csr & USB_IN_CSR1_FIFO_NOT_EMPTY), | |
1282 | !list_empty(&ep->queue)); | |
1283 | return -EAGAIN; | |
1284 | } | |
1285 | flush(ep); | |
1286 | if (value) | |
1287 | usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1); | |
1288 | else { | |
1289 | usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1); | |
1290 | usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1); | |
1291 | } | |
1292 | ||
1293 | } else { | |
1294 | ||
1295 | flush(ep); | |
1296 | if (value) | |
1297 | usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1); | |
1298 | else { | |
1299 | usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1); | |
1300 | usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1); | |
1301 | } | |
1302 | } | |
1303 | ||
1304 | if (value) { | |
1305 | ep->stopped = 1; | |
1306 | } else { | |
1307 | ep->stopped = 0; | |
1308 | } | |
1309 | ||
1310 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1311 | ||
1312 | DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS"); | |
1313 | ||
1314 | return 0; | |
1315 | } | |
1316 | ||
1317 | /** Return bytes in EP FIFO | |
1318 | * NOTE: Sets INDEX register to EP | |
1319 | */ | |
1320 | static int lh7a40x_fifo_status(struct usb_ep *_ep) | |
1321 | { | |
1322 | u32 csr; | |
1323 | int count = 0; | |
1324 | struct lh7a40x_ep *ep; | |
1325 | ||
1326 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1327 | if (!_ep) { | |
441b62c1 | 1328 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1329 | return -ENODEV; |
1330 | } | |
1331 | ||
441b62c1 | 1332 | DEBUG("%s, %d\n", __func__, ep_index(ep)); |
1da177e4 LT |
1333 | |
1334 | /* LPD can't report unclaimed bytes from IN fifos */ | |
1335 | if (ep_is_in(ep)) | |
1336 | return -EOPNOTSUPP; | |
1337 | ||
1338 | usb_set_index(ep_index(ep)); | |
1339 | ||
1340 | csr = usb_read(ep->csr1); | |
1341 | if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN || | |
1342 | csr & USB_OUT_CSR1_OUT_PKT_RDY) { | |
1343 | count = usb_read(USB_OUT_FIFO_WC1); | |
1344 | } | |
1345 | ||
1346 | return count; | |
1347 | } | |
1348 | ||
1349 | /** Flush EP FIFO | |
1350 | * NOTE: Sets INDEX register to EP | |
1351 | */ | |
1352 | static void lh7a40x_fifo_flush(struct usb_ep *_ep) | |
1353 | { | |
1354 | struct lh7a40x_ep *ep; | |
1355 | ||
1356 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1357 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1358 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1359 | return; |
1360 | } | |
1361 | ||
1362 | usb_set_index(ep_index(ep)); | |
1363 | flush(ep); | |
1364 | } | |
1365 | ||
1366 | /****************************************************************/ | |
1367 | /* End Point 0 related functions */ | |
1368 | /****************************************************************/ | |
1369 | ||
1370 | /* return: 0 = still running, 1 = completed, negative = errno */ | |
1371 | static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
1372 | { | |
1373 | u32 max; | |
1374 | unsigned count; | |
1375 | int is_last; | |
1376 | ||
1377 | max = ep_maxpacket(ep); | |
1378 | ||
441b62c1 | 1379 | DEBUG_EP0("%s\n", __func__); |
1da177e4 LT |
1380 | |
1381 | count = write_packet(ep, req, max); | |
1382 | ||
1383 | /* last packet is usually short (or a zlp) */ | |
1384 | if (unlikely(count != max)) | |
1385 | is_last = 1; | |
1386 | else { | |
1387 | if (likely(req->req.length != req->req.actual) || req->req.zero) | |
1388 | is_last = 0; | |
1389 | else | |
1390 | is_last = 1; | |
1391 | } | |
1392 | ||
441b62c1 | 1393 | DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__, |
1da177e4 LT |
1394 | ep->ep.name, count, |
1395 | is_last ? "/L" : "", req->req.length - req->req.actual, req); | |
1396 | ||
1397 | /* requests complete when all IN data is in the FIFO */ | |
1398 | if (is_last) { | |
1399 | done(ep, req, 0); | |
1400 | return 1; | |
1401 | } | |
1402 | ||
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep, | |
1407 | unsigned char *cp, int max) | |
1408 | { | |
1409 | int bytes; | |
1410 | int count = usb_read(USB_OUT_FIFO_WC1); | |
1411 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1412 | ||
1413 | if (count > max) | |
1414 | count = max; | |
1415 | bytes = count; | |
1416 | while (count--) | |
1417 | *cp++ = *fifo & 0xFF; | |
1418 | return bytes; | |
1419 | } | |
1420 | ||
1421 | static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep, | |
1422 | unsigned char *cp, int count) | |
1423 | { | |
1424 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1425 | DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count); | |
1426 | while (count--) | |
1427 | *fifo = *cp++; | |
1428 | } | |
1429 | ||
1430 | static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
1431 | { | |
1432 | u32 csr; | |
1433 | u8 *buf; | |
1434 | unsigned bufferspace, count, is_short; | |
1435 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1436 | ||
441b62c1 | 1437 | DEBUG_EP0("%s\n", __func__); |
1da177e4 LT |
1438 | |
1439 | csr = usb_read(USB_EP0_CSR); | |
1440 | if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) | |
1441 | return 0; | |
1442 | ||
1443 | buf = req->req.buf + req->req.actual; | |
1444 | prefetchw(buf); | |
1445 | bufferspace = req->req.length - req->req.actual; | |
1446 | ||
1447 | /* read all bytes from this packet */ | |
1448 | if (likely(csr & EP0_OUT_PKT_RDY)) { | |
1449 | count = usb_read(USB_OUT_FIFO_WC1); | |
1450 | req->req.actual += min(count, bufferspace); | |
1451 | } else /* zlp */ | |
1452 | count = 0; | |
1453 | ||
1454 | is_short = (count < ep->ep.maxpacket); | |
1455 | DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n", | |
1456 | ep->ep.name, csr, count, | |
1457 | is_short ? "/S" : "", req, req->req.actual, req->req.length); | |
1458 | ||
1459 | while (likely(count-- != 0)) { | |
1460 | u8 byte = (u8) (*fifo & 0xff); | |
1461 | ||
1462 | if (unlikely(bufferspace == 0)) { | |
1463 | /* this happens when the driver's buffer | |
1464 | * is smaller than what the host sent. | |
1465 | * discard the extra data. | |
1466 | */ | |
1467 | if (req->req.status != -EOVERFLOW) | |
1468 | DEBUG_EP0("%s overflow %d\n", ep->ep.name, | |
1469 | count); | |
1470 | req->req.status = -EOVERFLOW; | |
1471 | } else { | |
1472 | *buf++ = byte; | |
1473 | bufferspace--; | |
1474 | } | |
1475 | } | |
1476 | ||
1477 | /* completion */ | |
1478 | if (is_short || req->req.actual == req->req.length) { | |
1479 | done(ep, req, 0); | |
1480 | return 1; | |
1481 | } | |
1482 | ||
1483 | /* finished that packet. the next one may be waiting... */ | |
1484 | return 0; | |
1485 | } | |
1486 | ||
1487 | /** | |
1488 | * udc_set_address - set the USB address for this device | |
1489 | * @address: | |
1490 | * | |
1491 | * Called from control endpoint function after it decodes a set address setup packet. | |
1492 | */ | |
1493 | static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address) | |
1494 | { | |
441b62c1 | 1495 | DEBUG_EP0("%s: %d\n", __func__, address); |
1da177e4 LT |
1496 | /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */ |
1497 | dev->usb_address = address; | |
1498 | usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA); | |
1499 | usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA); | |
1500 | /* usb_read(USB_FA); */ | |
1501 | } | |
1502 | ||
1503 | /* | |
1504 | * DATA_STATE_RECV (OUT_PKT_RDY) | |
1505 | * - if error | |
1506 | * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits | |
1507 | * - else | |
1508 | * set EP0_CLR_OUT bit | |
1509 | if last set EP0_DATA_END bit | |
1510 | */ | |
1511 | static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr) | |
1512 | { | |
1513 | struct lh7a40x_request *req; | |
1514 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1515 | int ret; | |
1516 | ||
441b62c1 | 1517 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1518 | |
1519 | if (list_empty(&ep->queue)) | |
1520 | req = 0; | |
1521 | else | |
1522 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
1523 | ||
1524 | if (req) { | |
1525 | ||
1526 | if (req->req.length == 0) { | |
1527 | DEBUG_EP0("ZERO LENGTH OUT!\n"); | |
1528 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1529 | dev->ep0state = WAIT_FOR_SETUP; | |
1530 | return; | |
1531 | } | |
1532 | ret = read_fifo_ep0(ep, req); | |
1533 | if (ret) { | |
1534 | /* Done! */ | |
1535 | DEBUG_EP0("%s: finished, waiting for status\n", | |
441b62c1 | 1536 | __func__); |
1da177e4 LT |
1537 | |
1538 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1539 | dev->ep0state = WAIT_FOR_SETUP; | |
1540 | } else { | |
1541 | /* Not done yet.. */ | |
441b62c1 | 1542 | DEBUG_EP0("%s: not finished\n", __func__); |
1da177e4 LT |
1543 | usb_set(EP0_CLR_OUT, USB_EP0_CSR); |
1544 | } | |
1545 | } else { | |
1546 | DEBUG_EP0("NO REQ??!\n"); | |
1547 | } | |
1548 | } | |
1549 | ||
1550 | /* | |
1551 | * DATA_STATE_XMIT | |
1552 | */ | |
1553 | static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr) | |
1554 | { | |
1555 | struct lh7a40x_request *req; | |
1556 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1557 | int ret, need_zlp = 0; | |
1558 | ||
441b62c1 | 1559 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1560 | |
1561 | if (list_empty(&ep->queue)) | |
1562 | req = 0; | |
1563 | else | |
1564 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
1565 | ||
1566 | if (!req) { | |
441b62c1 | 1567 | DEBUG_EP0("%s: NULL REQ\n", __func__); |
1da177e4 LT |
1568 | return 0; |
1569 | } | |
1570 | ||
1571 | if (req->req.length == 0) { | |
1572 | ||
1573 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1574 | dev->ep0state = WAIT_FOR_SETUP; | |
1575 | return 1; | |
1576 | } | |
1577 | ||
1578 | if (req->req.length - req->req.actual == EP0_PACKETSIZE) { | |
1579 | /* Next write will end with the packet size, */ | |
1580 | /* so we need Zero-length-packet */ | |
1581 | need_zlp = 1; | |
1582 | } | |
1583 | ||
1584 | ret = write_fifo_ep0(ep, req); | |
1585 | ||
1586 | if (ret == 1 && !need_zlp) { | |
1587 | /* Last packet */ | |
441b62c1 | 1588 | DEBUG_EP0("%s: finished, waiting for status\n", __func__); |
1da177e4 LT |
1589 | |
1590 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1591 | dev->ep0state = WAIT_FOR_SETUP; | |
1592 | } else { | |
441b62c1 | 1593 | DEBUG_EP0("%s: not finished\n", __func__); |
1da177e4 LT |
1594 | usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR); |
1595 | } | |
1596 | ||
1597 | if (need_zlp) { | |
441b62c1 | 1598 | DEBUG_EP0("%s: Need ZLP!\n", __func__); |
1da177e4 LT |
1599 | usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR); |
1600 | dev->ep0state = DATA_STATE_NEED_ZLP; | |
1601 | } | |
1602 | ||
1603 | return 1; | |
1604 | } | |
1605 | ||
1606 | static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev, | |
1607 | struct usb_ctrlrequest *ctrl) | |
1608 | { | |
1609 | struct lh7a40x_ep *ep0 = &dev->ep[0]; | |
1610 | struct lh7a40x_ep *qep; | |
1611 | int reqtype = (ctrl->bRequestType & USB_RECIP_MASK); | |
1612 | u16 val = 0; | |
1613 | ||
1614 | if (reqtype == USB_RECIP_INTERFACE) { | |
1615 | /* This is not supported. | |
1616 | * And according to the USB spec, this one does nothing.. | |
1617 | * Just return 0 | |
1618 | */ | |
1619 | DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n"); | |
1620 | } else if (reqtype == USB_RECIP_DEVICE) { | |
1621 | DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n"); | |
1622 | val |= (1 << 0); /* Self powered */ | |
1623 | /*val |= (1<<1); *//* Remote wakeup */ | |
1624 | } else if (reqtype == USB_RECIP_ENDPOINT) { | |
1625 | int ep_num = (ctrl->wIndex & ~USB_DIR_IN); | |
1626 | ||
1627 | DEBUG_SETUP | |
1628 | ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n", | |
1629 | ep_num, ctrl->wLength); | |
1630 | ||
1631 | if (ctrl->wLength > 2 || ep_num > 3) | |
1632 | return -EOPNOTSUPP; | |
1633 | ||
1634 | qep = &dev->ep[ep_num]; | |
1635 | if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0) | |
1636 | && ep_index(qep) != 0) { | |
1637 | return -EOPNOTSUPP; | |
1638 | } | |
1639 | ||
1640 | usb_set_index(ep_index(qep)); | |
1641 | ||
1642 | /* Return status on next IN token */ | |
1643 | switch (qep->ep_type) { | |
1644 | case ep_control: | |
1645 | val = | |
1646 | (usb_read(qep->csr1) & EP0_SEND_STALL) == | |
1647 | EP0_SEND_STALL; | |
1648 | break; | |
1649 | case ep_bulk_in: | |
1650 | case ep_interrupt: | |
1651 | val = | |
1652 | (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) == | |
1653 | USB_IN_CSR1_SEND_STALL; | |
1654 | break; | |
1655 | case ep_bulk_out: | |
1656 | val = | |
1657 | (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) == | |
1658 | USB_OUT_CSR1_SEND_STALL; | |
1659 | break; | |
1660 | } | |
1661 | ||
1662 | /* Back to EP0 index */ | |
1663 | usb_set_index(0); | |
1664 | ||
1665 | DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num, | |
1666 | ctrl->wIndex, val); | |
1667 | } else { | |
1668 | DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype); | |
1669 | return -EOPNOTSUPP; | |
1670 | } | |
1671 | ||
1672 | /* Clear "out packet ready" */ | |
1673 | usb_set((EP0_CLR_OUT), USB_EP0_CSR); | |
1674 | /* Put status to FIFO */ | |
1675 | lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val)); | |
1676 | /* Issue "In packet ready" */ | |
1677 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1678 | ||
1679 | return 0; | |
1680 | } | |
1681 | ||
1682 | /* | |
1683 | * WAIT_FOR_SETUP (OUT_PKT_RDY) | |
1684 | * - read data packet from EP0 FIFO | |
1685 | * - decode command | |
1686 | * - if error | |
1687 | * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits | |
1688 | * - else | |
1689 | * set EP0_CLR_OUT | EP0_DATA_END bits | |
1690 | */ | |
1691 | static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr) | |
1692 | { | |
1693 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1694 | struct usb_ctrlrequest ctrl; | |
1695 | int i, bytes, is_in; | |
1696 | ||
441b62c1 | 1697 | DEBUG_SETUP("%s: %x\n", __func__, csr); |
1da177e4 LT |
1698 | |
1699 | /* Nuke all previous transfers */ | |
1700 | nuke(ep, -EPROTO); | |
1701 | ||
1702 | /* read control req from fifo (8 bytes) */ | |
1703 | bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8); | |
1704 | ||
1705 | DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes); | |
1706 | DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType, | |
1707 | ctrl.bRequestType == USB_DIR_IN); | |
1708 | DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest); | |
1709 | DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength); | |
1710 | DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8); | |
1711 | DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex); | |
1712 | ||
1713 | /* Set direction of EP0 */ | |
1714 | if (likely(ctrl.bRequestType & USB_DIR_IN)) { | |
1715 | ep->bEndpointAddress |= USB_DIR_IN; | |
1716 | is_in = 1; | |
1717 | } else { | |
1718 | ep->bEndpointAddress &= ~USB_DIR_IN; | |
1719 | is_in = 0; | |
1720 | } | |
1721 | ||
1722 | dev->req_pending = 1; | |
1723 | ||
1724 | /* Handle some SETUP packets ourselves */ | |
1725 | switch (ctrl.bRequest) { | |
1726 | case USB_REQ_SET_ADDRESS: | |
1727 | if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) | |
1728 | break; | |
1729 | ||
1730 | DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue); | |
1731 | udc_set_address(dev, ctrl.wValue); | |
1732 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1733 | return; | |
1734 | ||
1735 | case USB_REQ_GET_STATUS:{ | |
1736 | if (lh7a40x_handle_get_status(dev, &ctrl) == 0) | |
1737 | return; | |
1738 | ||
1739 | case USB_REQ_CLEAR_FEATURE: | |
1740 | case USB_REQ_SET_FEATURE: | |
1741 | if (ctrl.bRequestType == USB_RECIP_ENDPOINT) { | |
1742 | struct lh7a40x_ep *qep; | |
1743 | int ep_num = (ctrl.wIndex & 0x0f); | |
1744 | ||
1745 | /* Support only HALT feature */ | |
1746 | if (ctrl.wValue != 0 || ctrl.wLength != 0 | |
1747 | || ep_num > 3 || ep_num < 1) | |
1748 | break; | |
1749 | ||
1750 | qep = &dev->ep[ep_num]; | |
d5ec3349 | 1751 | spin_unlock(&dev->lock); |
1da177e4 LT |
1752 | if (ctrl.bRequest == USB_REQ_SET_FEATURE) { |
1753 | DEBUG_SETUP("SET_FEATURE (%d)\n", | |
1754 | ep_num); | |
1755 | lh7a40x_set_halt(&qep->ep, 1); | |
1756 | } else { | |
1757 | DEBUG_SETUP("CLR_FEATURE (%d)\n", | |
1758 | ep_num); | |
1759 | lh7a40x_set_halt(&qep->ep, 0); | |
1760 | } | |
d5ec3349 | 1761 | spin_lock(&dev->lock); |
1da177e4 LT |
1762 | usb_set_index(0); |
1763 | ||
1764 | /* Reply with a ZLP on next IN token */ | |
1765 | usb_set((EP0_CLR_OUT | EP0_DATA_END), | |
1766 | USB_EP0_CSR); | |
1767 | return; | |
1768 | } | |
1769 | break; | |
1770 | } | |
1771 | ||
1772 | default: | |
1773 | break; | |
1774 | } | |
1775 | ||
1776 | if (likely(dev->driver)) { | |
1777 | /* device-2-host (IN) or no data setup command, process immediately */ | |
1778 | spin_unlock(&dev->lock); | |
1779 | i = dev->driver->setup(&dev->gadget, &ctrl); | |
1780 | spin_lock(&dev->lock); | |
1781 | ||
1782 | if (i < 0) { | |
1783 | /* setup processing failed, force stall */ | |
1784 | DEBUG_SETUP | |
1785 | (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n", | |
1786 | i); | |
1787 | usb_set_index(0); | |
1788 | usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL), | |
1789 | USB_EP0_CSR); | |
1790 | ||
1791 | /* ep->stopped = 1; */ | |
1792 | dev->ep0state = WAIT_FOR_SETUP; | |
1793 | } | |
1794 | } | |
1795 | } | |
1796 | ||
1797 | /* | |
1798 | * DATA_STATE_NEED_ZLP | |
1799 | */ | |
1800 | static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr) | |
1801 | { | |
441b62c1 | 1802 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1803 | |
1804 | /* c.f. Table 15-14 */ | |
1805 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1806 | dev->ep0state = WAIT_FOR_SETUP; | |
1807 | } | |
1808 | ||
1809 | /* | |
1810 | * handle ep0 interrupt | |
1811 | */ | |
1812 | static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr) | |
1813 | { | |
1814 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1815 | u32 csr; | |
1816 | ||
1817 | /* Set index 0 */ | |
1818 | usb_set_index(0); | |
1819 | csr = usb_read(USB_EP0_CSR); | |
1820 | ||
441b62c1 | 1821 | DEBUG_EP0("%s: csr = %x\n", __func__, csr); |
1da177e4 LT |
1822 | |
1823 | /* | |
1824 | * For overview of what we should be doing see c.f. Chapter 18.1.2.4 | |
1825 | * We will follow that outline here modified by our own global state | |
1826 | * indication which provides hints as to what we think should be | |
1827 | * happening.. | |
1828 | */ | |
1829 | ||
1830 | /* | |
1831 | * if SENT_STALL is set | |
1832 | * - clear the SENT_STALL bit | |
1833 | */ | |
1834 | if (csr & EP0_SENT_STALL) { | |
441b62c1 | 1835 | DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr); |
1da177e4 LT |
1836 | usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR); |
1837 | nuke(ep, -ECONNABORTED); | |
1838 | dev->ep0state = WAIT_FOR_SETUP; | |
1839 | return; | |
1840 | } | |
1841 | ||
1842 | /* | |
1843 | * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear | |
1844 | * - fill EP0 FIFO | |
1845 | * - if last packet | |
1846 | * - set IN_PKT_RDY | DATA_END | |
1847 | * - else | |
1848 | * set IN_PKT_RDY | |
1849 | */ | |
1850 | if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) { | |
1851 | DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n", | |
441b62c1 | 1852 | __func__); |
1da177e4 LT |
1853 | |
1854 | switch (dev->ep0state) { | |
1855 | case DATA_STATE_XMIT: | |
1856 | DEBUG_EP0("continue with DATA_STATE_XMIT\n"); | |
1857 | lh7a40x_ep0_in(dev, csr); | |
1858 | return; | |
1859 | case DATA_STATE_NEED_ZLP: | |
1860 | DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n"); | |
1861 | lh7a40x_ep0_in_zlp(dev, csr); | |
1862 | return; | |
1863 | default: | |
1864 | /* Stall? */ | |
1865 | DEBUG_EP0("Odd state!! state = %s\n", | |
1866 | state_names[dev->ep0state]); | |
1867 | dev->ep0state = WAIT_FOR_SETUP; | |
1868 | /* nuke(ep, 0); */ | |
1869 | /* usb_set(EP0_SEND_STALL, ep->csr1); */ | |
1870 | break; | |
1871 | } | |
1872 | } | |
1873 | ||
1874 | /* | |
1875 | * if SETUP_END is set | |
1876 | * - abort the last transfer | |
1877 | * - set SERVICED_SETUP_END_BIT | |
1878 | */ | |
1879 | if (csr & EP0_SETUP_END) { | |
441b62c1 | 1880 | DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr); |
1da177e4 LT |
1881 | |
1882 | usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR); | |
1883 | ||
1884 | nuke(ep, 0); | |
1885 | dev->ep0state = WAIT_FOR_SETUP; | |
1886 | } | |
1887 | ||
1888 | /* | |
1889 | * if EP0_OUT_PKT_RDY is set | |
1890 | * - read data packet from EP0 FIFO | |
1891 | * - decode command | |
1892 | * - if error | |
1893 | * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL | |
1894 | * - else | |
1895 | * set SERVICED_OUT_PKT_RDY | DATA_END bits | |
1896 | */ | |
1897 | if (csr & EP0_OUT_PKT_RDY) { | |
1898 | ||
441b62c1 | 1899 | DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__, |
1da177e4 LT |
1900 | csr); |
1901 | ||
1902 | switch (dev->ep0state) { | |
1903 | case WAIT_FOR_SETUP: | |
1904 | DEBUG_EP0("WAIT_FOR_SETUP\n"); | |
1905 | lh7a40x_ep0_setup(dev, csr); | |
1906 | break; | |
1907 | ||
1908 | case DATA_STATE_RECV: | |
1909 | DEBUG_EP0("DATA_STATE_RECV\n"); | |
1910 | lh7a40x_ep0_out(dev, csr); | |
1911 | break; | |
1912 | ||
1913 | default: | |
1914 | /* send stall? */ | |
1915 | DEBUG_EP0("strange state!! 2. send stall? state = %d\n", | |
1916 | dev->ep0state); | |
1917 | break; | |
1918 | } | |
1919 | } | |
1920 | } | |
1921 | ||
1922 | static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep) | |
1923 | { | |
1924 | u32 csr; | |
1925 | ||
1926 | usb_set_index(0); | |
1927 | csr = usb_read(USB_EP0_CSR); | |
1928 | ||
441b62c1 | 1929 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1930 | |
1931 | /* Clear "out packet ready" */ | |
1932 | usb_set(EP0_CLR_OUT, USB_EP0_CSR); | |
1933 | ||
1934 | if (ep_is_in(ep)) { | |
1935 | dev->ep0state = DATA_STATE_XMIT; | |
1936 | lh7a40x_ep0_in(dev, csr); | |
1937 | } else { | |
1938 | dev->ep0state = DATA_STATE_RECV; | |
1939 | lh7a40x_ep0_out(dev, csr); | |
1940 | } | |
1941 | } | |
1942 | ||
1943 | /* --------------------------------------------------------------------------- | |
1944 | * device-scoped parts of the api to the usb controller hardware | |
1945 | * --------------------------------------------------------------------------- | |
1946 | */ | |
1947 | ||
1948 | static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget) | |
1949 | { | |
1950 | u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */ | |
1951 | u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */ | |
441b62c1 | 1952 | DEBUG("%s, %p\n", __func__, _gadget); |
1da177e4 LT |
1953 | return ((frame2 & 0x07) << 8) | (frame1 & 0xff); |
1954 | } | |
1955 | ||
1956 | static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget) | |
1957 | { | |
1958 | /* host may not have enabled remote wakeup */ | |
1959 | /*if ((UDCCS0 & UDCCS0_DRWF) == 0) | |
1960 | return -EHOSTUNREACH; | |
1961 | udc_set_mask_UDCCR(UDCCR_RSM); */ | |
1962 | return -ENOTSUPP; | |
1963 | } | |
1964 | ||
1965 | static const struct usb_gadget_ops lh7a40x_udc_ops = { | |
1966 | .get_frame = lh7a40x_udc_get_frame, | |
1967 | .wakeup = lh7a40x_udc_wakeup, | |
1968 | /* current versions must always be self-powered */ | |
1969 | }; | |
1970 | ||
1971 | static void nop_release(struct device *dev) | |
1972 | { | |
7071a3ce | 1973 | DEBUG("%s %s\n", __func__, dev_name(dev)); |
1da177e4 LT |
1974 | } |
1975 | ||
1976 | static struct lh7a40x_udc memory = { | |
1977 | .usb_address = 0, | |
1978 | ||
1979 | .gadget = { | |
1980 | .ops = &lh7a40x_udc_ops, | |
1981 | .ep0 = &memory.ep[0].ep, | |
1982 | .name = driver_name, | |
1983 | .dev = { | |
1984 | .bus_id = "gadget", | |
1985 | .release = nop_release, | |
1986 | }, | |
1987 | }, | |
1988 | ||
1989 | /* control endpoint */ | |
1990 | .ep[0] = { | |
1991 | .ep = { | |
1992 | .name = ep0name, | |
1993 | .ops = &lh7a40x_ep_ops, | |
1994 | .maxpacket = EP0_PACKETSIZE, | |
1995 | }, | |
1996 | .dev = &memory, | |
1997 | ||
1998 | .bEndpointAddress = 0, | |
1999 | .bmAttributes = 0, | |
2000 | ||
2001 | .ep_type = ep_control, | |
2002 | .fifo = io_p2v(USB_EP0_FIFO), | |
2003 | .csr1 = USB_EP0_CSR, | |
2004 | .csr2 = USB_EP0_CSR, | |
2005 | }, | |
2006 | ||
2007 | /* first group of endpoints */ | |
2008 | .ep[1] = { | |
2009 | .ep = { | |
2010 | .name = "ep1in-bulk", | |
2011 | .ops = &lh7a40x_ep_ops, | |
2012 | .maxpacket = 64, | |
2013 | }, | |
2014 | .dev = &memory, | |
2015 | ||
2016 | .bEndpointAddress = USB_DIR_IN | 1, | |
2017 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
2018 | ||
2019 | .ep_type = ep_bulk_in, | |
2020 | .fifo = io_p2v(USB_EP1_FIFO), | |
2021 | .csr1 = USB_IN_CSR1, | |
2022 | .csr2 = USB_IN_CSR2, | |
2023 | }, | |
2024 | ||
2025 | .ep[2] = { | |
2026 | .ep = { | |
2027 | .name = "ep2out-bulk", | |
2028 | .ops = &lh7a40x_ep_ops, | |
2029 | .maxpacket = 64, | |
2030 | }, | |
2031 | .dev = &memory, | |
2032 | ||
2033 | .bEndpointAddress = 2, | |
2034 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
2035 | ||
2036 | .ep_type = ep_bulk_out, | |
2037 | .fifo = io_p2v(USB_EP2_FIFO), | |
2038 | .csr1 = USB_OUT_CSR1, | |
2039 | .csr2 = USB_OUT_CSR2, | |
2040 | }, | |
2041 | ||
2042 | .ep[3] = { | |
2043 | .ep = { | |
2044 | .name = "ep3in-int", | |
2045 | .ops = &lh7a40x_ep_ops, | |
2046 | .maxpacket = 64, | |
2047 | }, | |
2048 | .dev = &memory, | |
2049 | ||
2050 | .bEndpointAddress = USB_DIR_IN | 3, | |
2051 | .bmAttributes = USB_ENDPOINT_XFER_INT, | |
2052 | ||
2053 | .ep_type = ep_interrupt, | |
2054 | .fifo = io_p2v(USB_EP3_FIFO), | |
2055 | .csr1 = USB_IN_CSR1, | |
2056 | .csr2 = USB_IN_CSR2, | |
2057 | }, | |
2058 | }; | |
2059 | ||
2060 | /* | |
2061 | * probe - binds to the platform device | |
2062 | */ | |
3ae5eaec | 2063 | static int lh7a40x_udc_probe(struct platform_device *pdev) |
1da177e4 LT |
2064 | { |
2065 | struct lh7a40x_udc *dev = &memory; | |
2066 | int retval; | |
2067 | ||
441b62c1 | 2068 | DEBUG("%s: %p\n", __func__, pdev); |
1da177e4 LT |
2069 | |
2070 | spin_lock_init(&dev->lock); | |
3ae5eaec | 2071 | dev->dev = &pdev->dev; |
1da177e4 LT |
2072 | |
2073 | device_initialize(&dev->gadget.dev); | |
3ae5eaec | 2074 | dev->gadget.dev.parent = &pdev->dev; |
1da177e4 LT |
2075 | |
2076 | the_controller = dev; | |
3ae5eaec | 2077 | platform_set_drvdata(pdev, dev); |
1da177e4 LT |
2078 | |
2079 | udc_disable(dev); | |
2080 | udc_reinit(dev); | |
2081 | ||
2082 | /* irq setup after old hardware state is cleaned up */ | |
2083 | retval = | |
d54b5caa | 2084 | request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name, |
1da177e4 LT |
2085 | dev); |
2086 | if (retval != 0) { | |
2087 | DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name, | |
2088 | IRQ_USBINTR, retval); | |
2089 | return -EBUSY; | |
2090 | } | |
2091 | ||
2092 | create_proc_files(); | |
2093 | ||
2094 | return retval; | |
2095 | } | |
2096 | ||
3ae5eaec | 2097 | static int lh7a40x_udc_remove(struct platform_device *pdev) |
1da177e4 | 2098 | { |
3ae5eaec | 2099 | struct lh7a40x_udc *dev = platform_get_drvdata(pdev); |
1da177e4 | 2100 | |
441b62c1 | 2101 | DEBUG("%s: %p\n", __func__, pdev); |
1da177e4 | 2102 | |
6bea476c DB |
2103 | if (dev->driver) |
2104 | return -EBUSY; | |
2105 | ||
1da177e4 LT |
2106 | udc_disable(dev); |
2107 | remove_proc_files(); | |
1da177e4 LT |
2108 | |
2109 | free_irq(IRQ_USBINTR, dev); | |
2110 | ||
3ae5eaec | 2111 | platform_set_drvdata(pdev, 0); |
1da177e4 LT |
2112 | |
2113 | the_controller = 0; | |
2114 | ||
2115 | return 0; | |
2116 | } | |
2117 | ||
2118 | /*-------------------------------------------------------------------------*/ | |
2119 | ||
3ae5eaec | 2120 | static struct platform_driver udc_driver = { |
1da177e4 | 2121 | .probe = lh7a40x_udc_probe, |
0f1482fd | 2122 | .remove = lh7a40x_udc_remove, |
1da177e4 LT |
2123 | /* FIXME power management support */ |
2124 | /* .suspend = ... disable UDC */ | |
2125 | /* .resume = ... re-enable UDC */ | |
3ae5eaec RK |
2126 | .driver = { |
2127 | .name = (char *)driver_name, | |
2128 | .owner = THIS_MODULE, | |
2129 | }, | |
1da177e4 LT |
2130 | }; |
2131 | ||
2132 | static int __init udc_init(void) | |
2133 | { | |
441b62c1 | 2134 | DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION); |
3ae5eaec | 2135 | return platform_driver_register(&udc_driver); |
1da177e4 LT |
2136 | } |
2137 | ||
2138 | static void __exit udc_exit(void) | |
2139 | { | |
3ae5eaec | 2140 | platform_driver_unregister(&udc_driver); |
1da177e4 LT |
2141 | } |
2142 | ||
2143 | module_init(udc_init); | |
2144 | module_exit(udc_exit); | |
2145 | ||
2146 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2147 | MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen"); | |
2148 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2149 | MODULE_ALIAS("platform:lh7a40x_udc"); |