[deliverable/linux.git] / drivers / usb / gadget / pxa25x_udc.h

/*
 * Intel PXA25x on-chip full speed USB device controller
 *
 * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2003 David Brownell
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef __LINUX_USB_GADGET_PXA25X_H
#define __LINUX_USB_GADGET_PXA25X_H

#include <linux/types.h>

/*-------------------------------------------------------------------------*/

/* pxa25x has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
#define UFNRH_SIR	(1 << 7)	/* SOF interrupt request */
#define UFNRH_SIM	(1 << 6)	/* SOF interrupt mask */
#define UFNRH_IPE14	(1 << 5)	/* ISO packet error, ep14 */
#define UFNRH_IPE9	(1 << 4)	/* ISO packet error, ep9 */
#define UFNRH_IPE4	(1 << 3)	/* ISO packet error, ep4 */

/* pxa255 has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
#define	UDCCFR		UDC_RES2	/* UDC Control Function Register */
#define UDCCFR_AREN	(1 << 7)	/* ACK response enable (now) */
#define UDCCFR_ACM	(1 << 2)	/* ACK control mode (wait for AREN) */

/* latest pxa255 errata define new "must be one" bits in UDCCFR */
#define	UDCCFR_MB1	(0xff & ~(UDCCFR_AREN|UDCCFR_ACM))

/*-------------------------------------------------------------------------*/

struct pxa25x_udc;

struct pxa25x_ep {
	struct usb_ep				ep;
	struct pxa25x_udc			*dev;

	struct list_head			queue;
	unsigned long				pio_irqs;

	unsigned short				fifo_size;
	u8					bEndpointAddress;
	u8					bmAttributes;

	unsigned				stopped : 1;
	unsigned				dma_fixup : 1;

	/* UDCCS = UDC Control/Status for this EP
	 * UBCR = UDC Byte Count Remaining (contents of OUT fifo)
	 * UDDR = UDC Endpoint Data Register (the fifo)
	 * DRCM = DMA Request Channel Map
	 */
	volatile u32				*reg_udccs;
	volatile u32				*reg_ubcr;
	volatile u32				*reg_uddr;
};

struct pxa25x_request {
	struct usb_request			req;
	struct list_head			queue;
};

enum ep0_state {
	EP0_IDLE,
	EP0_IN_DATA_PHASE,
	EP0_OUT_DATA_PHASE,
	EP0_END_XFER,
	EP0_STALL,
};

#define EP0_FIFO_SIZE	((unsigned)16)
#define BULK_FIFO_SIZE	((unsigned)64)
#define ISO_FIFO_SIZE	((unsigned)256)
#define INT_FIFO_SIZE	((unsigned)8)

struct udc_stats {
	struct ep0stats {
		unsigned long		ops;
		unsigned long		bytes;
	} read, write;
	unsigned long			irqs;
};

#ifdef CONFIG_USB_PXA25X_SMALL
/* when memory's tight, SMALL config saves code+data.  */
#define	PXA_UDC_NUM_ENDPOINTS	3
#endif

#ifndef	PXA_UDC_NUM_ENDPOINTS
#define	PXA_UDC_NUM_ENDPOINTS	16
#endif

struct pxa25x_udc {
	struct usb_gadget			gadget;
	struct usb_gadget_driver		*driver;

	enum ep0_state				ep0state;
	struct udc_stats			stats;
	unsigned				got_irq : 1,
						vbus : 1,
						pullup : 1,
						has_cfr : 1,
						req_pending : 1,
						req_std : 1,
						req_config : 1,
						suspended : 1,
						active : 1;

#define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200))
	struct timer_list			timer;

	struct device				*dev;
	struct clk				*clk;
	struct pxa2xx_udc_mach_info		*mach;
	struct usb_phy				*transceiver;
	u64					dma_mask;
	struct pxa25x_ep			ep [PXA_UDC_NUM_ENDPOINTS];

#ifdef CONFIG_USB_GADGET_DEBUG_FS
	struct dentry				*debugfs_udc;
#endif
};
#define to_pxa25x(g)	(container_of((g), struct pxa25x_udc, gadget))

/*-------------------------------------------------------------------------*/

#ifdef CONFIG_ARCH_LUBBOCK
#include <mach/lubbock.h>
/* lubbock can also report usb connect/disconnect irqs */
#endif

static struct pxa25x_udc *the_controller;

/*-------------------------------------------------------------------------*/

/*
 * Debugging support vanishes in non-debug builds.  DBG_NORMAL should be
 * mostly silent during normal use/testing, with no timing side-effects.
 */
#define DBG_NORMAL	1	/* error paths, device state transitions */
#define DBG_VERBOSE	2	/* add some success path trace info */
#define DBG_NOISY	3	/* ... even more: request level */
#define DBG_VERY_NOISY	4	/* ... even more: packet level */

#define DMSG(stuff...)	pr_debug("udc: " stuff)

#ifdef DEBUG

static const char *state_name[] = {
	"EP0_IDLE",
	"EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE",
	"EP0_END_XFER", "EP0_STALL"
};

#ifdef VERBOSE_DEBUG
#    define UDC_DEBUG DBG_VERBOSE
#else
#    define UDC_DEBUG DBG_NORMAL
#endif

static void __maybe_unused
dump_udccr(const char *label)
{
	u32	udccr = UDCCR;
	DMSG("%s %02X =%s%s%s%s%s%s%s%s\n",
		label, udccr,
		(udccr & UDCCR_REM) ? " rem" : "",
		(udccr & UDCCR_RSTIR) ? " rstir" : "",
		(udccr & UDCCR_SRM) ? " srm" : "",
		(udccr & UDCCR_SUSIR) ? " susir" : "",
		(udccr & UDCCR_RESIR) ? " resir" : "",
		(udccr & UDCCR_RSM) ? " rsm" : "",
		(udccr & UDCCR_UDA) ? " uda" : "",
		(udccr & UDCCR_UDE) ? " ude" : "");
}

static void __maybe_unused
dump_udccs0(const char *label)
{
	u32		udccs0 = UDCCS0;

	DMSG("%s %s %02X =%s%s%s%s%s%s%s%s\n",
		label, state_name[the_controller->ep0state], udccs0,
		(udccs0 & UDCCS0_SA) ? " sa" : "",
		(udccs0 & UDCCS0_RNE) ? " rne" : "",
		(udccs0 & UDCCS0_FST) ? " fst" : "",
		(udccs0 & UDCCS0_SST) ? " sst" : "",
		(udccs0 & UDCCS0_DRWF) ? " dwrf" : "",
		(udccs0 & UDCCS0_FTF) ? " ftf" : "",
		(udccs0 & UDCCS0_IPR) ? " ipr" : "",
		(udccs0 & UDCCS0_OPR) ? " opr" : "");
}

static void __maybe_unused
dump_state(struct pxa25x_udc *dev)
{
	u32		tmp;
	unsigned	i;

	DMSG("%s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
		state_name[dev->ep0state],
		UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
	dump_udccr("udccr");
	if (dev->has_cfr) {
		tmp = UDCCFR;
		DMSG("udccfr %02X =%s%s\n", tmp,
			(tmp & UDCCFR_AREN) ? " aren" : "",
			(tmp & UDCCFR_ACM) ? " acm" : "");
	}

	if (!dev->driver) {
		DMSG("no gadget driver bound\n");
		return;
	} else
		DMSG("ep0 driver '%s'\n", dev->driver->driver.name);

	dump_udccs0 ("udccs0");
	DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
		dev->stats.write.bytes, dev->stats.write.ops,
		dev->stats.read.bytes, dev->stats.read.ops);

	for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) {
		if (dev->ep[i].ep.desc == NULL)
			continue;
		DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs);
	}
}

#else

#define	dump_udccr(x)	do{}while(0)
#define	dump_udccs0(x)	do{}while(0)
#define	dump_state(x)	do{}while(0)

#define UDC_DEBUG ((unsigned)0)

#endif

#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)

#define ERR(stuff...)		pr_err("udc: " stuff)
#define WARNING(stuff...)	pr_warning("udc: " stuff)
#define INFO(stuff...)		pr_info("udc: " stuff)


#endif /* __LINUX_USB_GADGET_PXA25X_H */
Commit	Line	Data
1da177e4	1	/*
7a857620	2	* Intel PXA25x on-chip full speed USB device controller
1da177e4 LT	3	*
	4	* Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	5	* Copyright (C) 2003 David Brownell
	6	*
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
1da177e4 LT	12	*/
1da177e4 LT	13
7a857620 PZ	14	#ifndef __LINUX_USB_GADGET_PXA25X_H
7a857620 PZ	15	#define __LINUX_USB_GADGET_PXA25X_H
1da177e4 LT	16
	17	#include <linux/types.h>
	18
	19	/-------------------------------------------------------------------------/
	20
7a857620	21	/* pxa25x has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
1da177e4 LT	22	#define UFNRH_SIR (1 << 7) /* SOF interrupt request */
	23	#define UFNRH_SIM (1 << 6) /* SOF interrupt mask */
	24	#define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */
	25	#define UFNRH_IPE9 (1 << 4) /* ISO packet error, ep9 */
	26	#define UFNRH_IPE4 (1 << 3) /* ISO packet error, ep4 */
	27
	28	/* pxa255 has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
	29	#define UDCCFR UDC_RES2 /* UDC Control Function Register */
	30	#define UDCCFR_AREN (1 << 7) /* ACK response enable (now) */
	31	#define UDCCFR_ACM (1 << 2) /* ACK control mode (wait for AREN) */
	32
	33	/* latest pxa255 errata define new "must be one" bits in UDCCFR */
	34	#define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN\|UDCCFR_ACM))
	35
	36	/-------------------------------------------------------------------------/
	37
7a857620	38	struct pxa25x_udc;
1da177e4	39
7a857620	40	struct pxa25x_ep {
1da177e4	41	struct usb_ep ep;
7a857620	42	struct pxa25x_udc *dev;
1da177e4	43
1da177e4 LT	44	struct list_head queue;
1da177e4 LT	45	unsigned long pio_irqs;
1da177e4 LT	46
	47	unsigned short fifo_size;
	48	u8 bEndpointAddress;
	49	u8 bmAttributes;
	50
	51	unsigned stopped : 1;
	52	unsigned dma_fixup : 1;
ad8c623f	53
1da177e4 LT	54	/* UDCCS = UDC Control/Status for this EP
	55	* UBCR = UDC Byte Count Remaining (contents of OUT fifo)
	56	* UDDR = UDC Endpoint Data Register (the fifo)
	57	* DRCM = DMA Request Channel Map
	58	*/
63a4b52c IC	59	volatile u32 *reg_udccs;
	60	volatile u32 *reg_ubcr;
	61	volatile u32 *reg_uddr;
1da177e4 LT	62	};
1da177e4 LT	63
7a857620	64	struct pxa25x_request {
1da177e4 LT	65	struct usb_request req;
	66	struct list_head queue;
	67	};
	68
ad8c623f	69	enum ep0_state {
1da177e4 LT	70	EP0_IDLE,
	71	EP0_IN_DATA_PHASE,
	72	EP0_OUT_DATA_PHASE,
	73	EP0_END_XFER,
	74	EP0_STALL,
	75	};
	76
	77	#define EP0_FIFO_SIZE ((unsigned)16)
	78	#define BULK_FIFO_SIZE ((unsigned)64)
	79	#define ISO_FIFO_SIZE ((unsigned)256)
	80	#define INT_FIFO_SIZE ((unsigned)8)
	81
	82	struct udc_stats {
	83	struct ep0stats {
	84	unsigned long ops;
	85	unsigned long bytes;
	86	} read, write;
	87	unsigned long irqs;
	88	};
	89
7a857620	90	#ifdef CONFIG_USB_PXA25X_SMALL
1da177e4	91	/* when memory's tight, SMALL config saves code+data. */
1da177e4 LT	92	#define PXA_UDC_NUM_ENDPOINTS 3
	93	#endif
	94
	95	#ifndef PXA_UDC_NUM_ENDPOINTS
	96	#define PXA_UDC_NUM_ENDPOINTS 16
	97	#endif
	98
7a857620	99	struct pxa25x_udc {
1da177e4 LT	100	struct usb_gadget gadget;
	101	struct usb_gadget_driver *driver;
	102
	103	enum ep0_state ep0state;
	104	struct udc_stats stats;
	105	unsigned got_irq : 1,
	106	vbus : 1,
	107	pullup : 1,
	108	has_cfr : 1,
	109	req_pending : 1,
	110	req_std : 1,
64cc2dd9 DB	111	req_config : 1,
	112	suspended : 1,
	113	active : 1;
1da177e4 LT	114
	115	#define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200))
	116	struct timer_list timer;
	117
	118	struct device *dev;
6549e6c9	119	struct clk *clk;
1da177e4	120	struct pxa2xx_udc_mach_info *mach;
86753811	121	struct usb_phy *transceiver;
1da177e4	122	u64 dma_mask;
7a857620	123	struct pxa25x_ep ep [PXA_UDC_NUM_ENDPOINTS];
040fa1b9 DB	124
	125	#ifdef CONFIG_USB_GADGET_DEBUG_FS
	126	struct dentry *debugfs_udc;
	127	#endif
1da177e4	128	};
6166c246	129	#define to_pxa25x(g) (container_of((g), struct pxa25x_udc, gadget))
1da177e4 LT	130
	131	/-------------------------------------------------------------------------/
	132
	133	#ifdef CONFIG_ARCH_LUBBOCK
a09e64fb	134	#include <mach/lubbock.h>
1da177e4	135	/* lubbock can also report usb connect/disconnect irqs */
1da177e4 LT	136	#endif
1da177e4 LT	137
7a857620	138	static struct pxa25x_udc *the_controller;
1da177e4	139
1da177e4 LT	140	/-------------------------------------------------------------------------/
	141
	142	/*
	143	* Debugging support vanishes in non-debug builds. DBG_NORMAL should be
	144	* mostly silent during normal use/testing, with no timing side-effects.
	145	*/
	146	#define DBG_NORMAL 1 /* error paths, device state transitions */
	147	#define DBG_VERBOSE 2 /* add some success path trace info */
	148	#define DBG_NOISY 3 /* ... even more: request level */
	149	#define DBG_VERY_NOISY 4 /* ... even more: packet level */
	150
00274921 DB	151	#define DMSG(stuff...) pr_debug("udc: " stuff)
00274921 DB	152
1da177e4 LT	153	#ifdef DEBUG
	154
	155	static const char *state_name[] = {
	156	"EP0_IDLE",
	157	"EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE",
	158	"EP0_END_XFER", "EP0_STALL"
	159	};
	160
040fa1b9	161	#ifdef VERBOSE_DEBUG
1da177e4 LT	162	# define UDC_DEBUG DBG_VERBOSE
	163	#else
	164	# define UDC_DEBUG DBG_NORMAL
	165	#endif
	166
8234509c	167	static void __maybe_unused
1da177e4 LT	168	dump_udccr(const char *label)
	169	{
	170	u32 udccr = UDCCR;
	171	DMSG("%s %02X =%s%s%s%s%s%s%s%s\n",
	172	label, udccr,
	173	(udccr & UDCCR_REM) ? " rem" : "",
	174	(udccr & UDCCR_RSTIR) ? " rstir" : "",
	175	(udccr & UDCCR_SRM) ? " srm" : "",
	176	(udccr & UDCCR_SUSIR) ? " susir" : "",
	177	(udccr & UDCCR_RESIR) ? " resir" : "",
	178	(udccr & UDCCR_RSM) ? " rsm" : "",
	179	(udccr & UDCCR_UDA) ? " uda" : "",
	180	(udccr & UDCCR_UDE) ? " ude" : "");
	181	}
	182
8234509c	183	static void __maybe_unused
1da177e4 LT	184	dump_udccs0(const char *label)
	185	{
	186	u32 udccs0 = UDCCS0;
	187
	188	DMSG("%s %s %02X =%s%s%s%s%s%s%s%s\n",
	189	label, state_name[the_controller->ep0state], udccs0,
	190	(udccs0 & UDCCS0_SA) ? " sa" : "",
	191	(udccs0 & UDCCS0_RNE) ? " rne" : "",
	192	(udccs0 & UDCCS0_FST) ? " fst" : "",
	193	(udccs0 & UDCCS0_SST) ? " sst" : "",
	194	(udccs0 & UDCCS0_DRWF) ? " dwrf" : "",
	195	(udccs0 & UDCCS0_FTF) ? " ftf" : "",
	196	(udccs0 & UDCCS0_IPR) ? " ipr" : "",
	197	(udccs0 & UDCCS0_OPR) ? " opr" : "");
	198	}
	199
8234509c	200	static void __maybe_unused
7a857620	201	dump_state(struct pxa25x_udc *dev)
1da177e4 LT	202	{
	203	u32 tmp;
	204	unsigned i;
	205
d5546b38	206	DMSG("%s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1da177e4 LT	207	state_name[dev->ep0state],
	208	UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
	209	dump_udccr("udccr");
	210	if (dev->has_cfr) {
	211	tmp = UDCCFR;
	212	DMSG("udccfr %02X =%s%s\n", tmp,
	213	(tmp & UDCCFR_AREN) ? " aren" : "",
	214	(tmp & UDCCFR_ACM) ? " acm" : "");
	215	}
	216
	217	if (!dev->driver) {
	218	DMSG("no gadget driver bound\n");
	219	return;
	220	} else
	221	DMSG("ep0 driver '%s'\n", dev->driver->driver.name);
	222
1da177e4 LT	223	dump_udccs0 ("udccs0");
	224	DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
	225	dev->stats.write.bytes, dev->stats.write.ops,
	226	dev->stats.read.bytes, dev->stats.read.ops);
	227
	228	for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) {
4001a7a1	229	if (dev->ep[i].ep.desc == NULL)
1da177e4 LT	230	continue;
	231	DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs);
	232	}
	233	}
	234
	235	#else
	236
1da177e4 LT	237	#define dump_udccr(x) do{}while(0)
	238	#define dump_udccs0(x) do{}while(0)
	239	#define dump_state(x) do{}while(0)
	240
	241	#define UDC_DEBUG ((unsigned)0)
	242
	243	#endif
	244
	245	#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
	246
00274921	247	#define ERR(stuff...) pr_err("udc: " stuff)
b6c63937	248	#define WARNING(stuff...) pr_warning("udc: " stuff)
00274921	249	#define INFO(stuff...) pr_info("udc: " stuff)
1da177e4 LT	250
1da177e4 LT	251
7a857620	252	#endif /* __LINUX_USB_GADGET_PXA25X_H */