Commit | Line | Data |
---|---|---|
c4144247 YS |
1 | /* |
2 | * R8A66597 UDC (USB gadget) | |
3 | * | |
4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | |
5 | * | |
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/platform_device.h> | |
d2e27bdf | 28 | #include <linux/clk.h> |
ae3a0792 | 29 | #include <linux/err.h> |
5a0e3ad6 | 30 | #include <linux/slab.h> |
c4144247 YS |
31 | |
32 | #include <linux/usb/ch9.h> | |
33 | #include <linux/usb/gadget.h> | |
34 | ||
35 | #include "r8a66597-udc.h" | |
36 | ||
37 | #define DRIVER_VERSION "2009-08-18" | |
38 | ||
39 | static const char udc_name[] = "r8a66597_udc"; | |
40 | static const char *r8a66597_ep_name[] = { | |
41 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | |
42 | "ep8", "ep9", | |
43 | }; | |
44 | ||
e576a7a9 | 45 | static void init_controller(struct r8a66597 *r8a66597); |
c4144247 YS |
46 | static void disable_controller(struct r8a66597 *r8a66597); |
47 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | |
48 | static void irq_packet_write(struct r8a66597_ep *ep, | |
49 | struct r8a66597_request *req); | |
50 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
51 | gfp_t gfp_flags); | |
52 | ||
53 | static void transfer_complete(struct r8a66597_ep *ep, | |
54 | struct r8a66597_request *req, int status); | |
55 | ||
56 | /*-------------------------------------------------------------------------*/ | |
57 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | |
58 | { | |
59 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | |
60 | } | |
61 | ||
62 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
63 | unsigned long reg) | |
64 | { | |
65 | u16 tmp; | |
66 | ||
67 | tmp = r8a66597_read(r8a66597, INTENB0); | |
68 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
69 | INTENB0); | |
70 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | |
71 | r8a66597_write(r8a66597, tmp, INTENB0); | |
72 | } | |
73 | ||
74 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
75 | unsigned long reg) | |
76 | { | |
77 | u16 tmp; | |
78 | ||
79 | tmp = r8a66597_read(r8a66597, INTENB0); | |
80 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
81 | INTENB0); | |
82 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | |
83 | r8a66597_write(r8a66597, tmp, INTENB0); | |
84 | } | |
85 | ||
86 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | |
87 | { | |
88 | r8a66597_bset(r8a66597, CTRE, INTENB0); | |
89 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | |
90 | ||
91 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | |
92 | } | |
93 | ||
94 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | |
95 | __releases(r8a66597->lock) | |
96 | __acquires(r8a66597->lock) | |
97 | { | |
98 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | |
99 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | |
100 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
101 | ||
102 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
103 | spin_unlock(&r8a66597->lock); | |
104 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
105 | spin_lock(&r8a66597->lock); | |
106 | ||
107 | disable_controller(r8a66597); | |
e576a7a9 YG |
108 | init_controller(r8a66597); |
109 | r8a66597_bset(r8a66597, VBSE, INTENB0); | |
c4144247 YS |
110 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); |
111 | } | |
112 | ||
113 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | |
114 | { | |
115 | u16 pid = 0; | |
116 | unsigned long offset; | |
117 | ||
118 | if (pipenum == 0) | |
119 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | |
120 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
121 | offset = get_pipectr_addr(pipenum); | |
122 | pid = r8a66597_read(r8a66597, offset) & PID; | |
123 | } else | |
124 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
125 | ||
126 | return pid; | |
127 | } | |
128 | ||
129 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | |
130 | u16 pid) | |
131 | { | |
132 | unsigned long offset; | |
133 | ||
134 | if (pipenum == 0) | |
135 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | |
136 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
137 | offset = get_pipectr_addr(pipenum); | |
138 | r8a66597_mdfy(r8a66597, pid, PID, offset); | |
139 | } else | |
140 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
141 | } | |
142 | ||
143 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | |
144 | { | |
145 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | |
146 | } | |
147 | ||
148 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | |
149 | { | |
150 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | |
151 | } | |
152 | ||
153 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | |
154 | { | |
155 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | |
156 | } | |
157 | ||
158 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | |
159 | { | |
160 | u16 ret = 0; | |
161 | unsigned long offset; | |
162 | ||
163 | if (pipenum == 0) | |
164 | ret = r8a66597_read(r8a66597, DCPCTR); | |
165 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
166 | offset = get_pipectr_addr(pipenum); | |
167 | ret = r8a66597_read(r8a66597, offset); | |
168 | } else | |
169 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
170 | ||
171 | return ret; | |
172 | } | |
173 | ||
174 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | |
175 | { | |
176 | unsigned long offset; | |
177 | ||
178 | pipe_stop(r8a66597, pipenum); | |
179 | ||
180 | if (pipenum == 0) | |
181 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | |
182 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
183 | offset = get_pipectr_addr(pipenum); | |
184 | r8a66597_bset(r8a66597, SQCLR, offset); | |
185 | } else | |
186 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | |
187 | } | |
188 | ||
189 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | |
190 | { | |
191 | u16 tmp; | |
192 | int size; | |
193 | ||
194 | if (pipenum == 0) { | |
195 | tmp = r8a66597_read(r8a66597, DCPCFG); | |
196 | if ((tmp & R8A66597_CNTMD) != 0) | |
197 | size = 256; | |
198 | else { | |
199 | tmp = r8a66597_read(r8a66597, DCPMAXP); | |
200 | size = tmp & MAXP; | |
201 | } | |
202 | } else { | |
203 | r8a66597_write(r8a66597, pipenum, PIPESEL); | |
204 | tmp = r8a66597_read(r8a66597, PIPECFG); | |
205 | if ((tmp & R8A66597_CNTMD) != 0) { | |
206 | tmp = r8a66597_read(r8a66597, PIPEBUF); | |
207 | size = ((tmp >> 10) + 1) * 64; | |
208 | } else { | |
209 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | |
210 | size = tmp & MXPS; | |
211 | } | |
212 | } | |
213 | ||
214 | return size; | |
215 | } | |
216 | ||
217 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | |
218 | { | |
219 | if (r8a66597->pdata->on_chip) | |
220 | return MBW_32; | |
221 | else | |
222 | return MBW_16; | |
223 | } | |
224 | ||
225 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | |
226 | { | |
227 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | |
228 | ||
229 | if (ep->use_dma) | |
230 | return; | |
231 | ||
232 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | |
233 | ||
234 | ndelay(450); | |
235 | ||
236 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
237 | } | |
238 | ||
239 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | |
240 | struct r8a66597_pipe_info *info) | |
241 | { | |
242 | u16 bufnum = 0, buf_bsize = 0; | |
243 | u16 pipecfg = 0; | |
244 | ||
245 | if (info->pipe == 0) | |
246 | return -EINVAL; | |
247 | ||
248 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | |
249 | ||
250 | if (info->dir_in) | |
251 | pipecfg |= R8A66597_DIR; | |
252 | pipecfg |= info->type; | |
253 | pipecfg |= info->epnum; | |
254 | switch (info->type) { | |
255 | case R8A66597_INT: | |
256 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | |
257 | buf_bsize = 0; | |
258 | break; | |
259 | case R8A66597_BULK: | |
ef5ce3b6 | 260 | /* isochronous pipes may be used as bulk pipes */ |
6d86d52a | 261 | if (info->pipe >= R8A66597_BASE_PIPENUM_BULK) |
ef5ce3b6 MD |
262 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; |
263 | else | |
264 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | |
265 | ||
266 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | |
c4144247 YS |
267 | buf_bsize = 7; |
268 | pipecfg |= R8A66597_DBLB; | |
269 | if (!info->dir_in) | |
270 | pipecfg |= R8A66597_SHTNAK; | |
271 | break; | |
272 | case R8A66597_ISO: | |
ef5ce3b6 | 273 | bufnum = R8A66597_BASE_BUFNUM + |
c4144247 | 274 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; |
c4144247 YS |
275 | buf_bsize = 7; |
276 | break; | |
277 | } | |
ef5ce3b6 MD |
278 | |
279 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | |
c0109b8f | 280 | pr_err("r8a66597 pipe memory is insufficient\n"); |
c4144247 YS |
281 | return -ENOMEM; |
282 | } | |
283 | ||
284 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | |
285 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | |
286 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | |
287 | if (info->interval) | |
288 | info->interval--; | |
289 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | |
295 | struct r8a66597_pipe_info *info) | |
296 | { | |
297 | if (info->pipe == 0) | |
298 | return; | |
299 | ||
c4144247 YS |
300 | if (is_bulk_pipe(info->pipe)) |
301 | r8a66597->bulk--; | |
302 | else if (is_interrupt_pipe(info->pipe)) | |
303 | r8a66597->interrupt--; | |
304 | else if (is_isoc_pipe(info->pipe)) { | |
305 | r8a66597->isochronous--; | |
306 | if (info->type == R8A66597_BULK) | |
307 | r8a66597->bulk--; | |
308 | } else | |
309 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | |
310 | info->pipe); | |
311 | } | |
312 | ||
313 | static void pipe_initialize(struct r8a66597_ep *ep) | |
314 | { | |
315 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
316 | ||
317 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | |
318 | ||
319 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | |
320 | r8a66597_write(r8a66597, 0, ep->pipectr); | |
321 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | |
322 | if (ep->use_dma) { | |
323 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | |
324 | ||
325 | ndelay(450); | |
326 | ||
327 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
328 | } | |
329 | } | |
330 | ||
331 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | |
332 | struct r8a66597_ep *ep, | |
333 | const struct usb_endpoint_descriptor *desc, | |
334 | u16 pipenum, int dma) | |
335 | { | |
336 | ep->use_dma = 0; | |
337 | ep->fifoaddr = CFIFO; | |
338 | ep->fifosel = CFIFOSEL; | |
339 | ep->fifoctr = CFIFOCTR; | |
340 | ep->fifotrn = 0; | |
341 | ||
342 | ep->pipectr = get_pipectr_addr(pipenum); | |
343 | ep->pipenum = pipenum; | |
344 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
345 | r8a66597->pipenum2ep[pipenum] = ep; | |
346 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | |
347 | = ep; | |
348 | INIT_LIST_HEAD(&ep->queue); | |
349 | } | |
350 | ||
351 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | |
352 | { | |
353 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
354 | u16 pipenum = ep->pipenum; | |
355 | ||
356 | if (pipenum == 0) | |
357 | return; | |
358 | ||
359 | if (ep->use_dma) | |
360 | r8a66597->num_dma--; | |
361 | ep->pipenum = 0; | |
362 | ep->busy = 0; | |
363 | ep->use_dma = 0; | |
364 | } | |
365 | ||
366 | static int alloc_pipe_config(struct r8a66597_ep *ep, | |
367 | const struct usb_endpoint_descriptor *desc) | |
368 | { | |
369 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
370 | struct r8a66597_pipe_info info; | |
371 | int dma = 0; | |
372 | unsigned char *counter; | |
373 | int ret; | |
374 | ||
375 | ep->desc = desc; | |
376 | ||
377 | if (ep->pipenum) /* already allocated pipe */ | |
378 | return 0; | |
379 | ||
380 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
381 | case USB_ENDPOINT_XFER_BULK: | |
382 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | |
383 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
384 | printk(KERN_ERR "bulk pipe is insufficient\n"); | |
385 | return -ENODEV; | |
386 | } else { | |
387 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | |
388 | + r8a66597->isochronous; | |
389 | counter = &r8a66597->isochronous; | |
390 | } | |
391 | } else { | |
392 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | |
393 | counter = &r8a66597->bulk; | |
394 | } | |
395 | info.type = R8A66597_BULK; | |
396 | dma = 1; | |
397 | break; | |
398 | case USB_ENDPOINT_XFER_INT: | |
399 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | |
400 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | |
401 | return -ENODEV; | |
402 | } | |
403 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | |
404 | info.type = R8A66597_INT; | |
405 | counter = &r8a66597->interrupt; | |
406 | break; | |
407 | case USB_ENDPOINT_XFER_ISOC: | |
408 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
409 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | |
410 | return -ENODEV; | |
411 | } | |
412 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | |
413 | info.type = R8A66597_ISO; | |
414 | counter = &r8a66597->isochronous; | |
415 | break; | |
416 | default: | |
417 | printk(KERN_ERR "unexpect xfer type\n"); | |
418 | return -EINVAL; | |
419 | } | |
420 | ep->type = info.type; | |
421 | ||
422 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | |
423 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
424 | info.interval = desc->bInterval; | |
425 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | |
426 | info.dir_in = 1; | |
427 | else | |
428 | info.dir_in = 0; | |
429 | ||
430 | ret = pipe_buffer_setting(r8a66597, &info); | |
431 | if (ret < 0) { | |
432 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | |
433 | return ret; | |
434 | } | |
435 | ||
436 | (*counter)++; | |
437 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | |
438 | r8a66597->bulk++; | |
439 | ||
440 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | |
441 | pipe_initialize(ep); | |
442 | ||
443 | return 0; | |
444 | } | |
445 | ||
446 | static int free_pipe_config(struct r8a66597_ep *ep) | |
447 | { | |
448 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
449 | struct r8a66597_pipe_info info; | |
450 | ||
451 | info.pipe = ep->pipenum; | |
452 | info.type = ep->type; | |
453 | pipe_buffer_release(r8a66597, &info); | |
454 | r8a66597_ep_release(ep); | |
455 | ||
456 | return 0; | |
457 | } | |
458 | ||
459 | /*-------------------------------------------------------------------------*/ | |
460 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | |
461 | { | |
462 | enable_irq_ready(r8a66597, pipenum); | |
463 | enable_irq_nrdy(r8a66597, pipenum); | |
464 | } | |
465 | ||
466 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | |
467 | { | |
468 | disable_irq_ready(r8a66597, pipenum); | |
469 | disable_irq_nrdy(r8a66597, pipenum); | |
470 | } | |
471 | ||
472 | /* if complete is true, gadget driver complete function is not call */ | |
473 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | |
474 | { | |
475 | r8a66597->ep[0].internal_ccpl = ccpl; | |
476 | pipe_start(r8a66597, 0); | |
477 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | |
478 | } | |
479 | ||
480 | static void start_ep0_write(struct r8a66597_ep *ep, | |
481 | struct r8a66597_request *req) | |
482 | { | |
483 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
484 | ||
485 | pipe_change(r8a66597, ep->pipenum); | |
486 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | |
487 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
488 | if (req->req.length == 0) { | |
489 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
490 | pipe_start(r8a66597, 0); | |
491 | transfer_complete(ep, req, 0); | |
492 | } else { | |
493 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
494 | irq_ep0_write(ep, req); | |
495 | } | |
496 | } | |
497 | ||
498 | static void start_packet_write(struct r8a66597_ep *ep, | |
499 | struct r8a66597_request *req) | |
500 | { | |
501 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
502 | u16 tmp; | |
503 | ||
504 | pipe_change(r8a66597, ep->pipenum); | |
505 | disable_irq_empty(r8a66597, ep->pipenum); | |
506 | pipe_start(r8a66597, ep->pipenum); | |
507 | ||
508 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
509 | if (unlikely((tmp & FRDY) == 0)) | |
510 | pipe_irq_enable(r8a66597, ep->pipenum); | |
511 | else | |
512 | irq_packet_write(ep, req); | |
513 | } | |
514 | ||
515 | static void start_packet_read(struct r8a66597_ep *ep, | |
516 | struct r8a66597_request *req) | |
517 | { | |
518 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
519 | u16 pipenum = ep->pipenum; | |
520 | ||
521 | if (ep->pipenum == 0) { | |
522 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | |
523 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
524 | pipe_start(r8a66597, pipenum); | |
525 | pipe_irq_enable(r8a66597, pipenum); | |
526 | } else { | |
527 | if (ep->use_dma) { | |
528 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | |
529 | pipe_change(r8a66597, pipenum); | |
530 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | |
531 | r8a66597_write(r8a66597, | |
532 | (req->req.length + ep->ep.maxpacket - 1) | |
533 | / ep->ep.maxpacket, | |
534 | ep->fifotrn); | |
535 | } | |
536 | pipe_start(r8a66597, pipenum); /* trigger once */ | |
537 | pipe_irq_enable(r8a66597, pipenum); | |
538 | } | |
539 | } | |
540 | ||
541 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
542 | { | |
543 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
544 | start_packet_write(ep, req); | |
545 | else | |
546 | start_packet_read(ep, req); | |
547 | } | |
548 | ||
549 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
550 | { | |
551 | u16 ctsq; | |
552 | ||
553 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | |
554 | ||
555 | switch (ctsq) { | |
556 | case CS_RDDS: | |
557 | start_ep0_write(ep, req); | |
558 | break; | |
559 | case CS_WRDS: | |
560 | start_packet_read(ep, req); | |
561 | break; | |
562 | ||
563 | case CS_WRND: | |
564 | control_end(ep->r8a66597, 0); | |
565 | break; | |
566 | default: | |
567 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | |
568 | break; | |
569 | } | |
570 | } | |
571 | ||
572 | static void init_controller(struct r8a66597 *r8a66597) | |
573 | { | |
574 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | |
575 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | |
576 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | |
577 | ||
578 | if (r8a66597->pdata->on_chip) { | |
579 | r8a66597_bset(r8a66597, 0x04, SYSCFG1); | |
580 | r8a66597_bset(r8a66597, HSE, SYSCFG0); | |
581 | ||
582 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
583 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
584 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
585 | ||
586 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
587 | ||
588 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
589 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
590 | DMA0CFG); | |
591 | } else { | |
592 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | |
593 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | |
594 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | |
595 | XTAL, SYSCFG0); | |
596 | ||
597 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
598 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
599 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
600 | ||
601 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
602 | ||
603 | msleep(3); | |
604 | ||
605 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | |
606 | ||
607 | msleep(1); | |
608 | ||
609 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
610 | ||
611 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
612 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
613 | DMA0CFG); | |
614 | } | |
615 | } | |
616 | ||
617 | static void disable_controller(struct r8a66597 *r8a66597) | |
618 | { | |
619 | if (r8a66597->pdata->on_chip) { | |
620 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
621 | ||
0bb886d2 | 622 | /* disable interrupts */ |
c4144247 YS |
623 | r8a66597_write(r8a66597, 0, INTENB0); |
624 | r8a66597_write(r8a66597, 0, INTENB1); | |
0bb886d2 MD |
625 | r8a66597_write(r8a66597, 0, BRDYENB); |
626 | r8a66597_write(r8a66597, 0, BEMPENB); | |
627 | r8a66597_write(r8a66597, 0, NRDYENB); | |
628 | ||
629 | /* clear status */ | |
630 | r8a66597_write(r8a66597, 0, BRDYSTS); | |
631 | r8a66597_write(r8a66597, 0, NRDYSTS); | |
632 | r8a66597_write(r8a66597, 0, BEMPSTS); | |
c4144247 YS |
633 | |
634 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
635 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
636 | ||
637 | } else { | |
638 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
639 | udelay(1); | |
640 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | |
641 | udelay(1); | |
642 | udelay(1); | |
643 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | |
644 | } | |
645 | } | |
646 | ||
647 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | |
648 | { | |
649 | u16 tmp; | |
650 | ||
651 | if (!r8a66597->pdata->on_chip) { | |
652 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
653 | if (!(tmp & XCKE)) | |
654 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
655 | } | |
656 | } | |
657 | ||
658 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | |
659 | { | |
660 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | |
661 | } | |
662 | ||
663 | /*-------------------------------------------------------------------------*/ | |
664 | static void transfer_complete(struct r8a66597_ep *ep, | |
665 | struct r8a66597_request *req, int status) | |
666 | __releases(r8a66597->lock) | |
667 | __acquires(r8a66597->lock) | |
668 | { | |
669 | int restart = 0; | |
670 | ||
671 | if (unlikely(ep->pipenum == 0)) { | |
672 | if (ep->internal_ccpl) { | |
673 | ep->internal_ccpl = 0; | |
674 | return; | |
675 | } | |
676 | } | |
677 | ||
678 | list_del_init(&req->queue); | |
679 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
680 | req->req.status = -ESHUTDOWN; | |
681 | else | |
682 | req->req.status = status; | |
683 | ||
684 | if (!list_empty(&ep->queue)) | |
685 | restart = 1; | |
686 | ||
687 | spin_unlock(&ep->r8a66597->lock); | |
688 | req->req.complete(&ep->ep, &req->req); | |
689 | spin_lock(&ep->r8a66597->lock); | |
690 | ||
691 | if (restart) { | |
692 | req = get_request_from_ep(ep); | |
693 | if (ep->desc) | |
694 | start_packet(ep, req); | |
695 | } | |
696 | } | |
697 | ||
698 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
699 | { | |
700 | int i; | |
701 | u16 tmp; | |
702 | unsigned bufsize; | |
703 | size_t size; | |
704 | void *buf; | |
705 | u16 pipenum = ep->pipenum; | |
706 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
707 | ||
708 | pipe_change(r8a66597, pipenum); | |
709 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | |
710 | ||
711 | i = 0; | |
712 | do { | |
713 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
714 | if (i++ > 100000) { | |
715 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | |
716 | "conflict. please power off this controller."); | |
717 | return; | |
718 | } | |
719 | ndelay(1); | |
720 | } while ((tmp & FRDY) == 0); | |
721 | ||
722 | /* prepare parameters */ | |
723 | bufsize = get_buffer_size(r8a66597, pipenum); | |
724 | buf = req->req.buf + req->req.actual; | |
725 | size = min(bufsize, req->req.length - req->req.actual); | |
726 | ||
727 | /* write fifo */ | |
728 | if (req->req.buf) { | |
729 | if (size > 0) | |
730 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
731 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | |
732 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
733 | } | |
734 | ||
735 | /* update parameters */ | |
736 | req->req.actual += size; | |
737 | ||
738 | /* check transfer finish */ | |
739 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
740 | || (size % ep->ep.maxpacket) | |
741 | || (size == 0)) { | |
742 | disable_irq_ready(r8a66597, pipenum); | |
743 | disable_irq_empty(r8a66597, pipenum); | |
744 | } else { | |
745 | disable_irq_ready(r8a66597, pipenum); | |
746 | enable_irq_empty(r8a66597, pipenum); | |
747 | } | |
748 | pipe_start(r8a66597, pipenum); | |
749 | } | |
750 | ||
751 | static void irq_packet_write(struct r8a66597_ep *ep, | |
752 | struct r8a66597_request *req) | |
753 | { | |
754 | u16 tmp; | |
755 | unsigned bufsize; | |
756 | size_t size; | |
757 | void *buf; | |
758 | u16 pipenum = ep->pipenum; | |
759 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
760 | ||
761 | pipe_change(r8a66597, pipenum); | |
762 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
763 | if (unlikely((tmp & FRDY) == 0)) { | |
764 | pipe_stop(r8a66597, pipenum); | |
765 | pipe_irq_disable(r8a66597, pipenum); | |
766 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | |
767 | return; | |
768 | } | |
769 | ||
770 | /* prepare parameters */ | |
771 | bufsize = get_buffer_size(r8a66597, pipenum); | |
772 | buf = req->req.buf + req->req.actual; | |
773 | size = min(bufsize, req->req.length - req->req.actual); | |
774 | ||
775 | /* write fifo */ | |
776 | if (req->req.buf) { | |
777 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
778 | if ((size == 0) | |
779 | || ((size % ep->ep.maxpacket) != 0) | |
780 | || ((bufsize != ep->ep.maxpacket) | |
781 | && (bufsize > size))) | |
782 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
783 | } | |
784 | ||
785 | /* update parameters */ | |
786 | req->req.actual += size; | |
787 | /* check transfer finish */ | |
788 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
789 | || (size % ep->ep.maxpacket) | |
790 | || (size == 0)) { | |
791 | disable_irq_ready(r8a66597, pipenum); | |
792 | enable_irq_empty(r8a66597, pipenum); | |
793 | } else { | |
794 | disable_irq_empty(r8a66597, pipenum); | |
795 | pipe_irq_enable(r8a66597, pipenum); | |
796 | } | |
797 | } | |
798 | ||
799 | static void irq_packet_read(struct r8a66597_ep *ep, | |
800 | struct r8a66597_request *req) | |
801 | { | |
802 | u16 tmp; | |
803 | int rcv_len, bufsize, req_len; | |
804 | int size; | |
805 | void *buf; | |
806 | u16 pipenum = ep->pipenum; | |
807 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
808 | int finish = 0; | |
809 | ||
810 | pipe_change(r8a66597, pipenum); | |
811 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
812 | if (unlikely((tmp & FRDY) == 0)) { | |
813 | req->req.status = -EPIPE; | |
814 | pipe_stop(r8a66597, pipenum); | |
815 | pipe_irq_disable(r8a66597, pipenum); | |
816 | printk(KERN_ERR "read fifo not ready"); | |
817 | return; | |
818 | } | |
819 | ||
820 | /* prepare parameters */ | |
821 | rcv_len = tmp & DTLN; | |
822 | bufsize = get_buffer_size(r8a66597, pipenum); | |
823 | ||
824 | buf = req->req.buf + req->req.actual; | |
825 | req_len = req->req.length - req->req.actual; | |
826 | if (rcv_len < bufsize) | |
827 | size = min(rcv_len, req_len); | |
828 | else | |
829 | size = min(bufsize, req_len); | |
830 | ||
831 | /* update parameters */ | |
832 | req->req.actual += size; | |
833 | ||
834 | /* check transfer finish */ | |
835 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
836 | || (size % ep->ep.maxpacket) | |
837 | || (size == 0)) { | |
838 | pipe_stop(r8a66597, pipenum); | |
839 | pipe_irq_disable(r8a66597, pipenum); | |
840 | finish = 1; | |
841 | } | |
842 | ||
843 | /* read fifo */ | |
844 | if (req->req.buf) { | |
845 | if (size == 0) | |
846 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
847 | else | |
848 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | |
849 | ||
850 | } | |
851 | ||
852 | if ((ep->pipenum != 0) && finish) | |
853 | transfer_complete(ep, req, 0); | |
854 | } | |
855 | ||
856 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
857 | { | |
858 | u16 check; | |
859 | u16 pipenum; | |
860 | struct r8a66597_ep *ep; | |
861 | struct r8a66597_request *req; | |
862 | ||
863 | if ((status & BRDY0) && (enb & BRDY0)) { | |
864 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | |
865 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | |
866 | ||
867 | ep = &r8a66597->ep[0]; | |
868 | req = get_request_from_ep(ep); | |
869 | irq_packet_read(ep, req); | |
870 | } else { | |
871 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
872 | check = 1 << pipenum; | |
873 | if ((status & check) && (enb & check)) { | |
874 | r8a66597_write(r8a66597, ~check, BRDYSTS); | |
875 | ep = r8a66597->pipenum2ep[pipenum]; | |
876 | req = get_request_from_ep(ep); | |
877 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
878 | irq_packet_write(ep, req); | |
879 | else | |
880 | irq_packet_read(ep, req); | |
881 | } | |
882 | } | |
883 | } | |
884 | } | |
885 | ||
886 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
887 | { | |
888 | u16 tmp; | |
889 | u16 check; | |
890 | u16 pipenum; | |
891 | struct r8a66597_ep *ep; | |
892 | struct r8a66597_request *req; | |
893 | ||
894 | if ((status & BEMP0) && (enb & BEMP0)) { | |
895 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
896 | ||
897 | ep = &r8a66597->ep[0]; | |
898 | req = get_request_from_ep(ep); | |
899 | irq_ep0_write(ep, req); | |
900 | } else { | |
901 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
902 | check = 1 << pipenum; | |
903 | if ((status & check) && (enb & check)) { | |
904 | r8a66597_write(r8a66597, ~check, BEMPSTS); | |
905 | tmp = control_reg_get(r8a66597, pipenum); | |
906 | if ((tmp & INBUFM) == 0) { | |
907 | disable_irq_empty(r8a66597, pipenum); | |
908 | pipe_irq_disable(r8a66597, pipenum); | |
909 | pipe_stop(r8a66597, pipenum); | |
910 | ep = r8a66597->pipenum2ep[pipenum]; | |
911 | req = get_request_from_ep(ep); | |
912 | if (!list_empty(&ep->queue)) | |
913 | transfer_complete(ep, req, 0); | |
914 | } | |
915 | } | |
916 | } | |
917 | } | |
918 | } | |
919 | ||
920 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
921 | __releases(r8a66597->lock) | |
922 | __acquires(r8a66597->lock) | |
923 | { | |
924 | struct r8a66597_ep *ep; | |
925 | u16 pid; | |
926 | u16 status = 0; | |
927 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
928 | ||
929 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
930 | case USB_RECIP_DEVICE: | |
931 | status = 1 << USB_DEVICE_SELF_POWERED; | |
932 | break; | |
933 | case USB_RECIP_INTERFACE: | |
934 | status = 0; | |
935 | break; | |
936 | case USB_RECIP_ENDPOINT: | |
937 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
938 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | |
939 | if (pid == PID_STALL) | |
940 | status = 1 << USB_ENDPOINT_HALT; | |
941 | else | |
942 | status = 0; | |
943 | break; | |
944 | default: | |
945 | pipe_stall(r8a66597, 0); | |
946 | return; /* exit */ | |
947 | } | |
948 | ||
949 | r8a66597->ep0_data = cpu_to_le16(status); | |
950 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | |
951 | r8a66597->ep0_req->length = 2; | |
952 | /* AV: what happens if we get called again before that gets through? */ | |
953 | spin_unlock(&r8a66597->lock); | |
954 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | |
955 | spin_lock(&r8a66597->lock); | |
956 | } | |
957 | ||
958 | static void clear_feature(struct r8a66597 *r8a66597, | |
959 | struct usb_ctrlrequest *ctrl) | |
960 | { | |
961 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
962 | case USB_RECIP_DEVICE: | |
963 | control_end(r8a66597, 1); | |
964 | break; | |
965 | case USB_RECIP_INTERFACE: | |
966 | control_end(r8a66597, 1); | |
967 | break; | |
968 | case USB_RECIP_ENDPOINT: { | |
969 | struct r8a66597_ep *ep; | |
970 | struct r8a66597_request *req; | |
971 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
972 | ||
973 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
9e7291c1 YS |
974 | if (!ep->wedge) { |
975 | pipe_stop(r8a66597, ep->pipenum); | |
976 | control_reg_sqclr(r8a66597, ep->pipenum); | |
977 | spin_unlock(&r8a66597->lock); | |
978 | usb_ep_clear_halt(&ep->ep); | |
979 | spin_lock(&r8a66597->lock); | |
980 | } | |
c4144247 YS |
981 | |
982 | control_end(r8a66597, 1); | |
983 | ||
984 | req = get_request_from_ep(ep); | |
985 | if (ep->busy) { | |
986 | ep->busy = 0; | |
987 | if (list_empty(&ep->queue)) | |
988 | break; | |
989 | start_packet(ep, req); | |
990 | } else if (!list_empty(&ep->queue)) | |
991 | pipe_start(r8a66597, ep->pipenum); | |
992 | } | |
993 | break; | |
994 | default: | |
995 | pipe_stall(r8a66597, 0); | |
996 | break; | |
997 | } | |
998 | } | |
999 | ||
1000 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
1001 | { | |
1002 | ||
1003 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
1004 | case USB_RECIP_DEVICE: | |
1005 | control_end(r8a66597, 1); | |
1006 | break; | |
1007 | case USB_RECIP_INTERFACE: | |
1008 | control_end(r8a66597, 1); | |
1009 | break; | |
1010 | case USB_RECIP_ENDPOINT: { | |
1011 | struct r8a66597_ep *ep; | |
1012 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
1013 | ||
1014 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
1015 | pipe_stall(r8a66597, ep->pipenum); | |
1016 | ||
1017 | control_end(r8a66597, 1); | |
1018 | } | |
1019 | break; | |
1020 | default: | |
1021 | pipe_stall(r8a66597, 0); | |
1022 | break; | |
1023 | } | |
1024 | } | |
1025 | ||
1026 | /* if return value is true, call class driver's setup() */ | |
1027 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
1028 | { | |
1029 | u16 *p = (u16 *)ctrl; | |
1030 | unsigned long offset = USBREQ; | |
1031 | int i, ret = 0; | |
1032 | ||
1033 | /* read fifo */ | |
1034 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | |
1035 | ||
1036 | for (i = 0; i < 4; i++) | |
1037 | p[i] = r8a66597_read(r8a66597, offset + i*2); | |
1038 | ||
1039 | /* check request */ | |
1040 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
1041 | switch (ctrl->bRequest) { | |
1042 | case USB_REQ_GET_STATUS: | |
1043 | get_status(r8a66597, ctrl); | |
1044 | break; | |
1045 | case USB_REQ_CLEAR_FEATURE: | |
1046 | clear_feature(r8a66597, ctrl); | |
1047 | break; | |
1048 | case USB_REQ_SET_FEATURE: | |
1049 | set_feature(r8a66597, ctrl); | |
1050 | break; | |
1051 | default: | |
1052 | ret = 1; | |
1053 | break; | |
1054 | } | |
1055 | } else | |
1056 | ret = 1; | |
1057 | return ret; | |
1058 | } | |
1059 | ||
1060 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | |
1061 | { | |
1062 | u16 speed = get_usb_speed(r8a66597); | |
1063 | ||
1064 | switch (speed) { | |
1065 | case HSMODE: | |
1066 | r8a66597->gadget.speed = USB_SPEED_HIGH; | |
1067 | break; | |
1068 | case FSMODE: | |
1069 | r8a66597->gadget.speed = USB_SPEED_FULL; | |
1070 | break; | |
1071 | default: | |
1072 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
1073 | printk(KERN_ERR "USB speed unknown\n"); | |
1074 | } | |
1075 | } | |
1076 | ||
1077 | static void irq_device_state(struct r8a66597 *r8a66597) | |
1078 | { | |
1079 | u16 dvsq; | |
1080 | ||
1081 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | |
1082 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | |
1083 | ||
1084 | if (dvsq == DS_DFLT) { | |
1085 | /* bus reset */ | |
2c2da179 | 1086 | spin_unlock(&r8a66597->lock); |
c4144247 | 1087 | r8a66597->driver->disconnect(&r8a66597->gadget); |
2c2da179 | 1088 | spin_lock(&r8a66597->lock); |
c4144247 YS |
1089 | r8a66597_update_usb_speed(r8a66597); |
1090 | } | |
1091 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | |
1092 | r8a66597_update_usb_speed(r8a66597); | |
1093 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | |
1094 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1095 | r8a66597_update_usb_speed(r8a66597); | |
1096 | ||
1097 | r8a66597->old_dvsq = dvsq; | |
1098 | } | |
1099 | ||
1100 | static void irq_control_stage(struct r8a66597 *r8a66597) | |
1101 | __releases(r8a66597->lock) | |
1102 | __acquires(r8a66597->lock) | |
1103 | { | |
1104 | struct usb_ctrlrequest ctrl; | |
1105 | u16 ctsq; | |
1106 | ||
1107 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | |
1108 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | |
1109 | ||
1110 | switch (ctsq) { | |
1111 | case CS_IDST: { | |
1112 | struct r8a66597_ep *ep; | |
1113 | struct r8a66597_request *req; | |
1114 | ep = &r8a66597->ep[0]; | |
1115 | req = get_request_from_ep(ep); | |
1116 | transfer_complete(ep, req, 0); | |
1117 | } | |
1118 | break; | |
1119 | ||
1120 | case CS_RDDS: | |
1121 | case CS_WRDS: | |
1122 | case CS_WRND: | |
1123 | if (setup_packet(r8a66597, &ctrl)) { | |
1124 | spin_unlock(&r8a66597->lock); | |
1125 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | |
1126 | < 0) | |
1127 | pipe_stall(r8a66597, 0); | |
1128 | spin_lock(&r8a66597->lock); | |
1129 | } | |
1130 | break; | |
1131 | case CS_RDSS: | |
1132 | case CS_WRSS: | |
1133 | control_end(r8a66597, 0); | |
1134 | break; | |
1135 | default: | |
1136 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | |
1137 | break; | |
1138 | } | |
1139 | } | |
1140 | ||
1141 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | |
1142 | { | |
1143 | struct r8a66597 *r8a66597 = _r8a66597; | |
1144 | u16 intsts0; | |
1145 | u16 intenb0; | |
1146 | u16 brdysts, nrdysts, bempsts; | |
1147 | u16 brdyenb, nrdyenb, bempenb; | |
1148 | u16 savepipe; | |
1149 | u16 mask0; | |
1150 | ||
1151 | spin_lock(&r8a66597->lock); | |
1152 | ||
1153 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | |
1154 | intenb0 = r8a66597_read(r8a66597, INTENB0); | |
1155 | ||
1156 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | |
1157 | ||
1158 | mask0 = intsts0 & intenb0; | |
1159 | if (mask0) { | |
1160 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | |
1161 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | |
1162 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | |
1163 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | |
1164 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | |
1165 | bempenb = r8a66597_read(r8a66597, BEMPENB); | |
1166 | ||
1167 | if (mask0 & VBINT) { | |
1168 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | |
1169 | INTSTS0); | |
1170 | r8a66597_start_xclock(r8a66597); | |
1171 | ||
1172 | /* start vbus sampling */ | |
1173 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | |
1174 | & VBSTS; | |
1175 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1176 | ||
1177 | mod_timer(&r8a66597->timer, | |
1178 | jiffies + msecs_to_jiffies(50)); | |
1179 | } | |
1180 | if (intsts0 & DVSQ) | |
1181 | irq_device_state(r8a66597); | |
1182 | ||
1183 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | |
1184 | && (brdysts & brdyenb)) | |
1185 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | |
1186 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | |
1187 | && (bempsts & bempenb)) | |
1188 | irq_pipe_empty(r8a66597, bempsts, bempenb); | |
1189 | ||
1190 | if (intsts0 & CTRT) | |
1191 | irq_control_stage(r8a66597); | |
1192 | } | |
1193 | ||
1194 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | |
1195 | ||
1196 | spin_unlock(&r8a66597->lock); | |
1197 | return IRQ_HANDLED; | |
1198 | } | |
1199 | ||
1200 | static void r8a66597_timer(unsigned long _r8a66597) | |
1201 | { | |
1202 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | |
1203 | unsigned long flags; | |
1204 | u16 tmp; | |
1205 | ||
1206 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1207 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
1208 | if (r8a66597->scount > 0) { | |
1209 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | |
1210 | if (tmp == r8a66597->old_vbus) { | |
1211 | r8a66597->scount--; | |
1212 | if (r8a66597->scount == 0) { | |
1213 | if (tmp == VBSTS) | |
1214 | r8a66597_usb_connect(r8a66597); | |
1215 | else | |
1216 | r8a66597_usb_disconnect(r8a66597); | |
1217 | } else { | |
1218 | mod_timer(&r8a66597->timer, | |
1219 | jiffies + msecs_to_jiffies(50)); | |
1220 | } | |
1221 | } else { | |
1222 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1223 | r8a66597->old_vbus = tmp; | |
1224 | mod_timer(&r8a66597->timer, | |
1225 | jiffies + msecs_to_jiffies(50)); | |
1226 | } | |
1227 | } | |
1228 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1229 | } | |
1230 | ||
1231 | /*-------------------------------------------------------------------------*/ | |
1232 | static int r8a66597_enable(struct usb_ep *_ep, | |
1233 | const struct usb_endpoint_descriptor *desc) | |
1234 | { | |
1235 | struct r8a66597_ep *ep; | |
1236 | ||
1237 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1238 | return alloc_pipe_config(ep, desc); | |
1239 | } | |
1240 | ||
1241 | static int r8a66597_disable(struct usb_ep *_ep) | |
1242 | { | |
1243 | struct r8a66597_ep *ep; | |
1244 | struct r8a66597_request *req; | |
1245 | unsigned long flags; | |
1246 | ||
1247 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1248 | BUG_ON(!ep); | |
1249 | ||
1250 | while (!list_empty(&ep->queue)) { | |
1251 | req = get_request_from_ep(ep); | |
1252 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1253 | transfer_complete(ep, req, -ECONNRESET); | |
1254 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1255 | } | |
1256 | ||
1257 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | |
1258 | return free_pipe_config(ep); | |
1259 | } | |
1260 | ||
1261 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | |
1262 | gfp_t gfp_flags) | |
1263 | { | |
1264 | struct r8a66597_request *req; | |
1265 | ||
1266 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | |
1267 | if (!req) | |
1268 | return NULL; | |
1269 | ||
1270 | INIT_LIST_HEAD(&req->queue); | |
1271 | ||
1272 | return &req->req; | |
1273 | } | |
1274 | ||
1275 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1276 | { | |
1277 | struct r8a66597_request *req; | |
1278 | ||
1279 | req = container_of(_req, struct r8a66597_request, req); | |
1280 | kfree(req); | |
1281 | } | |
1282 | ||
1283 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1284 | gfp_t gfp_flags) | |
1285 | { | |
1286 | struct r8a66597_ep *ep; | |
1287 | struct r8a66597_request *req; | |
1288 | unsigned long flags; | |
1289 | int request = 0; | |
1290 | ||
1291 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1292 | req = container_of(_req, struct r8a66597_request, req); | |
1293 | ||
1294 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1295 | return -ESHUTDOWN; | |
1296 | ||
1297 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1298 | ||
1299 | if (list_empty(&ep->queue)) | |
1300 | request = 1; | |
1301 | ||
1302 | list_add_tail(&req->queue, &ep->queue); | |
1303 | req->req.actual = 0; | |
1304 | req->req.status = -EINPROGRESS; | |
1305 | ||
1306 | if (ep->desc == NULL) /* control */ | |
1307 | start_ep0(ep, req); | |
1308 | else { | |
1309 | if (request && !ep->busy) | |
1310 | start_packet(ep, req); | |
1311 | } | |
1312 | ||
1313 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1314 | ||
1315 | return 0; | |
1316 | } | |
1317 | ||
1318 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1319 | { | |
1320 | struct r8a66597_ep *ep; | |
1321 | struct r8a66597_request *req; | |
1322 | unsigned long flags; | |
1323 | ||
1324 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1325 | req = container_of(_req, struct r8a66597_request, req); | |
1326 | ||
1327 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1328 | if (!list_empty(&ep->queue)) | |
1329 | transfer_complete(ep, req, -ECONNRESET); | |
1330 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1331 | ||
1332 | return 0; | |
1333 | } | |
1334 | ||
1335 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | |
1336 | { | |
1337 | struct r8a66597_ep *ep; | |
1338 | struct r8a66597_request *req; | |
1339 | unsigned long flags; | |
1340 | int ret = 0; | |
1341 | ||
1342 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1343 | req = get_request_from_ep(ep); | |
1344 | ||
1345 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1346 | if (!list_empty(&ep->queue)) { | |
1347 | ret = -EAGAIN; | |
1348 | goto out; | |
1349 | } | |
1350 | if (value) { | |
1351 | ep->busy = 1; | |
1352 | pipe_stall(ep->r8a66597, ep->pipenum); | |
1353 | } else { | |
1354 | ep->busy = 0; | |
9e7291c1 | 1355 | ep->wedge = 0; |
c4144247 YS |
1356 | pipe_stop(ep->r8a66597, ep->pipenum); |
1357 | } | |
1358 | ||
1359 | out: | |
1360 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1361 | return ret; | |
1362 | } | |
1363 | ||
9e7291c1 YS |
1364 | static int r8a66597_set_wedge(struct usb_ep *_ep) |
1365 | { | |
1366 | struct r8a66597_ep *ep; | |
1367 | unsigned long flags; | |
1368 | ||
1369 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1370 | ||
1371 | if (!ep || !ep->desc) | |
1372 | return -EINVAL; | |
1373 | ||
1374 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1375 | ep->wedge = 1; | |
1376 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1377 | ||
1378 | return usb_ep_set_halt(_ep); | |
1379 | } | |
1380 | ||
c4144247 YS |
1381 | static void r8a66597_fifo_flush(struct usb_ep *_ep) |
1382 | { | |
1383 | struct r8a66597_ep *ep; | |
1384 | unsigned long flags; | |
1385 | ||
1386 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1387 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1388 | if (list_empty(&ep->queue) && !ep->busy) { | |
1389 | pipe_stop(ep->r8a66597, ep->pipenum); | |
1390 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | |
1391 | } | |
1392 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1393 | } | |
1394 | ||
1395 | static struct usb_ep_ops r8a66597_ep_ops = { | |
1396 | .enable = r8a66597_enable, | |
1397 | .disable = r8a66597_disable, | |
1398 | ||
1399 | .alloc_request = r8a66597_alloc_request, | |
1400 | .free_request = r8a66597_free_request, | |
1401 | ||
1402 | .queue = r8a66597_queue, | |
1403 | .dequeue = r8a66597_dequeue, | |
1404 | ||
1405 | .set_halt = r8a66597_set_halt, | |
9e7291c1 | 1406 | .set_wedge = r8a66597_set_wedge, |
c4144247 YS |
1407 | .fifo_flush = r8a66597_fifo_flush, |
1408 | }; | |
1409 | ||
1410 | /*-------------------------------------------------------------------------*/ | |
1411 | static struct r8a66597 *the_controller; | |
1412 | ||
b0fca50f UKK |
1413 | int usb_gadget_probe_driver(struct usb_gadget_driver *driver, |
1414 | int (*bind)(struct usb_gadget *)) | |
c4144247 YS |
1415 | { |
1416 | struct r8a66597 *r8a66597 = the_controller; | |
1417 | int retval; | |
1418 | ||
1419 | if (!driver | |
1420 | || driver->speed != USB_SPEED_HIGH | |
b0fca50f | 1421 | || !bind |
c4144247 YS |
1422 | || !driver->setup) |
1423 | return -EINVAL; | |
1424 | if (!r8a66597) | |
1425 | return -ENODEV; | |
1426 | if (r8a66597->driver) | |
1427 | return -EBUSY; | |
1428 | ||
1429 | /* hook up the driver */ | |
1430 | driver->driver.bus = NULL; | |
1431 | r8a66597->driver = driver; | |
1432 | r8a66597->gadget.dev.driver = &driver->driver; | |
1433 | ||
1434 | retval = device_add(&r8a66597->gadget.dev); | |
1435 | if (retval) { | |
1436 | printk(KERN_ERR "device_add error (%d)\n", retval); | |
1437 | goto error; | |
1438 | } | |
1439 | ||
b0fca50f | 1440 | retval = bind(&r8a66597->gadget); |
c4144247 YS |
1441 | if (retval) { |
1442 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | |
1443 | device_del(&r8a66597->gadget.dev); | |
1444 | goto error; | |
1445 | } | |
1446 | ||
1447 | r8a66597_bset(r8a66597, VBSE, INTENB0); | |
1448 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | |
1449 | r8a66597_start_xclock(r8a66597); | |
1450 | /* start vbus sampling */ | |
1451 | r8a66597->old_vbus = r8a66597_read(r8a66597, | |
1452 | INTSTS0) & VBSTS; | |
1453 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1454 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | |
1455 | } | |
1456 | ||
1457 | return 0; | |
1458 | ||
1459 | error: | |
1460 | r8a66597->driver = NULL; | |
1461 | r8a66597->gadget.dev.driver = NULL; | |
1462 | ||
1463 | return retval; | |
1464 | } | |
b0fca50f | 1465 | EXPORT_SYMBOL(usb_gadget_probe_driver); |
c4144247 YS |
1466 | |
1467 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1468 | { | |
1469 | struct r8a66597 *r8a66597 = the_controller; | |
1470 | unsigned long flags; | |
1471 | ||
1472 | if (driver != r8a66597->driver || !driver->unbind) | |
1473 | return -EINVAL; | |
1474 | ||
1475 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1476 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | |
1477 | r8a66597_usb_disconnect(r8a66597); | |
1478 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1479 | ||
1480 | r8a66597_bclr(r8a66597, VBSE, INTENB0); | |
1481 | ||
1482 | driver->unbind(&r8a66597->gadget); | |
1483 | ||
1484 | init_controller(r8a66597); | |
1485 | disable_controller(r8a66597); | |
1486 | ||
1487 | device_del(&r8a66597->gadget.dev); | |
1488 | r8a66597->driver = NULL; | |
1489 | return 0; | |
1490 | } | |
1491 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1492 | ||
1493 | /*-------------------------------------------------------------------------*/ | |
1494 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | |
1495 | { | |
1496 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | |
1497 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | |
1498 | } | |
1499 | ||
1500 | static struct usb_gadget_ops r8a66597_gadget_ops = { | |
1501 | .get_frame = r8a66597_get_frame, | |
1502 | }; | |
1503 | ||
1504 | static int __exit r8a66597_remove(struct platform_device *pdev) | |
1505 | { | |
1506 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | |
1507 | ||
1508 | del_timer_sync(&r8a66597->timer); | |
e8b48669 | 1509 | iounmap(r8a66597->reg); |
c4144247 YS |
1510 | free_irq(platform_get_irq(pdev, 0), r8a66597); |
1511 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | |
d2e27bdf MD |
1512 | #ifdef CONFIG_HAVE_CLK |
1513 | if (r8a66597->pdata->on_chip) { | |
1514 | clk_disable(r8a66597->clk); | |
1515 | clk_put(r8a66597->clk); | |
1516 | } | |
1517 | #endif | |
c4144247 YS |
1518 | kfree(r8a66597); |
1519 | return 0; | |
1520 | } | |
1521 | ||
1522 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | |
1523 | { | |
1524 | } | |
1525 | ||
1526 | static int __init r8a66597_probe(struct platform_device *pdev) | |
1527 | { | |
d2e27bdf MD |
1528 | #ifdef CONFIG_HAVE_CLK |
1529 | char clk_name[8]; | |
1530 | #endif | |
c4144247 YS |
1531 | struct resource *res, *ires; |
1532 | int irq; | |
1533 | void __iomem *reg = NULL; | |
1534 | struct r8a66597 *r8a66597 = NULL; | |
1535 | int ret = 0; | |
1536 | int i; | |
1537 | unsigned long irq_trigger; | |
1538 | ||
1539 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1540 | if (!res) { | |
1541 | ret = -ENODEV; | |
1542 | printk(KERN_ERR "platform_get_resource error.\n"); | |
1543 | goto clean_up; | |
1544 | } | |
1545 | ||
1546 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1547 | irq = ires->start; | |
1548 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | |
1549 | ||
1550 | if (irq < 0) { | |
1551 | ret = -ENODEV; | |
1552 | printk(KERN_ERR "platform_get_irq error.\n"); | |
1553 | goto clean_up; | |
1554 | } | |
1555 | ||
1556 | reg = ioremap(res->start, resource_size(res)); | |
1557 | if (reg == NULL) { | |
1558 | ret = -ENOMEM; | |
1559 | printk(KERN_ERR "ioremap error.\n"); | |
1560 | goto clean_up; | |
1561 | } | |
1562 | ||
1563 | /* initialize ucd */ | |
1564 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | |
1565 | if (r8a66597 == NULL) { | |
96f2a34d | 1566 | ret = -ENOMEM; |
c4144247 YS |
1567 | printk(KERN_ERR "kzalloc error\n"); |
1568 | goto clean_up; | |
1569 | } | |
1570 | ||
1571 | spin_lock_init(&r8a66597->lock); | |
1572 | dev_set_drvdata(&pdev->dev, r8a66597); | |
1573 | r8a66597->pdata = pdev->dev.platform_data; | |
1574 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | |
1575 | ||
1576 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | |
1577 | device_initialize(&r8a66597->gadget.dev); | |
1578 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | |
1579 | r8a66597->gadget.is_dualspeed = 1; | |
1580 | r8a66597->gadget.dev.parent = &pdev->dev; | |
1581 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1582 | r8a66597->gadget.dev.release = pdev->dev.release; | |
1583 | r8a66597->gadget.name = udc_name; | |
1584 | ||
1585 | init_timer(&r8a66597->timer); | |
1586 | r8a66597->timer.function = r8a66597_timer; | |
1587 | r8a66597->timer.data = (unsigned long)r8a66597; | |
e8b48669 | 1588 | r8a66597->reg = reg; |
c4144247 | 1589 | |
d2e27bdf MD |
1590 | #ifdef CONFIG_HAVE_CLK |
1591 | if (r8a66597->pdata->on_chip) { | |
1592 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | |
1593 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | |
1594 | if (IS_ERR(r8a66597->clk)) { | |
1595 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | |
1596 | clk_name); | |
1597 | ret = PTR_ERR(r8a66597->clk); | |
1598 | goto clean_up; | |
1599 | } | |
1600 | clk_enable(r8a66597->clk); | |
1601 | } | |
1602 | #endif | |
1603 | ||
c4144247 YS |
1604 | disable_controller(r8a66597); /* make sure controller is disabled */ |
1605 | ||
1606 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | |
1607 | udc_name, r8a66597); | |
1608 | if (ret < 0) { | |
1609 | printk(KERN_ERR "request_irq error (%d)\n", ret); | |
d2e27bdf | 1610 | goto clean_up2; |
c4144247 YS |
1611 | } |
1612 | ||
1613 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | |
1614 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | |
1615 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | |
1616 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | |
1617 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | |
1618 | ||
1619 | if (i != 0) { | |
1620 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | |
1621 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | |
1622 | &r8a66597->gadget.ep_list); | |
1623 | } | |
1624 | ep->r8a66597 = r8a66597; | |
1625 | INIT_LIST_HEAD(&ep->queue); | |
1626 | ep->ep.name = r8a66597_ep_name[i]; | |
1627 | ep->ep.ops = &r8a66597_ep_ops; | |
1628 | ep->ep.maxpacket = 512; | |
1629 | } | |
1630 | r8a66597->ep[0].ep.maxpacket = 64; | |
1631 | r8a66597->ep[0].pipenum = 0; | |
1632 | r8a66597->ep[0].fifoaddr = CFIFO; | |
1633 | r8a66597->ep[0].fifosel = CFIFOSEL; | |
1634 | r8a66597->ep[0].fifoctr = CFIFOCTR; | |
1635 | r8a66597->ep[0].fifotrn = 0; | |
1636 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | |
1637 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | |
1638 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | |
1639 | ||
1640 | the_controller = r8a66597; | |
1641 | ||
1642 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | |
1643 | GFP_KERNEL); | |
1644 | if (r8a66597->ep0_req == NULL) | |
d2e27bdf | 1645 | goto clean_up3; |
c4144247 YS |
1646 | r8a66597->ep0_req->complete = nop_completion; |
1647 | ||
1648 | init_controller(r8a66597); | |
1649 | ||
1650 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1651 | return 0; | |
1652 | ||
d2e27bdf | 1653 | clean_up3: |
c4144247 | 1654 | free_irq(irq, r8a66597); |
d2e27bdf MD |
1655 | clean_up2: |
1656 | #ifdef CONFIG_HAVE_CLK | |
1657 | if (r8a66597->pdata->on_chip) { | |
1658 | clk_disable(r8a66597->clk); | |
1659 | clk_put(r8a66597->clk); | |
1660 | } | |
1661 | #endif | |
c4144247 YS |
1662 | clean_up: |
1663 | if (r8a66597) { | |
1664 | if (r8a66597->ep0_req) | |
1665 | r8a66597_free_request(&r8a66597->ep[0].ep, | |
1666 | r8a66597->ep0_req); | |
1667 | kfree(r8a66597); | |
1668 | } | |
1669 | if (reg) | |
1670 | iounmap(reg); | |
1671 | ||
1672 | return ret; | |
1673 | } | |
1674 | ||
1675 | /*-------------------------------------------------------------------------*/ | |
1676 | static struct platform_driver r8a66597_driver = { | |
1677 | .remove = __exit_p(r8a66597_remove), | |
1678 | .driver = { | |
1679 | .name = (char *) udc_name, | |
1680 | }, | |
1681 | }; | |
1682 | ||
1683 | static int __init r8a66597_udc_init(void) | |
1684 | { | |
1685 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | |
1686 | } | |
1687 | module_init(r8a66597_udc_init); | |
1688 | ||
1689 | static void __exit r8a66597_udc_cleanup(void) | |
1690 | { | |
1691 | platform_driver_unregister(&r8a66597_driver); | |
1692 | } | |
1693 | module_exit(r8a66597_udc_cleanup); | |
1694 | ||
1695 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | |
1696 | MODULE_LICENSE("GPL"); | |
1697 | MODULE_AUTHOR("Yoshihiro Shimoda"); | |
1698 |