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bae4bd84 DB |
1 | /* |
2 | * at91_udc -- driver for at91-series USB peripheral controller | |
3 | * | |
4 | * Copyright (C) 2004 by Thomas Rathbone | |
5 | * Copyright (C) 2005 by HP Labs | |
6 | * Copyright (C) 2005 by David Brownell | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
bae4bd84 DB |
12 | */ |
13 | ||
f3db6e82 | 14 | #undef VERBOSE_DEBUG |
bae4bd84 DB |
15 | #undef PACKET_TRACE |
16 | ||
bae4bd84 DB |
17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/ioport.h> | |
bae4bd84 | 22 | #include <linux/slab.h> |
bae4bd84 | 23 | #include <linux/errno.h> |
bae4bd84 DB |
24 | #include <linux/list.h> |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/proc_fs.h> | |
eed39366 | 27 | #include <linux/prefetch.h> |
bae4bd84 | 28 | #include <linux/clk.h> |
5f848137 | 29 | #include <linux/usb/ch9.h> |
9454a57a | 30 | #include <linux/usb/gadget.h> |
d1494a34 JCPV |
31 | #include <linux/of.h> |
32 | #include <linux/of_gpio.h> | |
bcd2360c | 33 | #include <linux/platform_data/atmel.h> |
bae4bd84 DB |
34 | |
35 | #include <asm/byteorder.h> | |
a09e64fb | 36 | #include <mach/hardware.h> |
bae4bd84 DB |
37 | #include <asm/io.h> |
38 | #include <asm/irq.h> | |
f3db6e82 | 39 | #include <asm/gpio.h> |
bae4bd84 | 40 | |
a09e64fb RK |
41 | #include <mach/cpu.h> |
42 | #include <mach/at91sam9261_matrix.h> | |
4342d647 | 43 | #include <mach/at91_matrix.h> |
bae4bd84 DB |
44 | |
45 | #include "at91_udc.h" | |
46 | ||
47 | ||
48 | /* | |
49 | * This controller is simple and PIO-only. It's used in many AT91-series | |
8b2e7668 DB |
50 | * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), |
51 | * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. | |
bae4bd84 | 52 | * |
d7558148 | 53 | * This driver expects the board has been wired with two GPIOs supporting |
bae4bd84 | 54 | * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the |
8b2e7668 DB |
55 | * testing hasn't covered such cases.) |
56 | * | |
57 | * The pullup is most important (so it's integrated on sam926x parts). It | |
bae4bd84 | 58 | * provides software control over whether the host enumerates the device. |
8b2e7668 | 59 | * |
bae4bd84 DB |
60 | * The VBUS sensing helps during enumeration, and allows both USB clocks |
61 | * (and the transceiver) to stay gated off until they're necessary, saving | |
8b2e7668 DB |
62 | * power. During USB suspend, the 48 MHz clock is gated off in hardware; |
63 | * it may also be gated off by software during some Linux sleep states. | |
bae4bd84 DB |
64 | */ |
65 | ||
8b2e7668 | 66 | #define DRIVER_VERSION "3 May 2006" |
bae4bd84 DB |
67 | |
68 | static const char driver_name [] = "at91_udc"; | |
69 | static const char ep0name[] = "ep0"; | |
70 | ||
4037242c | 71 | #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000) |
bae4bd84 | 72 | |
4f4c5e36 HH |
73 | #define at91_udp_read(udc, reg) \ |
74 | __raw_readl((udc)->udp_baseaddr + (reg)) | |
75 | #define at91_udp_write(udc, reg, val) \ | |
76 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) | |
bae4bd84 DB |
77 | |
78 | /*-------------------------------------------------------------------------*/ | |
79 | ||
80 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
81 | ||
82 | #include <linux/seq_file.h> | |
83 | ||
84 | static const char debug_filename[] = "driver/udc"; | |
85 | ||
86 | #define FOURBITS "%s%s%s%s" | |
87 | #define EIGHTBITS FOURBITS FOURBITS | |
88 | ||
89 | static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |
90 | { | |
91 | static char *types[] = { | |
92 | "control", "out-iso", "out-bulk", "out-int", | |
93 | "BOGUS", "in-iso", "in-bulk", "in-int"}; | |
94 | ||
95 | u32 csr; | |
96 | struct at91_request *req; | |
97 | unsigned long flags; | |
4f4c5e36 | 98 | struct at91_udc *udc = ep->udc; |
bae4bd84 | 99 | |
4f4c5e36 | 100 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
101 | |
102 | csr = __raw_readl(ep->creg); | |
103 | ||
104 | /* NOTE: not collecting per-endpoint irq statistics... */ | |
105 | ||
106 | seq_printf(s, "\n"); | |
107 | seq_printf(s, "%s, maxpacket %d %s%s %s%s\n", | |
108 | ep->ep.name, ep->ep.maxpacket, | |
109 | ep->is_in ? "in" : "out", | |
110 | ep->is_iso ? " iso" : "", | |
111 | ep->is_pingpong | |
112 | ? (ep->fifo_bank ? "pong" : "ping") | |
113 | : "", | |
114 | ep->stopped ? " stopped" : ""); | |
115 | seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n", | |
116 | csr, | |
117 | (csr & 0x07ff0000) >> 16, | |
118 | (csr & (1 << 15)) ? "enabled" : "disabled", | |
119 | (csr & (1 << 11)) ? "DATA1" : "DATA0", | |
120 | types[(csr & 0x700) >> 8], | |
121 | ||
122 | /* iff type is control then print current direction */ | |
123 | (!(csr & 0x700)) | |
124 | ? ((csr & (1 << 7)) ? " IN" : " OUT") | |
125 | : "", | |
126 | (csr & (1 << 6)) ? " rxdatabk1" : "", | |
127 | (csr & (1 << 5)) ? " forcestall" : "", | |
128 | (csr & (1 << 4)) ? " txpktrdy" : "", | |
129 | ||
130 | (csr & (1 << 3)) ? " stallsent" : "", | |
131 | (csr & (1 << 2)) ? " rxsetup" : "", | |
132 | (csr & (1 << 1)) ? " rxdatabk0" : "", | |
133 | (csr & (1 << 0)) ? " txcomp" : ""); | |
134 | if (list_empty (&ep->queue)) | |
135 | seq_printf(s, "\t(queue empty)\n"); | |
136 | ||
137 | else list_for_each_entry (req, &ep->queue, queue) { | |
138 | unsigned length = req->req.actual; | |
139 | ||
140 | seq_printf(s, "\treq %p len %d/%d buf %p\n", | |
141 | &req->req, length, | |
142 | req->req.length, req->req.buf); | |
143 | } | |
4f4c5e36 | 144 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
145 | } |
146 | ||
147 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) | |
148 | { | |
149 | int i; | |
150 | ||
151 | seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask, | |
152 | (mask & (1 << 13)) ? " wakeup" : "", | |
153 | (mask & (1 << 12)) ? " endbusres" : "", | |
154 | ||
155 | (mask & (1 << 11)) ? " sofint" : "", | |
156 | (mask & (1 << 10)) ? " extrsm" : "", | |
157 | (mask & (1 << 9)) ? " rxrsm" : "", | |
158 | (mask & (1 << 8)) ? " rxsusp" : ""); | |
159 | for (i = 0; i < 8; i++) { | |
160 | if (mask & (1 << i)) | |
161 | seq_printf(s, " ep%d", i); | |
162 | } | |
163 | seq_printf(s, "\n"); | |
164 | } | |
165 | ||
166 | static int proc_udc_show(struct seq_file *s, void *unused) | |
167 | { | |
168 | struct at91_udc *udc = s->private; | |
169 | struct at91_ep *ep; | |
170 | u32 tmp; | |
171 | ||
172 | seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION); | |
173 | ||
174 | seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n", | |
175 | udc->vbus ? "present" : "off", | |
176 | udc->enabled | |
177 | ? (udc->vbus ? "active" : "enabled") | |
178 | : "disabled", | |
179 | udc->selfpowered ? "self" : "VBUS", | |
180 | udc->suspended ? ", suspended" : "", | |
181 | udc->driver ? udc->driver->driver.name : "(none)"); | |
182 | ||
183 | /* don't access registers when interface isn't clocked */ | |
184 | if (!udc->clocked) { | |
185 | seq_printf(s, "(not clocked)\n"); | |
186 | return 0; | |
187 | } | |
188 | ||
ffd3326b | 189 | tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM); |
bae4bd84 DB |
190 | seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp, |
191 | (tmp & AT91_UDP_FRM_OK) ? " ok" : "", | |
192 | (tmp & AT91_UDP_FRM_ERR) ? " err" : "", | |
193 | (tmp & AT91_UDP_NUM)); | |
194 | ||
ffd3326b | 195 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
196 | seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp, |
197 | (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "", | |
198 | (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "", | |
199 | (tmp & AT91_UDP_ESR) ? " esr" : "", | |
200 | (tmp & AT91_UDP_CONFG) ? " confg" : "", | |
201 | (tmp & AT91_UDP_FADDEN) ? " fadden" : ""); | |
202 | ||
ffd3326b | 203 | tmp = at91_udp_read(udc, AT91_UDP_FADDR); |
bae4bd84 DB |
204 | seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp, |
205 | (tmp & AT91_UDP_FEN) ? " fen" : "", | |
206 | (tmp & AT91_UDP_FADD)); | |
207 | ||
ffd3326b AV |
208 | proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR)); |
209 | proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR)); | |
bae4bd84 DB |
210 | |
211 | if (udc->enabled && udc->vbus) { | |
212 | proc_ep_show(s, &udc->ep[0]); | |
213 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
5a6506f0 | 214 | if (ep->ep.desc) |
bae4bd84 DB |
215 | proc_ep_show(s, ep); |
216 | } | |
217 | } | |
218 | return 0; | |
219 | } | |
220 | ||
221 | static int proc_udc_open(struct inode *inode, struct file *file) | |
222 | { | |
d9dda78b | 223 | return single_open(file, proc_udc_show, PDE_DATA(inode)); |
bae4bd84 DB |
224 | } |
225 | ||
066202dd | 226 | static const struct file_operations proc_ops = { |
cdefa185 | 227 | .owner = THIS_MODULE, |
bae4bd84 DB |
228 | .open = proc_udc_open, |
229 | .read = seq_read, | |
230 | .llseek = seq_lseek, | |
231 | .release = single_release, | |
232 | }; | |
233 | ||
234 | static void create_debug_file(struct at91_udc *udc) | |
235 | { | |
cdefa185 | 236 | udc->pde = proc_create_data(debug_filename, 0, NULL, &proc_ops, udc); |
bae4bd84 DB |
237 | } |
238 | ||
239 | static void remove_debug_file(struct at91_udc *udc) | |
240 | { | |
241 | if (udc->pde) | |
242 | remove_proc_entry(debug_filename, NULL); | |
243 | } | |
244 | ||
245 | #else | |
246 | ||
247 | static inline void create_debug_file(struct at91_udc *udc) {} | |
248 | static inline void remove_debug_file(struct at91_udc *udc) {} | |
249 | ||
250 | #endif | |
251 | ||
252 | ||
253 | /*-------------------------------------------------------------------------*/ | |
254 | ||
255 | static void done(struct at91_ep *ep, struct at91_request *req, int status) | |
256 | { | |
257 | unsigned stopped = ep->stopped; | |
ffd3326b | 258 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
259 | |
260 | list_del_init(&req->queue); | |
261 | if (req->req.status == -EINPROGRESS) | |
262 | req->req.status = status; | |
263 | else | |
264 | status = req->req.status; | |
265 | if (status && status != -ESHUTDOWN) | |
266 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); | |
267 | ||
268 | ep->stopped = 1; | |
4f4c5e36 | 269 | spin_unlock(&udc->lock); |
304f7e5e | 270 | usb_gadget_giveback_request(&ep->ep, &req->req); |
4f4c5e36 | 271 | spin_lock(&udc->lock); |
bae4bd84 DB |
272 | ep->stopped = stopped; |
273 | ||
274 | /* ep0 is always ready; other endpoints need a non-empty queue */ | |
275 | if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) | |
ffd3326b | 276 | at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); |
bae4bd84 DB |
277 | } |
278 | ||
279 | /*-------------------------------------------------------------------------*/ | |
280 | ||
281 | /* bits indicating OUT fifo has data ready */ | |
282 | #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) | |
283 | ||
284 | /* | |
285 | * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write | |
286 | * back most of the value you just read (because of side effects, including | |
287 | * bits that may change after reading and before writing). | |
288 | * | |
289 | * Except when changing a specific bit, always write values which: | |
290 | * - clear SET_FX bits (setting them could change something) | |
291 | * - set CLR_FX bits (clearing them could change something) | |
292 | * | |
293 | * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE | |
294 | * that shouldn't normally be changed. | |
8b2e7668 DB |
295 | * |
296 | * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, | |
297 | * implying a need to wait for one write to complete (test relevant bits) | |
298 | * before starting the next write. This shouldn't be an issue given how | |
299 | * infrequently we write, except maybe for write-then-read idioms. | |
bae4bd84 DB |
300 | */ |
301 | #define SET_FX (AT91_UDP_TXPKTRDY) | |
8b2e7668 DB |
302 | #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ |
303 | | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) | |
bae4bd84 DB |
304 | |
305 | /* pull OUT packet data from the endpoint's fifo */ | |
306 | static int read_fifo (struct at91_ep *ep, struct at91_request *req) | |
307 | { | |
308 | u32 __iomem *creg = ep->creg; | |
309 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
310 | u32 csr; | |
311 | u8 *buf; | |
312 | unsigned int count, bufferspace, is_done; | |
313 | ||
314 | buf = req->req.buf + req->req.actual; | |
315 | bufferspace = req->req.length - req->req.actual; | |
316 | ||
317 | /* | |
318 | * there might be nothing to read if ep_queue() calls us, | |
319 | * or if we already emptied both pingpong buffers | |
320 | */ | |
321 | rescan: | |
322 | csr = __raw_readl(creg); | |
323 | if ((csr & RX_DATA_READY) == 0) | |
324 | return 0; | |
325 | ||
326 | count = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
327 | if (count > ep->ep.maxpacket) | |
328 | count = ep->ep.maxpacket; | |
329 | if (count > bufferspace) { | |
330 | DBG("%s buffer overflow\n", ep->ep.name); | |
331 | req->req.status = -EOVERFLOW; | |
332 | count = bufferspace; | |
333 | } | |
334 | __raw_readsb(dreg, buf, count); | |
335 | ||
336 | /* release and swap pingpong mem bank */ | |
337 | csr |= CLR_FX; | |
338 | if (ep->is_pingpong) { | |
339 | if (ep->fifo_bank == 0) { | |
340 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
341 | ep->fifo_bank = 1; | |
342 | } else { | |
343 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); | |
344 | ep->fifo_bank = 0; | |
345 | } | |
346 | } else | |
347 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
348 | __raw_writel(csr, creg); | |
349 | ||
350 | req->req.actual += count; | |
351 | is_done = (count < ep->ep.maxpacket); | |
352 | if (count == bufferspace) | |
353 | is_done = 1; | |
354 | ||
355 | PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, | |
356 | is_done ? " (done)" : ""); | |
357 | ||
358 | /* | |
359 | * avoid extra trips through IRQ logic for packets already in | |
360 | * the fifo ... maybe preventing an extra (expensive) OUT-NAK | |
361 | */ | |
362 | if (is_done) | |
363 | done(ep, req, 0); | |
364 | else if (ep->is_pingpong) { | |
76225374 HH |
365 | /* |
366 | * One dummy read to delay the code because of a HW glitch: | |
367 | * CSR returns bad RXCOUNT when read too soon after updating | |
368 | * RX_DATA_BK flags. | |
369 | */ | |
370 | csr = __raw_readl(creg); | |
371 | ||
bae4bd84 DB |
372 | bufferspace -= count; |
373 | buf += count; | |
374 | goto rescan; | |
375 | } | |
376 | ||
377 | return is_done; | |
378 | } | |
379 | ||
380 | /* load fifo for an IN packet */ | |
381 | static int write_fifo(struct at91_ep *ep, struct at91_request *req) | |
382 | { | |
383 | u32 __iomem *creg = ep->creg; | |
384 | u32 csr = __raw_readl(creg); | |
385 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
386 | unsigned total, count, is_last; | |
3cf27234 | 387 | u8 *buf; |
bae4bd84 DB |
388 | |
389 | /* | |
390 | * TODO: allow for writing two packets to the fifo ... that'll | |
391 | * reduce the amount of IN-NAKing, but probably won't affect | |
392 | * throughput much. (Unlike preventing OUT-NAKing!) | |
393 | */ | |
394 | ||
395 | /* | |
396 | * If ep_queue() calls us, the queue is empty and possibly in | |
397 | * odd states like TXCOMP not yet cleared (we do it, saving at | |
398 | * least one IRQ) or the fifo not yet being free. Those aren't | |
399 | * issues normally (IRQ handler fast path). | |
400 | */ | |
401 | if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { | |
402 | if (csr & AT91_UDP_TXCOMP) { | |
403 | csr |= CLR_FX; | |
404 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
405 | __raw_writel(csr, creg); | |
406 | csr = __raw_readl(creg); | |
407 | } | |
408 | if (csr & AT91_UDP_TXPKTRDY) | |
409 | return 0; | |
410 | } | |
411 | ||
3cf27234 DB |
412 | buf = req->req.buf + req->req.actual; |
413 | prefetch(buf); | |
bae4bd84 DB |
414 | total = req->req.length - req->req.actual; |
415 | if (ep->ep.maxpacket < total) { | |
416 | count = ep->ep.maxpacket; | |
417 | is_last = 0; | |
418 | } else { | |
419 | count = total; | |
420 | is_last = (count < ep->ep.maxpacket) || !req->req.zero; | |
421 | } | |
422 | ||
423 | /* | |
424 | * Write the packet, maybe it's a ZLP. | |
425 | * | |
426 | * NOTE: incrementing req->actual before we receive the ACK means | |
427 | * gadget driver IN bytecounts can be wrong in fault cases. That's | |
428 | * fixable with PIO drivers like this one (save "count" here, and | |
429 | * do the increment later on TX irq), but not for most DMA hardware. | |
430 | * | |
431 | * So all gadget drivers must accept that potential error. Some | |
432 | * hardware supports precise fifo status reporting, letting them | |
433 | * recover when the actual bytecount matters (e.g. for USB Test | |
434 | * and Measurement Class devices). | |
435 | */ | |
3cf27234 | 436 | __raw_writesb(dreg, buf, count); |
bae4bd84 DB |
437 | csr &= ~SET_FX; |
438 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
439 | __raw_writel(csr, creg); | |
440 | req->req.actual += count; | |
441 | ||
442 | PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, | |
443 | is_last ? " (done)" : ""); | |
444 | if (is_last) | |
445 | done(ep, req, 0); | |
446 | return is_last; | |
447 | } | |
448 | ||
449 | static void nuke(struct at91_ep *ep, int status) | |
450 | { | |
451 | struct at91_request *req; | |
452 | ||
1a8060d9 | 453 | /* terminate any request in the queue */ |
bae4bd84 DB |
454 | ep->stopped = 1; |
455 | if (list_empty(&ep->queue)) | |
456 | return; | |
457 | ||
441b62c1 | 458 | VDBG("%s %s\n", __func__, ep->ep.name); |
bae4bd84 DB |
459 | while (!list_empty(&ep->queue)) { |
460 | req = list_entry(ep->queue.next, struct at91_request, queue); | |
461 | done(ep, req, status); | |
462 | } | |
463 | } | |
464 | ||
465 | /*-------------------------------------------------------------------------*/ | |
466 | ||
8b2e7668 DB |
467 | static int at91_ep_enable(struct usb_ep *_ep, |
468 | const struct usb_endpoint_descriptor *desc) | |
bae4bd84 DB |
469 | { |
470 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
162ca3ca | 471 | struct at91_udc *udc; |
bae4bd84 DB |
472 | u16 maxpacket; |
473 | u32 tmp; | |
474 | unsigned long flags; | |
475 | ||
476 | if (!_ep || !ep | |
f3bb8e63 | 477 | || !desc || _ep->name == ep0name |
bae4bd84 | 478 | || desc->bDescriptorType != USB_DT_ENDPOINT |
29cc8897 | 479 | || (maxpacket = usb_endpoint_maxp(desc)) == 0 |
bae4bd84 DB |
480 | || maxpacket > ep->maxpacket) { |
481 | DBG("bad ep or descriptor\n"); | |
482 | return -EINVAL; | |
483 | } | |
484 | ||
162ca3ca | 485 | udc = ep->udc; |
4f4c5e36 | 486 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
487 | DBG("bogus device state\n"); |
488 | return -ESHUTDOWN; | |
489 | } | |
490 | ||
81c8d8d2 | 491 | tmp = usb_endpoint_type(desc); |
bae4bd84 DB |
492 | switch (tmp) { |
493 | case USB_ENDPOINT_XFER_CONTROL: | |
494 | DBG("only one control endpoint\n"); | |
495 | return -EINVAL; | |
496 | case USB_ENDPOINT_XFER_INT: | |
497 | if (maxpacket > 64) | |
498 | goto bogus_max; | |
499 | break; | |
500 | case USB_ENDPOINT_XFER_BULK: | |
501 | switch (maxpacket) { | |
502 | case 8: | |
503 | case 16: | |
504 | case 32: | |
505 | case 64: | |
506 | goto ok; | |
507 | } | |
508 | bogus_max: | |
509 | DBG("bogus maxpacket %d\n", maxpacket); | |
510 | return -EINVAL; | |
511 | case USB_ENDPOINT_XFER_ISOC: | |
512 | if (!ep->is_pingpong) { | |
513 | DBG("iso requires double buffering\n"); | |
514 | return -EINVAL; | |
515 | } | |
516 | break; | |
517 | } | |
518 | ||
519 | ok: | |
4f4c5e36 | 520 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
521 | |
522 | /* initialize endpoint to match this descriptor */ | |
81c8d8d2 | 523 | ep->is_in = usb_endpoint_dir_in(desc); |
bae4bd84 DB |
524 | ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); |
525 | ep->stopped = 0; | |
526 | if (ep->is_in) | |
527 | tmp |= 0x04; | |
528 | tmp <<= 8; | |
529 | tmp |= AT91_UDP_EPEDS; | |
530 | __raw_writel(tmp, ep->creg); | |
531 | ||
bae4bd84 DB |
532 | ep->ep.maxpacket = maxpacket; |
533 | ||
534 | /* | |
535 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, | |
536 | * since endpoint resets don't reset hw pingpong state. | |
537 | */ | |
4f4c5e36 HH |
538 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
539 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 | 540 | |
4f4c5e36 | 541 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
542 | return 0; |
543 | } | |
544 | ||
545 | static int at91_ep_disable (struct usb_ep * _ep) | |
546 | { | |
547 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 548 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
549 | unsigned long flags; |
550 | ||
551 | if (ep == &ep->udc->ep[0]) | |
552 | return -EINVAL; | |
553 | ||
4f4c5e36 | 554 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
555 | |
556 | nuke(ep, -ESHUTDOWN); | |
557 | ||
558 | /* restore the endpoint's pristine config */ | |
f9c56cdd | 559 | ep->ep.desc = NULL; |
bae4bd84 DB |
560 | ep->ep.maxpacket = ep->maxpacket; |
561 | ||
562 | /* reset fifos and endpoint */ | |
563 | if (ep->udc->clocked) { | |
ffd3326b AV |
564 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
565 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
566 | __raw_writel(0, ep->creg); |
567 | } | |
568 | ||
4f4c5e36 | 569 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
570 | return 0; |
571 | } | |
572 | ||
573 | /* | |
574 | * this is a PIO-only driver, so there's nothing | |
575 | * interesting for request or buffer allocation. | |
576 | */ | |
577 | ||
8b2e7668 | 578 | static struct usb_request * |
f3db6e82 | 579 | at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) |
bae4bd84 DB |
580 | { |
581 | struct at91_request *req; | |
582 | ||
cd861280 | 583 | req = kzalloc(sizeof (struct at91_request), gfp_flags); |
bae4bd84 DB |
584 | if (!req) |
585 | return NULL; | |
586 | ||
587 | INIT_LIST_HEAD(&req->queue); | |
588 | return &req->req; | |
589 | } | |
590 | ||
591 | static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
592 | { | |
593 | struct at91_request *req; | |
594 | ||
595 | req = container_of(_req, struct at91_request, req); | |
596 | BUG_ON(!list_empty(&req->queue)); | |
597 | kfree(req); | |
598 | } | |
599 | ||
bae4bd84 DB |
600 | static int at91_ep_queue(struct usb_ep *_ep, |
601 | struct usb_request *_req, gfp_t gfp_flags) | |
602 | { | |
603 | struct at91_request *req; | |
604 | struct at91_ep *ep; | |
4f4c5e36 | 605 | struct at91_udc *udc; |
bae4bd84 DB |
606 | int status; |
607 | unsigned long flags; | |
608 | ||
609 | req = container_of(_req, struct at91_request, req); | |
610 | ep = container_of(_ep, struct at91_ep, ep); | |
611 | ||
612 | if (!_req || !_req->complete | |
613 | || !_req->buf || !list_empty(&req->queue)) { | |
614 | DBG("invalid request\n"); | |
615 | return -EINVAL; | |
616 | } | |
617 | ||
5a6506f0 | 618 | if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { |
bae4bd84 DB |
619 | DBG("invalid ep\n"); |
620 | return -EINVAL; | |
621 | } | |
622 | ||
4f4c5e36 | 623 | udc = ep->udc; |
bae4bd84 | 624 | |
4f4c5e36 | 625 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
626 | DBG("invalid device\n"); |
627 | return -EINVAL; | |
628 | } | |
629 | ||
630 | _req->status = -EINPROGRESS; | |
631 | _req->actual = 0; | |
632 | ||
4f4c5e36 | 633 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
634 | |
635 | /* try to kickstart any empty and idle queue */ | |
636 | if (list_empty(&ep->queue) && !ep->stopped) { | |
637 | int is_ep0; | |
638 | ||
639 | /* | |
640 | * If this control request has a non-empty DATA stage, this | |
641 | * will start that stage. It works just like a non-control | |
642 | * request (until the status stage starts, maybe early). | |
643 | * | |
644 | * If the data stage is empty, then this starts a successful | |
645 | * IN/STATUS stage. (Unsuccessful ones use set_halt.) | |
646 | */ | |
647 | is_ep0 = (ep->ep.name == ep0name); | |
648 | if (is_ep0) { | |
649 | u32 tmp; | |
650 | ||
4f4c5e36 | 651 | if (!udc->req_pending) { |
bae4bd84 DB |
652 | status = -EINVAL; |
653 | goto done; | |
654 | } | |
655 | ||
656 | /* | |
657 | * defer changing CONFG until after the gadget driver | |
658 | * reconfigures the endpoints. | |
659 | */ | |
4f4c5e36 HH |
660 | if (udc->wait_for_config_ack) { |
661 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); | |
bae4bd84 DB |
662 | tmp ^= AT91_UDP_CONFG; |
663 | VDBG("toggle config\n"); | |
4f4c5e36 | 664 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
665 | } |
666 | if (req->req.length == 0) { | |
667 | ep0_in_status: | |
668 | PACKET("ep0 in/status\n"); | |
669 | status = 0; | |
670 | tmp = __raw_readl(ep->creg); | |
671 | tmp &= ~SET_FX; | |
672 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; | |
673 | __raw_writel(tmp, ep->creg); | |
4f4c5e36 | 674 | udc->req_pending = 0; |
bae4bd84 DB |
675 | goto done; |
676 | } | |
677 | } | |
678 | ||
679 | if (ep->is_in) | |
680 | status = write_fifo(ep, req); | |
681 | else { | |
682 | status = read_fifo(ep, req); | |
683 | ||
684 | /* IN/STATUS stage is otherwise triggered by irq */ | |
685 | if (status && is_ep0) | |
686 | goto ep0_in_status; | |
687 | } | |
688 | } else | |
689 | status = 0; | |
690 | ||
691 | if (req && !status) { | |
692 | list_add_tail (&req->queue, &ep->queue); | |
4f4c5e36 | 693 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
bae4bd84 DB |
694 | } |
695 | done: | |
4f4c5e36 | 696 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
697 | return (status < 0) ? status : 0; |
698 | } | |
699 | ||
700 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
701 | { | |
4f4c5e36 | 702 | struct at91_ep *ep; |
bae4bd84 | 703 | struct at91_request *req; |
4f4c5e36 HH |
704 | unsigned long flags; |
705 | struct at91_udc *udc; | |
bae4bd84 DB |
706 | |
707 | ep = container_of(_ep, struct at91_ep, ep); | |
708 | if (!_ep || ep->ep.name == ep0name) | |
709 | return -EINVAL; | |
710 | ||
4f4c5e36 HH |
711 | udc = ep->udc; |
712 | ||
713 | spin_lock_irqsave(&udc->lock, flags); | |
714 | ||
bae4bd84 DB |
715 | /* make sure it's actually queued on this endpoint */ |
716 | list_for_each_entry (req, &ep->queue, queue) { | |
717 | if (&req->req == _req) | |
718 | break; | |
719 | } | |
4f4c5e36 HH |
720 | if (&req->req != _req) { |
721 | spin_unlock_irqrestore(&udc->lock, flags); | |
bae4bd84 | 722 | return -EINVAL; |
4f4c5e36 | 723 | } |
bae4bd84 DB |
724 | |
725 | done(ep, req, -ECONNRESET); | |
4f4c5e36 | 726 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
727 | return 0; |
728 | } | |
729 | ||
730 | static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |
731 | { | |
732 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 733 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
734 | u32 __iomem *creg; |
735 | u32 csr; | |
736 | unsigned long flags; | |
737 | int status = 0; | |
738 | ||
739 | if (!_ep || ep->is_iso || !ep->udc->clocked) | |
740 | return -EINVAL; | |
741 | ||
742 | creg = ep->creg; | |
4f4c5e36 | 743 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
744 | |
745 | csr = __raw_readl(creg); | |
746 | ||
747 | /* | |
748 | * fail with still-busy IN endpoints, ensuring correct sequencing | |
749 | * of data tx then stall. note that the fifo rx bytecount isn't | |
750 | * completely accurate as a tx bytecount. | |
751 | */ | |
752 | if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) | |
753 | status = -EAGAIN; | |
754 | else { | |
755 | csr |= CLR_FX; | |
756 | csr &= ~SET_FX; | |
757 | if (value) { | |
758 | csr |= AT91_UDP_FORCESTALL; | |
759 | VDBG("halt %s\n", ep->ep.name); | |
760 | } else { | |
ffd3326b AV |
761 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
762 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
763 | csr &= ~AT91_UDP_FORCESTALL; |
764 | } | |
765 | __raw_writel(csr, creg); | |
766 | } | |
767 | ||
4f4c5e36 | 768 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
769 | return status; |
770 | } | |
771 | ||
398acce7 | 772 | static const struct usb_ep_ops at91_ep_ops = { |
bae4bd84 DB |
773 | .enable = at91_ep_enable, |
774 | .disable = at91_ep_disable, | |
775 | .alloc_request = at91_ep_alloc_request, | |
776 | .free_request = at91_ep_free_request, | |
bae4bd84 DB |
777 | .queue = at91_ep_queue, |
778 | .dequeue = at91_ep_dequeue, | |
779 | .set_halt = at91_ep_set_halt, | |
1a8060d9 | 780 | /* there's only imprecise fifo status reporting */ |
bae4bd84 DB |
781 | }; |
782 | ||
783 | /*-------------------------------------------------------------------------*/ | |
784 | ||
785 | static int at91_get_frame(struct usb_gadget *gadget) | |
786 | { | |
ffd3326b AV |
787 | struct at91_udc *udc = to_udc(gadget); |
788 | ||
bae4bd84 DB |
789 | if (!to_udc(gadget)->clocked) |
790 | return -EINVAL; | |
ffd3326b | 791 | return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; |
bae4bd84 DB |
792 | } |
793 | ||
794 | static int at91_wakeup(struct usb_gadget *gadget) | |
795 | { | |
796 | struct at91_udc *udc = to_udc(gadget); | |
797 | u32 glbstate; | |
798 | int status = -EINVAL; | |
799 | unsigned long flags; | |
800 | ||
441b62c1 | 801 | DBG("%s\n", __func__ ); |
4f4c5e36 | 802 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
803 | |
804 | if (!udc->clocked || !udc->suspended) | |
805 | goto done; | |
806 | ||
807 | /* NOTE: some "early versions" handle ESR differently ... */ | |
808 | ||
ffd3326b | 809 | glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
810 | if (!(glbstate & AT91_UDP_ESR)) |
811 | goto done; | |
812 | glbstate |= AT91_UDP_ESR; | |
ffd3326b | 813 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
bae4bd84 DB |
814 | |
815 | done: | |
4f4c5e36 | 816 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
817 | return status; |
818 | } | |
819 | ||
25985edc | 820 | /* reinit == restore initial software state */ |
bae4bd84 DB |
821 | static void udc_reinit(struct at91_udc *udc) |
822 | { | |
823 | u32 i; | |
824 | ||
825 | INIT_LIST_HEAD(&udc->gadget.ep_list); | |
826 | INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); | |
827 | ||
828 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
829 | struct at91_ep *ep = &udc->ep[i]; | |
830 | ||
831 | if (i != 0) | |
832 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
5a6506f0 | 833 | ep->ep.desc = NULL; |
bae4bd84 DB |
834 | ep->stopped = 0; |
835 | ep->fifo_bank = 0; | |
e117e742 | 836 | usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); |
ffd3326b | 837 | ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); |
1a8060d9 | 838 | /* initialize one queue per endpoint */ |
bae4bd84 DB |
839 | INIT_LIST_HEAD(&ep->queue); |
840 | } | |
841 | } | |
842 | ||
236e5064 PC |
843 | static void reset_gadget(struct at91_udc *udc) |
844 | { | |
845 | struct usb_gadget_driver *driver = udc->driver; | |
846 | int i; | |
847 | ||
848 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
849 | driver = NULL; | |
850 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
851 | udc->suspended = 0; | |
852 | ||
853 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
854 | struct at91_ep *ep = &udc->ep[i]; | |
855 | ||
856 | ep->stopped = 1; | |
857 | nuke(ep, -ESHUTDOWN); | |
858 | } | |
859 | if (driver) { | |
860 | spin_unlock(&udc->lock); | |
861 | usb_gadget_udc_reset(&udc->gadget, driver); | |
862 | spin_lock(&udc->lock); | |
863 | } | |
864 | ||
865 | udc_reinit(udc); | |
866 | } | |
867 | ||
bae4bd84 DB |
868 | static void stop_activity(struct at91_udc *udc) |
869 | { | |
870 | struct usb_gadget_driver *driver = udc->driver; | |
871 | int i; | |
872 | ||
873 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
874 | driver = NULL; | |
875 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
8b2e7668 | 876 | udc->suspended = 0; |
bae4bd84 DB |
877 | |
878 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
879 | struct at91_ep *ep = &udc->ep[i]; | |
880 | ep->stopped = 1; | |
881 | nuke(ep, -ESHUTDOWN); | |
882 | } | |
4f4c5e36 HH |
883 | if (driver) { |
884 | spin_unlock(&udc->lock); | |
bae4bd84 | 885 | driver->disconnect(&udc->gadget); |
4f4c5e36 HH |
886 | spin_lock(&udc->lock); |
887 | } | |
bae4bd84 DB |
888 | |
889 | udc_reinit(udc); | |
890 | } | |
891 | ||
892 | static void clk_on(struct at91_udc *udc) | |
893 | { | |
894 | if (udc->clocked) | |
895 | return; | |
896 | udc->clocked = 1; | |
c0aefc75 | 897 | |
b2ba27a5 RW |
898 | if (IS_ENABLED(CONFIG_COMMON_CLK)) |
899 | clk_enable(udc->uclk); | |
900 | clk_enable(udc->iclk); | |
901 | clk_enable(udc->fclk); | |
bae4bd84 DB |
902 | } |
903 | ||
904 | static void clk_off(struct at91_udc *udc) | |
905 | { | |
906 | if (!udc->clocked) | |
907 | return; | |
908 | udc->clocked = 0; | |
909 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
b2ba27a5 RW |
910 | clk_disable(udc->fclk); |
911 | clk_disable(udc->iclk); | |
c0aefc75 | 912 | if (IS_ENABLED(CONFIG_COMMON_CLK)) |
b2ba27a5 | 913 | clk_disable(udc->uclk); |
bae4bd84 DB |
914 | } |
915 | ||
916 | /* | |
917 | * activate/deactivate link with host; minimize power usage for | |
918 | * inactive links by cutting clocks and transceiver power. | |
919 | */ | |
920 | static void pullup(struct at91_udc *udc, int is_on) | |
921 | { | |
f3db6e82 DB |
922 | int active = !udc->board.pullup_active_low; |
923 | ||
bae4bd84 DB |
924 | if (!udc->enabled || !udc->vbus) |
925 | is_on = 0; | |
926 | DBG("%sactive\n", is_on ? "" : "in"); | |
ffd3326b | 927 | |
bae4bd84 DB |
928 | if (is_on) { |
929 | clk_on(udc); | |
08cbc706 | 930 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
ffd3326b | 931 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
29ba4b53 | 932 | if (cpu_is_at91rm9200()) |
f3db6e82 | 933 | gpio_set_value(udc->board.pullup_pin, active); |
61352667 | 934 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
935 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
936 | ||
937 | txvc |= AT91_UDP_TXVC_PUON; | |
938 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 939 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
940 | u32 usbpucr; |
941 | ||
4342d647 | 942 | usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); |
29ba4b53 | 943 | usbpucr |= AT91_MATRIX_USBPUCR_PUON; |
4342d647 | 944 | at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); |
29ba4b53 | 945 | } |
ffd3326b | 946 | } else { |
bae4bd84 | 947 | stop_activity(udc); |
08cbc706 | 948 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
ffd3326b | 949 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
29ba4b53 | 950 | if (cpu_is_at91rm9200()) |
f3db6e82 | 951 | gpio_set_value(udc->board.pullup_pin, !active); |
61352667 | 952 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
953 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
954 | ||
955 | txvc &= ~AT91_UDP_TXVC_PUON; | |
956 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 957 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
958 | u32 usbpucr; |
959 | ||
4342d647 | 960 | usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); |
29ba4b53 | 961 | usbpucr &= ~AT91_MATRIX_USBPUCR_PUON; |
4342d647 | 962 | at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); |
29ba4b53 | 963 | } |
bae4bd84 | 964 | clk_off(udc); |
bae4bd84 DB |
965 | } |
966 | } | |
967 | ||
968 | /* vbus is here! turn everything on that's ready */ | |
969 | static int at91_vbus_session(struct usb_gadget *gadget, int is_active) | |
970 | { | |
971 | struct at91_udc *udc = to_udc(gadget); | |
972 | unsigned long flags; | |
973 | ||
1a8060d9 | 974 | /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ |
4f4c5e36 | 975 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 976 | udc->vbus = (is_active != 0); |
bfb7fb79 WK |
977 | if (udc->driver) |
978 | pullup(udc, is_active); | |
979 | else | |
980 | pullup(udc, 0); | |
4f4c5e36 | 981 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
982 | return 0; |
983 | } | |
984 | ||
985 | static int at91_pullup(struct usb_gadget *gadget, int is_on) | |
986 | { | |
987 | struct at91_udc *udc = to_udc(gadget); | |
988 | unsigned long flags; | |
989 | ||
4f4c5e36 | 990 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
991 | udc->enabled = is_on = !!is_on; |
992 | pullup(udc, is_on); | |
4f4c5e36 | 993 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
994 | return 0; |
995 | } | |
996 | ||
997 | static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) | |
998 | { | |
999 | struct at91_udc *udc = to_udc(gadget); | |
1000 | unsigned long flags; | |
1001 | ||
4f4c5e36 | 1002 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1003 | udc->selfpowered = (is_on != 0); |
4f4c5e36 | 1004 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1005 | return 0; |
1006 | } | |
1007 | ||
f3d8bf34 SAS |
1008 | static int at91_start(struct usb_gadget *gadget, |
1009 | struct usb_gadget_driver *driver); | |
22835b80 FB |
1010 | static int at91_stop(struct usb_gadget *gadget); |
1011 | ||
bae4bd84 DB |
1012 | static const struct usb_gadget_ops at91_udc_ops = { |
1013 | .get_frame = at91_get_frame, | |
1014 | .wakeup = at91_wakeup, | |
1015 | .set_selfpowered = at91_set_selfpowered, | |
1016 | .vbus_session = at91_vbus_session, | |
1017 | .pullup = at91_pullup, | |
f3d8bf34 SAS |
1018 | .udc_start = at91_start, |
1019 | .udc_stop = at91_stop, | |
bae4bd84 DB |
1020 | |
1021 | /* | |
1022 | * VBUS-powered devices may also also want to support bigger | |
1023 | * power budgets after an appropriate SET_CONFIGURATION. | |
1024 | */ | |
1a8060d9 | 1025 | /* .vbus_power = at91_vbus_power, */ |
bae4bd84 DB |
1026 | }; |
1027 | ||
1028 | /*-------------------------------------------------------------------------*/ | |
1029 | ||
1030 | static int handle_ep(struct at91_ep *ep) | |
1031 | { | |
1032 | struct at91_request *req; | |
1033 | u32 __iomem *creg = ep->creg; | |
1034 | u32 csr = __raw_readl(creg); | |
1035 | ||
1036 | if (!list_empty(&ep->queue)) | |
1037 | req = list_entry(ep->queue.next, | |
1038 | struct at91_request, queue); | |
1039 | else | |
1040 | req = NULL; | |
1041 | ||
1042 | if (ep->is_in) { | |
1043 | if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { | |
1044 | csr |= CLR_FX; | |
1045 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); | |
1046 | __raw_writel(csr, creg); | |
1047 | } | |
1048 | if (req) | |
1049 | return write_fifo(ep, req); | |
1050 | ||
1051 | } else { | |
1052 | if (csr & AT91_UDP_STALLSENT) { | |
1053 | /* STALLSENT bit == ISOERR */ | |
1054 | if (ep->is_iso && req) | |
1055 | req->req.status = -EILSEQ; | |
1056 | csr |= CLR_FX; | |
1057 | csr &= ~(SET_FX | AT91_UDP_STALLSENT); | |
1058 | __raw_writel(csr, creg); | |
1059 | csr = __raw_readl(creg); | |
1060 | } | |
1061 | if (req && (csr & RX_DATA_READY)) | |
1062 | return read_fifo(ep, req); | |
1063 | } | |
1064 | return 0; | |
1065 | } | |
1066 | ||
1067 | union setup { | |
1068 | u8 raw[8]; | |
1069 | struct usb_ctrlrequest r; | |
1070 | }; | |
1071 | ||
1072 | static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) | |
1073 | { | |
1074 | u32 __iomem *creg = ep->creg; | |
1075 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
1076 | unsigned rxcount, i = 0; | |
1077 | u32 tmp; | |
1078 | union setup pkt; | |
1079 | int status = 0; | |
1080 | ||
1081 | /* read and ack SETUP; hard-fail for bogus packets */ | |
1082 | rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
1083 | if (likely(rxcount == 8)) { | |
1084 | while (rxcount--) | |
1085 | pkt.raw[i++] = __raw_readb(dreg); | |
1086 | if (pkt.r.bRequestType & USB_DIR_IN) { | |
1087 | csr |= AT91_UDP_DIR; | |
1088 | ep->is_in = 1; | |
1089 | } else { | |
1090 | csr &= ~AT91_UDP_DIR; | |
1091 | ep->is_in = 0; | |
1092 | } | |
1093 | } else { | |
1a8060d9 | 1094 | /* REVISIT this happens sometimes under load; why?? */ |
bae4bd84 DB |
1095 | ERR("SETUP len %d, csr %08x\n", rxcount, csr); |
1096 | status = -EINVAL; | |
1097 | } | |
1098 | csr |= CLR_FX; | |
1099 | csr &= ~(SET_FX | AT91_UDP_RXSETUP); | |
1100 | __raw_writel(csr, creg); | |
1101 | udc->wait_for_addr_ack = 0; | |
1102 | udc->wait_for_config_ack = 0; | |
1103 | ep->stopped = 0; | |
1104 | if (unlikely(status != 0)) | |
1105 | goto stall; | |
1106 | ||
1107 | #define w_index le16_to_cpu(pkt.r.wIndex) | |
1108 | #define w_value le16_to_cpu(pkt.r.wValue) | |
1109 | #define w_length le16_to_cpu(pkt.r.wLength) | |
1110 | ||
1111 | VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", | |
1112 | pkt.r.bRequestType, pkt.r.bRequest, | |
1113 | w_value, w_index, w_length); | |
1114 | ||
1115 | /* | |
1116 | * A few standard requests get handled here, ones that touch | |
1117 | * hardware ... notably for device and endpoint features. | |
1118 | */ | |
1119 | udc->req_pending = 1; | |
1120 | csr = __raw_readl(creg); | |
1121 | csr |= CLR_FX; | |
1122 | csr &= ~SET_FX; | |
1123 | switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { | |
1124 | ||
1125 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1126 | | USB_REQ_SET_ADDRESS: | |
1127 | __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); | |
1128 | udc->addr = w_value; | |
1129 | udc->wait_for_addr_ack = 1; | |
1130 | udc->req_pending = 0; | |
1131 | /* FADDR is set later, when we ack host STATUS */ | |
1132 | return; | |
1133 | ||
1134 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1135 | | USB_REQ_SET_CONFIGURATION: | |
ffd3326b | 1136 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; |
bae4bd84 DB |
1137 | if (pkt.r.wValue) |
1138 | udc->wait_for_config_ack = (tmp == 0); | |
1139 | else | |
1140 | udc->wait_for_config_ack = (tmp != 0); | |
1141 | if (udc->wait_for_config_ack) | |
1142 | VDBG("wait for config\n"); | |
1143 | /* CONFG is toggled later, if gadget driver succeeds */ | |
1144 | break; | |
1145 | ||
1146 | /* | |
1147 | * Hosts may set or clear remote wakeup status, and | |
1148 | * devices may report they're VBUS powered. | |
1149 | */ | |
1150 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1151 | | USB_REQ_GET_STATUS: | |
1152 | tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); | |
ffd3326b | 1153 | if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) |
bae4bd84 DB |
1154 | tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); |
1155 | PACKET("get device status\n"); | |
1156 | __raw_writeb(tmp, dreg); | |
1157 | __raw_writeb(0, dreg); | |
1158 | goto write_in; | |
1159 | /* then STATUS starts later, automatically */ | |
1160 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1161 | | USB_REQ_SET_FEATURE: | |
1162 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1163 | goto stall; | |
ffd3326b | 1164 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1165 | tmp |= AT91_UDP_ESR; |
ffd3326b | 1166 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1167 | goto succeed; |
1168 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1169 | | USB_REQ_CLEAR_FEATURE: | |
1170 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1171 | goto stall; | |
ffd3326b | 1172 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1173 | tmp &= ~AT91_UDP_ESR; |
ffd3326b | 1174 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1175 | goto succeed; |
1176 | ||
1177 | /* | |
1178 | * Interfaces have no feature settings; this is pretty useless. | |
1179 | * we won't even insist the interface exists... | |
1180 | */ | |
1181 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1182 | | USB_REQ_GET_STATUS: | |
1183 | PACKET("get interface status\n"); | |
1184 | __raw_writeb(0, dreg); | |
1185 | __raw_writeb(0, dreg); | |
1186 | goto write_in; | |
1187 | /* then STATUS starts later, automatically */ | |
1188 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1189 | | USB_REQ_SET_FEATURE: | |
1190 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1191 | | USB_REQ_CLEAR_FEATURE: | |
1192 | goto stall; | |
1193 | ||
1194 | /* | |
1195 | * Hosts may clear bulk/intr endpoint halt after the gadget | |
1196 | * driver sets it (not widely used); or set it (for testing) | |
1197 | */ | |
1198 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1199 | | USB_REQ_GET_STATUS: | |
1200 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1201 | ep = &udc->ep[tmp]; | |
5a6506f0 | 1202 | if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) |
bae4bd84 DB |
1203 | goto stall; |
1204 | ||
1205 | if (tmp) { | |
1206 | if ((w_index & USB_DIR_IN)) { | |
1207 | if (!ep->is_in) | |
1208 | goto stall; | |
1209 | } else if (ep->is_in) | |
1210 | goto stall; | |
1211 | } | |
1212 | PACKET("get %s status\n", ep->ep.name); | |
1213 | if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) | |
1214 | tmp = (1 << USB_ENDPOINT_HALT); | |
1215 | else | |
1216 | tmp = 0; | |
1217 | __raw_writeb(tmp, dreg); | |
1218 | __raw_writeb(0, dreg); | |
1219 | goto write_in; | |
1220 | /* then STATUS starts later, automatically */ | |
1221 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1222 | | USB_REQ_SET_FEATURE: | |
1223 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1224 | ep = &udc->ep[tmp]; | |
1440e096 | 1225 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 | 1226 | goto stall; |
5a6506f0 | 1227 | if (!ep->ep.desc || ep->is_iso) |
bae4bd84 DB |
1228 | goto stall; |
1229 | if ((w_index & USB_DIR_IN)) { | |
1230 | if (!ep->is_in) | |
1231 | goto stall; | |
1232 | } else if (ep->is_in) | |
1233 | goto stall; | |
1234 | ||
1235 | tmp = __raw_readl(ep->creg); | |
1236 | tmp &= ~SET_FX; | |
1237 | tmp |= CLR_FX | AT91_UDP_FORCESTALL; | |
1238 | __raw_writel(tmp, ep->creg); | |
1239 | goto succeed; | |
1240 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1241 | | USB_REQ_CLEAR_FEATURE: | |
1242 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1243 | ep = &udc->ep[tmp]; | |
1440e096 | 1244 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1245 | goto stall; |
1246 | if (tmp == 0) | |
1247 | goto succeed; | |
5a6506f0 | 1248 | if (!ep->ep.desc || ep->is_iso) |
bae4bd84 DB |
1249 | goto stall; |
1250 | if ((w_index & USB_DIR_IN)) { | |
1251 | if (!ep->is_in) | |
1252 | goto stall; | |
1253 | } else if (ep->is_in) | |
1254 | goto stall; | |
1255 | ||
ffd3326b AV |
1256 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
1257 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
1258 | tmp = __raw_readl(ep->creg); |
1259 | tmp |= CLR_FX; | |
1260 | tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); | |
1261 | __raw_writel(tmp, ep->creg); | |
1262 | if (!list_empty(&ep->queue)) | |
1263 | handle_ep(ep); | |
1264 | goto succeed; | |
1265 | } | |
1266 | ||
1267 | #undef w_value | |
1268 | #undef w_index | |
1269 | #undef w_length | |
1270 | ||
1271 | /* pass request up to the gadget driver */ | |
4f4c5e36 HH |
1272 | if (udc->driver) { |
1273 | spin_unlock(&udc->lock); | |
bfb7fb79 | 1274 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
4f4c5e36 HH |
1275 | spin_lock(&udc->lock); |
1276 | } | |
bfb7fb79 WK |
1277 | else |
1278 | status = -ENODEV; | |
bae4bd84 DB |
1279 | if (status < 0) { |
1280 | stall: | |
1281 | VDBG("req %02x.%02x protocol STALL; stat %d\n", | |
1282 | pkt.r.bRequestType, pkt.r.bRequest, status); | |
1283 | csr |= AT91_UDP_FORCESTALL; | |
1284 | __raw_writel(csr, creg); | |
1285 | udc->req_pending = 0; | |
1286 | } | |
1287 | return; | |
1288 | ||
1289 | succeed: | |
1290 | /* immediate successful (IN) STATUS after zero length DATA */ | |
1291 | PACKET("ep0 in/status\n"); | |
1292 | write_in: | |
1293 | csr |= AT91_UDP_TXPKTRDY; | |
1294 | __raw_writel(csr, creg); | |
1295 | udc->req_pending = 0; | |
bae4bd84 DB |
1296 | } |
1297 | ||
1298 | static void handle_ep0(struct at91_udc *udc) | |
1299 | { | |
1300 | struct at91_ep *ep0 = &udc->ep[0]; | |
1301 | u32 __iomem *creg = ep0->creg; | |
1302 | u32 csr = __raw_readl(creg); | |
1303 | struct at91_request *req; | |
1304 | ||
1305 | if (unlikely(csr & AT91_UDP_STALLSENT)) { | |
1306 | nuke(ep0, -EPROTO); | |
1307 | udc->req_pending = 0; | |
1308 | csr |= CLR_FX; | |
1309 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); | |
1310 | __raw_writel(csr, creg); | |
1311 | VDBG("ep0 stalled\n"); | |
1312 | csr = __raw_readl(creg); | |
1313 | } | |
1314 | if (csr & AT91_UDP_RXSETUP) { | |
1315 | nuke(ep0, 0); | |
1316 | udc->req_pending = 0; | |
1317 | handle_setup(udc, ep0, csr); | |
1318 | return; | |
1319 | } | |
1320 | ||
1321 | if (list_empty(&ep0->queue)) | |
1322 | req = NULL; | |
1323 | else | |
1324 | req = list_entry(ep0->queue.next, struct at91_request, queue); | |
1325 | ||
1326 | /* host ACKed an IN packet that we sent */ | |
1327 | if (csr & AT91_UDP_TXCOMP) { | |
1328 | csr |= CLR_FX; | |
1329 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
1330 | ||
1331 | /* write more IN DATA? */ | |
1332 | if (req && ep0->is_in) { | |
1333 | if (handle_ep(ep0)) | |
1334 | udc->req_pending = 0; | |
1335 | ||
1336 | /* | |
1337 | * Ack after: | |
1338 | * - last IN DATA packet (including GET_STATUS) | |
1339 | * - IN/STATUS for OUT DATA | |
1340 | * - IN/STATUS for any zero-length DATA stage | |
1341 | * except for the IN DATA case, the host should send | |
1342 | * an OUT status later, which we'll ack. | |
1343 | */ | |
1344 | } else { | |
1345 | udc->req_pending = 0; | |
1346 | __raw_writel(csr, creg); | |
1347 | ||
1348 | /* | |
1349 | * SET_ADDRESS takes effect only after the STATUS | |
1350 | * (to the original address) gets acked. | |
1351 | */ | |
1352 | if (udc->wait_for_addr_ack) { | |
1353 | u32 tmp; | |
1354 | ||
ffd3326b | 1355 | at91_udp_write(udc, AT91_UDP_FADDR, |
8b2e7668 | 1356 | AT91_UDP_FEN | udc->addr); |
ffd3326b | 1357 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
1358 | tmp &= ~AT91_UDP_FADDEN; |
1359 | if (udc->addr) | |
1360 | tmp |= AT91_UDP_FADDEN; | |
ffd3326b | 1361 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1362 | |
1363 | udc->wait_for_addr_ack = 0; | |
1364 | VDBG("address %d\n", udc->addr); | |
1365 | } | |
1366 | } | |
1367 | } | |
1368 | ||
1369 | /* OUT packet arrived ... */ | |
1370 | else if (csr & AT91_UDP_RX_DATA_BK0) { | |
1371 | csr |= CLR_FX; | |
1372 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
1373 | ||
1374 | /* OUT DATA stage */ | |
1375 | if (!ep0->is_in) { | |
1376 | if (req) { | |
1377 | if (handle_ep(ep0)) { | |
1378 | /* send IN/STATUS */ | |
1379 | PACKET("ep0 in/status\n"); | |
1380 | csr = __raw_readl(creg); | |
1381 | csr &= ~SET_FX; | |
1382 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
1383 | __raw_writel(csr, creg); | |
1384 | udc->req_pending = 0; | |
1385 | } | |
1386 | } else if (udc->req_pending) { | |
1387 | /* | |
1388 | * AT91 hardware has a hard time with this | |
1389 | * "deferred response" mode for control-OUT | |
1390 | * transfers. (For control-IN it's fine.) | |
1391 | * | |
1392 | * The normal solution leaves OUT data in the | |
1393 | * fifo until the gadget driver is ready. | |
1394 | * We couldn't do that here without disabling | |
1395 | * the IRQ that tells about SETUP packets, | |
1396 | * e.g. when the host gets impatient... | |
1397 | * | |
1398 | * Working around it by copying into a buffer | |
1399 | * would almost be a non-deferred response, | |
1400 | * except that it wouldn't permit reliable | |
1401 | * stalling of the request. Instead, demand | |
1402 | * that gadget drivers not use this mode. | |
1403 | */ | |
1404 | DBG("no control-OUT deferred responses!\n"); | |
1405 | __raw_writel(csr | AT91_UDP_FORCESTALL, creg); | |
1406 | udc->req_pending = 0; | |
1407 | } | |
1408 | ||
1409 | /* STATUS stage for control-IN; ack. */ | |
1410 | } else { | |
1411 | PACKET("ep0 out/status ACK\n"); | |
1412 | __raw_writel(csr, creg); | |
1413 | ||
1414 | /* "early" status stage */ | |
1415 | if (req) | |
1416 | done(ep0, req, 0); | |
1417 | } | |
1418 | } | |
1419 | } | |
1420 | ||
7d12e780 | 1421 | static irqreturn_t at91_udc_irq (int irq, void *_udc) |
bae4bd84 DB |
1422 | { |
1423 | struct at91_udc *udc = _udc; | |
1424 | u32 rescans = 5; | |
c6c35237 | 1425 | int disable_clock = 0; |
4f4c5e36 HH |
1426 | unsigned long flags; |
1427 | ||
1428 | spin_lock_irqsave(&udc->lock, flags); | |
c6c35237 HH |
1429 | |
1430 | if (!udc->clocked) { | |
1431 | clk_on(udc); | |
1432 | disable_clock = 1; | |
1433 | } | |
bae4bd84 DB |
1434 | |
1435 | while (rescans--) { | |
8b2e7668 | 1436 | u32 status; |
bae4bd84 | 1437 | |
ffd3326b AV |
1438 | status = at91_udp_read(udc, AT91_UDP_ISR) |
1439 | & at91_udp_read(udc, AT91_UDP_IMR); | |
bae4bd84 DB |
1440 | if (!status) |
1441 | break; | |
1442 | ||
1443 | /* USB reset irq: not maskable */ | |
1444 | if (status & AT91_UDP_ENDBUSRES) { | |
ffd3326b AV |
1445 | at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); |
1446 | at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); | |
bae4bd84 | 1447 | /* Atmel code clears this irq twice */ |
ffd3326b AV |
1448 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
1449 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); | |
bae4bd84 DB |
1450 | VDBG("end bus reset\n"); |
1451 | udc->addr = 0; | |
236e5064 | 1452 | reset_gadget(udc); |
bae4bd84 DB |
1453 | |
1454 | /* enable ep0 */ | |
ffd3326b | 1455 | at91_udp_write(udc, AT91_UDP_CSR(0), |
8b2e7668 | 1456 | AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); |
bae4bd84 DB |
1457 | udc->gadget.speed = USB_SPEED_FULL; |
1458 | udc->suspended = 0; | |
ffd3326b | 1459 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); |
bae4bd84 DB |
1460 | |
1461 | /* | |
1462 | * NOTE: this driver keeps clocks off unless the | |
8b2e7668 DB |
1463 | * USB host is present. That saves power, but for |
1464 | * boards that don't support VBUS detection, both | |
1465 | * clocks need to be active most of the time. | |
bae4bd84 DB |
1466 | */ |
1467 | ||
1468 | /* host initiated suspend (3+ms bus idle) */ | |
1469 | } else if (status & AT91_UDP_RXSUSP) { | |
ffd3326b AV |
1470 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); |
1471 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); | |
1472 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); | |
1a8060d9 | 1473 | /* VDBG("bus suspend\n"); */ |
bae4bd84 DB |
1474 | if (udc->suspended) |
1475 | continue; | |
1476 | udc->suspended = 1; | |
1477 | ||
1478 | /* | |
1479 | * NOTE: when suspending a VBUS-powered device, the | |
1480 | * gadget driver should switch into slow clock mode | |
1481 | * and then into standby to avoid drawing more than | |
1482 | * 500uA power (2500uA for some high-power configs). | |
1483 | */ | |
4f4c5e36 HH |
1484 | if (udc->driver && udc->driver->suspend) { |
1485 | spin_unlock(&udc->lock); | |
bae4bd84 | 1486 | udc->driver->suspend(&udc->gadget); |
4f4c5e36 HH |
1487 | spin_lock(&udc->lock); |
1488 | } | |
bae4bd84 DB |
1489 | |
1490 | /* host initiated resume */ | |
1491 | } else if (status & AT91_UDP_RXRSM) { | |
ffd3326b AV |
1492 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
1493 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); | |
1494 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); | |
1a8060d9 | 1495 | /* VDBG("bus resume\n"); */ |
bae4bd84 DB |
1496 | if (!udc->suspended) |
1497 | continue; | |
1498 | udc->suspended = 0; | |
1499 | ||
1500 | /* | |
1501 | * NOTE: for a VBUS-powered device, the gadget driver | |
1502 | * would normally want to switch out of slow clock | |
1503 | * mode into normal mode. | |
1504 | */ | |
4f4c5e36 HH |
1505 | if (udc->driver && udc->driver->resume) { |
1506 | spin_unlock(&udc->lock); | |
bae4bd84 | 1507 | udc->driver->resume(&udc->gadget); |
4f4c5e36 HH |
1508 | spin_lock(&udc->lock); |
1509 | } | |
bae4bd84 DB |
1510 | |
1511 | /* endpoint IRQs are cleared by handling them */ | |
1512 | } else { | |
1513 | int i; | |
1514 | unsigned mask = 1; | |
1515 | struct at91_ep *ep = &udc->ep[1]; | |
1516 | ||
1517 | if (status & mask) | |
1518 | handle_ep0(udc); | |
1519 | for (i = 1; i < NUM_ENDPOINTS; i++) { | |
1520 | mask <<= 1; | |
1521 | if (status & mask) | |
1522 | handle_ep(ep); | |
1523 | ep++; | |
1524 | } | |
1525 | } | |
1526 | } | |
1527 | ||
c6c35237 HH |
1528 | if (disable_clock) |
1529 | clk_off(udc); | |
1530 | ||
4f4c5e36 HH |
1531 | spin_unlock_irqrestore(&udc->lock, flags); |
1532 | ||
bae4bd84 DB |
1533 | return IRQ_HANDLED; |
1534 | } | |
1535 | ||
1536 | /*-------------------------------------------------------------------------*/ | |
1537 | ||
1538 | static struct at91_udc controller = { | |
1539 | .gadget = { | |
8b2e7668 DB |
1540 | .ops = &at91_udc_ops, |
1541 | .ep0 = &controller.ep[0].ep, | |
1542 | .name = driver_name, | |
bae4bd84 DB |
1543 | }, |
1544 | .ep[0] = { | |
1545 | .ep = { | |
1546 | .name = ep0name, | |
1547 | .ops = &at91_ep_ops, | |
1548 | }, | |
1549 | .udc = &controller, | |
1550 | .maxpacket = 8, | |
bae4bd84 DB |
1551 | .int_mask = 1 << 0, |
1552 | }, | |
1553 | .ep[1] = { | |
1554 | .ep = { | |
1555 | .name = "ep1", | |
1556 | .ops = &at91_ep_ops, | |
1557 | }, | |
1558 | .udc = &controller, | |
1559 | .is_pingpong = 1, | |
1560 | .maxpacket = 64, | |
bae4bd84 DB |
1561 | .int_mask = 1 << 1, |
1562 | }, | |
1563 | .ep[2] = { | |
1564 | .ep = { | |
1565 | .name = "ep2", | |
1566 | .ops = &at91_ep_ops, | |
1567 | }, | |
1568 | .udc = &controller, | |
1569 | .is_pingpong = 1, | |
1570 | .maxpacket = 64, | |
bae4bd84 DB |
1571 | .int_mask = 1 << 2, |
1572 | }, | |
1573 | .ep[3] = { | |
1574 | .ep = { | |
1575 | /* could actually do bulk too */ | |
1576 | .name = "ep3-int", | |
1577 | .ops = &at91_ep_ops, | |
1578 | }, | |
1579 | .udc = &controller, | |
1580 | .maxpacket = 8, | |
bae4bd84 DB |
1581 | .int_mask = 1 << 3, |
1582 | }, | |
1583 | .ep[4] = { | |
1584 | .ep = { | |
1585 | .name = "ep4", | |
1586 | .ops = &at91_ep_ops, | |
1587 | }, | |
1588 | .udc = &controller, | |
1589 | .is_pingpong = 1, | |
1590 | .maxpacket = 256, | |
bae4bd84 DB |
1591 | .int_mask = 1 << 4, |
1592 | }, | |
1593 | .ep[5] = { | |
1594 | .ep = { | |
1595 | .name = "ep5", | |
1596 | .ops = &at91_ep_ops, | |
1597 | }, | |
1598 | .udc = &controller, | |
1599 | .is_pingpong = 1, | |
1600 | .maxpacket = 256, | |
bae4bd84 DB |
1601 | .int_mask = 1 << 5, |
1602 | }, | |
8b2e7668 | 1603 | /* ep6 and ep7 are also reserved (custom silicon might use them) */ |
bae4bd84 DB |
1604 | }; |
1605 | ||
4037242c RM |
1606 | static void at91_vbus_update(struct at91_udc *udc, unsigned value) |
1607 | { | |
1608 | value ^= udc->board.vbus_active_low; | |
1609 | if (value != udc->vbus) | |
1610 | at91_vbus_session(&udc->gadget, value); | |
1611 | } | |
1612 | ||
7d12e780 | 1613 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) |
bae4bd84 DB |
1614 | { |
1615 | struct at91_udc *udc = _udc; | |
bae4bd84 DB |
1616 | |
1617 | /* vbus needs at least brief debouncing */ | |
1618 | udelay(10); | |
4037242c | 1619 | at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin)); |
bae4bd84 DB |
1620 | |
1621 | return IRQ_HANDLED; | |
1622 | } | |
1623 | ||
4037242c RM |
1624 | static void at91_vbus_timer_work(struct work_struct *work) |
1625 | { | |
1626 | struct at91_udc *udc = container_of(work, struct at91_udc, | |
1627 | vbus_timer_work); | |
1628 | ||
1629 | at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin)); | |
1630 | ||
1631 | if (!timer_pending(&udc->vbus_timer)) | |
1632 | mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); | |
1633 | } | |
1634 | ||
1635 | static void at91_vbus_timer(unsigned long data) | |
1636 | { | |
1637 | struct at91_udc *udc = (struct at91_udc *)data; | |
1638 | ||
1639 | /* | |
1640 | * If we are polling vbus it is likely that the gpio is on an | |
1641 | * bus such as i2c or spi which may sleep, so schedule some work | |
1642 | * to read the vbus gpio | |
1643 | */ | |
348409a2 | 1644 | schedule_work(&udc->vbus_timer_work); |
4037242c RM |
1645 | } |
1646 | ||
f3d8bf34 SAS |
1647 | static int at91_start(struct usb_gadget *gadget, |
1648 | struct usb_gadget_driver *driver) | |
bae4bd84 | 1649 | { |
f3d8bf34 | 1650 | struct at91_udc *udc; |
bae4bd84 | 1651 | |
f3d8bf34 | 1652 | udc = container_of(gadget, struct at91_udc, gadget); |
bae4bd84 | 1653 | udc->driver = driver; |
65c84ea1 | 1654 | udc->gadget.dev.of_node = udc->pdev->dev.of_node; |
bae4bd84 DB |
1655 | udc->enabled = 1; |
1656 | udc->selfpowered = 1; | |
1657 | ||
bae4bd84 DB |
1658 | return 0; |
1659 | } | |
bae4bd84 | 1660 | |
22835b80 | 1661 | static int at91_stop(struct usb_gadget *gadget) |
bae4bd84 | 1662 | { |
f3d8bf34 | 1663 | struct at91_udc *udc; |
4f4c5e36 | 1664 | unsigned long flags; |
bae4bd84 | 1665 | |
f3d8bf34 | 1666 | udc = container_of(gadget, struct at91_udc, gadget); |
4f4c5e36 | 1667 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1668 | udc->enabled = 0; |
ffd3326b | 1669 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
4f4c5e36 | 1670 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1671 | |
bae4bd84 DB |
1672 | udc->driver = NULL; |
1673 | ||
bae4bd84 DB |
1674 | return 0; |
1675 | } | |
bae4bd84 DB |
1676 | |
1677 | /*-------------------------------------------------------------------------*/ | |
1678 | ||
1679 | static void at91udc_shutdown(struct platform_device *dev) | |
1680 | { | |
4f4c5e36 HH |
1681 | struct at91_udc *udc = platform_get_drvdata(dev); |
1682 | unsigned long flags; | |
1683 | ||
bae4bd84 | 1684 | /* force disconnect on reboot */ |
4f4c5e36 | 1685 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1686 | pullup(platform_get_drvdata(dev), 0); |
4f4c5e36 | 1687 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1688 | } |
1689 | ||
41ac7b3a | 1690 | static void at91udc_of_init(struct at91_udc *udc, |
d1494a34 JCPV |
1691 | struct device_node *np) |
1692 | { | |
1693 | struct at91_udc_data *board = &udc->board; | |
1694 | u32 val; | |
1695 | enum of_gpio_flags flags; | |
1696 | ||
1697 | if (of_property_read_u32(np, "atmel,vbus-polled", &val) == 0) | |
1698 | board->vbus_polled = 1; | |
1699 | ||
1700 | board->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0, | |
1701 | &flags); | |
1702 | board->vbus_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
1703 | ||
1704 | board->pullup_pin = of_get_named_gpio_flags(np, "atmel,pullup-gpio", 0, | |
1705 | &flags); | |
1706 | ||
1707 | board->pullup_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
1708 | } | |
1709 | ||
41ac7b3a | 1710 | static int at91udc_probe(struct platform_device *pdev) |
bae4bd84 DB |
1711 | { |
1712 | struct device *dev = &pdev->dev; | |
1713 | struct at91_udc *udc; | |
1714 | int retval; | |
ffd3326b | 1715 | struct resource *res; |
bae4bd84 | 1716 | |
e01ee9f5 | 1717 | if (!dev_get_platdata(dev) && !pdev->dev.of_node) { |
bae4bd84 DB |
1718 | /* small (so we copy it) but critical! */ |
1719 | DBG("missing platform_data\n"); | |
1720 | return -ENODEV; | |
1721 | } | |
1722 | ||
ffd3326b AV |
1723 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1724 | if (!res) | |
1725 | return -ENXIO; | |
1726 | ||
d8bb0fd2 | 1727 | if (!request_mem_region(res->start, resource_size(res), driver_name)) { |
bae4bd84 DB |
1728 | DBG("someone's using UDC memory\n"); |
1729 | return -EBUSY; | |
1730 | } | |
1731 | ||
1732 | /* init software state */ | |
1733 | udc = &controller; | |
1734 | udc->gadget.dev.parent = dev; | |
ae40d64b | 1735 | if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) |
d1494a34 JCPV |
1736 | at91udc_of_init(udc, pdev->dev.of_node); |
1737 | else | |
e01ee9f5 | 1738 | memcpy(&udc->board, dev_get_platdata(dev), |
d1494a34 | 1739 | sizeof(struct at91_udc_data)); |
bae4bd84 | 1740 | udc->pdev = pdev; |
bae4bd84 | 1741 | udc->enabled = 0; |
4f4c5e36 | 1742 | spin_lock_init(&udc->lock); |
bae4bd84 | 1743 | |
f3db6e82 DB |
1744 | /* rm9200 needs manual D+ pullup; off by default */ |
1745 | if (cpu_is_at91rm9200()) { | |
d2aec37c | 1746 | if (!gpio_is_valid(udc->board.pullup_pin)) { |
f3db6e82 DB |
1747 | DBG("no D+ pullup?\n"); |
1748 | retval = -ENODEV; | |
1749 | goto fail0; | |
1750 | } | |
1751 | retval = gpio_request(udc->board.pullup_pin, "udc_pullup"); | |
1752 | if (retval) { | |
1753 | DBG("D+ pullup is busy\n"); | |
1754 | goto fail0; | |
1755 | } | |
1756 | gpio_direction_output(udc->board.pullup_pin, | |
1757 | udc->board.pullup_active_low); | |
1758 | } | |
1759 | ||
bb24280f | 1760 | /* newer chips have more FIFO memory than rm9200 */ |
bf1f0a05 | 1761 | if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) { |
0e06bcac RB |
1762 | udc->ep[0].maxpacket = 64; |
1763 | udc->ep[3].maxpacket = 64; | |
1764 | udc->ep[4].maxpacket = 512; | |
1765 | udc->ep[5].maxpacket = 512; | |
23f6d914 | 1766 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
0e06bcac | 1767 | udc->ep[3].maxpacket = 64; |
bb24280f | 1768 | } else if (cpu_is_at91sam9263()) { |
0e06bcac RB |
1769 | udc->ep[0].maxpacket = 64; |
1770 | udc->ep[3].maxpacket = 64; | |
bb24280f DB |
1771 | } |
1772 | ||
d8bb0fd2 | 1773 | udc->udp_baseaddr = ioremap(res->start, resource_size(res)); |
ffd3326b | 1774 | if (!udc->udp_baseaddr) { |
f3db6e82 DB |
1775 | retval = -ENOMEM; |
1776 | goto fail0a; | |
ffd3326b AV |
1777 | } |
1778 | ||
1779 | udc_reinit(udc); | |
1780 | ||
bae4bd84 DB |
1781 | /* get interface and function clocks */ |
1782 | udc->iclk = clk_get(dev, "udc_clk"); | |
1783 | udc->fclk = clk_get(dev, "udpck"); | |
c0aefc75 BB |
1784 | if (IS_ENABLED(CONFIG_COMMON_CLK)) |
1785 | udc->uclk = clk_get(dev, "usb_clk"); | |
1786 | if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk) || | |
1787 | (IS_ENABLED(CONFIG_COMMON_CLK) && IS_ERR(udc->uclk))) { | |
bae4bd84 | 1788 | DBG("clocks missing\n"); |
29ba4b53 | 1789 | retval = -ENODEV; |
2533beea | 1790 | goto fail1; |
8ab10400 | 1791 | } |
bae4bd84 | 1792 | |
8b2e7668 | 1793 | /* don't do anything until we have both gadget driver and VBUS */ |
b2ba27a5 RW |
1794 | if (IS_ENABLED(CONFIG_COMMON_CLK)) { |
1795 | clk_set_rate(udc->uclk, 48000000); | |
1796 | retval = clk_prepare(udc->uclk); | |
1797 | if (retval) | |
1798 | goto fail1; | |
1799 | } | |
1800 | retval = clk_prepare(udc->fclk); | |
1801 | if (retval) | |
1802 | goto fail1a; | |
1803 | ||
76280832 BB |
1804 | retval = clk_prepare_enable(udc->iclk); |
1805 | if (retval) | |
b2ba27a5 | 1806 | goto fail1b; |
ffd3326b AV |
1807 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
1808 | at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); | |
29ba4b53 AV |
1809 | /* Clear all pending interrupts - UDP may be used by bootloader. */ |
1810 | at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); | |
b2ba27a5 | 1811 | clk_disable(udc->iclk); |
bae4bd84 DB |
1812 | |
1813 | /* request UDC and maybe VBUS irqs */ | |
8b2e7668 | 1814 | udc->udp_irq = platform_get_irq(pdev, 0); |
f3db6e82 | 1815 | retval = request_irq(udc->udp_irq, at91_udc_irq, |
b5dd18d8 | 1816 | 0, driver_name, udc); |
f3db6e82 | 1817 | if (retval < 0) { |
8b2e7668 | 1818 | DBG("request irq %d failed\n", udc->udp_irq); |
b2ba27a5 | 1819 | goto fail1c; |
bae4bd84 | 1820 | } |
3285e0ec | 1821 | if (gpio_is_valid(udc->board.vbus_pin)) { |
f3db6e82 DB |
1822 | retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); |
1823 | if (retval < 0) { | |
1824 | DBG("request vbus pin failed\n"); | |
1825 | goto fail2; | |
1826 | } | |
1827 | gpio_direction_input(udc->board.vbus_pin); | |
1828 | ||
29ba4b53 AV |
1829 | /* |
1830 | * Get the initial state of VBUS - we cannot expect | |
1831 | * a pending interrupt. | |
1832 | */ | |
4037242c RM |
1833 | udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^ |
1834 | udc->board.vbus_active_low; | |
1835 | ||
1836 | if (udc->board.vbus_polled) { | |
1837 | INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work); | |
1838 | setup_timer(&udc->vbus_timer, at91_vbus_timer, | |
1839 | (unsigned long)udc); | |
1840 | mod_timer(&udc->vbus_timer, | |
1841 | jiffies + VBUS_POLL_TIMEOUT); | |
1842 | } else { | |
70756027 NF |
1843 | if (request_irq(gpio_to_irq(udc->board.vbus_pin), |
1844 | at91_vbus_irq, 0, driver_name, udc)) { | |
4037242c RM |
1845 | DBG("request vbus irq %d failed\n", |
1846 | udc->board.vbus_pin); | |
1847 | retval = -EBUSY; | |
1848 | goto fail3; | |
1849 | } | |
bae4bd84 DB |
1850 | } |
1851 | } else { | |
1852 | DBG("no VBUS detection, assuming always-on\n"); | |
1853 | udc->vbus = 1; | |
1854 | } | |
0f91349b SAS |
1855 | retval = usb_add_gadget_udc(dev, &udc->gadget); |
1856 | if (retval) | |
1857 | goto fail4; | |
bae4bd84 | 1858 | dev_set_drvdata(dev, udc); |
8b2e7668 | 1859 | device_init_wakeup(dev, 1); |
bae4bd84 DB |
1860 | create_debug_file(udc); |
1861 | ||
1862 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); | |
1863 | return 0; | |
0f91349b | 1864 | fail4: |
3285e0ec | 1865 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled) |
70756027 | 1866 | free_irq(gpio_to_irq(udc->board.vbus_pin), udc); |
f3db6e82 | 1867 | fail3: |
3285e0ec | 1868 | if (gpio_is_valid(udc->board.vbus_pin)) |
f3db6e82 DB |
1869 | gpio_free(udc->board.vbus_pin); |
1870 | fail2: | |
1871 | free_irq(udc->udp_irq, udc); | |
b2ba27a5 RW |
1872 | fail1c: |
1873 | clk_unprepare(udc->iclk); | |
1874 | fail1b: | |
1875 | clk_unprepare(udc->fclk); | |
1876 | fail1a: | |
1877 | if (IS_ENABLED(CONFIG_COMMON_CLK)) | |
1878 | clk_unprepare(udc->uclk); | |
bae4bd84 | 1879 | fail1: |
c0aefc75 BB |
1880 | if (IS_ENABLED(CONFIG_COMMON_CLK) && !IS_ERR(udc->uclk)) |
1881 | clk_put(udc->uclk); | |
30ce1987 BB |
1882 | if (!IS_ERR(udc->fclk)) |
1883 | clk_put(udc->fclk); | |
1884 | if (!IS_ERR(udc->iclk)) | |
1885 | clk_put(udc->iclk); | |
f3db6e82 DB |
1886 | iounmap(udc->udp_baseaddr); |
1887 | fail0a: | |
1888 | if (cpu_is_at91rm9200()) | |
1889 | gpio_free(udc->board.pullup_pin); | |
bae4bd84 | 1890 | fail0: |
d8bb0fd2 | 1891 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 DB |
1892 | DBG("%s probe failed, %d\n", driver_name, retval); |
1893 | return retval; | |
1894 | } | |
1895 | ||
398acce7 | 1896 | static int __exit at91udc_remove(struct platform_device *pdev) |
bae4bd84 | 1897 | { |
8b2e7668 | 1898 | struct at91_udc *udc = platform_get_drvdata(pdev); |
ffd3326b | 1899 | struct resource *res; |
4f4c5e36 | 1900 | unsigned long flags; |
bae4bd84 DB |
1901 | |
1902 | DBG("remove\n"); | |
1903 | ||
0f91349b | 1904 | usb_del_gadget_udc(&udc->gadget); |
6bea476c DB |
1905 | if (udc->driver) |
1906 | return -EBUSY; | |
bae4bd84 | 1907 | |
4f4c5e36 | 1908 | spin_lock_irqsave(&udc->lock, flags); |
6bea476c | 1909 | pullup(udc, 0); |
4f4c5e36 | 1910 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1911 | |
8b2e7668 | 1912 | device_init_wakeup(&pdev->dev, 0); |
bae4bd84 | 1913 | remove_debug_file(udc); |
3285e0ec | 1914 | if (gpio_is_valid(udc->board.vbus_pin)) { |
70756027 | 1915 | free_irq(gpio_to_irq(udc->board.vbus_pin), udc); |
f3db6e82 DB |
1916 | gpio_free(udc->board.vbus_pin); |
1917 | } | |
8b2e7668 | 1918 | free_irq(udc->udp_irq, udc); |
ffd3326b | 1919 | iounmap(udc->udp_baseaddr); |
f3db6e82 DB |
1920 | |
1921 | if (cpu_is_at91rm9200()) | |
1922 | gpio_free(udc->board.pullup_pin); | |
1923 | ||
ffd3326b | 1924 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
d8bb0fd2 | 1925 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 | 1926 | |
b2ba27a5 RW |
1927 | if (IS_ENABLED(CONFIG_COMMON_CLK)) |
1928 | clk_unprepare(udc->uclk); | |
1929 | clk_unprepare(udc->fclk); | |
1930 | clk_unprepare(udc->iclk); | |
1931 | ||
bae4bd84 DB |
1932 | clk_put(udc->iclk); |
1933 | clk_put(udc->fclk); | |
c0aefc75 BB |
1934 | if (IS_ENABLED(CONFIG_COMMON_CLK)) |
1935 | clk_put(udc->uclk); | |
bae4bd84 DB |
1936 | |
1937 | return 0; | |
1938 | } | |
1939 | ||
1940 | #ifdef CONFIG_PM | |
8b2e7668 | 1941 | static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) |
bae4bd84 | 1942 | { |
8b2e7668 DB |
1943 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1944 | int wake = udc->driver && device_may_wakeup(&pdev->dev); | |
4f4c5e36 | 1945 | unsigned long flags; |
bae4bd84 | 1946 | |
8b2e7668 DB |
1947 | /* Unless we can act normally to the host (letting it wake us up |
1948 | * whenever it has work for us) force disconnect. Wakeup requires | |
1949 | * PLLB for USB events (signaling for reset, wakeup, or incoming | |
1950 | * tokens) and VBUS irqs (on systems which support them). | |
bae4bd84 | 1951 | */ |
8b2e7668 DB |
1952 | if ((!udc->suspended && udc->addr) |
1953 | || !wake | |
1954 | || at91_suspend_entering_slow_clock()) { | |
4f4c5e36 | 1955 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1956 | pullup(udc, 0); |
66e56ce7 | 1957 | wake = 0; |
4f4c5e36 | 1958 | spin_unlock_irqrestore(&udc->lock, flags); |
8b2e7668 DB |
1959 | } else |
1960 | enable_irq_wake(udc->udp_irq); | |
1961 | ||
66e56ce7 | 1962 | udc->active_suspend = wake; |
3285e0ec | 1963 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake) |
66e56ce7 | 1964 | enable_irq_wake(udc->board.vbus_pin); |
bae4bd84 DB |
1965 | return 0; |
1966 | } | |
1967 | ||
8b2e7668 | 1968 | static int at91udc_resume(struct platform_device *pdev) |
bae4bd84 | 1969 | { |
8b2e7668 | 1970 | struct at91_udc *udc = platform_get_drvdata(pdev); |
4f4c5e36 | 1971 | unsigned long flags; |
bae4bd84 | 1972 | |
3285e0ec | 1973 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && |
4037242c | 1974 | udc->active_suspend) |
66e56ce7 DB |
1975 | disable_irq_wake(udc->board.vbus_pin); |
1976 | ||
bae4bd84 | 1977 | /* maybe reconnect to host; if so, clocks on */ |
66e56ce7 DB |
1978 | if (udc->active_suspend) |
1979 | disable_irq_wake(udc->udp_irq); | |
4f4c5e36 HH |
1980 | else { |
1981 | spin_lock_irqsave(&udc->lock, flags); | |
66e56ce7 | 1982 | pullup(udc, 1); |
4f4c5e36 HH |
1983 | spin_unlock_irqrestore(&udc->lock, flags); |
1984 | } | |
bae4bd84 DB |
1985 | return 0; |
1986 | } | |
1987 | #else | |
1988 | #define at91udc_suspend NULL | |
1989 | #define at91udc_resume NULL | |
1990 | #endif | |
1991 | ||
d1494a34 JCPV |
1992 | #if defined(CONFIG_OF) |
1993 | static const struct of_device_id at91_udc_dt_ids[] = { | |
1994 | { .compatible = "atmel,at91rm9200-udc" }, | |
1995 | { /* sentinel */ } | |
1996 | }; | |
1997 | ||
1998 | MODULE_DEVICE_TABLE(of, at91_udc_dt_ids); | |
1999 | #endif | |
2000 | ||
dee497df | 2001 | static struct platform_driver at91_udc_driver = { |
398acce7 | 2002 | .remove = __exit_p(at91udc_remove), |
bae4bd84 DB |
2003 | .shutdown = at91udc_shutdown, |
2004 | .suspend = at91udc_suspend, | |
8b2e7668 | 2005 | .resume = at91udc_resume, |
bae4bd84 DB |
2006 | .driver = { |
2007 | .name = (char *) driver_name, | |
2008 | .owner = THIS_MODULE, | |
d1494a34 | 2009 | .of_match_table = of_match_ptr(at91_udc_dt_ids), |
bae4bd84 DB |
2010 | }, |
2011 | }; | |
2012 | ||
52f7a82b | 2013 | module_platform_driver_probe(at91_udc_driver, at91udc_probe); |
bae4bd84 | 2014 | |
8b2e7668 | 2015 | MODULE_DESCRIPTION("AT91 udc driver"); |
bae4bd84 DB |
2016 | MODULE_AUTHOR("Thomas Rathbone, David Brownell"); |
2017 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2018 | MODULE_ALIAS("platform:at91_udc"); |