[deliverable/linux.git] / drivers / usb / host / ehci-au1xxx.c

/*
 * EHCI HCD (Host Controller Driver) for USB.
 *
 * Bus Glue for AMD Alchemy Au1xxx
 *
 * Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org>
 *
 * Modified for AMD Alchemy Au1200 EHC
 *  by K.Boge <karsten.boge@amd.com>
 *
 * This file is licenced under the GPL.
 */

#include <linux/platform_device.h>
#include <asm/mach-au1x00/au1000.h>

#define USB_HOST_CONFIG   (USB_MSR_BASE + USB_MSR_MCFG)
#define USB_MCFG_PFEN     (1<<31)
#define USB_MCFG_RDCOMB   (1<<30)
#define USB_MCFG_SSDEN    (1<<23)
#define USB_MCFG_PHYPLLEN (1<<19)
#define USB_MCFG_UCECLKEN (1<<18)
#define USB_MCFG_EHCCLKEN (1<<17)
#ifdef CONFIG_DMA_COHERENT
#define USB_MCFG_UCAM     (1<<7)
#else
#define USB_MCFG_UCAM     (0)
#endif
#define USB_MCFG_EBMEN    (1<<3)
#define USB_MCFG_EMEMEN   (1<<2)

#define USBH_ENABLE_CE	(USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN)
#define USBH_ENABLE_INIT (USB_MCFG_PFEN  | USB_MCFG_RDCOMB |	\
			  USBH_ENABLE_CE | USB_MCFG_SSDEN  |	\
			  USB_MCFG_UCAM  | USB_MCFG_EBMEN  |	\
			  USB_MCFG_EMEMEN)

#define USBH_DISABLE      (USB_MCFG_EBMEN | USB_MCFG_EMEMEN)

extern int usb_disabled(void);

static void au1xxx_start_ehc(void)
{
	/* enable clock to EHCI block and HS PHY PLL*/
	au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_CE, USB_HOST_CONFIG);
	au_sync();
	udelay(1000);

	/* enable EHCI mmio */
	au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG);
	au_sync();
	udelay(1000);
}

static void au1xxx_stop_ehc(void)
{
	unsigned long c;

	/* Disable mem */
	au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG);
	au_sync();
	udelay(1000);

	/* Disable EHC clock. If the HS PHY is unused disable it too. */
	c = au_readl(USB_HOST_CONFIG) & ~USB_MCFG_EHCCLKEN;
	if (!(c & USB_MCFG_UCECLKEN))		/* UDC disabled? */
		c &= ~USB_MCFG_PHYPLLEN;	/* yes: disable HS PHY PLL */
	au_writel(c, USB_HOST_CONFIG);
	au_sync();
}

static int au1xxx_ehci_setup(struct usb_hcd *hcd)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	int ret = ehci_init(hcd);

	ehci->need_io_watchdog = 0;
	return ret;
}

static const struct hc_driver ehci_au1xxx_hc_driver = {
	.description		= hcd_name,
	.product_desc		= "Au1xxx EHCI",
	.hcd_priv_size		= sizeof(struct ehci_hcd),

	/*
	 * generic hardware linkage
	 */
	.irq			= ehci_irq,
	.flags			= HCD_MEMORY | HCD_USB2,

	/*
	 * basic lifecycle operations
	 *
	 * FIXME -- ehci_init() doesn't do enough here.
	 * See ehci-ppc-soc for a complete implementation.
	 */
	.reset			= au1xxx_ehci_setup,
	.start			= ehci_run,
	.stop			= ehci_stop,
	.shutdown		= ehci_shutdown,

	/*
	 * managing i/o requests and associated device resources
	 */
	.urb_enqueue		= ehci_urb_enqueue,
	.urb_dequeue		= ehci_urb_dequeue,
	.endpoint_disable	= ehci_endpoint_disable,
	.endpoint_reset		= ehci_endpoint_reset,

	/*
	 * scheduling support
	 */
	.get_frame_number	= ehci_get_frame,

	/*
	 * root hub support
	 */
	.hub_status_data	= ehci_hub_status_data,
	.hub_control		= ehci_hub_control,
	.bus_suspend		= ehci_bus_suspend,
	.bus_resume		= ehci_bus_resume,
	.relinquish_port	= ehci_relinquish_port,
	.port_handed_over	= ehci_port_handed_over,

	.clear_tt_buffer_complete	= ehci_clear_tt_buffer_complete,
};

static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
{
	struct usb_hcd *hcd;
	struct ehci_hcd *ehci;
	struct resource *res;
	int ret;

	if (usb_disabled())
		return -ENODEV;

#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
	/* Au1200 AB USB does not support coherent memory */
	if (!(read_c0_prid() & 0xff)) {
		printk(KERN_INFO "%s: this is chip revision AB!\n", pdev->name);
		printk(KERN_INFO "%s: update your board or re-configure"
				 " the kernel\n", pdev->name);
		return -ENODEV;
	}
#endif

	if (pdev->resource[1].flags != IORESOURCE_IRQ) {
		pr_debug("resource[1] is not IORESOURCE_IRQ");
		return -ENOMEM;
	}
	hcd = usb_create_hcd(&ehci_au1xxx_hc_driver, &pdev->dev, "Au1xxx");
	if (!hcd)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hcd->rsrc_start = res->start;
	hcd->rsrc_len = resource_size(res);

	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
		pr_debug("request_mem_region failed");
		ret = -EBUSY;
		goto err1;
	}

	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
	if (!hcd->regs) {
		pr_debug("ioremap failed");
		ret = -ENOMEM;
		goto err2;
	}

	au1xxx_start_ehc();

	ehci = hcd_to_ehci(hcd);
	ehci->caps = hcd->regs;
	ehci->regs = hcd->regs +
		HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
	/* cache this readonly data; minimize chip reads */
	ehci->hcs_params = readl(&ehci->caps->hcs_params);

	ret = usb_add_hcd(hcd, pdev->resource[1].start,
			  IRQF_DISABLED | IRQF_SHARED);
	if (ret == 0) {
		platform_set_drvdata(pdev, hcd);
		return ret;
	}

	au1xxx_stop_ehc();
	iounmap(hcd->regs);
err2:
	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err1:
	usb_put_hcd(hcd);
	return ret;
}

static int ehci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
{
	struct usb_hcd *hcd = platform_get_drvdata(pdev);

	usb_remove_hcd(hcd);
	iounmap(hcd->regs);
	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
	usb_put_hcd(hcd);
	au1xxx_stop_ehc();
	platform_set_drvdata(pdev, NULL);

	return 0;
}

#ifdef CONFIG_PM
static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
{
	struct usb_hcd *hcd = dev_get_drvdata(dev);
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	unsigned long flags;
	int rc = 0;

	if (time_before(jiffies, ehci->next_statechange))
		msleep(10);

	/* Root hub was already suspended. Disable irq emission and
	 * mark HW unaccessible.  The PM and USB cores make sure that
	 * the root hub is either suspended or stopped.
	 */
	ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
	spin_lock_irqsave(&ehci->lock, flags);
	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
	(void)ehci_readl(ehci, &ehci->regs->intr_enable);

	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
	spin_unlock_irqrestore(&ehci->lock, flags);

	// could save FLADJ in case of Vaux power loss
	// ... we'd only use it to handle clock skew

	au1xxx_stop_ehc();

	return rc;
}

static int ehci_hcd_au1xxx_drv_resume(struct device *dev)
{
	struct usb_hcd *hcd = dev_get_drvdata(dev);
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);

	au1xxx_start_ehc();

	// maybe restore FLADJ

	if (time_before(jiffies, ehci->next_statechange))
		msleep(100);

	/* Mark hardware accessible again as we are out of D3 state by now */
	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

	/* If CF is still set, we maintained PCI Vaux power.
	 * Just undo the effect of ehci_pci_suspend().
	 */
	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
		int	mask = INTR_MASK;

		ehci_prepare_ports_for_controller_resume(ehci);
		if (!hcd->self.root_hub->do_remote_wakeup)
			mask &= ~STS_PCD;
		ehci_writel(ehci, mask, &ehci->regs->intr_enable);
		ehci_readl(ehci, &ehci->regs->intr_enable);
		return 0;
	}

	ehci_dbg(ehci, "lost power, restarting\n");
	usb_root_hub_lost_power(hcd->self.root_hub);

	/* Else reset, to cope with power loss or flush-to-storage
	 * style "resume" having let BIOS kick in during reboot.
	 */
	(void) ehci_halt(ehci);
	(void) ehci_reset(ehci);

	/* emptying the schedule aborts any urbs */
	spin_lock_irq(&ehci->lock);
	if (ehci->reclaim)
		end_unlink_async(ehci);
	ehci_work(ehci);
	spin_unlock_irq(&ehci->lock);

	ehci_writel(ehci, ehci->command, &ehci->regs->command);
	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */

	/* here we "know" root ports should always stay powered */
	ehci_port_power(ehci, 1);

	hcd->state = HC_STATE_SUSPENDED;

	return 0;
}

static const struct dev_pm_ops au1xxx_ehci_pmops = {
	.suspend	= ehci_hcd_au1xxx_drv_suspend,
	.resume		= ehci_hcd_au1xxx_drv_resume,
};

#define AU1XXX_EHCI_PMOPS &au1xxx_ehci_pmops

#else
#define AU1XXX_EHCI_PMOPS NULL
#endif

static struct platform_driver ehci_hcd_au1xxx_driver = {
	.probe		= ehci_hcd_au1xxx_drv_probe,
	.remove		= ehci_hcd_au1xxx_drv_remove,
	.shutdown	= usb_hcd_platform_shutdown,
	.driver = {
		.name	= "au1xxx-ehci",
		.owner	= THIS_MODULE,
		.pm	= AU1XXX_EHCI_PMOPS,
	}
};

MODULE_ALIAS("platform:au1xxx-ehci");
Commit	Line	Data
76fa9a24 JC	1	/*
	2	* EHCI HCD (Host Controller Driver) for USB.
	3	*
76fa9a24 JC	4	* Bus Glue for AMD Alchemy Au1xxx
	5	*
	6	* Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org>
	7	*
	8	* Modified for AMD Alchemy Au1200 EHC
	9	* by K.Boge <karsten.boge@amd.com>
	10	*
	11	* This file is licenced under the GPL.
	12	*/
	13
	14	#include <linux/platform_device.h>
	15	#include <asm/mach-au1x00/au1000.h>
	16
76fa9a24 JC	17	#define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG)
	18	#define USB_MCFG_PFEN (1<<31)
	19	#define USB_MCFG_RDCOMB (1<<30)
	20	#define USB_MCFG_SSDEN (1<<23)
	21	#define USB_MCFG_PHYPLLEN (1<<19)
53c81a34	22	#define USB_MCFG_UCECLKEN (1<<18)
76fa9a24	23	#define USB_MCFG_EHCCLKEN (1<<17)
53c81a34	24	#ifdef CONFIG_DMA_COHERENT
76fa9a24	25	#define USB_MCFG_UCAM (1<<7)
53c81a34 ML	26	#else
	27	#define USB_MCFG_UCAM (0)
	28	#endif
76fa9a24 JC	29	#define USB_MCFG_EBMEN (1<<3)
	30	#define USB_MCFG_EMEMEN (1<<2)
	31
53c81a34 ML	32	#define USBH_ENABLE_CE (USB_MCFG_PHYPLLEN \| USB_MCFG_EHCCLKEN)
	33	#define USBH_ENABLE_INIT (USB_MCFG_PFEN \| USB_MCFG_RDCOMB \| \
	34	USBH_ENABLE_CE \| USB_MCFG_SSDEN \| \
	35	USB_MCFG_UCAM \| USB_MCFG_EBMEN \| \
	36	USB_MCFG_EMEMEN)
76fa9a24	37
76fa9a24 JC	38	#define USBH_DISABLE (USB_MCFG_EBMEN \| USB_MCFG_EMEMEN)
76fa9a24 JC	39
76fa9a24 JC	40	extern int usb_disabled(void);
76fa9a24 JC	41
53c81a34	42	static void au1xxx_start_ehc(void)
76fa9a24	43	{
53c81a34 ML	44	/* enable clock to EHCI block and HS PHY PLL*/
	45	au_writel(au_readl(USB_HOST_CONFIG) \| USBH_ENABLE_CE, USB_HOST_CONFIG);
	46	au_sync();
76fa9a24 JC	47	udelay(1000);
76fa9a24 JC	48
53c81a34 ML	49	/* enable EHCI mmio */
	50	au_writel(au_readl(USB_HOST_CONFIG) \| USBH_ENABLE_INIT, USB_HOST_CONFIG);
	51	au_sync();
	52	udelay(1000);
76fa9a24 JC	53	}
76fa9a24 JC	54
53c81a34	55	static void au1xxx_stop_ehc(void)
76fa9a24	56	{
53c81a34	57	unsigned long c;
76fa9a24 JC	58
76fa9a24 JC	59	/* Disable mem */
53c81a34 ML	60	au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG);
53c81a34 ML	61	au_sync();
76fa9a24	62	udelay(1000);
53c81a34 ML	63
	64	/* Disable EHC clock. If the HS PHY is unused disable it too. */
	65	c = au_readl(USB_HOST_CONFIG) & ~USB_MCFG_EHCCLKEN;
	66	if (!(c & USB_MCFG_UCECLKEN)) /* UDC disabled? */
	67	c &= ~USB_MCFG_PHYPLLEN; /* yes: disable HS PHY PLL */
	68	au_writel(c, USB_HOST_CONFIG);
	69	au_sync();
76fa9a24 JC	70	}
76fa9a24 JC	71
9757de38 ML	72	static int au1xxx_ehci_setup(struct usb_hcd *hcd)
	73	{
	74	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	75	int ret = ehci_init(hcd);
	76
	77	ehci->need_io_watchdog = 0;
	78	return ret;
	79	}
	80
53c81a34 ML	81	static const struct hc_driver ehci_au1xxx_hc_driver = {
	82	.description = hcd_name,
	83	.product_desc = "Au1xxx EHCI",
	84	.hcd_priv_size = sizeof(struct ehci_hcd),
76fa9a24	85
53c81a34 ML	86	/*
	87	* generic hardware linkage
	88	*/
	89	.irq = ehci_irq,
	90	.flags = HCD_MEMORY \| HCD_USB2,
76fa9a24	91
53c81a34 ML	92	/*
	93	* basic lifecycle operations
	94	*
	95	* FIXME -- ehci_init() doesn't do enough here.
	96	* See ehci-ppc-soc for a complete implementation.
	97	*/
9757de38	98	.reset = au1xxx_ehci_setup,
53c81a34 ML	99	.start = ehci_run,
	100	.stop = ehci_stop,
	101	.shutdown = ehci_shutdown,
	102
	103	/*
	104	* managing i/o requests and associated device resources
	105	*/
	106	.urb_enqueue = ehci_urb_enqueue,
	107	.urb_dequeue = ehci_urb_dequeue,
	108	.endpoint_disable = ehci_endpoint_disable,
b18ffd49	109	.endpoint_reset = ehci_endpoint_reset,
53c81a34 ML	110
	111	/*
	112	* scheduling support
	113	*/
	114	.get_frame_number = ehci_get_frame,
	115
	116	/*
	117	* root hub support
	118	*/
	119	.hub_status_data = ehci_hub_status_data,
	120	.hub_control = ehci_hub_control,
	121	.bus_suspend = ehci_bus_suspend,
	122	.bus_resume = ehci_bus_resume,
	123	.relinquish_port = ehci_relinquish_port,
	124	.port_handed_over = ehci_port_handed_over,
914b7012 AS	125
914b7012 AS	126	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
53c81a34 ML	127	};
	128
	129	static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
76fa9a24	130	{
76fa9a24 JC	131	struct usb_hcd *hcd;
76fa9a24 JC	132	struct ehci_hcd *ehci;
1f141ca2	133	struct resource *res;
53c81a34	134	int ret;
76fa9a24	135
53c81a34 ML	136	if (usb_disabled())
53c81a34 ML	137	return -ENODEV;
76fa9a24	138
53c81a34	139	#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
76fa9a24 JC	140	/* Au1200 AB USB does not support coherent memory */
76fa9a24 JC	141	if (!(read_c0_prid() & 0xff)) {
53c81a34 ML	142	printk(KERN_INFO "%s: this is chip revision AB!\n", pdev->name);
	143	printk(KERN_INFO "%s: update your board or re-configure"
	144	" the kernel\n", pdev->name);
76fa9a24 JC	145	return -ENODEV;
	146	}
	147	#endif
	148
53c81a34	149	if (pdev->resource[1].flags != IORESOURCE_IRQ) {
76fa9a24	150	pr_debug("resource[1] is not IORESOURCE_IRQ");
53c81a34	151	return -ENOMEM;
76fa9a24	152	}
53c81a34	153	hcd = usb_create_hcd(&ehci_au1xxx_hc_driver, &pdev->dev, "Au1xxx");
76fa9a24 JC	154	if (!hcd)
76fa9a24 JC	155	return -ENOMEM;
53c81a34	156
1f141ca2 HS	157	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	158	hcd->rsrc_start = res->start;
	159	hcd->rsrc_len = resource_size(res);
76fa9a24 JC	160
	161	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
	162	pr_debug("request_mem_region failed");
53c81a34	163	ret = -EBUSY;
76fa9a24 JC	164	goto err1;
	165	}
	166
	167	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
	168	if (!hcd->regs) {
	169	pr_debug("ioremap failed");
53c81a34	170	ret = -ENOMEM;
76fa9a24 JC	171	goto err2;
	172	}
	173
53c81a34 ML	174	au1xxx_start_ehc();
53c81a34 ML	175
76fa9a24 JC	176	ehci = hcd_to_ehci(hcd);
76fa9a24 JC	177	ehci->caps = hcd->regs;
c430131a JA	178	ehci->regs = hcd->regs +
c430131a JA	179	HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
76fa9a24 JC	180	/* cache this readonly data; minimize chip reads */
	181	ehci->hcs_params = readl(&ehci->caps->hcs_params);
	182
53c81a34 ML	183	ret = usb_add_hcd(hcd, pdev->resource[1].start,
	184	IRQF_DISABLED \| IRQF_SHARED);
	185	if (ret == 0) {
	186	platform_set_drvdata(pdev, hcd);
	187	return ret;
	188	}
76fa9a24	189
53c81a34	190	au1xxx_stop_ehc();
76fa9a24 JC	191	iounmap(hcd->regs);
	192	err2:
	193	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
	194	err1:
	195	usb_put_hcd(hcd);
53c81a34	196	return ret;
76fa9a24 JC	197	}
76fa9a24 JC	198
53c81a34	199	static int ehci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
76fa9a24	200	{
53c81a34 ML	201	struct usb_hcd *hcd = platform_get_drvdata(pdev);
53c81a34 ML	202
76fa9a24 JC	203	usb_remove_hcd(hcd);
	204	iounmap(hcd->regs);
	205	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
	206	usb_put_hcd(hcd);
53c81a34 ML	207	au1xxx_stop_ehc();
53c81a34 ML	208	platform_set_drvdata(pdev, NULL);
76fa9a24	209
76fa9a24 JC	210	return 0;
	211	}
	212
42bfc7b4	213	#ifdef CONFIG_PM
807fcb5e	214	static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
76fa9a24	215	{
807fcb5e	216	struct usb_hcd *hcd = dev_get_drvdata(dev);
42bfc7b4 ML	217	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
42bfc7b4 ML	218	unsigned long flags;
a7535ac0	219	int rc = 0;
42bfc7b4 ML	220
	221	if (time_before(jiffies, ehci->next_statechange))
	222	msleep(10);
	223
	224	/* Root hub was already suspended. Disable irq emission and
16032c4f AS	225	* mark HW unaccessible. The PM and USB cores make sure that
16032c4f AS	226	* the root hub is either suspended or stopped.
42bfc7b4	227	*/
4147200d	228	ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
148fc55f	229	spin_lock_irqsave(&ehci->lock, flags);
42bfc7b4 ML	230	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
	231	(void)ehci_readl(ehci, &ehci->regs->intr_enable);
	232
42bfc7b4	233	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
42bfc7b4 ML	234	spin_unlock_irqrestore(&ehci->lock, flags);
	235
	236	// could save FLADJ in case of Vaux power loss
	237	// ... we'd only use it to handle clock skew
	238
a7535ac0 ML	239	au1xxx_stop_ehc();
a7535ac0 ML	240
42bfc7b4	241	return rc;
76fa9a24	242	}
42bfc7b4	243
807fcb5e	244	static int ehci_hcd_au1xxx_drv_resume(struct device *dev)
76fa9a24	245	{
807fcb5e	246	struct usb_hcd *hcd = dev_get_drvdata(dev);
42bfc7b4 ML	247	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	248
	249	au1xxx_start_ehc();
	250
	251	// maybe restore FLADJ
	252
	253	if (time_before(jiffies, ehci->next_statechange))
	254	msleep(100);
	255
	256	/* Mark hardware accessible again as we are out of D3 state by now */
	257	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
	258
	259	/* If CF is still set, we maintained PCI Vaux power.
	260	* Just undo the effect of ehci_pci_suspend().
	261	*/
	262	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
	263	int mask = INTR_MASK;
	264
16032c4f	265	ehci_prepare_ports_for_controller_resume(ehci);
42bfc7b4 ML	266	if (!hcd->self.root_hub->do_remote_wakeup)
	267	mask &= ~STS_PCD;
	268	ehci_writel(ehci, mask, &ehci->regs->intr_enable);
	269	ehci_readl(ehci, &ehci->regs->intr_enable);
	270	return 0;
	271	}
	272
	273	ehci_dbg(ehci, "lost power, restarting\n");
	274	usb_root_hub_lost_power(hcd->self.root_hub);
	275
	276	/* Else reset, to cope with power loss or flush-to-storage
	277	* style "resume" having let BIOS kick in during reboot.
	278	*/
	279	(void) ehci_halt(ehci);
	280	(void) ehci_reset(ehci);
	281
	282	/* emptying the schedule aborts any urbs */
	283	spin_lock_irq(&ehci->lock);
	284	if (ehci->reclaim)
	285	end_unlink_async(ehci);
	286	ehci_work(ehci);
	287	spin_unlock_irq(&ehci->lock);
	288
	289	ehci_writel(ehci, ehci->command, &ehci->regs->command);
	290	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
	291	ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
	292
	293	/* here we "know" root ports should always stay powered */
	294	ehci_port_power(ehci, 1);
	295
	296	hcd->state = HC_STATE_SUSPENDED;
76fa9a24 JC	297
	298	return 0;
	299	}
42bfc7b4	300
47145210	301	static const struct dev_pm_ops au1xxx_ehci_pmops = {
807fcb5e ML	302	.suspend = ehci_hcd_au1xxx_drv_suspend,
	303	.resume = ehci_hcd_au1xxx_drv_resume,
	304	};
	305
	306	#define AU1XXX_EHCI_PMOPS &au1xxx_ehci_pmops
	307
42bfc7b4	308	#else
807fcb5e	309	#define AU1XXX_EHCI_PMOPS NULL
42bfc7b4	310	#endif
53c81a34	311
d14feb5e	312	static struct platform_driver ehci_hcd_au1xxx_driver = {
53c81a34 ML	313	.probe = ehci_hcd_au1xxx_drv_probe,
	314	.remove = ehci_hcd_au1xxx_drv_remove,
	315	.shutdown = usb_hcd_platform_shutdown,
d14feb5e	316	.driver = {
53c81a34 ML	317	.name = "au1xxx-ehci",
53c81a34 ML	318	.owner = THIS_MODULE,
807fcb5e	319	.pm = AU1XXX_EHCI_PMOPS,
d14feb5e	320	}
76fa9a24	321	};
53c81a34 ML	322
53c81a34 ML	323	MODULE_ALIAS("platform:au1xxx-ehci");