Merge branch 'akpm' (patches from Andrew)
[deliverable/linux.git] / drivers / usb / host / ehci-dbg.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2001-2002 by David Brownell
53bd6a60 3 *
1da177e4
LT
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
1da177e4
LT
14 */
15
16/* this file is part of ehci-hcd.c */
17
1c20163d 18#ifdef CONFIG_DYNAMIC_DEBUG
1da177e4 19
0784b4d5
GB
20/*
21 * check the values in the HCSPARAMS register
1da177e4
LT
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
24 */
668ab0db 25static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
1da177e4 26{
083522d7 27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
1da177e4 28
668ab0db 29 ehci_dbg(ehci,
1da177e4
LT
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
31 label, params,
668ab0db
GB
32 HCS_DEBUG_PORT(params),
33 HCS_INDICATOR(params) ? " ind" : "",
34 HCS_N_CC(params),
35 HCS_N_PCC(params),
36 HCS_PORTROUTED(params) ? "" : " ordered",
37 HCS_PPC(params) ? "" : " !ppc",
78698d66 38 HCS_N_PORTS(params));
1da177e4 39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
668ab0db 40 if (HCS_PORTROUTED(params)) {
1da177e4 41 int i;
1cb1d1c0 42 char buf[46], tmp[7], byte;
1da177e4
LT
43
44 buf[0] = 0;
668ab0db 45 for (i = 0; i < HCS_N_PORTS(params); i++) {
0784b4d5 46 /* FIXME MIPS won't readb() ... */
668ab0db 47 byte = readb(&ehci->caps->portroute[(i >> 1)]);
53bd6a60 48 sprintf(tmp, "%d ",
c2fb0171 49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
1da177e4
LT
50 strcat(buf, tmp);
51 }
668ab0db 52 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
1da177e4
LT
53 }
54}
1da177e4 55
0784b4d5
GB
56/*
57 * check the values in the HCCPARAMS register
1da177e4
LT
58 * (host controller _Capability_ parameters)
59 * see EHCI Spec, Table 2-5 for each value
0784b4d5 60 */
668ab0db 61static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
1da177e4 62{
083522d7 63 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
1da177e4 64
668ab0db
GB
65 if (HCC_ISOC_CACHE(params)) {
66 ehci_dbg(ehci,
6dbd682b
SR
67 "%s hcc_params %04x caching frame %s%s%s\n",
68 label, params,
69 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
70 HCC_CANPARK(params) ? " park" : "",
71 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
1da177e4 72 } else {
668ab0db 73 ehci_dbg(ehci,
aa4d8342 74 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
6dbd682b
SR
75 label,
76 params,
77 HCC_ISOC_THRES(params),
78 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
79 HCC_CANPARK(params) ? " park" : "",
aa4d8342
AD
80 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
81 HCC_LPM(params) ? " LPM" : "",
82 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
83 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
84 HCC_32FRAME_PERIODIC_LIST(params) ?
855ef452 85 " 32 periodic list" : "");
1da177e4
LT
86 }
87}
1da177e4 88
8234509c 89static void __maybe_unused
668ab0db 90dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
1da177e4 91{
6dbd682b
SR
92 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
93 hc32_to_cpup(ehci, &qtd->hw_next),
94 hc32_to_cpup(ehci, &qtd->hw_alt_next),
95 hc32_to_cpup(ehci, &qtd->hw_token),
1cb1d1c0
GB
96 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
97 if (qtd->hw_buf[1])
6dbd682b
SR
98 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
99 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
100 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
101 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
102 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
1da177e4
LT
103}
104
8234509c 105static void __maybe_unused
668ab0db 106dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
1da177e4 107{
3807e26d
AD
108 struct ehci_qh_hw *hw = qh->hw;
109
668ab0db 110 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
3807e26d
AD
111 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
112 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
1da177e4
LT
113}
114
8234509c 115static void __maybe_unused
668ab0db 116dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
1da177e4 117{
668ab0db 118 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
6dbd682b
SR
119 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
120 itd->urb);
668ab0db 121 ehci_dbg(ehci,
53bd6a60 122 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
6dbd682b
SR
123 hc32_to_cpu(ehci, itd->hw_transaction[0]),
124 hc32_to_cpu(ehci, itd->hw_transaction[1]),
125 hc32_to_cpu(ehci, itd->hw_transaction[2]),
126 hc32_to_cpu(ehci, itd->hw_transaction[3]),
127 hc32_to_cpu(ehci, itd->hw_transaction[4]),
128 hc32_to_cpu(ehci, itd->hw_transaction[5]),
129 hc32_to_cpu(ehci, itd->hw_transaction[6]),
130 hc32_to_cpu(ehci, itd->hw_transaction[7]));
668ab0db 131 ehci_dbg(ehci,
53bd6a60 132 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
6dbd682b
SR
133 hc32_to_cpu(ehci, itd->hw_bufp[0]),
134 hc32_to_cpu(ehci, itd->hw_bufp[1]),
135 hc32_to_cpu(ehci, itd->hw_bufp[2]),
136 hc32_to_cpu(ehci, itd->hw_bufp[3]),
137 hc32_to_cpu(ehci, itd->hw_bufp[4]),
138 hc32_to_cpu(ehci, itd->hw_bufp[5]),
139 hc32_to_cpu(ehci, itd->hw_bufp[6]));
668ab0db 140 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
1da177e4
LT
141 itd->index[0], itd->index[1], itd->index[2],
142 itd->index[3], itd->index[4], itd->index[5],
143 itd->index[6], itd->index[7]);
144}
145
8234509c 146static void __maybe_unused
668ab0db 147dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
1da177e4 148{
668ab0db 149 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
6dbd682b
SR
150 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
151 sitd->urb);
668ab0db 152 ehci_dbg(ehci,
53bd6a60 153 " addr %08x sched %04x result %08x buf %08x %08x\n",
6dbd682b
SR
154 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
155 hc32_to_cpu(ehci, sitd->hw_uframe),
156 hc32_to_cpu(ehci, sitd->hw_results),
157 hc32_to_cpu(ehci, sitd->hw_buf[0]),
158 hc32_to_cpu(ehci, sitd->hw_buf[1]));
1da177e4
LT
159}
160
8234509c 161static int __maybe_unused
668ab0db 162dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
1da177e4 163{
668ab0db 164 return scnprintf(buf, len,
aa4d8342 165 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
1cb1d1c0 166 label, label[0] ? " " : "", status,
aa4d8342 167 (status & STS_PPCE_MASK) ? " PPCE" : "",
1da177e4
LT
168 (status & STS_ASS) ? " Async" : "",
169 (status & STS_PSS) ? " Periodic" : "",
170 (status & STS_RECL) ? " Recl" : "",
171 (status & STS_HALT) ? " Halt" : "",
172 (status & STS_IAA) ? " IAA" : "",
173 (status & STS_FATAL) ? " FATAL" : "",
174 (status & STS_FLR) ? " FLR" : "",
175 (status & STS_PCD) ? " PCD" : "",
176 (status & STS_ERR) ? " ERR" : "",
78698d66 177 (status & STS_INT) ? " INT" : "");
1da177e4
LT
178}
179
8234509c 180static int __maybe_unused
668ab0db 181dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
1da177e4 182{
668ab0db 183 return scnprintf(buf, len,
aa4d8342 184 "%s%sintrenable %02x%s%s%s%s%s%s%s",
1cb1d1c0 185 label, label[0] ? " " : "", enable,
aa4d8342 186 (enable & STS_PPCE_MASK) ? " PPCE" : "",
1da177e4
LT
187 (enable & STS_IAA) ? " IAA" : "",
188 (enable & STS_FATAL) ? " FATAL" : "",
189 (enable & STS_FLR) ? " FLR" : "",
190 (enable & STS_PCD) ? " PCD" : "",
191 (enable & STS_ERR) ? " ERR" : "",
78698d66 192 (enable & STS_INT) ? " INT" : "");
1da177e4
LT
193}
194
1cb1d1c0 195static const char *const fls_strings[] = { "1024", "512", "256", "??" };
1da177e4
LT
196
197static int
668ab0db 198dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
1da177e4 199{
668ab0db 200 return scnprintf(buf, len,
aa4d8342
AD
201 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
202 "period=%s%s %s",
1cb1d1c0 203 label, label[0] ? " " : "", command,
aa4d8342
AD
204 (command & CMD_HIRD) ? " HIRD" : "",
205 (command & CMD_PPCEE) ? " PPCEE" : "",
206 (command & CMD_FSP) ? " FSP" : "",
207 (command & CMD_ASPE) ? " ASPE" : "",
208 (command & CMD_PSPE) ? " PSPE" : "",
209 (command & CMD_PARK) ? " park" : "(park)",
668ab0db 210 CMD_PARK_CNT(command),
1da177e4
LT
211 (command >> 16) & 0x3f,
212 (command & CMD_LRESET) ? " LReset" : "",
213 (command & CMD_IAAD) ? " IAAD" : "",
214 (command & CMD_ASE) ? " Async" : "",
215 (command & CMD_PSE) ? " Periodic" : "",
1cb1d1c0 216 fls_strings[(command >> 2) & 0x3],
1da177e4 217 (command & CMD_RESET) ? " Reset" : "",
78698d66 218 (command & CMD_RUN) ? "RUN" : "HALT");
1da177e4
LT
219}
220
221static int
668ab0db 222dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
1da177e4
LT
223{
224 char *sig;
225
226 /* signaling state */
227 switch (status & (3 << 10)) {
5bb95ec8
GB
228 case 0 << 10:
229 sig = "se0";
230 break;
231 case 1 << 10: /* low speed */
232 sig = "k";
233 break;
234 case 2 << 10:
235 sig = "j";
236 break;
237 default:
238 sig = "?";
239 break;
1da177e4
LT
240 }
241
668ab0db 242 return scnprintf(buf, len,
aa4d8342
AD
243 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
244 "sig=%s%s%s%s%s%s%s%s%s%s%s",
1cb1d1c0 245 label, label[0] ? " " : "", port, status,
c2fb0171
GB
246 status >> 25, /*device address */
247 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
aa4d8342 248 " ACK" : "",
c2fb0171 249 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
aa4d8342 250 " NYET" : "",
c2fb0171 251 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
aa4d8342 252 " STALL" : "",
c2fb0171 253 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
aa4d8342 254 " ERR" : "",
1da177e4
LT
255 (status & PORT_POWER) ? " POWER" : "",
256 (status & PORT_OWNER) ? " OWNER" : "",
257 sig,
aa4d8342 258 (status & PORT_LPM) ? " LPM" : "",
1da177e4
LT
259 (status & PORT_RESET) ? " RESET" : "",
260 (status & PORT_SUSPEND) ? " SUSPEND" : "",
261 (status & PORT_RESUME) ? " RESUME" : "",
262 (status & PORT_OCC) ? " OCC" : "",
263 (status & PORT_OC) ? " OC" : "",
264 (status & PORT_PEC) ? " PEC" : "",
265 (status & PORT_PE) ? " PE" : "",
266 (status & PORT_CSC) ? " CSC" : "",
6dbd682b 267 (status & PORT_CONNECT) ? " CONNECT" : "");
1da177e4
LT
268}
269
1f8e5afd
GB
270static inline void
271dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
272{
273 char buf[80];
274
275 dbg_status_buf(buf, sizeof(buf), label, status);
276 ehci_dbg(ehci, "%s\n", buf);
1da177e4
LT
277}
278
1f8e5afd
GB
279static inline void
280dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
281{
282 char buf[80];
283
284 dbg_command_buf(buf, sizeof(buf), label, command);
285 ehci_dbg(ehci, "%s\n", buf);
1da177e4
LT
286}
287
1f8e5afd
GB
288static inline void
289dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
290{
291 char buf[80];
292
293 dbg_port_buf(buf, sizeof(buf), label, port, status);
294 ehci_dbg(ehci, "%s\n", buf);
1da177e4
LT
295}
296
297/*-------------------------------------------------------------------------*/
298
694cc208
TJ
299/* troubleshooting help: expose state in debugfs */
300
301static int debug_async_open(struct inode *, struct file *);
d0ce5c6b 302static int debug_bandwidth_open(struct inode *, struct file *);
694cc208
TJ
303static int debug_periodic_open(struct inode *, struct file *);
304static int debug_registers_open(struct inode *, struct file *);
aa4d8342 305
694cc208
TJ
306static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
307static int debug_close(struct inode *, struct file *);
308
309static const struct file_operations debug_async_fops = {
310 .owner = THIS_MODULE,
311 .open = debug_async_open,
312 .read = debug_output,
313 .release = debug_close,
6038f373 314 .llseek = default_llseek,
694cc208 315};
e1666317 316
d0ce5c6b
AS
317static const struct file_operations debug_bandwidth_fops = {
318 .owner = THIS_MODULE,
319 .open = debug_bandwidth_open,
320 .read = debug_output,
321 .release = debug_close,
322 .llseek = default_llseek,
323};
e1666317 324
694cc208
TJ
325static const struct file_operations debug_periodic_fops = {
326 .owner = THIS_MODULE,
327 .open = debug_periodic_open,
328 .read = debug_output,
329 .release = debug_close,
6038f373 330 .llseek = default_llseek,
694cc208 331};
e1666317 332
694cc208
TJ
333static const struct file_operations debug_registers_fops = {
334 .owner = THIS_MODULE,
335 .open = debug_registers_open,
336 .read = debug_output,
337 .release = debug_close,
6038f373 338 .llseek = default_llseek,
694cc208
TJ
339};
340
341static struct dentry *ehci_debug_root;
342
343struct debug_buffer {
344 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
345 struct usb_bus *bus;
346 struct mutex mutex; /* protect filling of buffer */
347 size_t count; /* number of characters filled into buffer */
3c04e20e
ML
348 char *output_buf;
349 size_t alloc_size;
694cc208 350};
1da177e4 351
1f8e5afd
GB
352static inline char speed_char(u32 info1)
353{
354 switch (info1 & (3 << 12)) {
355 case QH_FULL_SPEED:
356 return 'f';
357 case QH_LOW_SPEED:
358 return 'l';
359 case QH_HIGH_SPEED:
360 return 'h';
361 default:
362 return '?';
363 }
364}
1da177e4 365
6dbd682b 366static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
1da177e4 367{
6dbd682b
SR
368 __u32 v = hc32_to_cpu(ehci, token);
369
1da177e4
LT
370 if (v & QTD_STS_ACTIVE)
371 return '*';
372 if (v & QTD_STS_HALT)
373 return '-';
668ab0db 374 if (!IS_SHORT_READ(v))
1da177e4
LT
375 return ' ';
376 /* tries to advance through hw_alt_next */
377 return '/';
378}
379
c768ffb8
GB
380static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
381 char **nextp, unsigned *sizep)
1da177e4
LT
382{
383 u32 scratch;
384 u32 hw_curr;
385 struct list_head *entry;
386 struct ehci_qtd *td;
387 unsigned temp;
388 unsigned size = *sizep;
389 char *next = *nextp;
390 char mark;
fd05e720 391 __le32 list_end = EHCI_LIST_END(ehci);
3807e26d 392 struct ehci_qh_hw *hw = qh->hw;
1da177e4 393
3807e26d 394 if (hw->hw_qtd_next == list_end) /* NEC does this */
1da177e4
LT
395 mark = '@';
396 else
3807e26d 397 mark = token_mark(ehci, hw->hw_token);
1da177e4 398 if (mark == '/') { /* qh_alt_next controls qh advance? */
3807e26d
AD
399 if ((hw->hw_alt_next & QTD_MASK(ehci))
400 == ehci->async->hw->hw_alt_next)
1da177e4 401 mark = '#'; /* blocked */
3807e26d 402 else if (hw->hw_alt_next == list_end)
1da177e4
LT
403 mark = '.'; /* use hw_qtd_next */
404 /* else alt_next points to some other qtd */
405 }
3807e26d
AD
406 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
407 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
668ab0db 408 temp = scnprintf(next, size,
8ee10d62
AS
409 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
410 " [cur %08x next %08x buf[0] %08x]",
1da177e4
LT
411 qh, scratch & 0x007f,
412 speed_char (scratch),
413 (scratch >> 8) & 0x000f,
3807e26d
AD
414 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
415 hc32_to_cpup(ehci, &hw->hw_token), mark,
416 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
1da177e4 417 ? "data1" : "data0",
8ee10d62
AS
418 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
419 hc32_to_cpup(ehci, &hw->hw_current),
420 hc32_to_cpup(ehci, &hw->hw_qtd_next),
421 hc32_to_cpup(ehci, &hw->hw_buf[0]));
1da177e4
LT
422 size -= temp;
423 next += temp;
424
425 /* hc may be modifying the list as we read it ... */
668ab0db 426 list_for_each(entry, &qh->qtd_list) {
5bb95ec8
GB
427 char *type;
428
668ab0db 429 td = list_entry(entry, struct ehci_qtd, qtd_list);
6dbd682b 430 scratch = hc32_to_cpup(ehci, &td->hw_token);
1da177e4 431 mark = ' ';
04b8ad43 432 if (hw_curr == td->qtd_dma) {
1da177e4 433 mark = '*';
04b8ad43 434 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
1da177e4 435 mark = '+';
04b8ad43 436 } else if (QTD_LENGTH(scratch)) {
3807e26d 437 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
1da177e4 438 mark = '#';
6dbd682b 439 else if (td->hw_alt_next != list_end)
1da177e4
LT
440 mark = '/';
441 }
5bb95ec8
GB
442 switch ((scratch >> 8) & 0x03) {
443 case 0:
444 type = "out";
445 break;
446 case 1:
447 type = "in";
448 break;
449 case 2:
450 type = "setup";
451 break;
452 default:
453 type = "?";
454 break;
455 }
a5355977 456 temp = scnprintf(next, size,
8ee10d62
AS
457 "\n\t%p%c%s len=%d %08x urb %p"
458 " [td %08x buf[0] %08x]",
5bb95ec8 459 td, mark, type,
1da177e4
LT
460 (scratch >> 16) & 0x7fff,
461 scratch,
8ee10d62
AS
462 td->urb,
463 (u32) td->qtd_dma,
464 hc32_to_cpup(ehci, &td->hw_buf[0]));
1da177e4
LT
465 size -= temp;
466 next += temp;
467 if (temp == size)
468 goto done;
469 }
470
a5355977 471 temp = scnprintf(next, size, "\n");
1da177e4
LT
472 size -= temp;
473 next += temp;
474
475done:
476 *sizep = size;
477 *nextp = next;
478}
479
694cc208 480static ssize_t fill_async_buffer(struct debug_buffer *buf)
1da177e4 481{
1da177e4
LT
482 struct usb_hcd *hcd;
483 struct ehci_hcd *ehci;
484 unsigned long flags;
485 unsigned temp, size;
486 char *next;
487 struct ehci_qh *qh;
488
694cc208 489 hcd = bus_to_hcd(buf->bus);
668ab0db 490 ehci = hcd_to_ehci(hcd);
3c04e20e
ML
491 next = buf->output_buf;
492 size = buf->alloc_size;
1da177e4 493
694cc208
TJ
494 *next = 0;
495
0784b4d5
GB
496 /*
497 * dumps a snapshot of the async schedule.
1da177e4
LT
498 * usually empty except for long-term bulk reads, or head.
499 * one QH per line, and TDs we know about
500 */
668ab0db 501 spin_lock_irqsave(&ehci->lock, flags);
1da177e4 502 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
668ab0db 503 qh_lines(ehci, qh, &next, &size);
6e018751 504 if (!list_empty(&ehci->async_unlink) && size > 0) {
99ac5b1e 505 temp = scnprintf(next, size, "\nunlink =\n");
1da177e4
LT
506 size -= temp;
507 next += temp;
508
6e018751
AS
509 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
510 if (size <= 0)
511 break;
512 qh_lines(ehci, qh, &next, &size);
513 }
1da177e4 514 }
668ab0db 515 spin_unlock_irqrestore(&ehci->lock, flags);
1da177e4 516
3c04e20e 517 return strlen(buf->output_buf);
1da177e4 518}
1da177e4 519
d0ce5c6b
AS
520static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
521{
522 struct ehci_hcd *ehci;
b35c5009
AS
523 struct ehci_tt *tt;
524 struct ehci_per_sched *ps;
d0ce5c6b
AS
525 unsigned temp, size;
526 char *next;
527 unsigned i;
528 u8 *bw;
b35c5009
AS
529 u16 *bf;
530 u8 budget[EHCI_BANDWIDTH_SIZE];
d0ce5c6b
AS
531
532 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
533 next = buf->output_buf;
534 size = buf->alloc_size;
535
536 *next = 0;
537
538 spin_lock_irq(&ehci->lock);
539
540 /* Dump the HS bandwidth table */
541 temp = scnprintf(next, size,
542 "HS bandwidth allocation (us per microframe)\n");
543 size -= temp;
544 next += temp;
545 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
546 bw = &ehci->bandwidth[i];
547 temp = scnprintf(next, size,
548 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
549 i, bw[0], bw[1], bw[2], bw[3],
550 bw[4], bw[5], bw[6], bw[7]);
551 size -= temp;
552 next += temp;
553 }
b35c5009
AS
554
555 /* Dump all the FS/LS tables */
556 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
557 temp = scnprintf(next, size,
558 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
559 dev_name(&tt->usb_tt->hub->dev),
560 tt->tt_port + !!tt->usb_tt->multi);
561 size -= temp;
562 next += temp;
563
564 bf = tt->bandwidth;
565 temp = scnprintf(next, size,
566 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
567 bf[0], bf[1], bf[2], bf[3],
568 bf[4], bf[5], bf[6], bf[7]);
569 size -= temp;
570 next += temp;
571
572 temp = scnprintf(next, size,
573 "FS/LS budget (us per microframe)\n");
574 size -= temp;
575 next += temp;
576 compute_tt_budget(budget, tt);
577 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
578 bw = &budget[i];
579 temp = scnprintf(next, size,
580 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
581 i, bw[0], bw[1], bw[2], bw[3],
582 bw[4], bw[5], bw[6], bw[7]);
583 size -= temp;
584 next += temp;
585 }
586 list_for_each_entry(ps, &tt->ps_list, ps_list) {
587 temp = scnprintf(next, size,
588 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
589 dev_name(&ps->udev->dev),
590 ps->ep->desc.bEndpointAddress,
591 ps->tt_usecs,
592 ps->bw_phase, ps->phase_uf,
593 ps->bw_period, ps->cs_mask);
594 size -= temp;
595 next += temp;
596 }
597 }
d0ce5c6b
AS
598 spin_unlock_irq(&ehci->lock);
599
600 return next - buf->output_buf;
601}
602
3fd29009
GB
603static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
604 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
605{
606 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
607 struct ehci_qtd *qtd;
608 char *type = "";
609 unsigned temp = 0;
610
611 /* count tds, get ep direction */
612 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
613 temp++;
614 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
615 case 0:
616 type = "out";
617 continue;
618 case 1:
619 type = "in";
620 continue;
621 }
622 }
623
624 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
625 speed_char(scratch), scratch & 0x007f,
626 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
627 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
628}
629
1da177e4 630#define DBG_SCHED_LIMIT 64
694cc208 631static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
1da177e4 632{
1da177e4
LT
633 struct usb_hcd *hcd;
634 struct ehci_hcd *ehci;
635 unsigned long flags;
636 union ehci_shadow p, *seen;
637 unsigned temp, size, seen_count;
638 char *next;
639 unsigned i;
6dbd682b 640 __hc32 tag;
1da177e4 641
cb272521 642 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
911fdb6e 643 if (!seen)
1da177e4
LT
644 return 0;
645 seen_count = 0;
646
694cc208 647 hcd = bus_to_hcd(buf->bus);
668ab0db 648 ehci = hcd_to_ehci(hcd);
3c04e20e
ML
649 next = buf->output_buf;
650 size = buf->alloc_size;
1da177e4 651
668ab0db 652 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
1da177e4
LT
653 size -= temp;
654 next += temp;
655
0784b4d5
GB
656 /*
657 * dump a snapshot of the periodic schedule.
1da177e4
LT
658 * iso changes, interrupt usually doesn't.
659 */
668ab0db 660 spin_lock_irqsave(&ehci->lock, flags);
1da177e4 661 for (i = 0; i < ehci->periodic_size; i++) {
1cb1d1c0 662 p = ehci->pshadow[i];
668ab0db 663 if (likely(!p.ptr))
1da177e4 664 continue;
1cb1d1c0 665 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
1da177e4 666
668ab0db 667 temp = scnprintf(next, size, "%4d: ", i);
1da177e4
LT
668 size -= temp;
669 next += temp;
670
671 do {
3807e26d
AD
672 struct ehci_qh_hw *hw;
673
6dbd682b 674 switch (hc32_to_cpu(ehci, tag)) {
1da177e4 675 case Q_TYPE_QH:
3807e26d 676 hw = p.qh->hw;
668ab0db 677 temp = scnprintf(next, size, " qh%d-%04x/%p",
ffa0248e 678 p.qh->ps.period,
6dbd682b 679 hc32_to_cpup(ehci,
3807e26d 680 &hw->hw_info2)
1da177e4 681 /* uframe masks */
7dedacf4 682 & (QH_CMASK | QH_SMASK),
1da177e4
LT
683 p.qh);
684 size -= temp;
685 next += temp;
686 /* don't repeat what follows this qh */
687 for (temp = 0; temp < seen_count; temp++) {
1cb1d1c0 688 if (seen[temp].ptr != p.ptr)
1da177e4 689 continue;
3c4bb71f 690 if (p.qh->qh_next.ptr) {
668ab0db 691 temp = scnprintf(next, size,
1da177e4 692 " ...");
3c4bb71f
ML
693 size -= temp;
694 next += temp;
695 }
1da177e4
LT
696 break;
697 }
698 /* show more info the first time around */
3c4bb71f 699 if (temp == seen_count) {
3fd29009
GB
700 temp = output_buf_tds_dir(next, ehci,
701 hw, p.qh, size);
1da177e4
LT
702
703 if (seen_count < DBG_SCHED_LIMIT)
1cb1d1c0 704 seen[seen_count++].qh = p.qh;
04b8ad43 705 } else {
1da177e4 706 temp = 0;
04b8ad43 707 }
17dcfc9b
AS
708 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
709 p = p.qh->qh_next;
1da177e4
LT
710 break;
711 case Q_TYPE_FSTN:
668ab0db 712 temp = scnprintf(next, size,
1da177e4
LT
713 " fstn-%8x/%p", p.fstn->hw_prev,
714 p.fstn);
6dbd682b 715 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
1da177e4
LT
716 p = p.fstn->fstn_next;
717 break;
718 case Q_TYPE_ITD:
668ab0db 719 temp = scnprintf(next, size,
1da177e4 720 " itd/%p", p.itd);
6dbd682b 721 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
1da177e4
LT
722 p = p.itd->itd_next;
723 break;
724 case Q_TYPE_SITD:
668ab0db 725 temp = scnprintf(next, size,
1da177e4 726 " sitd%d-%04x/%p",
ffa0248e 727 p.sitd->stream->ps.period,
6dbd682b 728 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
1da177e4
LT
729 & 0x0000ffff,
730 p.sitd);
6dbd682b 731 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
1da177e4
LT
732 p = p.sitd->sitd_next;
733 break;
734 }
735 size -= temp;
736 next += temp;
737 } while (p.ptr);
738
668ab0db 739 temp = scnprintf(next, size, "\n");
1da177e4
LT
740 size -= temp;
741 next += temp;
742 }
668ab0db
GB
743 spin_unlock_irqrestore(&ehci->lock, flags);
744 kfree(seen);
1da177e4 745
3c04e20e 746 return buf->alloc_size - size;
1da177e4 747}
1da177e4
LT
748#undef DBG_SCHED_LIMIT
749
e8799906
AS
750static const char *rh_state_string(struct ehci_hcd *ehci)
751{
752 switch (ehci->rh_state) {
753 case EHCI_RH_HALTED:
754 return "halted";
755 case EHCI_RH_SUSPENDED:
756 return "suspended";
757 case EHCI_RH_RUNNING:
758 return "running";
c0c53dbc
AS
759 case EHCI_RH_STOPPING:
760 return "stopping";
e8799906
AS
761 }
762 return "?";
763}
764
694cc208 765static ssize_t fill_registers_buffer(struct debug_buffer *buf)
1da177e4 766{
1da177e4
LT
767 struct usb_hcd *hcd;
768 struct ehci_hcd *ehci;
769 unsigned long flags;
770 unsigned temp, size, i;
1cb1d1c0
GB
771 char *next, scratch[80];
772 static char fmt[] = "%*s\n";
773 static char label[] = "";
1da177e4 774
694cc208 775 hcd = bus_to_hcd(buf->bus);
668ab0db 776 ehci = hcd_to_ehci(hcd);
3c04e20e
ML
777 next = buf->output_buf;
778 size = buf->alloc_size;
1da177e4 779
668ab0db 780 spin_lock_irqsave(&ehci->lock, flags);
1da177e4 781
541c7d43 782 if (!HCD_HW_ACCESSIBLE(hcd)) {
668ab0db 783 size = scnprintf(next, size,
2b70f073 784 "bus %s, device %s\n"
d49d4317 785 "%s\n"
1da177e4
LT
786 "SUSPENDED (no register access)\n",
787 hcd->self.controller->bus->name,
7071a3ce 788 dev_name(hcd->self.controller),
d49d4317 789 hcd->product_desc);
1da177e4
LT
790 goto done;
791 }
792
793 /* Capability Registers */
c430131a 794 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
668ab0db 795 temp = scnprintf(next, size,
2b70f073 796 "bus %s, device %s\n"
d49d4317 797 "%s\n"
e8799906 798 "EHCI %x.%02x, rh state %s\n",
1da177e4 799 hcd->self.controller->bus->name,
7071a3ce 800 dev_name(hcd->self.controller),
d49d4317 801 hcd->product_desc,
e8799906 802 i >> 8, i & 0x0ff, rh_state_string(ehci));
1da177e4
LT
803 size -= temp;
804 next += temp;
805
d49d4317
DB
806#ifdef CONFIG_PCI
807 /* EHCI 0.96 and later may have "extended capabilities" */
e10e6f43 808 if (dev_is_pci(hcd->self.controller)) {
d49d4317
DB
809 struct pci_dev *pdev;
810 u32 offset, cap, cap2;
c2fb0171 811 unsigned count = 256 / 4;
d49d4317
DB
812
813 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
6dbd682b
SR
814 offset = HCC_EXT_CAPS(ehci_readl(ehci,
815 &ehci->caps->hcc_params));
d49d4317 816 while (offset && count--) {
668ab0db 817 pci_read_config_dword(pdev, offset, &cap);
d49d4317
DB
818 switch (cap & 0xff) {
819 case 1:
668ab0db 820 temp = scnprintf(next, size,
d49d4317
DB
821 "ownership %08x%s%s\n", cap,
822 (cap & (1 << 24)) ? " linux" : "",
823 (cap & (1 << 16)) ? " firmware" : "");
824 size -= temp;
825 next += temp;
826
827 offset += 4;
668ab0db
GB
828 pci_read_config_dword(pdev, offset, &cap2);
829 temp = scnprintf(next, size,
d49d4317
DB
830 "SMI sts/enable 0x%08x\n", cap2);
831 size -= temp;
832 next += temp;
833 break;
834 case 0: /* illegal reserved capability */
835 cap = 0;
836 /* FALLTHROUGH */
837 default: /* unknown */
838 break;
839 }
840 temp = (cap >> 8) & 0xff;
841 }
842 }
843#endif
844
0784b4d5 845 /* FIXME interpret both types of params */
083522d7 846 i = ehci_readl(ehci, &ehci->caps->hcs_params);
668ab0db 847 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
1da177e4
LT
848 size -= temp;
849 next += temp;
850
083522d7 851 i = ehci_readl(ehci, &ehci->caps->hcc_params);
668ab0db 852 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
1da177e4
LT
853 size -= temp;
854 next += temp;
855
856 /* Operational Registers */
668ab0db 857 temp = dbg_status_buf(scratch, sizeof(scratch), label,
083522d7 858 ehci_readl(ehci, &ehci->regs->status));
668ab0db 859 temp = scnprintf(next, size, fmt, temp, scratch);
1da177e4
LT
860 size -= temp;
861 next += temp;
862
668ab0db 863 temp = dbg_command_buf(scratch, sizeof(scratch), label,
083522d7 864 ehci_readl(ehci, &ehci->regs->command));
668ab0db 865 temp = scnprintf(next, size, fmt, temp, scratch);
1da177e4
LT
866 size -= temp;
867 next += temp;
868
668ab0db 869 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
083522d7 870 ehci_readl(ehci, &ehci->regs->intr_enable));
668ab0db 871 temp = scnprintf(next, size, fmt, temp, scratch);
1da177e4
LT
872 size -= temp;
873 next += temp;
874
668ab0db 875 temp = scnprintf(next, size, "uframe %04x\n",
68aa95d5 876 ehci_read_frame_index(ehci));
1da177e4
LT
877 size -= temp;
878 next += temp;
879
668ab0db
GB
880 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
881 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
6dbd682b
SR
882 ehci_readl(ehci,
883 &ehci->regs->port_status[i - 1]));
668ab0db 884 temp = scnprintf(next, size, fmt, temp, scratch);
1da177e4
LT
885 size -= temp;
886 next += temp;
d49d4317 887 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
668ab0db 888 temp = scnprintf(next, size,
d49d4317 889 " debug control %08x\n",
6dbd682b
SR
890 ehci_readl(ehci,
891 &ehci->debug->control));
d49d4317
DB
892 size -= temp;
893 next += temp;
894 }
1da177e4
LT
895 }
896
6e018751 897 if (!list_empty(&ehci->async_unlink)) {
99ac5b1e 898 temp = scnprintf(next, size, "async unlink qh %p\n",
6e018751
AS
899 list_first_entry(&ehci->async_unlink,
900 struct ehci_qh, unlink_node));
1da177e4
LT
901 size -= temp;
902 next += temp;
903 }
904
905#ifdef EHCI_STATS
668ab0db 906 temp = scnprintf(next, size,
99ac5b1e
AS
907 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
908 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
1da177e4
LT
909 ehci->stats.lost_iaa);
910 size -= temp;
911 next += temp;
912
668ab0db 913 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
1da177e4
LT
914 ehci->stats.complete, ehci->stats.unlink);
915 size -= temp;
916 next += temp;
917#endif
918
919done:
668ab0db 920 spin_unlock_irqrestore(&ehci->lock, flags);
1da177e4 921
3c04e20e 922 return buf->alloc_size - size;
1da177e4 923}
1da177e4 924
694cc208 925static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
c768ffb8 926 ssize_t (*fill_func)(struct debug_buffer *))
1da177e4 927{
694cc208
TJ
928 struct debug_buffer *buf;
929
12ef7dd9 930 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
1da177e4 931
694cc208
TJ
932 if (buf) {
933 buf->bus = bus;
934 buf->fill_func = fill_func;
935 mutex_init(&buf->mutex);
3c04e20e 936 buf->alloc_size = PAGE_SIZE;
694cc208
TJ
937 }
938
939 return buf;
1da177e4
LT
940}
941
694cc208 942static int fill_buffer(struct debug_buffer *buf)
1da177e4 943{
694cc208
TJ
944 int ret = 0;
945
3c04e20e 946 if (!buf->output_buf)
73f35c60 947 buf->output_buf = vmalloc(buf->alloc_size);
694cc208 948
3c04e20e 949 if (!buf->output_buf) {
694cc208
TJ
950 ret = -ENOMEM;
951 goto out;
952 }
953
954 ret = buf->fill_func(buf);
1da177e4 955
694cc208
TJ
956 if (ret >= 0) {
957 buf->count = ret;
958 ret = 0;
959 }
960
961out:
962 return ret;
1da177e4
LT
963}
964
694cc208 965static ssize_t debug_output(struct file *file, char __user *user_buf,
c768ffb8 966 size_t len, loff_t *offset)
694cc208
TJ
967{
968 struct debug_buffer *buf = file->private_data;
969 int ret = 0;
970
971 mutex_lock(&buf->mutex);
972 if (buf->count == 0) {
973 ret = fill_buffer(buf);
974 if (ret != 0) {
975 mutex_unlock(&buf->mutex);
976 goto out;
977 }
978 }
979 mutex_unlock(&buf->mutex);
980
981 ret = simple_read_from_buffer(user_buf, len, offset,
3c04e20e 982 buf->output_buf, buf->count);
694cc208
TJ
983
984out:
985 return ret;
694cc208
TJ
986}
987
988static int debug_close(struct inode *inode, struct file *file)
989{
990 struct debug_buffer *buf = file->private_data;
1da177e4 991
694cc208 992 if (buf) {
f8086a07 993 vfree(buf->output_buf);
694cc208
TJ
994 kfree(buf);
995 }
996
997 return 0;
998}
d0ce5c6b 999
694cc208
TJ
1000static int debug_async_open(struct inode *inode, struct file *file)
1001{
1002 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
1003
1004 return file->private_data ? 0 : -ENOMEM;
1005}
1006
d0ce5c6b
AS
1007static int debug_bandwidth_open(struct inode *inode, struct file *file)
1008{
1009 file->private_data = alloc_buffer(inode->i_private,
1010 fill_bandwidth_buffer);
1011
1012 return file->private_data ? 0 : -ENOMEM;
1013}
1014
694cc208
TJ
1015static int debug_periodic_open(struct inode *inode, struct file *file)
1016{
3c04e20e 1017 struct debug_buffer *buf;
8d587d64 1018
3c04e20e
ML
1019 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1020 if (!buf)
1021 return -ENOMEM;
694cc208 1022
c2fb0171 1023 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
3c04e20e
ML
1024 file->private_data = buf;
1025 return 0;
694cc208
TJ
1026}
1027
1028static int debug_registers_open(struct inode *inode, struct file *file)
1029{
1030 file->private_data = alloc_buffer(inode->i_private,
1031 fill_registers_buffer);
1032
1033 return file->private_data ? 0 : -ENOMEM;
1034}
1035
668ab0db 1036static inline void create_debug_files(struct ehci_hcd *ehci)
694cc208
TJ
1037{
1038 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1039
1040 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1041 if (!ehci->debug_dir)
185c9bcf
ML
1042 return;
1043
1044 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1045 &debug_async_fops))
1046 goto file_error;
1047
d0ce5c6b
AS
1048 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1049 &debug_bandwidth_fops))
1050 goto file_error;
1051
185c9bcf
ML
1052 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1053 &debug_periodic_fops))
1054 goto file_error;
1055
1056 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1057 &debug_registers_fops))
1058 goto file_error;
1059
694cc208
TJ
1060 return;
1061
185c9bcf
ML
1062file_error:
1063 debugfs_remove_recursive(ehci->debug_dir);
694cc208
TJ
1064}
1065
668ab0db 1066static inline void remove_debug_files(struct ehci_hcd *ehci)
694cc208 1067{
185c9bcf 1068 debugfs_remove_recursive(ehci->debug_dir);
694cc208
TJ
1069}
1070
128f8b3d
AS
1071#else /* CONFIG_DYNAMIC_DEBUG */
1072
1073static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) { }
1074static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) { }
1075
1076static inline void __maybe_unused dbg_qh(const char *label,
1077 struct ehci_hcd *ehci, struct ehci_qh *qh) { }
1078
1079static inline int __maybe_unused dbg_status_buf(const char *buf,
1080 unsigned int len, const char *label, u32 status)
1081{ return 0; }
1082
1083static inline int __maybe_unused dbg_command_buf(const char *buf,
1084 unsigned int len, const char *label, u32 command)
1085{ return 0; }
1086
1087static inline int __maybe_unused dbg_intr_buf(const char *buf,
1088 unsigned int len, const char *label, u32 enable)
1089{ return 0; }
1090
1091static inline int __maybe_unused dbg_port_buf(char *buf,
1092 unsigned int len, const char *label, int port, u32 status)
1093{ return 0; }
1094
1095static inline void dbg_status(struct ehci_hcd *ehci, const char *label,
1096 u32 status) { }
1097static inline void dbg_cmd(struct ehci_hcd *ehci, const char *label,
1098 u32 command) { }
1099static inline void dbg_port(struct ehci_hcd *ehci, const char *label,
1100 int port, u32 status) { }
1101
1102static inline void create_debug_files(struct ehci_hcd *bus) { }
1103static inline void remove_debug_files(struct ehci_hcd *bus) { }
1104
93df42ba 1105#endif /* CONFIG_DYNAMIC_DEBUG */
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