xhci: rework cycle bit checking for new dequeue pointers
[deliverable/linux.git] / drivers / usb / host / ehci-exynos.c
CommitLineData
1bcc5aa8 1/*
29824c16 2 * SAMSUNG EXYNOS USB HOST EHCI Controller
1bcc5aa8
JS
3 *
4 * Copyright (C) 2011 Samsung Electronics Co.Ltd
5 * Author: Jingoo Han <jg1.han@samsung.com>
6 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/clk.h>
7edb3daf
MG
16#include <linux/dma-mapping.h>
17#include <linux/io.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
2c026e2b 20#include <linux/of.h>
fd81d59c 21#include <linux/of_gpio.h>
1c17675d 22#include <linux/phy/phy.h>
7edb3daf 23#include <linux/platform_device.h>
d233c196 24#include <linux/usb/phy.h>
b506eebc 25#include <linux/usb/samsung_usb_phy.h>
7edb3daf
MG
26#include <linux/usb.h>
27#include <linux/usb/hcd.h>
28#include <linux/usb/otg.h>
29
30#include "ehci.h"
31
29824c16 32#define DRIVER_DESC "EHCI EXYNOS driver"
1bcc5aa8 33
88555a63
JH
34#define EHCI_INSNREG00(base) (base + 0x90)
35#define EHCI_INSNREG00_ENA_INCR16 (0x1 << 25)
36#define EHCI_INSNREG00_ENA_INCR8 (0x1 << 24)
37#define EHCI_INSNREG00_ENA_INCR4 (0x1 << 23)
38#define EHCI_INSNREG00_ENA_INCRX_ALIGN (0x1 << 22)
39#define EHCI_INSNREG00_ENABLE_DMA_BURST \
40 (EHCI_INSNREG00_ENA_INCR16 | EHCI_INSNREG00_ENA_INCR8 | \
41 EHCI_INSNREG00_ENA_INCR4 | EHCI_INSNREG00_ENA_INCRX_ALIGN)
42
29824c16
JH
43static const char hcd_name[] = "ehci-exynos";
44static struct hc_driver __read_mostly exynos_ehci_hc_driver;
7edb3daf 45
1c17675d
KD
46#define PHY_NUMBER 3
47
29824c16 48struct exynos_ehci_hcd {
1bcc5aa8 49 struct clk *clk;
d233c196
VG
50 struct usb_phy *phy;
51 struct usb_otg *otg;
1c17675d 52 struct phy *phy_g[PHY_NUMBER];
1bcc5aa8
JS
53};
54
29824c16 55#define to_exynos_ehci(hcd) (struct exynos_ehci_hcd *)(hcd_to_ehci(hcd)->priv)
d233c196 56
1c17675d
KD
57static int exynos_ehci_get_phy(struct device *dev,
58 struct exynos_ehci_hcd *exynos_ehci)
59{
60 struct device_node *child;
61 struct phy *phy;
62 int phy_number;
63 int ret = 0;
64
65 exynos_ehci->phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
66 if (IS_ERR(exynos_ehci->phy)) {
67 ret = PTR_ERR(exynos_ehci->phy);
68 if (ret != -ENXIO && ret != -ENODEV) {
69 dev_err(dev, "no usb2 phy configured\n");
70 return ret;
71 }
72 dev_dbg(dev, "Failed to get usb2 phy\n");
73 } else {
74 exynos_ehci->otg = exynos_ehci->phy->otg;
75 }
76
77 for_each_available_child_of_node(dev->of_node, child) {
78 ret = of_property_read_u32(child, "reg", &phy_number);
79 if (ret) {
80 dev_err(dev, "Failed to parse device tree\n");
81 of_node_put(child);
82 return ret;
83 }
84
85 if (phy_number >= PHY_NUMBER) {
86 dev_err(dev, "Invalid number of PHYs\n");
87 of_node_put(child);
88 return -EINVAL;
89 }
90
14ad5a94 91 phy = devm_of_phy_get(dev, child, NULL);
1c17675d
KD
92 of_node_put(child);
93 if (IS_ERR(phy)) {
94 ret = PTR_ERR(phy);
95 if (ret != -ENOSYS && ret != -ENODEV) {
96 dev_err(dev, "no usb2 phy configured\n");
97 return ret;
98 }
99 dev_dbg(dev, "Failed to get usb2 phy\n");
100 }
101 exynos_ehci->phy_g[phy_number] = phy;
102 }
103
104 return ret;
105}
106
107static int exynos_ehci_phy_enable(struct device *dev)
108{
109 struct usb_hcd *hcd = dev_get_drvdata(dev);
110 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
111 int i;
112 int ret = 0;
113
114 if (!IS_ERR(exynos_ehci->phy))
115 return usb_phy_init(exynos_ehci->phy);
116
117 for (i = 0; ret == 0 && i < PHY_NUMBER; i++)
118 if (!IS_ERR(exynos_ehci->phy_g[i]))
119 ret = phy_power_on(exynos_ehci->phy_g[i]);
120 if (ret)
121 for (i--; i >= 0; i--)
122 if (!IS_ERR(exynos_ehci->phy_g[i]))
123 phy_power_off(exynos_ehci->phy_g[i]);
124
125 return ret;
126}
127
128static void exynos_ehci_phy_disable(struct device *dev)
129{
130 struct usb_hcd *hcd = dev_get_drvdata(dev);
131 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
132 int i;
133
134 if (!IS_ERR(exynos_ehci->phy)) {
135 usb_phy_shutdown(exynos_ehci->phy);
136 return;
137 }
138
139 for (i = 0; i < PHY_NUMBER; i++)
140 if (!IS_ERR(exynos_ehci->phy_g[i]))
141 phy_power_off(exynos_ehci->phy_g[i]);
142}
143
91a9677a 144static void exynos_setup_vbus_gpio(struct device *dev)
fd81d59c
VG
145{
146 int err;
147 int gpio;
148
3f3b55bf 149 if (!dev->of_node)
fd81d59c
VG
150 return;
151
3f3b55bf 152 gpio = of_get_named_gpio(dev->of_node, "samsung,vbus-gpio", 0);
fd81d59c
VG
153 if (!gpio_is_valid(gpio))
154 return;
155
3f3b55bf
DA
156 err = devm_gpio_request_one(dev, gpio, GPIOF_OUT_INIT_HIGH,
157 "ehci_vbus_gpio");
fd81d59c 158 if (err)
3f3b55bf 159 dev_err(dev, "can't request ehci vbus gpio %d", gpio);
fd81d59c
VG
160}
161
29824c16 162static int exynos_ehci_probe(struct platform_device *pdev)
1bcc5aa8 163{
29824c16 164 struct exynos_ehci_hcd *exynos_ehci;
1bcc5aa8
JS
165 struct usb_hcd *hcd;
166 struct ehci_hcd *ehci;
167 struct resource *res;
168 int irq;
169 int err;
170
2c026e2b
VG
171 /*
172 * Right now device-tree probed devices don't get dma_mask set.
173 * Since shared usb code relies on it, set it here for now.
174 * Once we move to full device tree support this will vanish off.
175 */
e1fd7341 176 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
22d9d8e8
RK
177 if (err)
178 return err;
2c026e2b 179
91a9677a 180 exynos_setup_vbus_gpio(&pdev->dev);
fd81d59c 181
29824c16 182 hcd = usb_create_hcd(&exynos_ehci_hc_driver,
7edb3daf
MG
183 &pdev->dev, dev_name(&pdev->dev));
184 if (!hcd) {
185 dev_err(&pdev->dev, "Unable to create HCD\n");
1bcc5aa8 186 return -ENOMEM;
7edb3daf 187 }
29824c16 188 exynos_ehci = to_exynos_ehci(hcd);
e6b0166f
TA
189
190 if (of_device_is_compatible(pdev->dev.of_node,
57ae1605 191 "samsung,exynos5440-ehci"))
e6b0166f 192 goto skip_phy;
e6b0166f 193
1c17675d
KD
194 err = exynos_ehci_get_phy(&pdev->dev, exynos_ehci);
195 if (err)
196 goto fail_clk;
d233c196 197
e6b0166f
TA
198skip_phy:
199
29824c16 200 exynos_ehci->clk = devm_clk_get(&pdev->dev, "usbhost");
1bcc5aa8 201
29824c16 202 if (IS_ERR(exynos_ehci->clk)) {
1bcc5aa8 203 dev_err(&pdev->dev, "Failed to get usbhost clock\n");
29824c16 204 err = PTR_ERR(exynos_ehci->clk);
1bcc5aa8
JS
205 goto fail_clk;
206 }
207
29824c16 208 err = clk_prepare_enable(exynos_ehci->clk);
1bcc5aa8 209 if (err)
63fd0ae4 210 goto fail_clk;
1bcc5aa8
JS
211
212 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
213 if (!res) {
214 dev_err(&pdev->dev, "Failed to get I/O memory\n");
215 err = -ENXIO;
216 goto fail_io;
217 }
218
219 hcd->rsrc_start = res->start;
220 hcd->rsrc_len = resource_size(res);
4e24bde3
VG
221 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
222 if (IS_ERR(hcd->regs)) {
223 err = PTR_ERR(hcd->regs);
1bcc5aa8
JS
224 goto fail_io;
225 }
226
227 irq = platform_get_irq(pdev, 0);
228 if (!irq) {
229 dev_err(&pdev->dev, "Failed to get IRQ\n");
230 err = -ENODEV;
9cb07563 231 goto fail_io;
1bcc5aa8
JS
232 }
233
29824c16
JH
234 if (exynos_ehci->otg)
235 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 236
1c17675d
KD
237 err = exynos_ehci_phy_enable(&pdev->dev);
238 if (err) {
239 dev_err(&pdev->dev, "Failed to enable USB phy\n");
240 goto fail_io;
241 }
1bcc5aa8
JS
242
243 ehci = hcd_to_ehci(hcd);
244 ehci->caps = hcd->regs;
1bcc5aa8 245
88555a63
JH
246 /* DMA burst Enable */
247 writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
248
b5dd18d8 249 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
1bcc5aa8
JS
250 if (err) {
251 dev_err(&pdev->dev, "Failed to add USB HCD\n");
d233c196 252 goto fail_add_hcd;
1bcc5aa8 253 }
3c9740a1 254 device_wakeup_enable(hcd->self.controller);
1bcc5aa8 255
bbcd85a0 256 platform_set_drvdata(pdev, hcd);
1bcc5aa8
JS
257
258 return 0;
259
d233c196 260fail_add_hcd:
1c17675d 261 exynos_ehci_phy_disable(&pdev->dev);
1bcc5aa8 262fail_io:
29824c16 263 clk_disable_unprepare(exynos_ehci->clk);
1bcc5aa8
JS
264fail_clk:
265 usb_put_hcd(hcd);
1bcc5aa8
JS
266 return err;
267}
268
29824c16 269static int exynos_ehci_remove(struct platform_device *pdev)
1bcc5aa8 270{
7edb3daf 271 struct usb_hcd *hcd = platform_get_drvdata(pdev);
29824c16 272 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
1bcc5aa8
JS
273
274 usb_remove_hcd(hcd);
275
29824c16
JH
276 if (exynos_ehci->otg)
277 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 278
1c17675d 279 exynos_ehci_phy_disable(&pdev->dev);
1bcc5aa8 280
29824c16 281 clk_disable_unprepare(exynos_ehci->clk);
1bcc5aa8
JS
282
283 usb_put_hcd(hcd);
1bcc5aa8
JS
284
285 return 0;
286}
287
1acb30ef 288#ifdef CONFIG_PM
29824c16 289static int exynos_ehci_suspend(struct device *dev)
1acb30ef 290{
7edb3daf 291 struct usb_hcd *hcd = dev_get_drvdata(dev);
29824c16 292 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
7edb3daf 293
c5cf9212 294 bool do_wakeup = device_may_wakeup(dev);
c5cf9212 295 int rc;
1acb30ef 296
c5cf9212 297 rc = ehci_suspend(hcd, do_wakeup);
d7217510
VG
298 if (rc)
299 return rc;
1acb30ef 300
29824c16
JH
301 if (exynos_ehci->otg)
302 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 303
1c17675d 304 exynos_ehci_phy_disable(dev);
1acb30ef 305
29824c16 306 clk_disable_unprepare(exynos_ehci->clk);
8b4fc8c7 307
1acb30ef
JH
308 return rc;
309}
310
29824c16 311static int exynos_ehci_resume(struct device *dev)
1acb30ef 312{
7edb3daf 313 struct usb_hcd *hcd = dev_get_drvdata(dev);
29824c16 314 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
1c17675d 315 int ret;
1acb30ef 316
29824c16 317 clk_prepare_enable(exynos_ehci->clk);
8b4fc8c7 318
29824c16
JH
319 if (exynos_ehci->otg)
320 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 321
1c17675d
KD
322 ret = exynos_ehci_phy_enable(dev);
323 if (ret) {
324 dev_err(dev, "Failed to enable USB phy\n");
325 clk_disable_unprepare(exynos_ehci->clk);
326 return ret;
327 }
1acb30ef 328
88555a63
JH
329 /* DMA burst Enable */
330 writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
331
c5cf9212 332 ehci_resume(hcd, false);
1acb30ef
JH
333 return 0;
334}
335#else
29824c16
JH
336#define exynos_ehci_suspend NULL
337#define exynos_ehci_resume NULL
1acb30ef
JH
338#endif
339
29824c16
JH
340static const struct dev_pm_ops exynos_ehci_pm_ops = {
341 .suspend = exynos_ehci_suspend,
342 .resume = exynos_ehci_resume,
1acb30ef
JH
343};
344
2c026e2b
VG
345#ifdef CONFIG_OF
346static const struct of_device_id exynos_ehci_match[] = {
6e247777 347 { .compatible = "samsung,exynos4210-ehci" },
e6b0166f 348 { .compatible = "samsung,exynos5440-ehci" },
2c026e2b
VG
349 {},
350};
351MODULE_DEVICE_TABLE(of, exynos_ehci_match);
352#endif
353
29824c16
JH
354static struct platform_driver exynos_ehci_driver = {
355 .probe = exynos_ehci_probe,
356 .remove = exynos_ehci_remove,
aaf6b52d 357 .shutdown = usb_hcd_platform_shutdown,
1bcc5aa8 358 .driver = {
29824c16 359 .name = "exynos-ehci",
1bcc5aa8 360 .owner = THIS_MODULE,
29824c16 361 .pm = &exynos_ehci_pm_ops,
2c026e2b 362 .of_match_table = of_match_ptr(exynos_ehci_match),
1bcc5aa8
JS
363 }
364};
29824c16
JH
365static const struct ehci_driver_overrides exynos_overrides __initdata = {
366 .extra_priv_size = sizeof(struct exynos_ehci_hcd),
7edb3daf
MG
367};
368
29824c16 369static int __init ehci_exynos_init(void)
7edb3daf
MG
370{
371 if (usb_disabled())
372 return -ENODEV;
373
374 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
29824c16
JH
375 ehci_init_driver(&exynos_ehci_hc_driver, &exynos_overrides);
376 return platform_driver_register(&exynos_ehci_driver);
7edb3daf 377}
29824c16 378module_init(ehci_exynos_init);
7edb3daf 379
29824c16 380static void __exit ehci_exynos_cleanup(void)
7edb3daf 381{
29824c16 382 platform_driver_unregister(&exynos_ehci_driver);
7edb3daf 383}
29824c16 384module_exit(ehci_exynos_cleanup);
1bcc5aa8 385
7edb3daf 386MODULE_DESCRIPTION(DRIVER_DESC);
29824c16 387MODULE_ALIAS("platform:exynos-ehci");
7edb3daf
MG
388MODULE_AUTHOR("Jingoo Han");
389MODULE_AUTHOR("Joonyoung Shim");
390MODULE_LICENSE("GPL v2");
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