usb: ohci-exynos: Add facility to use phy provided by the generic phy framework
[deliverable/linux.git] / drivers / usb / host / ehci-exynos.c
CommitLineData
1bcc5aa8 1/*
29824c16 2 * SAMSUNG EXYNOS USB HOST EHCI Controller
1bcc5aa8
JS
3 *
4 * Copyright (C) 2011 Samsung Electronics Co.Ltd
5 * Author: Jingoo Han <jg1.han@samsung.com>
6 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/clk.h>
7edb3daf
MG
16#include <linux/dma-mapping.h>
17#include <linux/io.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
2c026e2b 20#include <linux/of.h>
fd81d59c 21#include <linux/of_gpio.h>
7edb3daf 22#include <linux/platform_device.h>
d233c196 23#include <linux/usb/phy.h>
b506eebc 24#include <linux/usb/samsung_usb_phy.h>
7edb3daf
MG
25#include <linux/usb.h>
26#include <linux/usb/hcd.h>
27#include <linux/usb/otg.h>
28
29#include "ehci.h"
30
29824c16 31#define DRIVER_DESC "EHCI EXYNOS driver"
1bcc5aa8 32
88555a63
JH
33#define EHCI_INSNREG00(base) (base + 0x90)
34#define EHCI_INSNREG00_ENA_INCR16 (0x1 << 25)
35#define EHCI_INSNREG00_ENA_INCR8 (0x1 << 24)
36#define EHCI_INSNREG00_ENA_INCR4 (0x1 << 23)
37#define EHCI_INSNREG00_ENA_INCRX_ALIGN (0x1 << 22)
38#define EHCI_INSNREG00_ENABLE_DMA_BURST \
39 (EHCI_INSNREG00_ENA_INCR16 | EHCI_INSNREG00_ENA_INCR8 | \
40 EHCI_INSNREG00_ENA_INCR4 | EHCI_INSNREG00_ENA_INCRX_ALIGN)
41
29824c16
JH
42static const char hcd_name[] = "ehci-exynos";
43static struct hc_driver __read_mostly exynos_ehci_hc_driver;
7edb3daf 44
29824c16 45struct exynos_ehci_hcd {
1bcc5aa8 46 struct clk *clk;
d233c196
VG
47 struct usb_phy *phy;
48 struct usb_otg *otg;
1bcc5aa8
JS
49};
50
29824c16 51#define to_exynos_ehci(hcd) (struct exynos_ehci_hcd *)(hcd_to_ehci(hcd)->priv)
d233c196 52
91a9677a 53static void exynos_setup_vbus_gpio(struct device *dev)
fd81d59c
VG
54{
55 int err;
56 int gpio;
57
3f3b55bf 58 if (!dev->of_node)
fd81d59c
VG
59 return;
60
3f3b55bf 61 gpio = of_get_named_gpio(dev->of_node, "samsung,vbus-gpio", 0);
fd81d59c
VG
62 if (!gpio_is_valid(gpio))
63 return;
64
3f3b55bf
DA
65 err = devm_gpio_request_one(dev, gpio, GPIOF_OUT_INIT_HIGH,
66 "ehci_vbus_gpio");
fd81d59c 67 if (err)
3f3b55bf 68 dev_err(dev, "can't request ehci vbus gpio %d", gpio);
fd81d59c
VG
69}
70
29824c16 71static int exynos_ehci_probe(struct platform_device *pdev)
1bcc5aa8 72{
29824c16 73 struct exynos_ehci_hcd *exynos_ehci;
1bcc5aa8
JS
74 struct usb_hcd *hcd;
75 struct ehci_hcd *ehci;
76 struct resource *res;
d233c196 77 struct usb_phy *phy;
1bcc5aa8
JS
78 int irq;
79 int err;
80
2c026e2b
VG
81 /*
82 * Right now device-tree probed devices don't get dma_mask set.
83 * Since shared usb code relies on it, set it here for now.
84 * Once we move to full device tree support this will vanish off.
85 */
e1fd7341 86 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
22d9d8e8
RK
87 if (err)
88 return err;
2c026e2b 89
91a9677a 90 exynos_setup_vbus_gpio(&pdev->dev);
fd81d59c 91
29824c16 92 hcd = usb_create_hcd(&exynos_ehci_hc_driver,
7edb3daf
MG
93 &pdev->dev, dev_name(&pdev->dev));
94 if (!hcd) {
95 dev_err(&pdev->dev, "Unable to create HCD\n");
1bcc5aa8 96 return -ENOMEM;
7edb3daf 97 }
29824c16 98 exynos_ehci = to_exynos_ehci(hcd);
e6b0166f
TA
99
100 if (of_device_is_compatible(pdev->dev.of_node,
57ae1605 101 "samsung,exynos5440-ehci"))
e6b0166f 102 goto skip_phy;
e6b0166f 103
d233c196 104 phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
a16283e1 105 if (IS_ERR(phy)) {
57ae1605
JH
106 usb_put_hcd(hcd);
107 dev_warn(&pdev->dev, "no platform data or transceiver defined\n");
108 return -EPROBE_DEFER;
d233c196 109 } else {
29824c16
JH
110 exynos_ehci->phy = phy;
111 exynos_ehci->otg = phy->otg;
d233c196
VG
112 }
113
e6b0166f
TA
114skip_phy:
115
29824c16 116 exynos_ehci->clk = devm_clk_get(&pdev->dev, "usbhost");
1bcc5aa8 117
29824c16 118 if (IS_ERR(exynos_ehci->clk)) {
1bcc5aa8 119 dev_err(&pdev->dev, "Failed to get usbhost clock\n");
29824c16 120 err = PTR_ERR(exynos_ehci->clk);
1bcc5aa8
JS
121 goto fail_clk;
122 }
123
29824c16 124 err = clk_prepare_enable(exynos_ehci->clk);
1bcc5aa8 125 if (err)
63fd0ae4 126 goto fail_clk;
1bcc5aa8
JS
127
128 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129 if (!res) {
130 dev_err(&pdev->dev, "Failed to get I/O memory\n");
131 err = -ENXIO;
132 goto fail_io;
133 }
134
135 hcd->rsrc_start = res->start;
136 hcd->rsrc_len = resource_size(res);
9cb07563 137 hcd->regs = devm_ioremap(&pdev->dev, res->start, hcd->rsrc_len);
1bcc5aa8
JS
138 if (!hcd->regs) {
139 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
140 err = -ENOMEM;
141 goto fail_io;
142 }
143
144 irq = platform_get_irq(pdev, 0);
145 if (!irq) {
146 dev_err(&pdev->dev, "Failed to get IRQ\n");
147 err = -ENODEV;
9cb07563 148 goto fail_io;
1bcc5aa8
JS
149 }
150
29824c16
JH
151 if (exynos_ehci->otg)
152 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 153
29824c16
JH
154 if (exynos_ehci->phy)
155 usb_phy_init(exynos_ehci->phy);
1bcc5aa8
JS
156
157 ehci = hcd_to_ehci(hcd);
158 ehci->caps = hcd->regs;
1bcc5aa8 159
88555a63
JH
160 /* DMA burst Enable */
161 writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
162
b5dd18d8 163 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
1bcc5aa8
JS
164 if (err) {
165 dev_err(&pdev->dev, "Failed to add USB HCD\n");
d233c196 166 goto fail_add_hcd;
1bcc5aa8 167 }
3c9740a1 168 device_wakeup_enable(hcd->self.controller);
1bcc5aa8 169
bbcd85a0 170 platform_set_drvdata(pdev, hcd);
1bcc5aa8
JS
171
172 return 0;
173
d233c196 174fail_add_hcd:
29824c16
JH
175 if (exynos_ehci->phy)
176 usb_phy_shutdown(exynos_ehci->phy);
1bcc5aa8 177fail_io:
29824c16 178 clk_disable_unprepare(exynos_ehci->clk);
1bcc5aa8
JS
179fail_clk:
180 usb_put_hcd(hcd);
1bcc5aa8
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181 return err;
182}
183
29824c16 184static int exynos_ehci_remove(struct platform_device *pdev)
1bcc5aa8 185{
7edb3daf 186 struct usb_hcd *hcd = platform_get_drvdata(pdev);
29824c16 187 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
1bcc5aa8
JS
188
189 usb_remove_hcd(hcd);
190
29824c16
JH
191 if (exynos_ehci->otg)
192 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 193
29824c16
JH
194 if (exynos_ehci->phy)
195 usb_phy_shutdown(exynos_ehci->phy);
1bcc5aa8 196
29824c16 197 clk_disable_unprepare(exynos_ehci->clk);
1bcc5aa8
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198
199 usb_put_hcd(hcd);
1bcc5aa8
JS
200
201 return 0;
202}
203
1acb30ef 204#ifdef CONFIG_PM
29824c16 205static int exynos_ehci_suspend(struct device *dev)
1acb30ef 206{
7edb3daf 207 struct usb_hcd *hcd = dev_get_drvdata(dev);
29824c16 208 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
7edb3daf 209
c5cf9212 210 bool do_wakeup = device_may_wakeup(dev);
c5cf9212 211 int rc;
1acb30ef 212
c5cf9212 213 rc = ehci_suspend(hcd, do_wakeup);
d7217510
VG
214 if (rc)
215 return rc;
1acb30ef 216
29824c16
JH
217 if (exynos_ehci->otg)
218 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 219
29824c16
JH
220 if (exynos_ehci->phy)
221 usb_phy_shutdown(exynos_ehci->phy);
1acb30ef 222
29824c16 223 clk_disable_unprepare(exynos_ehci->clk);
8b4fc8c7 224
1acb30ef
JH
225 return rc;
226}
227
29824c16 228static int exynos_ehci_resume(struct device *dev)
1acb30ef 229{
7edb3daf 230 struct usb_hcd *hcd = dev_get_drvdata(dev);
29824c16 231 struct exynos_ehci_hcd *exynos_ehci = to_exynos_ehci(hcd);
1acb30ef 232
29824c16 233 clk_prepare_enable(exynos_ehci->clk);
8b4fc8c7 234
29824c16
JH
235 if (exynos_ehci->otg)
236 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
d233c196 237
29824c16
JH
238 if (exynos_ehci->phy)
239 usb_phy_init(exynos_ehci->phy);
1acb30ef 240
88555a63
JH
241 /* DMA burst Enable */
242 writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
243
c5cf9212 244 ehci_resume(hcd, false);
1acb30ef
JH
245 return 0;
246}
247#else
29824c16
JH
248#define exynos_ehci_suspend NULL
249#define exynos_ehci_resume NULL
1acb30ef
JH
250#endif
251
29824c16
JH
252static const struct dev_pm_ops exynos_ehci_pm_ops = {
253 .suspend = exynos_ehci_suspend,
254 .resume = exynos_ehci_resume,
1acb30ef
JH
255};
256
2c026e2b
VG
257#ifdef CONFIG_OF
258static const struct of_device_id exynos_ehci_match[] = {
6e247777 259 { .compatible = "samsung,exynos4210-ehci" },
e6b0166f 260 { .compatible = "samsung,exynos5440-ehci" },
2c026e2b
VG
261 {},
262};
263MODULE_DEVICE_TABLE(of, exynos_ehci_match);
264#endif
265
29824c16
JH
266static struct platform_driver exynos_ehci_driver = {
267 .probe = exynos_ehci_probe,
268 .remove = exynos_ehci_remove,
aaf6b52d 269 .shutdown = usb_hcd_platform_shutdown,
1bcc5aa8 270 .driver = {
29824c16 271 .name = "exynos-ehci",
1bcc5aa8 272 .owner = THIS_MODULE,
29824c16 273 .pm = &exynos_ehci_pm_ops,
2c026e2b 274 .of_match_table = of_match_ptr(exynos_ehci_match),
1bcc5aa8
JS
275 }
276};
29824c16
JH
277static const struct ehci_driver_overrides exynos_overrides __initdata = {
278 .extra_priv_size = sizeof(struct exynos_ehci_hcd),
7edb3daf
MG
279};
280
29824c16 281static int __init ehci_exynos_init(void)
7edb3daf
MG
282{
283 if (usb_disabled())
284 return -ENODEV;
285
286 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
29824c16
JH
287 ehci_init_driver(&exynos_ehci_hc_driver, &exynos_overrides);
288 return platform_driver_register(&exynos_ehci_driver);
7edb3daf 289}
29824c16 290module_init(ehci_exynos_init);
7edb3daf 291
29824c16 292static void __exit ehci_exynos_cleanup(void)
7edb3daf 293{
29824c16 294 platform_driver_unregister(&exynos_ehci_driver);
7edb3daf 295}
29824c16 296module_exit(ehci_exynos_cleanup);
1bcc5aa8 297
7edb3daf 298MODULE_DESCRIPTION(DRIVER_DESC);
29824c16 299MODULE_ALIAS("platform:exynos-ehci");
7edb3daf
MG
300MODULE_AUTHOR("Jingoo Han");
301MODULE_AUTHOR("Joonyoung Shim");
302MODULE_LICENSE("GPL v2");
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