Commit | Line | Data |
---|---|---|
80cb9aee | 1 | /* |
1af10774 | 2 | * Copyright 2005-2009 MontaVista Software, Inc. |
58c559e6 | 3 | * Copyright 2008,2012 Freescale Semiconductor, Inc. |
80cb9aee RV |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
12 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
13 | * for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software Foundation, | |
17 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | * | |
19 | * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided | |
20 | * by Hunter Wu. | |
1af10774 AV |
21 | * Power Management support by Dave Liu <daveliu@freescale.com>, |
22 | * Jerry Huang <Chang-Ming.Huang@freescale.com> and | |
23 | * Anton Vorontsov <avorontsov@ru.mvista.com>. | |
80cb9aee RV |
24 | */ |
25 | ||
1af10774 AV |
26 | #include <linux/kernel.h> |
27 | #include <linux/types.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/pm.h> | |
ded017ee | 30 | #include <linux/err.h> |
80cb9aee RV |
31 | #include <linux/platform_device.h> |
32 | #include <linux/fsl_devices.h> | |
33 | ||
34 | #include "ehci-fsl.h" | |
35 | ||
80cb9aee RV |
36 | /* configure so an HC device and id are always provided */ |
37 | /* always called with process context; sleeping is OK */ | |
38 | ||
39 | /** | |
40 | * usb_hcd_fsl_probe - initialize FSL-based HCDs | |
41 | * @drvier: Driver to be used for this HCD | |
42 | * @pdev: USB Host Controller being probed | |
43 | * Context: !in_interrupt() | |
44 | * | |
45 | * Allocates basic resources for this USB host controller. | |
46 | * | |
47 | */ | |
dad3843f AV |
48 | static int usb_hcd_fsl_probe(const struct hc_driver *driver, |
49 | struct platform_device *pdev) | |
80cb9aee RV |
50 | { |
51 | struct fsl_usb2_platform_data *pdata; | |
52 | struct usb_hcd *hcd; | |
53 | struct resource *res; | |
54 | int irq; | |
55 | int retval; | |
80cb9aee RV |
56 | |
57 | pr_debug("initializing FSL-SOC USB Controller\n"); | |
58 | ||
59 | /* Need platform data for setup */ | |
37c3a3c4 | 60 | pdata = dev_get_platdata(&pdev->dev); |
80cb9aee RV |
61 | if (!pdata) { |
62 | dev_err(&pdev->dev, | |
7071a3ce | 63 | "No platform data for %s.\n", dev_name(&pdev->dev)); |
80cb9aee RV |
64 | return -ENODEV; |
65 | } | |
66 | ||
67 | /* | |
68 | * This is a host mode driver, verify that we're supposed to be | |
69 | * in host mode. | |
70 | */ | |
71 | if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || | |
ba02978a LY |
72 | (pdata->operating_mode == FSL_USB2_MPH_HOST) || |
73 | (pdata->operating_mode == FSL_USB2_DR_OTG))) { | |
80cb9aee RV |
74 | dev_err(&pdev->dev, |
75 | "Non Host Mode configured for %s. Wrong driver linked.\n", | |
7071a3ce | 76 | dev_name(&pdev->dev)); |
80cb9aee RV |
77 | return -ENODEV; |
78 | } | |
79 | ||
80 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
81 | if (!res) { | |
82 | dev_err(&pdev->dev, | |
83 | "Found HC with no IRQ. Check %s setup!\n", | |
7071a3ce | 84 | dev_name(&pdev->dev)); |
80cb9aee RV |
85 | return -ENODEV; |
86 | } | |
87 | irq = res->start; | |
88 | ||
7071a3ce | 89 | hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); |
80cb9aee RV |
90 | if (!hcd) { |
91 | retval = -ENOMEM; | |
92 | goto err1; | |
93 | } | |
94 | ||
95 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
96 | if (!res) { | |
97 | dev_err(&pdev->dev, | |
98 | "Found HC with no register addr. Check %s setup!\n", | |
7071a3ce | 99 | dev_name(&pdev->dev)); |
80cb9aee RV |
100 | retval = -ENODEV; |
101 | goto err2; | |
102 | } | |
103 | hcd->rsrc_start = res->start; | |
28f65c11 | 104 | hcd->rsrc_len = resource_size(res); |
7667fe69 JH |
105 | hcd->regs = devm_ioremap_resource(&pdev->dev, res); |
106 | if (IS_ERR(hcd->regs)) { | |
107 | retval = PTR_ERR(hcd->regs); | |
80cb9aee RV |
108 | goto err2; |
109 | } | |
80cb9aee | 110 | |
230f7ede | 111 | pdata->regs = hcd->regs; |
80cb9aee | 112 | |
83722bc9 AG |
113 | if (pdata->power_budget) |
114 | hcd->power_budget = pdata->power_budget; | |
115 | ||
230f7ede AG |
116 | /* |
117 | * do platform specific init: check the clock, grab/config pins, etc. | |
118 | */ | |
119 | if (pdata->init && pdata->init(pdev)) { | |
120 | retval = -ENODEV; | |
7667fe69 | 121 | goto err2; |
230f7ede AG |
122 | } |
123 | ||
230f7ede | 124 | /* Enable USB controller, 83xx or 8536 */ |
ad1260e9 | 125 | if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) |
230f7ede AG |
126 | setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); |
127 | ||
128 | /* Don't need to set host mode here. It will be done by tdi_reset() */ | |
80cb9aee | 129 | |
b5dd18d8 | 130 | retval = usb_add_hcd(hcd, irq, IRQF_SHARED); |
80cb9aee | 131 | if (retval != 0) |
7667fe69 | 132 | goto err2; |
3c9740a1 | 133 | device_wakeup_enable(hcd->self.controller); |
83722bc9 AG |
134 | |
135 | #ifdef CONFIG_USB_OTG | |
136 | if (pdata->operating_mode == FSL_USB2_DR_OTG) { | |
137 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
138 | ||
ff9cce82 | 139 | hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2); |
c2e935a7 RZ |
140 | dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n", |
141 | hcd, ehci, hcd->phy); | |
83722bc9 | 142 | |
ff9cce82 | 143 | if (!IS_ERR_OR_NULL(hcd->phy)) { |
c2e935a7 | 144 | retval = otg_set_host(hcd->phy->otg, |
83722bc9 AG |
145 | &ehci_to_hcd(ehci)->self); |
146 | if (retval) { | |
ff9cce82 | 147 | usb_put_phy(hcd->phy); |
7667fe69 | 148 | goto err2; |
83722bc9 AG |
149 | } |
150 | } else { | |
c2e935a7 | 151 | dev_err(&pdev->dev, "can't find phy\n"); |
83722bc9 | 152 | retval = -ENODEV; |
7667fe69 | 153 | goto err2; |
83722bc9 AG |
154 | } |
155 | } | |
156 | #endif | |
80cb9aee RV |
157 | return retval; |
158 | ||
80cb9aee RV |
159 | err2: |
160 | usb_put_hcd(hcd); | |
161 | err1: | |
7071a3ce | 162 | dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); |
230f7ede AG |
163 | if (pdata->exit) |
164 | pdata->exit(pdev); | |
80cb9aee RV |
165 | return retval; |
166 | } | |
167 | ||
168 | /* may be called without controller electrically present */ | |
169 | /* may be called with controller, bus, and devices active */ | |
170 | ||
171 | /** | |
172 | * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs | |
173 | * @dev: USB Host Controller being removed | |
174 | * Context: !in_interrupt() | |
175 | * | |
176 | * Reverses the effect of usb_hcd_fsl_probe(). | |
177 | * | |
178 | */ | |
dad3843f AV |
179 | static void usb_hcd_fsl_remove(struct usb_hcd *hcd, |
180 | struct platform_device *pdev) | |
80cb9aee | 181 | { |
d4f09e28 | 182 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
83722bc9 | 183 | |
ff9cce82 | 184 | if (!IS_ERR_OR_NULL(hcd->phy)) { |
c2e935a7 | 185 | otg_set_host(hcd->phy->otg, NULL); |
ff9cce82 | 186 | usb_put_phy(hcd->phy); |
83722bc9 | 187 | } |
230f7ede | 188 | |
80cb9aee | 189 | usb_remove_hcd(hcd); |
230f7ede AG |
190 | |
191 | /* | |
192 | * do platform specific un-initialization: | |
193 | * release iomux pins, disable clock, etc. | |
194 | */ | |
195 | if (pdata->exit) | |
196 | pdata->exit(pdev); | |
80cb9aee RV |
197 | usb_put_hcd(hcd); |
198 | } | |
199 | ||
3735ba8d | 200 | static int ehci_fsl_setup_phy(struct usb_hcd *hcd, |
230f7ede AG |
201 | enum fsl_usb2_phy_modes phy_mode, |
202 | unsigned int port_offset) | |
80cb9aee | 203 | { |
3735ba8d | 204 | u32 portsc; |
58c559e6 | 205 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
28c56ea1 | 206 | void __iomem *non_ehci = hcd->regs; |
58c559e6 | 207 | struct device *dev = hcd->self.controller; |
d4f09e28 | 208 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); |
f941f692 | 209 | |
58c559e6 RM |
210 | if (pdata->controller_ver < 0) { |
211 | dev_warn(hcd->self.controller, "Could not get controller version\n"); | |
d479c911 | 212 | return -ENODEV; |
58c559e6 | 213 | } |
230f7ede AG |
214 | |
215 | portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); | |
216 | portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); | |
217 | ||
80cb9aee RV |
218 | switch (phy_mode) { |
219 | case FSL_USB2_PHY_ULPI: | |
f66dea70 | 220 | if (pdata->have_sysif_regs && pdata->controller_ver) { |
58c559e6 | 221 | /* controller version 1.6 or above */ |
ad1260e9 | 222 | clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); |
3735ba8d | 223 | setbits32(non_ehci + FSL_SOC_USB_CTRL, |
ad1260e9 | 224 | ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); |
58c559e6 | 225 | } |
80cb9aee RV |
226 | portsc |= PORT_PTS_ULPI; |
227 | break; | |
228 | case FSL_USB2_PHY_SERIAL: | |
229 | portsc |= PORT_PTS_SERIAL; | |
230 | break; | |
231 | case FSL_USB2_PHY_UTMI_WIDE: | |
232 | portsc |= PORT_PTS_PTW; | |
233 | /* fall through */ | |
234 | case FSL_USB2_PHY_UTMI: | |
f66dea70 | 235 | if (pdata->have_sysif_regs && pdata->controller_ver) { |
58c559e6 | 236 | /* controller version 1.6 or above */ |
3735ba8d | 237 | setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); |
58c559e6 RM |
238 | mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to |
239 | become stable - 10ms*/ | |
240 | } | |
28c56ea1 | 241 | /* enable UTMI PHY */ |
f941f692 AG |
242 | if (pdata->have_sysif_regs) |
243 | setbits32(non_ehci + FSL_SOC_USB_CTRL, | |
244 | CTRL_UTMI_PHY_EN); | |
80cb9aee RV |
245 | portsc |= PORT_PTS_UTMI; |
246 | break; | |
247 | case FSL_USB2_PHY_NONE: | |
248 | break; | |
249 | } | |
3735ba8d | 250 | |
d183c819 NY |
251 | if (pdata->have_sysif_regs && |
252 | pdata->controller_ver > FSL_USB_VER_1_6 && | |
f66dea70 | 253 | (phy_mode == FSL_USB2_PHY_ULPI)) { |
3735ba8d | 254 | /* check PHY_CLK_VALID to get phy clk valid */ |
eee41b49 SL |
255 | if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & |
256 | PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) || | |
257 | in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) { | |
f4fbb6d5 | 258 | dev_warn(hcd->self.controller, "USB PHY clock invalid\n"); |
3735ba8d SL |
259 | return -EINVAL; |
260 | } | |
261 | } | |
262 | ||
083522d7 | 263 | ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); |
3735ba8d | 264 | |
f66dea70 | 265 | if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) |
3735ba8d SL |
266 | setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); |
267 | ||
268 | return 0; | |
80cb9aee RV |
269 | } |
270 | ||
3735ba8d | 271 | static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) |
80cb9aee | 272 | { |
230f7ede | 273 | struct usb_hcd *hcd = ehci_to_hcd(ehci); |
80cb9aee RV |
274 | struct fsl_usb2_platform_data *pdata; |
275 | void __iomem *non_ehci = hcd->regs; | |
276 | ||
d4f09e28 | 277 | pdata = dev_get_platdata(hcd->self.controller); |
230f7ede | 278 | |
230f7ede | 279 | if (pdata->have_sysif_regs) { |
4c954326 PJ |
280 | /* |
281 | * Turn on cache snooping hardware, since some PowerPC platforms | |
282 | * wholly rely on hardware to deal with cache coherent | |
283 | */ | |
40acc095 | 284 | |
4c954326 PJ |
285 | /* Setup Snooping for all the 4GB space */ |
286 | /* SNOOP1 starts from 0x0, size 2G */ | |
287 | out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB); | |
288 | /* SNOOP2 starts from 0x80000000, size 2G */ | |
289 | out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); | |
290 | } | |
40acc095 | 291 | |
ba02978a LY |
292 | if ((pdata->operating_mode == FSL_USB2_DR_HOST) || |
293 | (pdata->operating_mode == FSL_USB2_DR_OTG)) | |
3735ba8d SL |
294 | if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) |
295 | return -EINVAL; | |
80cb9aee RV |
296 | |
297 | if (pdata->operating_mode == FSL_USB2_MPH_HOST) { | |
8cd42e97 KG |
298 | unsigned int chip, rev, svr; |
299 | ||
300 | svr = mfspr(SPRN_SVR); | |
301 | chip = svr >> 16; | |
302 | rev = (svr >> 4) & 0xf; | |
303 | ||
304 | /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ | |
305 | if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) | |
306 | ehci->has_fsl_port_bug = 1; | |
307 | ||
80cb9aee | 308 | if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) |
3735ba8d SL |
309 | if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) |
310 | return -EINVAL; | |
311 | ||
80cb9aee | 312 | if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) |
3735ba8d SL |
313 | if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1)) |
314 | return -EINVAL; | |
80cb9aee RV |
315 | } |
316 | ||
230f7ede | 317 | if (pdata->have_sysif_regs) { |
08d7660d | 318 | #ifdef CONFIG_FSL_SOC_BOOKE |
230f7ede AG |
319 | out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); |
320 | out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); | |
4f534258 | 321 | #else |
230f7ede AG |
322 | out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); |
323 | out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); | |
4f534258 | 324 | #endif |
230f7ede AG |
325 | out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); |
326 | } | |
3735ba8d SL |
327 | |
328 | return 0; | |
80cb9aee RV |
329 | } |
330 | ||
331 | /* called after powerup, by probe or system-pm "wakeup" */ | |
332 | static int ehci_fsl_reinit(struct ehci_hcd *ehci) | |
333 | { | |
3735ba8d SL |
334 | if (ehci_fsl_usb_setup(ehci)) |
335 | return -EINVAL; | |
80cb9aee RV |
336 | |
337 | return 0; | |
338 | } | |
339 | ||
340 | /* called during probe() after chip reset completes */ | |
341 | static int ehci_fsl_setup(struct usb_hcd *hcd) | |
342 | { | |
343 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
344 | int retval; | |
230f7ede | 345 | struct fsl_usb2_platform_data *pdata; |
761bbcb7 | 346 | struct device *dev; |
230f7ede | 347 | |
761bbcb7 | 348 | dev = hcd->self.controller; |
d4f09e28 | 349 | pdata = dev_get_platdata(hcd->self.controller); |
230f7ede AG |
350 | ehci->big_endian_desc = pdata->big_endian_desc; |
351 | ehci->big_endian_mmio = pdata->big_endian_mmio; | |
80cb9aee RV |
352 | |
353 | /* EHCI registers start at offset 0x100 */ | |
354 | ehci->caps = hcd->regs + 0x100; | |
80cb9aee | 355 | |
e6604a7f CE |
356 | #ifdef CONFIG_PPC_83xx |
357 | /* | |
358 | * Deal with MPC834X that need port power to be cycled after the power | |
359 | * fault condition is removed. Otherwise the state machine does not | |
360 | * reflect PORTSC[CSC] correctly. | |
361 | */ | |
362 | ehci->need_oc_pp_cycle = 1; | |
363 | #endif | |
364 | ||
65fd4272 MC |
365 | hcd->has_tt = 1; |
366 | ||
1a49e2ac | 367 | retval = ehci_setup(hcd); |
80cb9aee RV |
368 | if (retval) |
369 | return retval; | |
370 | ||
761bbcb7 AG |
371 | if (of_device_is_compatible(dev->parent->of_node, |
372 | "fsl,mpc5121-usb2-dr")) { | |
373 | /* | |
374 | * set SBUSCFG:AHBBRST so that control msgs don't | |
375 | * fail when doing heavy PATA writes. | |
376 | */ | |
377 | ehci_writel(ehci, SBUSCFG_INCR8, | |
378 | hcd->regs + FSL_SOC_USB_SBUSCFG); | |
379 | } | |
380 | ||
80cb9aee RV |
381 | retval = ehci_fsl_reinit(ehci); |
382 | return retval; | |
383 | } | |
384 | ||
1af10774 AV |
385 | struct ehci_fsl { |
386 | struct ehci_hcd ehci; | |
387 | ||
388 | #ifdef CONFIG_PM | |
389 | /* Saved USB PHY settings, need to restore after deep sleep. */ | |
390 | u32 usb_ctrl; | |
391 | #endif | |
392 | }; | |
393 | ||
394 | #ifdef CONFIG_PM | |
395 | ||
13b7ee2a AG |
396 | #ifdef CONFIG_PPC_MPC512x |
397 | static int ehci_fsl_mpc512x_drv_suspend(struct device *dev) | |
398 | { | |
399 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
400 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
d4f09e28 | 401 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); |
13b7ee2a AG |
402 | u32 tmp; |
403 | ||
1c20163d | 404 | #ifdef CONFIG_DYNAMIC_DEBUG |
13b7ee2a AG |
405 | u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE); |
406 | mode &= USBMODE_CM_MASK; | |
407 | tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */ | |
408 | ||
409 | dev_dbg(dev, "suspend=%d already_suspended=%d " | |
410 | "mode=%d usbcmd %08x\n", pdata->suspended, | |
411 | pdata->already_suspended, mode, tmp); | |
412 | #endif | |
413 | ||
414 | /* | |
415 | * If the controller is already suspended, then this must be a | |
416 | * PM suspend. Remember this fact, so that we will leave the | |
417 | * controller suspended at PM resume time. | |
418 | */ | |
419 | if (pdata->suspended) { | |
420 | dev_dbg(dev, "already suspended, leaving early\n"); | |
421 | pdata->already_suspended = 1; | |
422 | return 0; | |
423 | } | |
424 | ||
425 | dev_dbg(dev, "suspending...\n"); | |
426 | ||
e8799906 | 427 | ehci->rh_state = EHCI_RH_SUSPENDED; |
13b7ee2a AG |
428 | dev->power.power_state = PMSG_SUSPEND; |
429 | ||
430 | /* ignore non-host interrupts */ | |
431 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
432 | ||
433 | /* stop the controller */ | |
434 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
435 | tmp &= ~CMD_RUN; | |
436 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
437 | ||
438 | /* save EHCI registers */ | |
439 | pdata->pm_command = ehci_readl(ehci, &ehci->regs->command); | |
440 | pdata->pm_command &= ~CMD_RUN; | |
441 | pdata->pm_status = ehci_readl(ehci, &ehci->regs->status); | |
442 | pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable); | |
443 | pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index); | |
444 | pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment); | |
445 | pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list); | |
446 | pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next); | |
447 | pdata->pm_configured_flag = | |
448 | ehci_readl(ehci, &ehci->regs->configured_flag); | |
449 | pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]); | |
450 | pdata->pm_usbgenctrl = ehci_readl(ehci, | |
451 | hcd->regs + FSL_SOC_USB_USBGENCTRL); | |
452 | ||
453 | /* clear the W1C bits */ | |
454 | pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS); | |
455 | ||
456 | pdata->suspended = 1; | |
457 | ||
458 | /* clear PP to cut power to the port */ | |
459 | tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); | |
460 | tmp &= ~PORT_POWER; | |
461 | ehci_writel(ehci, tmp, &ehci->regs->port_status[0]); | |
462 | ||
463 | return 0; | |
464 | } | |
465 | ||
466 | static int ehci_fsl_mpc512x_drv_resume(struct device *dev) | |
467 | { | |
468 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
469 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
d4f09e28 | 470 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); |
13b7ee2a AG |
471 | u32 tmp; |
472 | ||
473 | dev_dbg(dev, "suspend=%d already_suspended=%d\n", | |
474 | pdata->suspended, pdata->already_suspended); | |
475 | ||
476 | /* | |
477 | * If the controller was already suspended at suspend time, | |
478 | * then don't resume it now. | |
479 | */ | |
480 | if (pdata->already_suspended) { | |
481 | dev_dbg(dev, "already suspended, leaving early\n"); | |
482 | pdata->already_suspended = 0; | |
483 | return 0; | |
484 | } | |
485 | ||
486 | if (!pdata->suspended) { | |
487 | dev_dbg(dev, "not suspended, leaving early\n"); | |
488 | return 0; | |
489 | } | |
490 | ||
491 | pdata->suspended = 0; | |
492 | ||
493 | dev_dbg(dev, "resuming...\n"); | |
494 | ||
495 | /* set host mode */ | |
496 | tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0); | |
497 | ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE); | |
498 | ||
499 | ehci_writel(ehci, pdata->pm_usbgenctrl, | |
500 | hcd->regs + FSL_SOC_USB_USBGENCTRL); | |
501 | ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE, | |
502 | hcd->regs + FSL_SOC_USB_ISIPHYCTRL); | |
503 | ||
761bbcb7 AG |
504 | ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG); |
505 | ||
13b7ee2a AG |
506 | /* restore EHCI registers */ |
507 | ehci_writel(ehci, pdata->pm_command, &ehci->regs->command); | |
508 | ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable); | |
509 | ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index); | |
510 | ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment); | |
511 | ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list); | |
512 | ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next); | |
513 | ehci_writel(ehci, pdata->pm_configured_flag, | |
514 | &ehci->regs->configured_flag); | |
515 | ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]); | |
516 | ||
517 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
e8799906 | 518 | ehci->rh_state = EHCI_RH_RUNNING; |
13b7ee2a AG |
519 | dev->power.power_state = PMSG_ON; |
520 | ||
521 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
522 | tmp |= CMD_RUN; | |
523 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
524 | ||
525 | usb_hcd_resume_root_hub(hcd); | |
526 | ||
527 | return 0; | |
528 | } | |
529 | #else | |
530 | static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev) | |
531 | { | |
532 | return 0; | |
533 | } | |
534 | ||
535 | static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev) | |
536 | { | |
537 | return 0; | |
538 | } | |
539 | #endif /* CONFIG_PPC_MPC512x */ | |
540 | ||
1af10774 AV |
541 | static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) |
542 | { | |
543 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
544 | ||
545 | return container_of(ehci, struct ehci_fsl, ehci); | |
546 | } | |
547 | ||
548 | static int ehci_fsl_drv_suspend(struct device *dev) | |
549 | { | |
550 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
551 | struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); | |
552 | void __iomem *non_ehci = hcd->regs; | |
553 | ||
13b7ee2a AG |
554 | if (of_device_is_compatible(dev->parent->of_node, |
555 | "fsl,mpc5121-usb2-dr")) { | |
556 | return ehci_fsl_mpc512x_drv_suspend(dev); | |
557 | } | |
558 | ||
4147200d AS |
559 | ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), |
560 | device_may_wakeup(dev)); | |
1af10774 AV |
561 | if (!fsl_deep_sleep()) |
562 | return 0; | |
563 | ||
564 | ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); | |
565 | return 0; | |
566 | } | |
567 | ||
568 | static int ehci_fsl_drv_resume(struct device *dev) | |
569 | { | |
570 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
571 | struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); | |
572 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
573 | void __iomem *non_ehci = hcd->regs; | |
574 | ||
13b7ee2a AG |
575 | if (of_device_is_compatible(dev->parent->of_node, |
576 | "fsl,mpc5121-usb2-dr")) { | |
577 | return ehci_fsl_mpc512x_drv_resume(dev); | |
578 | } | |
579 | ||
16032c4f | 580 | ehci_prepare_ports_for_controller_resume(ehci); |
1af10774 AV |
581 | if (!fsl_deep_sleep()) |
582 | return 0; | |
583 | ||
584 | usb_root_hub_lost_power(hcd->self.root_hub); | |
585 | ||
586 | /* Restore USB PHY settings and enable the controller. */ | |
587 | out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); | |
588 | ||
589 | ehci_reset(ehci); | |
590 | ehci_fsl_reinit(ehci); | |
591 | ||
592 | return 0; | |
593 | } | |
594 | ||
595 | static int ehci_fsl_drv_restore(struct device *dev) | |
596 | { | |
597 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
598 | ||
599 | usb_root_hub_lost_power(hcd->self.root_hub); | |
600 | return 0; | |
601 | } | |
602 | ||
603 | static struct dev_pm_ops ehci_fsl_pm_ops = { | |
604 | .suspend = ehci_fsl_drv_suspend, | |
605 | .resume = ehci_fsl_drv_resume, | |
606 | .restore = ehci_fsl_drv_restore, | |
607 | }; | |
608 | ||
609 | #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops) | |
610 | #else | |
611 | #define EHCI_FSL_PM_OPS NULL | |
612 | #endif /* CONFIG_PM */ | |
613 | ||
83722bc9 AG |
614 | #ifdef CONFIG_USB_OTG |
615 | static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) | |
616 | { | |
617 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
618 | u32 status; | |
619 | ||
620 | if (!port) | |
621 | return -EINVAL; | |
622 | ||
623 | port--; | |
624 | ||
625 | /* start port reset before HNP protocol time out */ | |
626 | status = readl(&ehci->regs->port_status[port]); | |
627 | if (!(status & PORT_CONNECT)) | |
628 | return -ENODEV; | |
629 | ||
37ebb549 | 630 | /* hub_wq will finish the reset later */ |
83722bc9 AG |
631 | if (ehci_is_TDI(ehci)) { |
632 | writel(PORT_RESET | | |
633 | (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)), | |
634 | &ehci->regs->port_status[port]); | |
635 | } else { | |
636 | writel(PORT_RESET, &ehci->regs->port_status[port]); | |
637 | } | |
638 | ||
639 | return 0; | |
640 | } | |
641 | #else | |
642 | #define ehci_start_port_reset NULL | |
643 | #endif /* CONFIG_USB_OTG */ | |
644 | ||
645 | ||
80cb9aee RV |
646 | static const struct hc_driver ehci_fsl_hc_driver = { |
647 | .description = hcd_name, | |
648 | .product_desc = "Freescale On-Chip EHCI Host Controller", | |
1af10774 | 649 | .hcd_priv_size = sizeof(struct ehci_fsl), |
80cb9aee RV |
650 | |
651 | /* | |
652 | * generic hardware linkage | |
653 | */ | |
654 | .irq = ehci_irq, | |
c04ee4b1 | 655 | .flags = HCD_USB2 | HCD_MEMORY | HCD_BH, |
80cb9aee RV |
656 | |
657 | /* | |
658 | * basic lifecycle operations | |
659 | */ | |
660 | .reset = ehci_fsl_setup, | |
661 | .start = ehci_run, | |
80cb9aee | 662 | .stop = ehci_stop, |
64a21d02 | 663 | .shutdown = ehci_shutdown, |
80cb9aee RV |
664 | |
665 | /* | |
666 | * managing i/o requests and associated device resources | |
667 | */ | |
668 | .urb_enqueue = ehci_urb_enqueue, | |
669 | .urb_dequeue = ehci_urb_dequeue, | |
670 | .endpoint_disable = ehci_endpoint_disable, | |
b18ffd49 | 671 | .endpoint_reset = ehci_endpoint_reset, |
80cb9aee RV |
672 | |
673 | /* | |
674 | * scheduling support | |
675 | */ | |
676 | .get_frame_number = ehci_get_frame, | |
677 | ||
678 | /* | |
679 | * root hub support | |
680 | */ | |
681 | .hub_status_data = ehci_hub_status_data, | |
682 | .hub_control = ehci_hub_control, | |
683 | .bus_suspend = ehci_bus_suspend, | |
684 | .bus_resume = ehci_bus_resume, | |
83722bc9 | 685 | .start_port_reset = ehci_start_port_reset, |
90da096e | 686 | .relinquish_port = ehci_relinquish_port, |
3a31155c | 687 | .port_handed_over = ehci_port_handed_over, |
914b7012 AS |
688 | |
689 | .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, | |
80cb9aee RV |
690 | }; |
691 | ||
692 | static int ehci_fsl_drv_probe(struct platform_device *pdev) | |
693 | { | |
694 | if (usb_disabled()) | |
695 | return -ENODEV; | |
696 | ||
135db048 | 697 | /* FIXME we only want one one probe() not two */ |
80cb9aee RV |
698 | return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); |
699 | } | |
700 | ||
701 | static int ehci_fsl_drv_remove(struct platform_device *pdev) | |
702 | { | |
703 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | |
704 | ||
135db048 | 705 | /* FIXME we only want one one remove() not two */ |
80cb9aee | 706 | usb_hcd_fsl_remove(hcd, pdev); |
80cb9aee RV |
707 | return 0; |
708 | } | |
709 | ||
135db048 | 710 | MODULE_ALIAS("platform:fsl-ehci"); |
80cb9aee | 711 | |
01cced25 | 712 | static struct platform_driver ehci_fsl_driver = { |
80cb9aee RV |
713 | .probe = ehci_fsl_drv_probe, |
714 | .remove = ehci_fsl_drv_remove, | |
64a21d02 | 715 | .shutdown = usb_hcd_platform_shutdown, |
80cb9aee | 716 | .driver = { |
1af10774 | 717 | .name = "fsl-ehci", |
9e873d42 | 718 | .owner = THIS_MODULE, |
1af10774 | 719 | .pm = EHCI_FSL_PM_OPS, |
135db048 | 720 | }, |
80cb9aee | 721 | }; |