Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
d49d4317 | 2 | * Copyright (C) 2001-2004 by David Brownell |
53bd6a60 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | /* this file is part of ehci-hcd.c */ | |
20 | ||
21 | /*-------------------------------------------------------------------------*/ | |
22 | ||
23 | /* | |
24 | * EHCI Root Hub ... the nonsharable stuff | |
25 | * | |
26 | * Registers don't need cpu_to_le32, that happens transparently | |
27 | */ | |
28 | ||
29 | /*-------------------------------------------------------------------------*/ | |
83722bc9 | 30 | #include <linux/usb/otg.h> |
1da177e4 | 31 | |
58a97ffe AS |
32 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
33 | ||
aff6d18f AS |
34 | #ifdef CONFIG_PM |
35 | ||
383975d7 AS |
36 | static int ehci_hub_control( |
37 | struct usb_hcd *hcd, | |
38 | u16 typeReq, | |
39 | u16 wValue, | |
40 | u16 wIndex, | |
41 | char *buf, | |
42 | u16 wLength | |
43 | ); | |
44 | ||
45 | /* After a power loss, ports that were owned by the companion must be | |
46 | * reset so that the companion can still own them. | |
47 | */ | |
48 | static void ehci_handover_companion_ports(struct ehci_hcd *ehci) | |
49 | { | |
50 | u32 __iomem *reg; | |
51 | u32 status; | |
52 | int port; | |
53 | __le32 buf; | |
54 | struct usb_hcd *hcd = ehci_to_hcd(ehci); | |
55 | ||
56 | if (!ehci->owned_ports) | |
57 | return; | |
58 | ||
59 | /* Give the connections some time to appear */ | |
60 | msleep(20); | |
61 | ||
62 | port = HCS_N_PORTS(ehci->hcs_params); | |
63 | while (port--) { | |
64 | if (test_bit(port, &ehci->owned_ports)) { | |
65 | reg = &ehci->regs->port_status[port]; | |
3c519b84 | 66 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
383975d7 AS |
67 | |
68 | /* Port already owned by companion? */ | |
69 | if (status & PORT_OWNER) | |
70 | clear_bit(port, &ehci->owned_ports); | |
3c519b84 AS |
71 | else if (test_bit(port, &ehci->companion_ports)) |
72 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
383975d7 AS |
73 | else |
74 | ehci_hub_control(hcd, SetPortFeature, | |
75 | USB_PORT_FEAT_RESET, port + 1, | |
76 | NULL, 0); | |
77 | } | |
78 | } | |
79 | ||
80 | if (!ehci->owned_ports) | |
81 | return; | |
82 | msleep(90); /* Wait for resets to complete */ | |
83 | ||
84 | port = HCS_N_PORTS(ehci->hcs_params); | |
85 | while (port--) { | |
86 | if (test_bit(port, &ehci->owned_ports)) { | |
87 | ehci_hub_control(hcd, GetPortStatus, | |
88 | 0, port + 1, | |
89 | (char *) &buf, sizeof(buf)); | |
90 | ||
91 | /* The companion should now own the port, | |
92 | * but if something went wrong the port must not | |
93 | * remain enabled. | |
94 | */ | |
95 | reg = &ehci->regs->port_status[port]; | |
96 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
97 | if (status & PORT_OWNER) | |
98 | ehci_writel(ehci, status | PORT_CSC, reg); | |
99 | else { | |
100 | ehci_dbg(ehci, "failed handover port %d: %x\n", | |
101 | port + 1, status); | |
102 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
103 | } | |
104 | } | |
105 | } | |
106 | ||
107 | ehci->owned_ports = 0; | |
108 | } | |
109 | ||
5407a3c3 | 110 | static int __maybe_unused ehci_port_change(struct ehci_hcd *ehci) |
294d95f2 MG |
111 | { |
112 | int i = HCS_N_PORTS(ehci->hcs_params); | |
113 | ||
114 | /* First check if the controller indicates a change event */ | |
115 | ||
116 | if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD) | |
117 | return 1; | |
118 | ||
119 | /* | |
120 | * Not all controllers appear to update this while going from D3 to D0, | |
121 | * so check the individual port status registers as well | |
122 | */ | |
123 | ||
124 | while (i--) | |
125 | if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC) | |
126 | return 1; | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
0b0cd6c8 | 131 | static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, |
4147200d | 132 | bool suspending, bool do_wakeup) |
16032c4f AS |
133 | { |
134 | int port; | |
135 | u32 temp; | |
148fc55f | 136 | unsigned long flags; |
16032c4f AS |
137 | |
138 | /* If remote wakeup is enabled for the root hub but disabled | |
139 | * for the controller, we must adjust all the port wakeup flags | |
140 | * when the controller is suspended or resumed. In all other | |
141 | * cases they don't need to be changed. | |
142 | */ | |
4147200d | 143 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) |
16032c4f AS |
144 | return; |
145 | ||
148fc55f YK |
146 | spin_lock_irqsave(&ehci->lock, flags); |
147 | ||
16032c4f AS |
148 | /* clear phy low-power mode before changing wakeup flags */ |
149 | if (ehci->has_hostpc) { | |
150 | port = HCS_N_PORTS(ehci->hcs_params); | |
151 | while (port--) { | |
152 | u32 __iomem *hostpc_reg; | |
153 | ||
154 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
155 | + HOSTPC0 + 4 * port); | |
156 | temp = ehci_readl(ehci, hostpc_reg); | |
157 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); | |
158 | } | |
148fc55f | 159 | spin_unlock_irqrestore(&ehci->lock, flags); |
16032c4f | 160 | msleep(5); |
148fc55f | 161 | spin_lock_irqsave(&ehci->lock, flags); |
16032c4f AS |
162 | } |
163 | ||
164 | port = HCS_N_PORTS(ehci->hcs_params); | |
165 | while (port--) { | |
166 | u32 __iomem *reg = &ehci->regs->port_status[port]; | |
167 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
168 | u32 t2 = t1 & ~PORT_WAKE_BITS; | |
169 | ||
170 | /* If we are suspending the controller, clear the flags. | |
171 | * If we are resuming the controller, set the wakeup flags. | |
172 | */ | |
173 | if (!suspending) { | |
174 | if (t1 & PORT_CONNECT) | |
175 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; | |
176 | else | |
177 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; | |
178 | } | |
179 | ehci_vdbg(ehci, "port %d, %08x -> %08x\n", | |
180 | port + 1, t1, t2); | |
181 | ehci_writel(ehci, t2, reg); | |
182 | } | |
183 | ||
184 | /* enter phy low-power mode again */ | |
185 | if (ehci->has_hostpc) { | |
186 | port = HCS_N_PORTS(ehci->hcs_params); | |
187 | while (port--) { | |
188 | u32 __iomem *hostpc_reg; | |
189 | ||
190 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
191 | + HOSTPC0 + 4 * port); | |
192 | temp = ehci_readl(ehci, hostpc_reg); | |
193 | ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg); | |
194 | } | |
195 | } | |
ee0b9be8 AS |
196 | |
197 | /* Does the root hub have a port wakeup pending? */ | |
294d95f2 | 198 | if (!suspending && ehci_port_change(ehci)) |
ee0b9be8 | 199 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); |
148fc55f YK |
200 | |
201 | spin_unlock_irqrestore(&ehci->lock, flags); | |
16032c4f AS |
202 | } |
203 | ||
0c0382e3 | 204 | static int ehci_bus_suspend (struct usb_hcd *hcd) |
1da177e4 LT |
205 | { |
206 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
207 | int port; | |
8c03356a | 208 | int mask; |
16032c4f | 209 | int changed; |
1da177e4 | 210 | |
8c774fe8 AS |
211 | ehci_dbg(ehci, "suspend root hub\n"); |
212 | ||
1da177e4 LT |
213 | if (time_before (jiffies, ehci->next_statechange)) |
214 | msleep(5); | |
f8fa7571 AS |
215 | del_timer_sync(&ehci->watchdog); |
216 | del_timer_sync(&ehci->iaa_watchdog); | |
1da177e4 | 217 | |
1da177e4 LT |
218 | spin_lock_irq (&ehci->lock); |
219 | ||
cec3a53c AS |
220 | /* Once the controller is stopped, port resumes that are already |
221 | * in progress won't complete. Hence if remote wakeup is enabled | |
222 | * for the root hub and any ports are in the middle of a resume or | |
223 | * remote wakeup, we must fail the suspend. | |
224 | */ | |
225 | if (hcd->self.root_hub->do_remote_wakeup) { | |
a448e4dc AS |
226 | if (ehci->resuming_ports) { |
227 | spin_unlock_irq(&ehci->lock); | |
228 | ehci_dbg(ehci, "suspend failed because a port is resuming\n"); | |
229 | return -EBUSY; | |
cec3a53c AS |
230 | } |
231 | } | |
232 | ||
1da177e4 | 233 | /* stop schedules, clean any completed work */ |
e8799906 | 234 | if (ehci->rh_state == EHCI_RH_RUNNING) |
1da177e4 | 235 | ehci_quiesce (ehci); |
083522d7 | 236 | ehci->command = ehci_readl(ehci, &ehci->regs->command); |
7d12e780 | 237 | ehci_work(ehci); |
1da177e4 | 238 | |
8c03356a AS |
239 | /* Unlike other USB host controller types, EHCI doesn't have |
240 | * any notion of "global" or bus-wide suspend. The driver has | |
241 | * to manually suspend all the active unsuspended ports, and | |
242 | * then manually resume them in the bus_resume() routine. | |
243 | */ | |
244 | ehci->bus_suspended = 0; | |
383975d7 | 245 | ehci->owned_ports = 0; |
16032c4f | 246 | changed = 0; |
cec3a53c | 247 | port = HCS_N_PORTS(ehci->hcs_params); |
1da177e4 LT |
248 | while (port--) { |
249 | u32 __iomem *reg = &ehci->regs->port_status [port]; | |
083522d7 | 250 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
16032c4f | 251 | u32 t2 = t1 & ~PORT_WAKE_BITS; |
1da177e4 | 252 | |
8c03356a | 253 | /* keep track of which ports we suspend */ |
383975d7 AS |
254 | if (t1 & PORT_OWNER) |
255 | set_bit(port, &ehci->owned_ports); | |
256 | else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) { | |
1da177e4 | 257 | t2 |= PORT_SUSPEND; |
8c03356a AS |
258 | set_bit(port, &ehci->bus_suspended); |
259 | } | |
260 | ||
16032c4f | 261 | /* enable remote wakeup on all ports, if told to do so */ |
331ac6b2 AD |
262 | if (hcd->self.root_hub->do_remote_wakeup) { |
263 | /* only enable appropriate wake bits, otherwise the | |
264 | * hardware can not go phy low power mode. If a race | |
265 | * condition happens here(connection change during bits | |
266 | * set), the port change detection will finally fix it. | |
267 | */ | |
16032c4f | 268 | if (t1 & PORT_CONNECT) |
331ac6b2 | 269 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; |
16032c4f | 270 | else |
331ac6b2 | 271 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; |
16032c4f | 272 | } |
1da177e4 LT |
273 | |
274 | if (t1 != t2) { | |
275 | ehci_vdbg (ehci, "port %d, %08x -> %08x\n", | |
276 | port + 1, t1, t2); | |
083522d7 | 277 | ehci_writel(ehci, t2, reg); |
16032c4f AS |
278 | changed = 1; |
279 | } | |
280 | } | |
331ac6b2 | 281 | |
16032c4f AS |
282 | if (changed && ehci->has_hostpc) { |
283 | spin_unlock_irq(&ehci->lock); | |
284 | msleep(5); /* 5 ms for HCD to enter low-power mode */ | |
285 | spin_lock_irq(&ehci->lock); | |
286 | ||
287 | port = HCS_N_PORTS(ehci->hcs_params); | |
288 | while (port--) { | |
289 | u32 __iomem *hostpc_reg; | |
290 | u32 t3; | |
291 | ||
292 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
293 | + HOSTPC0 + 4 * port); | |
294 | t3 = ehci_readl(ehci, hostpc_reg); | |
295 | ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg); | |
296 | t3 = ehci_readl(ehci, hostpc_reg); | |
297 | ehci_dbg(ehci, "Port %d phy low-power mode %s\n", | |
331ac6b2 AD |
298 | port, (t3 & HOSTPC_PHCD) ? |
299 | "succeeded" : "failed"); | |
1da177e4 LT |
300 | } |
301 | } | |
302 | ||
cd930c93 AS |
303 | /* Apparently some devices need a >= 1-uframe delay here */ |
304 | if (ehci->bus_suspended) | |
305 | udelay(150); | |
306 | ||
1da177e4 LT |
307 | /* turn off now-idle HC */ |
308 | ehci_halt (ehci); | |
e8799906 | 309 | ehci->rh_state = EHCI_RH_SUSPENDED; |
1da177e4 | 310 | |
cdc647a9 DB |
311 | if (ehci->reclaim) |
312 | end_unlink_async(ehci); | |
313 | ||
8c03356a AS |
314 | /* allow remote wakeup */ |
315 | mask = INTR_MASK; | |
58a97ffe | 316 | if (!hcd->self.root_hub->do_remote_wakeup) |
8c03356a | 317 | mask &= ~STS_PCD; |
083522d7 BH |
318 | ehci_writel(ehci, mask, &ehci->regs->intr_enable); |
319 | ehci_readl(ehci, &ehci->regs->intr_enable); | |
8c03356a | 320 | |
1da177e4 LT |
321 | ehci->next_statechange = jiffies + msecs_to_jiffies(10); |
322 | spin_unlock_irq (&ehci->lock); | |
015798b2 JH |
323 | |
324 | /* ehci_work() may have re-enabled the watchdog timer, which we do not | |
325 | * want, and so we must delete any pending watchdog timer events. | |
326 | */ | |
327 | del_timer_sync(&ehci->watchdog); | |
1da177e4 LT |
328 | return 0; |
329 | } | |
330 | ||
331 | ||
332 | /* caller has locked the root hub, and should reset/reinit on error */ | |
0c0382e3 | 333 | static int ehci_bus_resume (struct usb_hcd *hcd) |
1da177e4 LT |
334 | { |
335 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
336 | u32 temp; | |
383975d7 | 337 | u32 power_okay; |
1da177e4 | 338 | int i; |
d0f2fb25 | 339 | unsigned long resume_needed = 0; |
1da177e4 LT |
340 | |
341 | if (time_before (jiffies, ehci->next_statechange)) | |
342 | msleep(5); | |
343 | spin_lock_irq (&ehci->lock); | |
541c7d43 | 344 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
cfa59dab AS |
345 | spin_unlock_irq(&ehci->lock); |
346 | return -ESHUTDOWN; | |
347 | } | |
1da177e4 | 348 | |
ad45f1dc | 349 | if (unlikely(ehci->debug)) { |
872d3599 | 350 | if (!dbgp_reset_prep()) |
ad45f1dc JW |
351 | ehci->debug = NULL; |
352 | else | |
353 | dbgp_external_startup(); | |
354 | } | |
355 | ||
f03c17fc DB |
356 | /* Ideally and we've got a real resume here, and no port's power |
357 | * was lost. (For PCI, that means Vaux was maintained.) But we | |
358 | * could instead be restoring a swsusp snapshot -- so that BIOS was | |
359 | * the last user of the controller, not reset/pm hardware keeping | |
360 | * state we gave to it. | |
361 | */ | |
383975d7 AS |
362 | power_okay = ehci_readl(ehci, &ehci->regs->intr_enable); |
363 | ehci_dbg(ehci, "resume root hub%s\n", | |
364 | power_okay ? "" : " after power loss"); | |
f03c17fc | 365 | |
8c03356a AS |
366 | /* at least some APM implementations will try to deliver |
367 | * IRQs right away, so delay them until we're ready. | |
368 | */ | |
083522d7 | 369 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
8c03356a AS |
370 | |
371 | /* re-init operational registers */ | |
083522d7 BH |
372 | ehci_writel(ehci, 0, &ehci->regs->segment); |
373 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); | |
374 | ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next); | |
1da177e4 LT |
375 | |
376 | /* restore CMD_RUN, framelist size, and irq threshold */ | |
083522d7 | 377 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
e8799906 | 378 | ehci->rh_state = EHCI_RH_RUNNING; |
1da177e4 | 379 | |
e198a314 AS |
380 | /* Some controller/firmware combinations need a delay during which |
381 | * they set up the port statuses. See Bugzilla #8190. */ | |
3a4e72cb VP |
382 | spin_unlock_irq(&ehci->lock); |
383 | msleep(8); | |
384 | spin_lock_irq(&ehci->lock); | |
e198a314 | 385 | |
16032c4f AS |
386 | /* clear phy low-power mode before resume */ |
387 | if (ehci->bus_suspended && ehci->has_hostpc) { | |
388 | i = HCS_N_PORTS(ehci->hcs_params); | |
389 | while (i--) { | |
390 | if (test_bit(i, &ehci->bus_suspended)) { | |
391 | u32 __iomem *hostpc_reg; | |
392 | ||
393 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
394 | + HOSTPC0 + 4 * i); | |
395 | temp = ehci_readl(ehci, hostpc_reg); | |
396 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, | |
397 | hostpc_reg); | |
398 | } | |
399 | } | |
400 | spin_unlock_irq(&ehci->lock); | |
401 | msleep(5); | |
402 | spin_lock_irq(&ehci->lock); | |
403 | } | |
404 | ||
8c03356a | 405 | /* manually resume the ports we suspended during bus_suspend() */ |
1da177e4 LT |
406 | i = HCS_N_PORTS (ehci->hcs_params); |
407 | while (i--) { | |
083522d7 | 408 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
58a97ffe | 409 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
8c03356a | 410 | if (test_bit(i, &ehci->bus_suspended) && |
3a4e72cb | 411 | (temp & PORT_SUSPEND)) { |
1da177e4 | 412 | temp |= PORT_RESUME; |
d0f2fb25 | 413 | set_bit(i, &resume_needed); |
3a4e72cb | 414 | } |
083522d7 | 415 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
1da177e4 | 416 | } |
3a4e72cb VP |
417 | |
418 | /* msleep for 20ms only if code is trying to resume port */ | |
419 | if (resume_needed) { | |
420 | spin_unlock_irq(&ehci->lock); | |
421 | msleep(20); | |
422 | spin_lock_irq(&ehci->lock); | |
423 | } | |
424 | ||
1da177e4 | 425 | i = HCS_N_PORTS (ehci->hcs_params); |
1da177e4 | 426 | while (i--) { |
083522d7 | 427 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
d0f2fb25 | 428 | if (test_bit(i, &resume_needed)) { |
8c03356a | 429 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); |
083522d7 | 430 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
8c03356a AS |
431 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); |
432 | } | |
1da177e4 | 433 | } |
083522d7 | 434 | (void) ehci_readl(ehci, &ehci->regs->command); |
1da177e4 LT |
435 | |
436 | /* maybe re-activate the schedule(s) */ | |
437 | temp = 0; | |
438 | if (ehci->async->qh_next.qh) | |
439 | temp |= CMD_ASE; | |
440 | if (ehci->periodic_sched) | |
441 | temp |= CMD_PSE; | |
442 | if (temp) { | |
443 | ehci->command |= temp; | |
083522d7 | 444 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
1da177e4 LT |
445 | } |
446 | ||
447 | ehci->next_statechange = jiffies + msecs_to_jiffies(5); | |
1da177e4 LT |
448 | |
449 | /* Now we can safely re-enable irqs */ | |
083522d7 | 450 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); |
1da177e4 LT |
451 | |
452 | spin_unlock_irq (&ehci->lock); | |
3bb1af52 | 453 | ehci_handover_companion_ports(ehci); |
1da177e4 LT |
454 | return 0; |
455 | } | |
456 | ||
457 | #else | |
458 | ||
0c0382e3 AS |
459 | #define ehci_bus_suspend NULL |
460 | #define ehci_bus_resume NULL | |
1da177e4 LT |
461 | |
462 | #endif /* CONFIG_PM */ | |
463 | ||
57e06c11 AS |
464 | /*-------------------------------------------------------------------------*/ |
465 | ||
57e06c11 | 466 | /* |
90da096e | 467 | * Sets the owner of a port |
57e06c11 | 468 | */ |
90da096e | 469 | static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) |
57e06c11 | 470 | { |
57e06c11 AS |
471 | u32 __iomem *status_reg; |
472 | u32 port_status; | |
90da096e | 473 | int try; |
57e06c11 | 474 | |
90da096e | 475 | status_reg = &ehci->regs->port_status[portnum]; |
57e06c11 AS |
476 | |
477 | /* | |
478 | * The controller won't set the OWNER bit if the port is | |
479 | * enabled, so this loop will sometimes require at least two | |
480 | * iterations: one to disable the port and one to set OWNER. | |
481 | */ | |
57e06c11 AS |
482 | for (try = 4; try > 0; --try) { |
483 | spin_lock_irq(&ehci->lock); | |
484 | port_status = ehci_readl(ehci, status_reg); | |
485 | if ((port_status & PORT_OWNER) == new_owner | |
486 | || (port_status & (PORT_OWNER | PORT_CONNECT)) | |
487 | == 0) | |
488 | try = 0; | |
489 | else { | |
490 | port_status ^= PORT_OWNER; | |
491 | port_status &= ~(PORT_PE | PORT_RWC_BITS); | |
492 | ehci_writel(ehci, port_status, status_reg); | |
493 | } | |
494 | spin_unlock_irq(&ehci->lock); | |
495 | if (try > 1) | |
496 | msleep(5); | |
497 | } | |
90da096e BR |
498 | } |
499 | ||
1da177e4 LT |
500 | /*-------------------------------------------------------------------------*/ |
501 | ||
502 | static int check_reset_complete ( | |
503 | struct ehci_hcd *ehci, | |
504 | int index, | |
e6316565 | 505 | u32 __iomem *status_reg, |
1da177e4 LT |
506 | int port_status |
507 | ) { | |
cd4cdc93 | 508 | if (!(port_status & PORT_CONNECT)) |
1da177e4 | 509 | return port_status; |
1da177e4 LT |
510 | |
511 | /* if reset finished and it's still not enabled -- handoff */ | |
512 | if (!(port_status & PORT_PE)) { | |
513 | ||
514 | /* with integrated TT, there's nobody to hand it to! */ | |
515 | if (ehci_is_TDI(ehci)) { | |
516 | ehci_dbg (ehci, | |
517 | "Failed to enable port %d on root hub TT\n", | |
518 | index+1); | |
519 | return port_status; | |
520 | } | |
521 | ||
522 | ehci_dbg (ehci, "port %d full speed --> companion\n", | |
523 | index + 1); | |
524 | ||
525 | // what happens if HCS_N_CC(params) == 0 ? | |
526 | port_status |= PORT_OWNER; | |
10f6524a | 527 | port_status &= ~PORT_RWC_BITS; |
e6316565 | 528 | ehci_writel(ehci, port_status, status_reg); |
1da177e4 | 529 | |
796bcae7 VB |
530 | /* ensure 440EPX ohci controller state is operational */ |
531 | if (ehci->has_amcc_usb23) | |
532 | set_ohci_hcfs(ehci, 1); | |
533 | } else { | |
0ca7eb23 PC |
534 | ehci_dbg(ehci, "port %d reset complete, port enabled\n", |
535 | index + 1); | |
796bcae7 VB |
536 | /* ensure 440EPx ohci controller state is suspended */ |
537 | if (ehci->has_amcc_usb23) | |
538 | set_ohci_hcfs(ehci, 0); | |
539 | } | |
1da177e4 LT |
540 | |
541 | return port_status; | |
542 | } | |
543 | ||
544 | /*-------------------------------------------------------------------------*/ | |
545 | ||
546 | ||
547 | /* build "status change" packet (one or two bytes) from HC registers */ | |
548 | ||
549 | static int | |
550 | ehci_hub_status_data (struct usb_hcd *hcd, char *buf) | |
551 | { | |
552 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
a448e4dc | 553 | u32 temp, status; |
93f1a47c | 554 | u32 mask; |
1da177e4 LT |
555 | int ports, i, retval = 1; |
556 | unsigned long flags; | |
5a9cdf33 | 557 | u32 ppcd = 0; |
1da177e4 | 558 | |
1da177e4 LT |
559 | /* init status to no-changes */ |
560 | buf [0] = 0; | |
561 | ports = HCS_N_PORTS (ehci->hcs_params); | |
562 | if (ports > 7) { | |
563 | buf [1] = 0; | |
564 | retval++; | |
565 | } | |
53bd6a60 | 566 | |
a448e4dc AS |
567 | /* Inform the core about resumes-in-progress by returning |
568 | * a non-zero value even if there are no status changes. | |
569 | */ | |
570 | status = ehci->resuming_ports; | |
571 | ||
93f1a47c DB |
572 | /* Some boards (mostly VIA?) report bogus overcurrent indications, |
573 | * causing massive log spam unless we completely ignore them. It | |
3a4fa0a2 | 574 | * may be relevant that VIA VT8235 controllers, where PORT_POWER is |
93f1a47c DB |
575 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to |
576 | * PORT_POWER; that's surprising, but maybe within-spec. | |
577 | */ | |
578 | if (!ignore_oc) | |
579 | mask = PORT_CSC | PORT_PEC | PORT_OCC; | |
580 | else | |
581 | mask = PORT_CSC | PORT_PEC; | |
582 | // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND | |
583 | ||
1da177e4 LT |
584 | /* no hub change reports (bit 0) for now (power, ...) */ |
585 | ||
586 | /* port N changes (bit N)? */ | |
587 | spin_lock_irqsave (&ehci->lock, flags); | |
5a9cdf33 AD |
588 | |
589 | /* get per-port change detect bits */ | |
590 | if (ehci->has_ppcd) | |
591 | ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16; | |
592 | ||
1da177e4 | 593 | for (i = 0; i < ports; i++) { |
5a9cdf33 AD |
594 | /* leverage per-port change bits feature */ |
595 | if (ehci->has_ppcd && !(ppcd & (1 << i))) | |
596 | continue; | |
083522d7 | 597 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
625b5c9a AS |
598 | |
599 | /* | |
600 | * Return status information even for ports with OWNER set. | |
601 | * Otherwise khubd wouldn't see the disconnect event when a | |
602 | * high-speed device is switched over to the companion | |
603 | * controller by the user. | |
604 | */ | |
605 | ||
eafe5b99 AS |
606 | if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) |
607 | || (ehci->reset_done[i] && time_after_eq( | |
608 | jiffies, ehci->reset_done[i]))) { | |
1da177e4 LT |
609 | if (i < 7) |
610 | buf [0] |= 1 << (i + 1); | |
611 | else | |
612 | buf [1] |= 1 << (i - 7); | |
613 | status = STS_PCD; | |
614 | } | |
615 | } | |
616 | /* FIXME autosuspend idle root hubs */ | |
617 | spin_unlock_irqrestore (&ehci->lock, flags); | |
618 | return status ? retval : 0; | |
619 | } | |
620 | ||
621 | /*-------------------------------------------------------------------------*/ | |
622 | ||
623 | static void | |
624 | ehci_hub_descriptor ( | |
625 | struct ehci_hcd *ehci, | |
626 | struct usb_hub_descriptor *desc | |
627 | ) { | |
628 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
629 | u16 temp; | |
630 | ||
631 | desc->bDescriptorType = 0x29; | |
632 | desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */ | |
633 | desc->bHubContrCurrent = 0; | |
634 | ||
635 | desc->bNbrPorts = ports; | |
636 | temp = 1 + (ports / 8); | |
637 | desc->bDescLength = 7 + 2 * temp; | |
638 | ||
639 | /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ | |
dbe79bbe JY |
640 | memset(&desc->u.hs.DeviceRemovable[0], 0, temp); |
641 | memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); | |
1da177e4 LT |
642 | |
643 | temp = 0x0008; /* per-port overcurrent reporting */ | |
644 | if (HCS_PPC (ehci->hcs_params)) | |
645 | temp |= 0x0001; /* per-port power control */ | |
56c1e26d DB |
646 | else |
647 | temp |= 0x0002; /* no power switching */ | |
1da177e4 LT |
648 | #if 0 |
649 | // re-enable when we support USB_PORT_FEAT_INDICATOR below. | |
650 | if (HCS_INDICATOR (ehci->hcs_params)) | |
651 | temp |= 0x0080; /* per-port indicators (LEDs) */ | |
652 | #endif | |
fd05e720 | 653 | desc->wHubCharacteristics = cpu_to_le16(temp); |
1da177e4 LT |
654 | } |
655 | ||
656 | /*-------------------------------------------------------------------------*/ | |
657 | ||
1da177e4 LT |
658 | static int ehci_hub_control ( |
659 | struct usb_hcd *hcd, | |
660 | u16 typeReq, | |
661 | u16 wValue, | |
662 | u16 wIndex, | |
663 | char *buf, | |
664 | u16 wLength | |
665 | ) { | |
666 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
667 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
383975d7 AS |
668 | u32 __iomem *status_reg = &ehci->regs->port_status[ |
669 | (wIndex & 0xff) - 1]; | |
331ac6b2 AD |
670 | u32 __iomem *hostpc_reg = NULL; |
671 | u32 temp, temp1, status; | |
1da177e4 LT |
672 | unsigned long flags; |
673 | int retval = 0; | |
f0d7f273 | 674 | unsigned selector; |
1da177e4 LT |
675 | |
676 | /* | |
677 | * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. | |
678 | * HCS_INDICATOR may say we can change LEDs to off/amber/green. | |
679 | * (track current state ourselves) ... blink for diagnostics, | |
680 | * power, "this is the one", etc. EHCI spec supports this. | |
681 | */ | |
682 | ||
331ac6b2 AD |
683 | if (ehci->has_hostpc) |
684 | hostpc_reg = (u32 __iomem *)((u8 *)ehci->regs | |
685 | + HOSTPC0 + 4 * ((wIndex & 0xff) - 1)); | |
1da177e4 LT |
686 | spin_lock_irqsave (&ehci->lock, flags); |
687 | switch (typeReq) { | |
688 | case ClearHubFeature: | |
689 | switch (wValue) { | |
690 | case C_HUB_LOCAL_POWER: | |
691 | case C_HUB_OVER_CURRENT: | |
692 | /* no hub-wide feature/status flags */ | |
693 | break; | |
694 | default: | |
695 | goto error; | |
696 | } | |
697 | break; | |
698 | case ClearPortFeature: | |
699 | if (!wIndex || wIndex > ports) | |
700 | goto error; | |
701 | wIndex--; | |
e6316565 | 702 | temp = ehci_readl(ehci, status_reg); |
6d5f89c7 | 703 | temp &= ~PORT_RWC_BITS; |
625b5c9a AS |
704 | |
705 | /* | |
706 | * Even if OWNER is set, so the port is owned by the | |
707 | * companion controller, khubd needs to be able to clear | |
708 | * the port-change status bits (especially | |
749da5f8 | 709 | * USB_PORT_STAT_C_CONNECTION). |
625b5c9a | 710 | */ |
1da177e4 LT |
711 | |
712 | switch (wValue) { | |
713 | case USB_PORT_FEAT_ENABLE: | |
e6316565 | 714 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); |
1da177e4 LT |
715 | break; |
716 | case USB_PORT_FEAT_C_ENABLE: | |
6d5f89c7 | 717 | ehci_writel(ehci, temp | PORT_PEC, status_reg); |
1da177e4 LT |
718 | break; |
719 | case USB_PORT_FEAT_SUSPEND: | |
720 | if (temp & PORT_RESET) | |
721 | goto error; | |
f8aeb3bb DB |
722 | if (ehci->no_selective_suspend) |
723 | break; | |
83722bc9 AG |
724 | #ifdef CONFIG_USB_OTG |
725 | if ((hcd->self.otg_port == (wIndex + 1)) | |
726 | && hcd->self.b_hnp_enable) { | |
6e13c650 | 727 | otg_start_hnp(ehci->transceiver->otg); |
83722bc9 AG |
728 | break; |
729 | } | |
730 | #endif | |
16032c4f AS |
731 | if (!(temp & PORT_SUSPEND)) |
732 | break; | |
733 | if ((temp & PORT_PE) == 0) | |
734 | goto error; | |
735 | ||
736 | /* clear phy low-power mode before resume */ | |
737 | if (hostpc_reg) { | |
738 | temp1 = ehci_readl(ehci, hostpc_reg); | |
739 | ehci_writel(ehci, temp1 & ~HOSTPC_PHCD, | |
eab80de0 | 740 | hostpc_reg); |
16032c4f AS |
741 | spin_unlock_irqrestore(&ehci->lock, flags); |
742 | msleep(5);/* wait to leave low-power mode */ | |
743 | spin_lock_irqsave(&ehci->lock, flags); | |
1da177e4 | 744 | } |
16032c4f | 745 | /* resume signaling for 20 msec */ |
6d5f89c7 | 746 | temp &= ~PORT_WAKE_BITS; |
16032c4f AS |
747 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
748 | ehci->reset_done[wIndex] = jiffies | |
749 | + msecs_to_jiffies(20); | |
1da177e4 LT |
750 | break; |
751 | case USB_PORT_FEAT_C_SUSPEND: | |
d1f114d1 | 752 | clear_bit(wIndex, &ehci->port_c_suspend); |
1da177e4 LT |
753 | break; |
754 | case USB_PORT_FEAT_POWER: | |
755 | if (HCS_PPC (ehci->hcs_params)) | |
6d5f89c7 SW |
756 | ehci_writel(ehci, temp & ~PORT_POWER, |
757 | status_reg); | |
1da177e4 LT |
758 | break; |
759 | case USB_PORT_FEAT_C_CONNECTION: | |
48f24970 AD |
760 | if (ehci->has_lpm) { |
761 | /* clear PORTSC bits on disconnect */ | |
762 | temp &= ~PORT_LPM; | |
763 | temp &= ~PORT_DEV_ADDR; | |
764 | } | |
6d5f89c7 | 765 | ehci_writel(ehci, temp | PORT_CSC, status_reg); |
1da177e4 LT |
766 | break; |
767 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
6d5f89c7 | 768 | ehci_writel(ehci, temp | PORT_OCC, status_reg); |
1da177e4 LT |
769 | break; |
770 | case USB_PORT_FEAT_C_RESET: | |
771 | /* GetPortStatus clears reset */ | |
772 | break; | |
773 | default: | |
774 | goto error; | |
775 | } | |
083522d7 | 776 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ |
1da177e4 LT |
777 | break; |
778 | case GetHubDescriptor: | |
779 | ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *) | |
780 | buf); | |
781 | break; | |
782 | case GetHubStatus: | |
783 | /* no hub-wide feature/status flags */ | |
784 | memset (buf, 0, 4); | |
785 | //cpu_to_le32s ((u32 *) buf); | |
786 | break; | |
787 | case GetPortStatus: | |
788 | if (!wIndex || wIndex > ports) | |
789 | goto error; | |
790 | wIndex--; | |
791 | status = 0; | |
e6316565 | 792 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
793 | |
794 | // wPortChange bits | |
795 | if (temp & PORT_CSC) | |
749da5f8 | 796 | status |= USB_PORT_STAT_C_CONNECTION << 16; |
1da177e4 | 797 | if (temp & PORT_PEC) |
749da5f8 | 798 | status |= USB_PORT_STAT_C_ENABLE << 16; |
756aa6b3 CE |
799 | |
800 | if ((temp & PORT_OCC) && !ignore_oc){ | |
749da5f8 | 801 | status |= USB_PORT_STAT_C_OVERCURRENT << 16; |
1da177e4 | 802 | |
756aa6b3 CE |
803 | /* |
804 | * Hubs should disable port power on over-current. | |
805 | * However, not all EHCI implementations do this | |
806 | * automatically, even if they _do_ support per-port | |
807 | * power switching; they're allowed to just limit the | |
808 | * current. khubd will turn the power back on. | |
809 | */ | |
81463c1d | 810 | if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { |
756aa6b3 CE |
811 | ehci_writel(ehci, |
812 | temp & ~(PORT_RWC_BITS | PORT_POWER), | |
813 | status_reg); | |
81463c1d | 814 | temp = ehci_readl(ehci, status_reg); |
756aa6b3 CE |
815 | } |
816 | } | |
817 | ||
1da177e4 | 818 | /* whoever resumes must GetPortStatus to complete it!! */ |
629e4427 AS |
819 | if (temp & PORT_RESUME) { |
820 | ||
821 | /* Remote Wakeup received? */ | |
822 | if (!ehci->reset_done[wIndex]) { | |
823 | /* resume signaling for 20 msec */ | |
824 | ehci->reset_done[wIndex] = jiffies | |
825 | + msecs_to_jiffies(20); | |
826 | /* check the port again */ | |
827 | mod_timer(&ehci_to_hcd(ehci)->rh_timer, | |
828 | ehci->reset_done[wIndex]); | |
829 | } | |
1da177e4 | 830 | |
629e4427 AS |
831 | /* resume completed? */ |
832 | else if (time_after_eq(jiffies, | |
833 | ehci->reset_done[wIndex])) { | |
eafe5b99 | 834 | clear_bit(wIndex, &ehci->suspended_ports); |
d1f114d1 | 835 | set_bit(wIndex, &ehci->port_c_suspend); |
629e4427 AS |
836 | ehci->reset_done[wIndex] = 0; |
837 | ||
838 | /* stop resume signaling */ | |
839 | temp = ehci_readl(ehci, status_reg); | |
840 | ehci_writel(ehci, | |
e6316565 AS |
841 | temp & ~(PORT_RWC_BITS | PORT_RESUME), |
842 | status_reg); | |
a448e4dc | 843 | clear_bit(wIndex, &ehci->resuming_ports); |
629e4427 | 844 | retval = handshake(ehci, status_reg, |
083522d7 | 845 | PORT_RESUME, 0, 2000 /* 2msec */); |
629e4427 AS |
846 | if (retval != 0) { |
847 | ehci_err(ehci, | |
848 | "port %d resume error %d\n", | |
849 | wIndex + 1, retval); | |
850 | goto error; | |
851 | } | |
852 | temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); | |
1da177e4 | 853 | } |
1da177e4 LT |
854 | } |
855 | ||
856 | /* whoever resets must GetPortStatus to complete it!! */ | |
857 | if ((temp & PORT_RESET) | |
629e4427 AS |
858 | && time_after_eq(jiffies, |
859 | ehci->reset_done[wIndex])) { | |
749da5f8 | 860 | status |= USB_PORT_STAT_C_RESET << 16; |
1da177e4 | 861 | ehci->reset_done [wIndex] = 0; |
a448e4dc | 862 | clear_bit(wIndex, &ehci->resuming_ports); |
1da177e4 LT |
863 | |
864 | /* force reset to complete */ | |
083522d7 | 865 | ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET), |
e6316565 | 866 | status_reg); |
c22fa3ac DB |
867 | /* REVISIT: some hardware needs 550+ usec to clear |
868 | * this bit; seems too long to spin routinely... | |
869 | */ | |
e6316565 | 870 | retval = handshake(ehci, status_reg, |
6307e096 | 871 | PORT_RESET, 0, 1000); |
1da177e4 LT |
872 | if (retval != 0) { |
873 | ehci_err (ehci, "port %d reset error %d\n", | |
874 | wIndex + 1, retval); | |
875 | goto error; | |
876 | } | |
877 | ||
878 | /* see what we found out */ | |
e6316565 AS |
879 | temp = check_reset_complete (ehci, wIndex, status_reg, |
880 | ehci_readl(ehci, status_reg)); | |
1da177e4 LT |
881 | } |
882 | ||
a448e4dc | 883 | if (!(temp & (PORT_RESUME|PORT_RESET))) { |
eafe5b99 | 884 | ehci->reset_done[wIndex] = 0; |
a448e4dc AS |
885 | clear_bit(wIndex, &ehci->resuming_ports); |
886 | } | |
eafe5b99 | 887 | |
57e06c11 AS |
888 | /* transfer dedicated ports to the companion hc */ |
889 | if ((temp & PORT_CONNECT) && | |
890 | test_bit(wIndex, &ehci->companion_ports)) { | |
891 | temp &= ~PORT_RWC_BITS; | |
892 | temp |= PORT_OWNER; | |
893 | ehci_writel(ehci, temp, status_reg); | |
894 | ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1); | |
895 | temp = ehci_readl(ehci, status_reg); | |
896 | } | |
897 | ||
625b5c9a AS |
898 | /* |
899 | * Even if OWNER is set, there's no harm letting khubd | |
900 | * see the wPortStatus values (they should all be 0 except | |
901 | * for PORT_POWER anyway). | |
902 | */ | |
903 | ||
904 | if (temp & PORT_CONNECT) { | |
749da5f8 | 905 | status |= USB_PORT_STAT_CONNECTION; |
625b5c9a | 906 | // status may be from integrated TT |
331ac6b2 AD |
907 | if (ehci->has_hostpc) { |
908 | temp1 = ehci_readl(ehci, hostpc_reg); | |
909 | status |= ehci_port_speed(ehci, temp1); | |
910 | } else | |
911 | status |= ehci_port_speed(ehci, temp); | |
1da177e4 | 912 | } |
625b5c9a | 913 | if (temp & PORT_PE) |
749da5f8 | 914 | status |= USB_PORT_STAT_ENABLE; |
eafe5b99 AS |
915 | |
916 | /* maybe the port was unsuspended without our knowledge */ | |
917 | if (temp & (PORT_SUSPEND|PORT_RESUME)) { | |
749da5f8 | 918 | status |= USB_PORT_STAT_SUSPEND; |
eafe5b99 AS |
919 | } else if (test_bit(wIndex, &ehci->suspended_ports)) { |
920 | clear_bit(wIndex, &ehci->suspended_ports); | |
a448e4dc | 921 | clear_bit(wIndex, &ehci->resuming_ports); |
eafe5b99 AS |
922 | ehci->reset_done[wIndex] = 0; |
923 | if (temp & PORT_PE) | |
924 | set_bit(wIndex, &ehci->port_c_suspend); | |
925 | } | |
926 | ||
625b5c9a | 927 | if (temp & PORT_OC) |
749da5f8 | 928 | status |= USB_PORT_STAT_OVERCURRENT; |
625b5c9a | 929 | if (temp & PORT_RESET) |
749da5f8 | 930 | status |= USB_PORT_STAT_RESET; |
625b5c9a | 931 | if (temp & PORT_POWER) |
749da5f8 | 932 | status |= USB_PORT_STAT_POWER; |
d1f114d1 | 933 | if (test_bit(wIndex, &ehci->port_c_suspend)) |
749da5f8 | 934 | status |= USB_PORT_STAT_C_SUSPEND << 16; |
1da177e4 | 935 | |
9776afc8 | 936 | #ifndef VERBOSE_DEBUG |
1da177e4 LT |
937 | if (status & ~0xffff) /* only if wPortChange is interesting */ |
938 | #endif | |
939 | dbg_port (ehci, "GetStatus", wIndex + 1, temp); | |
a5abdeaf | 940 | put_unaligned_le32(status, buf); |
1da177e4 LT |
941 | break; |
942 | case SetHubFeature: | |
943 | switch (wValue) { | |
944 | case C_HUB_LOCAL_POWER: | |
945 | case C_HUB_OVER_CURRENT: | |
946 | /* no hub-wide feature/status flags */ | |
947 | break; | |
948 | default: | |
949 | goto error; | |
950 | } | |
951 | break; | |
952 | case SetPortFeature: | |
f0d7f273 DB |
953 | selector = wIndex >> 8; |
954 | wIndex &= 0xff; | |
8d053c79 JW |
955 | if (unlikely(ehci->debug)) { |
956 | /* If the debug port is active any port | |
957 | * feature requests should get denied */ | |
958 | if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) && | |
959 | (readl(&ehci->debug->control) & DBGP_ENABLED)) { | |
960 | retval = -ENODEV; | |
961 | goto error_exit; | |
962 | } | |
963 | } | |
1da177e4 LT |
964 | if (!wIndex || wIndex > ports) |
965 | goto error; | |
966 | wIndex--; | |
e6316565 | 967 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
968 | if (temp & PORT_OWNER) |
969 | break; | |
970 | ||
10f6524a | 971 | temp &= ~PORT_RWC_BITS; |
1da177e4 LT |
972 | switch (wValue) { |
973 | case USB_PORT_FEAT_SUSPEND: | |
f8aeb3bb DB |
974 | if (ehci->no_selective_suspend) |
975 | break; | |
1da177e4 LT |
976 | if ((temp & PORT_PE) == 0 |
977 | || (temp & PORT_RESET) != 0) | |
978 | goto error; | |
b9df7942 | 979 | |
331ac6b2 AD |
980 | /* After above check the port must be connected. |
981 | * Set appropriate bit thus could put phy into low power | |
982 | * mode if we have hostpc feature | |
983 | */ | |
b9df7942 AD |
984 | temp &= ~PORT_WKCONN_E; |
985 | temp |= PORT_WKDISC_E | PORT_WKOC_E; | |
986 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); | |
331ac6b2 | 987 | if (hostpc_reg) { |
b9df7942 | 988 | spin_unlock_irqrestore(&ehci->lock, flags); |
331ac6b2 | 989 | msleep(5);/* 5ms for HCD enter low pwr mode */ |
b9df7942 | 990 | spin_lock_irqsave(&ehci->lock, flags); |
331ac6b2 AD |
991 | temp1 = ehci_readl(ehci, hostpc_reg); |
992 | ehci_writel(ehci, temp1 | HOSTPC_PHCD, | |
993 | hostpc_reg); | |
994 | temp1 = ehci_readl(ehci, hostpc_reg); | |
995 | ehci_dbg(ehci, "Port%d phy low pwr mode %s\n", | |
996 | wIndex, (temp1 & HOSTPC_PHCD) ? | |
997 | "succeeded" : "failed"); | |
998 | } | |
eafe5b99 | 999 | set_bit(wIndex, &ehci->suspended_ports); |
1da177e4 LT |
1000 | break; |
1001 | case USB_PORT_FEAT_POWER: | |
1002 | if (HCS_PPC (ehci->hcs_params)) | |
083522d7 | 1003 | ehci_writel(ehci, temp | PORT_POWER, |
e6316565 | 1004 | status_reg); |
1da177e4 LT |
1005 | break; |
1006 | case USB_PORT_FEAT_RESET: | |
1007 | if (temp & PORT_RESUME) | |
1008 | goto error; | |
1009 | /* line status bits may report this as low speed, | |
1010 | * which can be fine if this root hub has a | |
1011 | * transaction translator built in. | |
1012 | */ | |
1013 | if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT | |
1014 | && !ehci_is_TDI(ehci) | |
1015 | && PORT_USB11 (temp)) { | |
1016 | ehci_dbg (ehci, | |
1017 | "port %d low speed --> companion\n", | |
1018 | wIndex + 1); | |
1019 | temp |= PORT_OWNER; | |
1020 | } else { | |
1021 | ehci_vdbg (ehci, "port %d reset\n", wIndex + 1); | |
1022 | temp |= PORT_RESET; | |
1023 | temp &= ~PORT_PE; | |
1024 | ||
1025 | /* | |
1026 | * caller must wait, then call GetPortStatus | |
1027 | * usb 2.0 spec says 50 ms resets on root | |
1028 | */ | |
1029 | ehci->reset_done [wIndex] = jiffies | |
1030 | + msecs_to_jiffies (50); | |
1031 | } | |
e6316565 | 1032 | ehci_writel(ehci, temp, status_reg); |
1da177e4 | 1033 | break; |
f0d7f273 DB |
1034 | |
1035 | /* For downstream facing ports (these): one hub port is put | |
1036 | * into test mode according to USB2 11.24.2.13, then the hub | |
1037 | * must be reset (which for root hub now means rmmod+modprobe, | |
1038 | * or else system reboot). See EHCI 2.3.9 and 4.14 for info | |
1039 | * about the EHCI-specific stuff. | |
1040 | */ | |
1041 | case USB_PORT_FEAT_TEST: | |
1042 | if (!selector || selector > 5) | |
1043 | goto error; | |
1044 | ehci_quiesce(ehci); | |
77636c86 BT |
1045 | |
1046 | /* Put all enabled ports into suspend */ | |
1047 | while (ports--) { | |
1048 | u32 __iomem *sreg = | |
1049 | &ehci->regs->port_status[ports]; | |
1050 | ||
1051 | temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; | |
1052 | if (temp & PORT_PE) | |
1053 | ehci_writel(ehci, temp | PORT_SUSPEND, | |
1054 | sreg); | |
1055 | } | |
f0d7f273 | 1056 | ehci_halt(ehci); |
77636c86 | 1057 | temp = ehci_readl(ehci, status_reg); |
f0d7f273 | 1058 | temp |= selector << 16; |
e6316565 | 1059 | ehci_writel(ehci, temp, status_reg); |
f0d7f273 DB |
1060 | break; |
1061 | ||
1da177e4 LT |
1062 | default: |
1063 | goto error; | |
1064 | } | |
083522d7 | 1065 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ |
1da177e4 LT |
1066 | break; |
1067 | ||
1068 | default: | |
1069 | error: | |
1070 | /* "stall" on error */ | |
1071 | retval = -EPIPE; | |
1072 | } | |
8d053c79 | 1073 | error_exit: |
1da177e4 LT |
1074 | spin_unlock_irqrestore (&ehci->lock, flags); |
1075 | return retval; | |
1076 | } | |
90da096e | 1077 | |
5407a3c3 FB |
1078 | static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd, |
1079 | int portnum) | |
90da096e BR |
1080 | { |
1081 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1082 | ||
1083 | if (ehci_is_TDI(ehci)) | |
1084 | return; | |
1085 | set_owner(ehci, --portnum, PORT_OWNER); | |
1086 | } | |
1087 | ||
5407a3c3 FB |
1088 | static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd, |
1089 | int portnum) | |
3a31155c AS |
1090 | { |
1091 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1092 | u32 __iomem *reg; | |
1093 | ||
1094 | if (ehci_is_TDI(ehci)) | |
1095 | return 0; | |
1096 | reg = &ehci->regs->port_status[portnum - 1]; | |
1097 | return ehci_readl(ehci, reg) & PORT_OWNER; | |
1098 | } |