Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
d49d4317 | 2 | * Copyright (C) 2001-2004 by David Brownell |
53bd6a60 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | /* this file is part of ehci-hcd.c */ | |
20 | ||
21 | /*-------------------------------------------------------------------------*/ | |
22 | ||
23 | /* | |
24 | * EHCI Root Hub ... the nonsharable stuff | |
25 | * | |
26 | * Registers don't need cpu_to_le32, that happens transparently | |
27 | */ | |
28 | ||
29 | /*-------------------------------------------------------------------------*/ | |
83722bc9 | 30 | #include <linux/usb/otg.h> |
1da177e4 | 31 | |
58a97ffe AS |
32 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
33 | ||
aff6d18f AS |
34 | #ifdef CONFIG_PM |
35 | ||
383975d7 AS |
36 | static int ehci_hub_control( |
37 | struct usb_hcd *hcd, | |
38 | u16 typeReq, | |
39 | u16 wValue, | |
40 | u16 wIndex, | |
41 | char *buf, | |
42 | u16 wLength | |
43 | ); | |
44 | ||
45 | /* After a power loss, ports that were owned by the companion must be | |
46 | * reset so that the companion can still own them. | |
47 | */ | |
48 | static void ehci_handover_companion_ports(struct ehci_hcd *ehci) | |
49 | { | |
50 | u32 __iomem *reg; | |
51 | u32 status; | |
52 | int port; | |
53 | __le32 buf; | |
54 | struct usb_hcd *hcd = ehci_to_hcd(ehci); | |
55 | ||
56 | if (!ehci->owned_ports) | |
57 | return; | |
58 | ||
59 | /* Give the connections some time to appear */ | |
60 | msleep(20); | |
61 | ||
62 | port = HCS_N_PORTS(ehci->hcs_params); | |
63 | while (port--) { | |
64 | if (test_bit(port, &ehci->owned_ports)) { | |
65 | reg = &ehci->regs->port_status[port]; | |
3c519b84 | 66 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
383975d7 AS |
67 | |
68 | /* Port already owned by companion? */ | |
69 | if (status & PORT_OWNER) | |
70 | clear_bit(port, &ehci->owned_ports); | |
3c519b84 AS |
71 | else if (test_bit(port, &ehci->companion_ports)) |
72 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
383975d7 AS |
73 | else |
74 | ehci_hub_control(hcd, SetPortFeature, | |
75 | USB_PORT_FEAT_RESET, port + 1, | |
76 | NULL, 0); | |
77 | } | |
78 | } | |
79 | ||
80 | if (!ehci->owned_ports) | |
81 | return; | |
82 | msleep(90); /* Wait for resets to complete */ | |
83 | ||
84 | port = HCS_N_PORTS(ehci->hcs_params); | |
85 | while (port--) { | |
86 | if (test_bit(port, &ehci->owned_ports)) { | |
87 | ehci_hub_control(hcd, GetPortStatus, | |
88 | 0, port + 1, | |
89 | (char *) &buf, sizeof(buf)); | |
90 | ||
91 | /* The companion should now own the port, | |
92 | * but if something went wrong the port must not | |
93 | * remain enabled. | |
94 | */ | |
95 | reg = &ehci->regs->port_status[port]; | |
96 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
97 | if (status & PORT_OWNER) | |
98 | ehci_writel(ehci, status | PORT_CSC, reg); | |
99 | else { | |
100 | ehci_dbg(ehci, "failed handover port %d: %x\n", | |
101 | port + 1, status); | |
102 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
103 | } | |
104 | } | |
105 | } | |
106 | ||
107 | ehci->owned_ports = 0; | |
108 | } | |
109 | ||
c5cf9212 | 110 | static int ehci_port_change(struct ehci_hcd *ehci) |
294d95f2 MG |
111 | { |
112 | int i = HCS_N_PORTS(ehci->hcs_params); | |
113 | ||
114 | /* First check if the controller indicates a change event */ | |
115 | ||
116 | if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD) | |
117 | return 1; | |
118 | ||
119 | /* | |
120 | * Not all controllers appear to update this while going from D3 to D0, | |
121 | * so check the individual port status registers as well | |
122 | */ | |
123 | ||
124 | while (i--) | |
125 | if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC) | |
126 | return 1; | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
c5cf9212 | 131 | static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, |
4147200d | 132 | bool suspending, bool do_wakeup) |
16032c4f AS |
133 | { |
134 | int port; | |
135 | u32 temp; | |
148fc55f | 136 | unsigned long flags; |
16032c4f AS |
137 | |
138 | /* If remote wakeup is enabled for the root hub but disabled | |
139 | * for the controller, we must adjust all the port wakeup flags | |
140 | * when the controller is suspended or resumed. In all other | |
141 | * cases they don't need to be changed. | |
142 | */ | |
4147200d | 143 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) |
16032c4f AS |
144 | return; |
145 | ||
148fc55f YK |
146 | spin_lock_irqsave(&ehci->lock, flags); |
147 | ||
16032c4f AS |
148 | /* clear phy low-power mode before changing wakeup flags */ |
149 | if (ehci->has_hostpc) { | |
150 | port = HCS_N_PORTS(ehci->hcs_params); | |
151 | while (port--) { | |
a46af4eb | 152 | u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port]; |
16032c4f | 153 | |
16032c4f AS |
154 | temp = ehci_readl(ehci, hostpc_reg); |
155 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); | |
156 | } | |
148fc55f | 157 | spin_unlock_irqrestore(&ehci->lock, flags); |
16032c4f | 158 | msleep(5); |
148fc55f | 159 | spin_lock_irqsave(&ehci->lock, flags); |
16032c4f AS |
160 | } |
161 | ||
162 | port = HCS_N_PORTS(ehci->hcs_params); | |
163 | while (port--) { | |
164 | u32 __iomem *reg = &ehci->regs->port_status[port]; | |
165 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
166 | u32 t2 = t1 & ~PORT_WAKE_BITS; | |
167 | ||
168 | /* If we are suspending the controller, clear the flags. | |
169 | * If we are resuming the controller, set the wakeup flags. | |
170 | */ | |
171 | if (!suspending) { | |
172 | if (t1 & PORT_CONNECT) | |
173 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; | |
174 | else | |
175 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; | |
176 | } | |
177 | ehci_vdbg(ehci, "port %d, %08x -> %08x\n", | |
178 | port + 1, t1, t2); | |
179 | ehci_writel(ehci, t2, reg); | |
180 | } | |
181 | ||
182 | /* enter phy low-power mode again */ | |
183 | if (ehci->has_hostpc) { | |
184 | port = HCS_N_PORTS(ehci->hcs_params); | |
185 | while (port--) { | |
a46af4eb | 186 | u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port]; |
16032c4f | 187 | |
16032c4f AS |
188 | temp = ehci_readl(ehci, hostpc_reg); |
189 | ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg); | |
190 | } | |
191 | } | |
ee0b9be8 AS |
192 | |
193 | /* Does the root hub have a port wakeup pending? */ | |
294d95f2 | 194 | if (!suspending && ehci_port_change(ehci)) |
ee0b9be8 | 195 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); |
148fc55f YK |
196 | |
197 | spin_unlock_irqrestore(&ehci->lock, flags); | |
16032c4f AS |
198 | } |
199 | ||
0c0382e3 | 200 | static int ehci_bus_suspend (struct usb_hcd *hcd) |
1da177e4 LT |
201 | { |
202 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
203 | int port; | |
8c03356a | 204 | int mask; |
16032c4f | 205 | int changed; |
1da177e4 | 206 | |
8c774fe8 AS |
207 | ehci_dbg(ehci, "suspend root hub\n"); |
208 | ||
1da177e4 LT |
209 | if (time_before (jiffies, ehci->next_statechange)) |
210 | msleep(5); | |
f8fa7571 AS |
211 | del_timer_sync(&ehci->watchdog); |
212 | del_timer_sync(&ehci->iaa_watchdog); | |
1da177e4 | 213 | |
1da177e4 LT |
214 | spin_lock_irq (&ehci->lock); |
215 | ||
cec3a53c AS |
216 | /* Once the controller is stopped, port resumes that are already |
217 | * in progress won't complete. Hence if remote wakeup is enabled | |
218 | * for the root hub and any ports are in the middle of a resume or | |
219 | * remote wakeup, we must fail the suspend. | |
220 | */ | |
221 | if (hcd->self.root_hub->do_remote_wakeup) { | |
a448e4dc AS |
222 | if (ehci->resuming_ports) { |
223 | spin_unlock_irq(&ehci->lock); | |
224 | ehci_dbg(ehci, "suspend failed because a port is resuming\n"); | |
225 | return -EBUSY; | |
cec3a53c AS |
226 | } |
227 | } | |
228 | ||
1da177e4 | 229 | /* stop schedules, clean any completed work */ |
c0c53dbc | 230 | ehci_quiesce(ehci); |
7d12e780 | 231 | ehci_work(ehci); |
1da177e4 | 232 | |
8c03356a AS |
233 | /* Unlike other USB host controller types, EHCI doesn't have |
234 | * any notion of "global" or bus-wide suspend. The driver has | |
235 | * to manually suspend all the active unsuspended ports, and | |
236 | * then manually resume them in the bus_resume() routine. | |
237 | */ | |
238 | ehci->bus_suspended = 0; | |
383975d7 | 239 | ehci->owned_ports = 0; |
16032c4f | 240 | changed = 0; |
cec3a53c | 241 | port = HCS_N_PORTS(ehci->hcs_params); |
1da177e4 LT |
242 | while (port--) { |
243 | u32 __iomem *reg = &ehci->regs->port_status [port]; | |
083522d7 | 244 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
16032c4f | 245 | u32 t2 = t1 & ~PORT_WAKE_BITS; |
1da177e4 | 246 | |
8c03356a | 247 | /* keep track of which ports we suspend */ |
383975d7 AS |
248 | if (t1 & PORT_OWNER) |
249 | set_bit(port, &ehci->owned_ports); | |
250 | else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) { | |
1da177e4 | 251 | t2 |= PORT_SUSPEND; |
8c03356a AS |
252 | set_bit(port, &ehci->bus_suspended); |
253 | } | |
254 | ||
16032c4f | 255 | /* enable remote wakeup on all ports, if told to do so */ |
331ac6b2 AD |
256 | if (hcd->self.root_hub->do_remote_wakeup) { |
257 | /* only enable appropriate wake bits, otherwise the | |
258 | * hardware can not go phy low power mode. If a race | |
259 | * condition happens here(connection change during bits | |
260 | * set), the port change detection will finally fix it. | |
261 | */ | |
16032c4f | 262 | if (t1 & PORT_CONNECT) |
331ac6b2 | 263 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; |
16032c4f | 264 | else |
331ac6b2 | 265 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; |
16032c4f | 266 | } |
1da177e4 LT |
267 | |
268 | if (t1 != t2) { | |
269 | ehci_vdbg (ehci, "port %d, %08x -> %08x\n", | |
270 | port + 1, t1, t2); | |
083522d7 | 271 | ehci_writel(ehci, t2, reg); |
16032c4f AS |
272 | changed = 1; |
273 | } | |
274 | } | |
331ac6b2 | 275 | |
16032c4f AS |
276 | if (changed && ehci->has_hostpc) { |
277 | spin_unlock_irq(&ehci->lock); | |
278 | msleep(5); /* 5 ms for HCD to enter low-power mode */ | |
279 | spin_lock_irq(&ehci->lock); | |
280 | ||
281 | port = HCS_N_PORTS(ehci->hcs_params); | |
282 | while (port--) { | |
a46af4eb | 283 | u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port]; |
16032c4f AS |
284 | u32 t3; |
285 | ||
16032c4f AS |
286 | t3 = ehci_readl(ehci, hostpc_reg); |
287 | ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg); | |
288 | t3 = ehci_readl(ehci, hostpc_reg); | |
289 | ehci_dbg(ehci, "Port %d phy low-power mode %s\n", | |
331ac6b2 AD |
290 | port, (t3 & HOSTPC_PHCD) ? |
291 | "succeeded" : "failed"); | |
1da177e4 LT |
292 | } |
293 | } | |
294 | ||
cd930c93 AS |
295 | /* Apparently some devices need a >= 1-uframe delay here */ |
296 | if (ehci->bus_suspended) | |
297 | udelay(150); | |
298 | ||
1da177e4 LT |
299 | /* turn off now-idle HC */ |
300 | ehci_halt (ehci); | |
e8799906 | 301 | ehci->rh_state = EHCI_RH_SUSPENDED; |
1da177e4 | 302 | |
99ac5b1e | 303 | if (ehci->async_unlink) |
cdc647a9 | 304 | end_unlink_async(ehci); |
df202255 | 305 | ehci_handle_intr_unlinks(ehci); |
cdc647a9 | 306 | |
8c03356a AS |
307 | /* allow remote wakeup */ |
308 | mask = INTR_MASK; | |
58a97ffe | 309 | if (!hcd->self.root_hub->do_remote_wakeup) |
8c03356a | 310 | mask &= ~STS_PCD; |
083522d7 BH |
311 | ehci_writel(ehci, mask, &ehci->regs->intr_enable); |
312 | ehci_readl(ehci, &ehci->regs->intr_enable); | |
8c03356a | 313 | |
1da177e4 | 314 | ehci->next_statechange = jiffies + msecs_to_jiffies(10); |
d58b4bcc AS |
315 | ehci->enabled_hrtimer_events = 0; |
316 | ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT; | |
1da177e4 | 317 | spin_unlock_irq (&ehci->lock); |
015798b2 JH |
318 | |
319 | /* ehci_work() may have re-enabled the watchdog timer, which we do not | |
320 | * want, and so we must delete any pending watchdog timer events. | |
321 | */ | |
322 | del_timer_sync(&ehci->watchdog); | |
d58b4bcc | 323 | hrtimer_cancel(&ehci->hrtimer); |
1da177e4 LT |
324 | return 0; |
325 | } | |
326 | ||
327 | ||
328 | /* caller has locked the root hub, and should reset/reinit on error */ | |
0c0382e3 | 329 | static int ehci_bus_resume (struct usb_hcd *hcd) |
1da177e4 LT |
330 | { |
331 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
332 | u32 temp; | |
383975d7 | 333 | u32 power_okay; |
1da177e4 | 334 | int i; |
d0f2fb25 | 335 | unsigned long resume_needed = 0; |
1da177e4 LT |
336 | |
337 | if (time_before (jiffies, ehci->next_statechange)) | |
338 | msleep(5); | |
339 | spin_lock_irq (&ehci->lock); | |
541c7d43 | 340 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
cfa59dab AS |
341 | spin_unlock_irq(&ehci->lock); |
342 | return -ESHUTDOWN; | |
343 | } | |
1da177e4 | 344 | |
ad45f1dc | 345 | if (unlikely(ehci->debug)) { |
872d3599 | 346 | if (!dbgp_reset_prep()) |
ad45f1dc JW |
347 | ehci->debug = NULL; |
348 | else | |
349 | dbgp_external_startup(); | |
350 | } | |
351 | ||
f03c17fc DB |
352 | /* Ideally and we've got a real resume here, and no port's power |
353 | * was lost. (For PCI, that means Vaux was maintained.) But we | |
354 | * could instead be restoring a swsusp snapshot -- so that BIOS was | |
355 | * the last user of the controller, not reset/pm hardware keeping | |
356 | * state we gave to it. | |
357 | */ | |
383975d7 AS |
358 | power_okay = ehci_readl(ehci, &ehci->regs->intr_enable); |
359 | ehci_dbg(ehci, "resume root hub%s\n", | |
360 | power_okay ? "" : " after power loss"); | |
f03c17fc | 361 | |
8c03356a AS |
362 | /* at least some APM implementations will try to deliver |
363 | * IRQs right away, so delay them until we're ready. | |
364 | */ | |
083522d7 | 365 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
8c03356a AS |
366 | |
367 | /* re-init operational registers */ | |
083522d7 BH |
368 | ehci_writel(ehci, 0, &ehci->regs->segment); |
369 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); | |
370 | ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next); | |
1da177e4 LT |
371 | |
372 | /* restore CMD_RUN, framelist size, and irq threshold */ | |
3d9545cc | 373 | ehci->command |= CMD_RUN; |
083522d7 | 374 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
e8799906 | 375 | ehci->rh_state = EHCI_RH_RUNNING; |
1da177e4 | 376 | |
e198a314 AS |
377 | /* Some controller/firmware combinations need a delay during which |
378 | * they set up the port statuses. See Bugzilla #8190. */ | |
3a4e72cb VP |
379 | spin_unlock_irq(&ehci->lock); |
380 | msleep(8); | |
381 | spin_lock_irq(&ehci->lock); | |
e198a314 | 382 | |
16032c4f AS |
383 | /* clear phy low-power mode before resume */ |
384 | if (ehci->bus_suspended && ehci->has_hostpc) { | |
385 | i = HCS_N_PORTS(ehci->hcs_params); | |
386 | while (i--) { | |
387 | if (test_bit(i, &ehci->bus_suspended)) { | |
a46af4eb AS |
388 | u32 __iomem *hostpc_reg = |
389 | &ehci->regs->hostpc[i]; | |
16032c4f | 390 | |
16032c4f AS |
391 | temp = ehci_readl(ehci, hostpc_reg); |
392 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, | |
393 | hostpc_reg); | |
394 | } | |
395 | } | |
396 | spin_unlock_irq(&ehci->lock); | |
397 | msleep(5); | |
398 | spin_lock_irq(&ehci->lock); | |
399 | } | |
400 | ||
8c03356a | 401 | /* manually resume the ports we suspended during bus_suspend() */ |
1da177e4 LT |
402 | i = HCS_N_PORTS (ehci->hcs_params); |
403 | while (i--) { | |
083522d7 | 404 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
58a97ffe | 405 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
8c03356a | 406 | if (test_bit(i, &ehci->bus_suspended) && |
3a4e72cb | 407 | (temp & PORT_SUSPEND)) { |
1da177e4 | 408 | temp |= PORT_RESUME; |
d0f2fb25 | 409 | set_bit(i, &resume_needed); |
3a4e72cb | 410 | } |
083522d7 | 411 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
1da177e4 | 412 | } |
3a4e72cb VP |
413 | |
414 | /* msleep for 20ms only if code is trying to resume port */ | |
415 | if (resume_needed) { | |
416 | spin_unlock_irq(&ehci->lock); | |
417 | msleep(20); | |
418 | spin_lock_irq(&ehci->lock); | |
419 | } | |
420 | ||
1da177e4 | 421 | i = HCS_N_PORTS (ehci->hcs_params); |
1da177e4 | 422 | while (i--) { |
083522d7 | 423 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
d0f2fb25 | 424 | if (test_bit(i, &resume_needed)) { |
8c03356a | 425 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); |
083522d7 | 426 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
8c03356a AS |
427 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); |
428 | } | |
1da177e4 | 429 | } |
1da177e4 LT |
430 | |
431 | ehci->next_statechange = jiffies + msecs_to_jiffies(5); | |
1da177e4 LT |
432 | |
433 | /* Now we can safely re-enable irqs */ | |
083522d7 | 434 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); |
15be105b | 435 | (void) ehci_readl(ehci, &ehci->regs->intr_enable); |
1da177e4 LT |
436 | |
437 | spin_unlock_irq (&ehci->lock); | |
3bb1af52 | 438 | ehci_handover_companion_ports(ehci); |
1da177e4 LT |
439 | return 0; |
440 | } | |
441 | ||
442 | #else | |
443 | ||
0c0382e3 AS |
444 | #define ehci_bus_suspend NULL |
445 | #define ehci_bus_resume NULL | |
1da177e4 LT |
446 | |
447 | #endif /* CONFIG_PM */ | |
448 | ||
57e06c11 AS |
449 | /*-------------------------------------------------------------------------*/ |
450 | ||
57e06c11 | 451 | /* |
90da096e | 452 | * Sets the owner of a port |
57e06c11 | 453 | */ |
90da096e | 454 | static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) |
57e06c11 | 455 | { |
57e06c11 AS |
456 | u32 __iomem *status_reg; |
457 | u32 port_status; | |
90da096e | 458 | int try; |
57e06c11 | 459 | |
90da096e | 460 | status_reg = &ehci->regs->port_status[portnum]; |
57e06c11 AS |
461 | |
462 | /* | |
463 | * The controller won't set the OWNER bit if the port is | |
464 | * enabled, so this loop will sometimes require at least two | |
465 | * iterations: one to disable the port and one to set OWNER. | |
466 | */ | |
57e06c11 AS |
467 | for (try = 4; try > 0; --try) { |
468 | spin_lock_irq(&ehci->lock); | |
469 | port_status = ehci_readl(ehci, status_reg); | |
470 | if ((port_status & PORT_OWNER) == new_owner | |
471 | || (port_status & (PORT_OWNER | PORT_CONNECT)) | |
472 | == 0) | |
473 | try = 0; | |
474 | else { | |
475 | port_status ^= PORT_OWNER; | |
476 | port_status &= ~(PORT_PE | PORT_RWC_BITS); | |
477 | ehci_writel(ehci, port_status, status_reg); | |
478 | } | |
479 | spin_unlock_irq(&ehci->lock); | |
480 | if (try > 1) | |
481 | msleep(5); | |
482 | } | |
90da096e BR |
483 | } |
484 | ||
1da177e4 LT |
485 | /*-------------------------------------------------------------------------*/ |
486 | ||
487 | static int check_reset_complete ( | |
488 | struct ehci_hcd *ehci, | |
489 | int index, | |
e6316565 | 490 | u32 __iomem *status_reg, |
1da177e4 LT |
491 | int port_status |
492 | ) { | |
cd4cdc93 | 493 | if (!(port_status & PORT_CONNECT)) |
1da177e4 | 494 | return port_status; |
1da177e4 LT |
495 | |
496 | /* if reset finished and it's still not enabled -- handoff */ | |
497 | if (!(port_status & PORT_PE)) { | |
498 | ||
499 | /* with integrated TT, there's nobody to hand it to! */ | |
500 | if (ehci_is_TDI(ehci)) { | |
501 | ehci_dbg (ehci, | |
502 | "Failed to enable port %d on root hub TT\n", | |
503 | index+1); | |
504 | return port_status; | |
505 | } | |
506 | ||
507 | ehci_dbg (ehci, "port %d full speed --> companion\n", | |
508 | index + 1); | |
509 | ||
510 | // what happens if HCS_N_CC(params) == 0 ? | |
511 | port_status |= PORT_OWNER; | |
10f6524a | 512 | port_status &= ~PORT_RWC_BITS; |
e6316565 | 513 | ehci_writel(ehci, port_status, status_reg); |
1da177e4 | 514 | |
796bcae7 VB |
515 | /* ensure 440EPX ohci controller state is operational */ |
516 | if (ehci->has_amcc_usb23) | |
517 | set_ohci_hcfs(ehci, 1); | |
518 | } else { | |
0ca7eb23 PC |
519 | ehci_dbg(ehci, "port %d reset complete, port enabled\n", |
520 | index + 1); | |
796bcae7 VB |
521 | /* ensure 440EPx ohci controller state is suspended */ |
522 | if (ehci->has_amcc_usb23) | |
523 | set_ohci_hcfs(ehci, 0); | |
524 | } | |
1da177e4 LT |
525 | |
526 | return port_status; | |
527 | } | |
528 | ||
529 | /*-------------------------------------------------------------------------*/ | |
530 | ||
531 | ||
532 | /* build "status change" packet (one or two bytes) from HC registers */ | |
533 | ||
534 | static int | |
535 | ehci_hub_status_data (struct usb_hcd *hcd, char *buf) | |
536 | { | |
537 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
a448e4dc | 538 | u32 temp, status; |
93f1a47c | 539 | u32 mask; |
1da177e4 LT |
540 | int ports, i, retval = 1; |
541 | unsigned long flags; | |
5a9cdf33 | 542 | u32 ppcd = 0; |
1da177e4 | 543 | |
1da177e4 LT |
544 | /* init status to no-changes */ |
545 | buf [0] = 0; | |
546 | ports = HCS_N_PORTS (ehci->hcs_params); | |
547 | if (ports > 7) { | |
548 | buf [1] = 0; | |
549 | retval++; | |
550 | } | |
53bd6a60 | 551 | |
a448e4dc AS |
552 | /* Inform the core about resumes-in-progress by returning |
553 | * a non-zero value even if there are no status changes. | |
554 | */ | |
555 | status = ehci->resuming_ports; | |
556 | ||
93f1a47c DB |
557 | /* Some boards (mostly VIA?) report bogus overcurrent indications, |
558 | * causing massive log spam unless we completely ignore them. It | |
3a4fa0a2 | 559 | * may be relevant that VIA VT8235 controllers, where PORT_POWER is |
93f1a47c DB |
560 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to |
561 | * PORT_POWER; that's surprising, but maybe within-spec. | |
562 | */ | |
563 | if (!ignore_oc) | |
564 | mask = PORT_CSC | PORT_PEC | PORT_OCC; | |
565 | else | |
566 | mask = PORT_CSC | PORT_PEC; | |
567 | // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND | |
568 | ||
1da177e4 LT |
569 | /* no hub change reports (bit 0) for now (power, ...) */ |
570 | ||
571 | /* port N changes (bit N)? */ | |
572 | spin_lock_irqsave (&ehci->lock, flags); | |
5a9cdf33 AD |
573 | |
574 | /* get per-port change detect bits */ | |
575 | if (ehci->has_ppcd) | |
576 | ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16; | |
577 | ||
1da177e4 | 578 | for (i = 0; i < ports; i++) { |
5a9cdf33 AD |
579 | /* leverage per-port change bits feature */ |
580 | if (ehci->has_ppcd && !(ppcd & (1 << i))) | |
581 | continue; | |
083522d7 | 582 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
625b5c9a AS |
583 | |
584 | /* | |
585 | * Return status information even for ports with OWNER set. | |
586 | * Otherwise khubd wouldn't see the disconnect event when a | |
587 | * high-speed device is switched over to the companion | |
588 | * controller by the user. | |
589 | */ | |
590 | ||
eafe5b99 AS |
591 | if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) |
592 | || (ehci->reset_done[i] && time_after_eq( | |
593 | jiffies, ehci->reset_done[i]))) { | |
1da177e4 LT |
594 | if (i < 7) |
595 | buf [0] |= 1 << (i + 1); | |
596 | else | |
597 | buf [1] |= 1 << (i - 7); | |
598 | status = STS_PCD; | |
599 | } | |
600 | } | |
601 | /* FIXME autosuspend idle root hubs */ | |
602 | spin_unlock_irqrestore (&ehci->lock, flags); | |
603 | return status ? retval : 0; | |
604 | } | |
605 | ||
606 | /*-------------------------------------------------------------------------*/ | |
607 | ||
608 | static void | |
609 | ehci_hub_descriptor ( | |
610 | struct ehci_hcd *ehci, | |
611 | struct usb_hub_descriptor *desc | |
612 | ) { | |
613 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
614 | u16 temp; | |
615 | ||
616 | desc->bDescriptorType = 0x29; | |
617 | desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */ | |
618 | desc->bHubContrCurrent = 0; | |
619 | ||
620 | desc->bNbrPorts = ports; | |
621 | temp = 1 + (ports / 8); | |
622 | desc->bDescLength = 7 + 2 * temp; | |
623 | ||
624 | /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ | |
dbe79bbe JY |
625 | memset(&desc->u.hs.DeviceRemovable[0], 0, temp); |
626 | memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); | |
1da177e4 LT |
627 | |
628 | temp = 0x0008; /* per-port overcurrent reporting */ | |
629 | if (HCS_PPC (ehci->hcs_params)) | |
630 | temp |= 0x0001; /* per-port power control */ | |
56c1e26d DB |
631 | else |
632 | temp |= 0x0002; /* no power switching */ | |
1da177e4 LT |
633 | #if 0 |
634 | // re-enable when we support USB_PORT_FEAT_INDICATOR below. | |
635 | if (HCS_INDICATOR (ehci->hcs_params)) | |
636 | temp |= 0x0080; /* per-port indicators (LEDs) */ | |
637 | #endif | |
fd05e720 | 638 | desc->wHubCharacteristics = cpu_to_le16(temp); |
1da177e4 LT |
639 | } |
640 | ||
641 | /*-------------------------------------------------------------------------*/ | |
642 | ||
1da177e4 LT |
643 | static int ehci_hub_control ( |
644 | struct usb_hcd *hcd, | |
645 | u16 typeReq, | |
646 | u16 wValue, | |
647 | u16 wIndex, | |
648 | char *buf, | |
649 | u16 wLength | |
650 | ) { | |
651 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
652 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
383975d7 AS |
653 | u32 __iomem *status_reg = &ehci->regs->port_status[ |
654 | (wIndex & 0xff) - 1]; | |
a46af4eb | 655 | u32 __iomem *hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1]; |
331ac6b2 | 656 | u32 temp, temp1, status; |
1da177e4 LT |
657 | unsigned long flags; |
658 | int retval = 0; | |
f0d7f273 | 659 | unsigned selector; |
1da177e4 LT |
660 | |
661 | /* | |
662 | * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. | |
663 | * HCS_INDICATOR may say we can change LEDs to off/amber/green. | |
664 | * (track current state ourselves) ... blink for diagnostics, | |
665 | * power, "this is the one", etc. EHCI spec supports this. | |
666 | */ | |
667 | ||
668 | spin_lock_irqsave (&ehci->lock, flags); | |
669 | switch (typeReq) { | |
670 | case ClearHubFeature: | |
671 | switch (wValue) { | |
672 | case C_HUB_LOCAL_POWER: | |
673 | case C_HUB_OVER_CURRENT: | |
674 | /* no hub-wide feature/status flags */ | |
675 | break; | |
676 | default: | |
677 | goto error; | |
678 | } | |
679 | break; | |
680 | case ClearPortFeature: | |
681 | if (!wIndex || wIndex > ports) | |
682 | goto error; | |
683 | wIndex--; | |
e6316565 | 684 | temp = ehci_readl(ehci, status_reg); |
6d5f89c7 | 685 | temp &= ~PORT_RWC_BITS; |
625b5c9a AS |
686 | |
687 | /* | |
688 | * Even if OWNER is set, so the port is owned by the | |
689 | * companion controller, khubd needs to be able to clear | |
690 | * the port-change status bits (especially | |
749da5f8 | 691 | * USB_PORT_STAT_C_CONNECTION). |
625b5c9a | 692 | */ |
1da177e4 LT |
693 | |
694 | switch (wValue) { | |
695 | case USB_PORT_FEAT_ENABLE: | |
e6316565 | 696 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); |
1da177e4 LT |
697 | break; |
698 | case USB_PORT_FEAT_C_ENABLE: | |
6d5f89c7 | 699 | ehci_writel(ehci, temp | PORT_PEC, status_reg); |
1da177e4 LT |
700 | break; |
701 | case USB_PORT_FEAT_SUSPEND: | |
702 | if (temp & PORT_RESET) | |
703 | goto error; | |
f8aeb3bb DB |
704 | if (ehci->no_selective_suspend) |
705 | break; | |
83722bc9 AG |
706 | #ifdef CONFIG_USB_OTG |
707 | if ((hcd->self.otg_port == (wIndex + 1)) | |
708 | && hcd->self.b_hnp_enable) { | |
c2e935a7 | 709 | otg_start_hnp(hcd->phy->otg); |
83722bc9 AG |
710 | break; |
711 | } | |
712 | #endif | |
16032c4f AS |
713 | if (!(temp & PORT_SUSPEND)) |
714 | break; | |
715 | if ((temp & PORT_PE) == 0) | |
716 | goto error; | |
717 | ||
718 | /* clear phy low-power mode before resume */ | |
a46af4eb | 719 | if (ehci->has_hostpc) { |
16032c4f AS |
720 | temp1 = ehci_readl(ehci, hostpc_reg); |
721 | ehci_writel(ehci, temp1 & ~HOSTPC_PHCD, | |
eab80de0 | 722 | hostpc_reg); |
16032c4f AS |
723 | spin_unlock_irqrestore(&ehci->lock, flags); |
724 | msleep(5);/* wait to leave low-power mode */ | |
725 | spin_lock_irqsave(&ehci->lock, flags); | |
1da177e4 | 726 | } |
16032c4f | 727 | /* resume signaling for 20 msec */ |
6d5f89c7 | 728 | temp &= ~PORT_WAKE_BITS; |
16032c4f AS |
729 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
730 | ehci->reset_done[wIndex] = jiffies | |
731 | + msecs_to_jiffies(20); | |
1da177e4 LT |
732 | break; |
733 | case USB_PORT_FEAT_C_SUSPEND: | |
d1f114d1 | 734 | clear_bit(wIndex, &ehci->port_c_suspend); |
1da177e4 LT |
735 | break; |
736 | case USB_PORT_FEAT_POWER: | |
737 | if (HCS_PPC (ehci->hcs_params)) | |
6d5f89c7 SW |
738 | ehci_writel(ehci, temp & ~PORT_POWER, |
739 | status_reg); | |
1da177e4 LT |
740 | break; |
741 | case USB_PORT_FEAT_C_CONNECTION: | |
48f24970 AD |
742 | if (ehci->has_lpm) { |
743 | /* clear PORTSC bits on disconnect */ | |
744 | temp &= ~PORT_LPM; | |
745 | temp &= ~PORT_DEV_ADDR; | |
746 | } | |
6d5f89c7 | 747 | ehci_writel(ehci, temp | PORT_CSC, status_reg); |
1da177e4 LT |
748 | break; |
749 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
6d5f89c7 | 750 | ehci_writel(ehci, temp | PORT_OCC, status_reg); |
1da177e4 LT |
751 | break; |
752 | case USB_PORT_FEAT_C_RESET: | |
753 | /* GetPortStatus clears reset */ | |
754 | break; | |
755 | default: | |
756 | goto error; | |
757 | } | |
083522d7 | 758 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ |
1da177e4 LT |
759 | break; |
760 | case GetHubDescriptor: | |
761 | ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *) | |
762 | buf); | |
763 | break; | |
764 | case GetHubStatus: | |
765 | /* no hub-wide feature/status flags */ | |
766 | memset (buf, 0, 4); | |
767 | //cpu_to_le32s ((u32 *) buf); | |
768 | break; | |
769 | case GetPortStatus: | |
770 | if (!wIndex || wIndex > ports) | |
771 | goto error; | |
772 | wIndex--; | |
773 | status = 0; | |
e6316565 | 774 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
775 | |
776 | // wPortChange bits | |
777 | if (temp & PORT_CSC) | |
749da5f8 | 778 | status |= USB_PORT_STAT_C_CONNECTION << 16; |
1da177e4 | 779 | if (temp & PORT_PEC) |
749da5f8 | 780 | status |= USB_PORT_STAT_C_ENABLE << 16; |
756aa6b3 CE |
781 | |
782 | if ((temp & PORT_OCC) && !ignore_oc){ | |
749da5f8 | 783 | status |= USB_PORT_STAT_C_OVERCURRENT << 16; |
1da177e4 | 784 | |
756aa6b3 CE |
785 | /* |
786 | * Hubs should disable port power on over-current. | |
787 | * However, not all EHCI implementations do this | |
788 | * automatically, even if they _do_ support per-port | |
789 | * power switching; they're allowed to just limit the | |
790 | * current. khubd will turn the power back on. | |
791 | */ | |
81463c1d | 792 | if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { |
756aa6b3 CE |
793 | ehci_writel(ehci, |
794 | temp & ~(PORT_RWC_BITS | PORT_POWER), | |
795 | status_reg); | |
81463c1d | 796 | temp = ehci_readl(ehci, status_reg); |
756aa6b3 CE |
797 | } |
798 | } | |
799 | ||
1da177e4 | 800 | /* whoever resumes must GetPortStatus to complete it!! */ |
629e4427 AS |
801 | if (temp & PORT_RESUME) { |
802 | ||
803 | /* Remote Wakeup received? */ | |
804 | if (!ehci->reset_done[wIndex]) { | |
805 | /* resume signaling for 20 msec */ | |
806 | ehci->reset_done[wIndex] = jiffies | |
807 | + msecs_to_jiffies(20); | |
808 | /* check the port again */ | |
809 | mod_timer(&ehci_to_hcd(ehci)->rh_timer, | |
810 | ehci->reset_done[wIndex]); | |
811 | } | |
1da177e4 | 812 | |
629e4427 AS |
813 | /* resume completed? */ |
814 | else if (time_after_eq(jiffies, | |
815 | ehci->reset_done[wIndex])) { | |
eafe5b99 | 816 | clear_bit(wIndex, &ehci->suspended_ports); |
d1f114d1 | 817 | set_bit(wIndex, &ehci->port_c_suspend); |
629e4427 AS |
818 | ehci->reset_done[wIndex] = 0; |
819 | ||
820 | /* stop resume signaling */ | |
821 | temp = ehci_readl(ehci, status_reg); | |
822 | ehci_writel(ehci, | |
e6316565 AS |
823 | temp & ~(PORT_RWC_BITS | PORT_RESUME), |
824 | status_reg); | |
a448e4dc | 825 | clear_bit(wIndex, &ehci->resuming_ports); |
629e4427 | 826 | retval = handshake(ehci, status_reg, |
083522d7 | 827 | PORT_RESUME, 0, 2000 /* 2msec */); |
629e4427 AS |
828 | if (retval != 0) { |
829 | ehci_err(ehci, | |
830 | "port %d resume error %d\n", | |
831 | wIndex + 1, retval); | |
832 | goto error; | |
833 | } | |
834 | temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); | |
1da177e4 | 835 | } |
1da177e4 LT |
836 | } |
837 | ||
838 | /* whoever resets must GetPortStatus to complete it!! */ | |
839 | if ((temp & PORT_RESET) | |
629e4427 AS |
840 | && time_after_eq(jiffies, |
841 | ehci->reset_done[wIndex])) { | |
749da5f8 | 842 | status |= USB_PORT_STAT_C_RESET << 16; |
1da177e4 | 843 | ehci->reset_done [wIndex] = 0; |
a448e4dc | 844 | clear_bit(wIndex, &ehci->resuming_ports); |
1da177e4 LT |
845 | |
846 | /* force reset to complete */ | |
083522d7 | 847 | ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET), |
e6316565 | 848 | status_reg); |
c22fa3ac DB |
849 | /* REVISIT: some hardware needs 550+ usec to clear |
850 | * this bit; seems too long to spin routinely... | |
851 | */ | |
e6316565 | 852 | retval = handshake(ehci, status_reg, |
6307e096 | 853 | PORT_RESET, 0, 1000); |
1da177e4 LT |
854 | if (retval != 0) { |
855 | ehci_err (ehci, "port %d reset error %d\n", | |
856 | wIndex + 1, retval); | |
857 | goto error; | |
858 | } | |
859 | ||
860 | /* see what we found out */ | |
e6316565 AS |
861 | temp = check_reset_complete (ehci, wIndex, status_reg, |
862 | ehci_readl(ehci, status_reg)); | |
1da177e4 LT |
863 | } |
864 | ||
a448e4dc | 865 | if (!(temp & (PORT_RESUME|PORT_RESET))) { |
eafe5b99 | 866 | ehci->reset_done[wIndex] = 0; |
a448e4dc AS |
867 | clear_bit(wIndex, &ehci->resuming_ports); |
868 | } | |
eafe5b99 | 869 | |
57e06c11 AS |
870 | /* transfer dedicated ports to the companion hc */ |
871 | if ((temp & PORT_CONNECT) && | |
872 | test_bit(wIndex, &ehci->companion_ports)) { | |
873 | temp &= ~PORT_RWC_BITS; | |
874 | temp |= PORT_OWNER; | |
875 | ehci_writel(ehci, temp, status_reg); | |
876 | ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1); | |
877 | temp = ehci_readl(ehci, status_reg); | |
878 | } | |
879 | ||
625b5c9a AS |
880 | /* |
881 | * Even if OWNER is set, there's no harm letting khubd | |
882 | * see the wPortStatus values (they should all be 0 except | |
883 | * for PORT_POWER anyway). | |
884 | */ | |
885 | ||
886 | if (temp & PORT_CONNECT) { | |
749da5f8 | 887 | status |= USB_PORT_STAT_CONNECTION; |
625b5c9a | 888 | // status may be from integrated TT |
331ac6b2 AD |
889 | if (ehci->has_hostpc) { |
890 | temp1 = ehci_readl(ehci, hostpc_reg); | |
891 | status |= ehci_port_speed(ehci, temp1); | |
892 | } else | |
893 | status |= ehci_port_speed(ehci, temp); | |
1da177e4 | 894 | } |
625b5c9a | 895 | if (temp & PORT_PE) |
749da5f8 | 896 | status |= USB_PORT_STAT_ENABLE; |
eafe5b99 AS |
897 | |
898 | /* maybe the port was unsuspended without our knowledge */ | |
899 | if (temp & (PORT_SUSPEND|PORT_RESUME)) { | |
749da5f8 | 900 | status |= USB_PORT_STAT_SUSPEND; |
eafe5b99 AS |
901 | } else if (test_bit(wIndex, &ehci->suspended_ports)) { |
902 | clear_bit(wIndex, &ehci->suspended_ports); | |
a448e4dc | 903 | clear_bit(wIndex, &ehci->resuming_ports); |
eafe5b99 AS |
904 | ehci->reset_done[wIndex] = 0; |
905 | if (temp & PORT_PE) | |
906 | set_bit(wIndex, &ehci->port_c_suspend); | |
907 | } | |
908 | ||
625b5c9a | 909 | if (temp & PORT_OC) |
749da5f8 | 910 | status |= USB_PORT_STAT_OVERCURRENT; |
625b5c9a | 911 | if (temp & PORT_RESET) |
749da5f8 | 912 | status |= USB_PORT_STAT_RESET; |
625b5c9a | 913 | if (temp & PORT_POWER) |
749da5f8 | 914 | status |= USB_PORT_STAT_POWER; |
d1f114d1 | 915 | if (test_bit(wIndex, &ehci->port_c_suspend)) |
749da5f8 | 916 | status |= USB_PORT_STAT_C_SUSPEND << 16; |
1da177e4 | 917 | |
9776afc8 | 918 | #ifndef VERBOSE_DEBUG |
1da177e4 LT |
919 | if (status & ~0xffff) /* only if wPortChange is interesting */ |
920 | #endif | |
921 | dbg_port (ehci, "GetStatus", wIndex + 1, temp); | |
a5abdeaf | 922 | put_unaligned_le32(status, buf); |
1da177e4 LT |
923 | break; |
924 | case SetHubFeature: | |
925 | switch (wValue) { | |
926 | case C_HUB_LOCAL_POWER: | |
927 | case C_HUB_OVER_CURRENT: | |
928 | /* no hub-wide feature/status flags */ | |
929 | break; | |
930 | default: | |
931 | goto error; | |
932 | } | |
933 | break; | |
934 | case SetPortFeature: | |
f0d7f273 DB |
935 | selector = wIndex >> 8; |
936 | wIndex &= 0xff; | |
8d053c79 JW |
937 | if (unlikely(ehci->debug)) { |
938 | /* If the debug port is active any port | |
939 | * feature requests should get denied */ | |
940 | if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) && | |
941 | (readl(&ehci->debug->control) & DBGP_ENABLED)) { | |
942 | retval = -ENODEV; | |
943 | goto error_exit; | |
944 | } | |
945 | } | |
1da177e4 LT |
946 | if (!wIndex || wIndex > ports) |
947 | goto error; | |
948 | wIndex--; | |
e6316565 | 949 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
950 | if (temp & PORT_OWNER) |
951 | break; | |
952 | ||
10f6524a | 953 | temp &= ~PORT_RWC_BITS; |
1da177e4 LT |
954 | switch (wValue) { |
955 | case USB_PORT_FEAT_SUSPEND: | |
f8aeb3bb DB |
956 | if (ehci->no_selective_suspend) |
957 | break; | |
1da177e4 LT |
958 | if ((temp & PORT_PE) == 0 |
959 | || (temp & PORT_RESET) != 0) | |
960 | goto error; | |
b9df7942 | 961 | |
331ac6b2 AD |
962 | /* After above check the port must be connected. |
963 | * Set appropriate bit thus could put phy into low power | |
964 | * mode if we have hostpc feature | |
965 | */ | |
b9df7942 AD |
966 | temp &= ~PORT_WKCONN_E; |
967 | temp |= PORT_WKDISC_E | PORT_WKOC_E; | |
968 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); | |
a46af4eb | 969 | if (ehci->has_hostpc) { |
b9df7942 | 970 | spin_unlock_irqrestore(&ehci->lock, flags); |
331ac6b2 | 971 | msleep(5);/* 5ms for HCD enter low pwr mode */ |
b9df7942 | 972 | spin_lock_irqsave(&ehci->lock, flags); |
331ac6b2 AD |
973 | temp1 = ehci_readl(ehci, hostpc_reg); |
974 | ehci_writel(ehci, temp1 | HOSTPC_PHCD, | |
975 | hostpc_reg); | |
976 | temp1 = ehci_readl(ehci, hostpc_reg); | |
977 | ehci_dbg(ehci, "Port%d phy low pwr mode %s\n", | |
978 | wIndex, (temp1 & HOSTPC_PHCD) ? | |
979 | "succeeded" : "failed"); | |
980 | } | |
eafe5b99 | 981 | set_bit(wIndex, &ehci->suspended_ports); |
1da177e4 LT |
982 | break; |
983 | case USB_PORT_FEAT_POWER: | |
984 | if (HCS_PPC (ehci->hcs_params)) | |
083522d7 | 985 | ehci_writel(ehci, temp | PORT_POWER, |
e6316565 | 986 | status_reg); |
1da177e4 LT |
987 | break; |
988 | case USB_PORT_FEAT_RESET: | |
989 | if (temp & PORT_RESUME) | |
990 | goto error; | |
991 | /* line status bits may report this as low speed, | |
992 | * which can be fine if this root hub has a | |
993 | * transaction translator built in. | |
994 | */ | |
995 | if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT | |
996 | && !ehci_is_TDI(ehci) | |
997 | && PORT_USB11 (temp)) { | |
998 | ehci_dbg (ehci, | |
999 | "port %d low speed --> companion\n", | |
1000 | wIndex + 1); | |
1001 | temp |= PORT_OWNER; | |
1002 | } else { | |
1003 | ehci_vdbg (ehci, "port %d reset\n", wIndex + 1); | |
1004 | temp |= PORT_RESET; | |
1005 | temp &= ~PORT_PE; | |
1006 | ||
1007 | /* | |
1008 | * caller must wait, then call GetPortStatus | |
1009 | * usb 2.0 spec says 50 ms resets on root | |
1010 | */ | |
1011 | ehci->reset_done [wIndex] = jiffies | |
1012 | + msecs_to_jiffies (50); | |
1013 | } | |
e6316565 | 1014 | ehci_writel(ehci, temp, status_reg); |
1da177e4 | 1015 | break; |
f0d7f273 DB |
1016 | |
1017 | /* For downstream facing ports (these): one hub port is put | |
1018 | * into test mode according to USB2 11.24.2.13, then the hub | |
1019 | * must be reset (which for root hub now means rmmod+modprobe, | |
1020 | * or else system reboot). See EHCI 2.3.9 and 4.14 for info | |
1021 | * about the EHCI-specific stuff. | |
1022 | */ | |
1023 | case USB_PORT_FEAT_TEST: | |
1024 | if (!selector || selector > 5) | |
1025 | goto error; | |
1026 | ehci_quiesce(ehci); | |
77636c86 BT |
1027 | |
1028 | /* Put all enabled ports into suspend */ | |
1029 | while (ports--) { | |
1030 | u32 __iomem *sreg = | |
1031 | &ehci->regs->port_status[ports]; | |
1032 | ||
1033 | temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; | |
1034 | if (temp & PORT_PE) | |
1035 | ehci_writel(ehci, temp | PORT_SUSPEND, | |
1036 | sreg); | |
1037 | } | |
f0d7f273 | 1038 | ehci_halt(ehci); |
77636c86 | 1039 | temp = ehci_readl(ehci, status_reg); |
f0d7f273 | 1040 | temp |= selector << 16; |
e6316565 | 1041 | ehci_writel(ehci, temp, status_reg); |
f0d7f273 DB |
1042 | break; |
1043 | ||
1da177e4 LT |
1044 | default: |
1045 | goto error; | |
1046 | } | |
083522d7 | 1047 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ |
1da177e4 LT |
1048 | break; |
1049 | ||
1050 | default: | |
1051 | error: | |
1052 | /* "stall" on error */ | |
1053 | retval = -EPIPE; | |
1054 | } | |
8d053c79 | 1055 | error_exit: |
1da177e4 LT |
1056 | spin_unlock_irqrestore (&ehci->lock, flags); |
1057 | return retval; | |
1058 | } | |
90da096e | 1059 | |
5407a3c3 FB |
1060 | static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd, |
1061 | int portnum) | |
90da096e BR |
1062 | { |
1063 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1064 | ||
1065 | if (ehci_is_TDI(ehci)) | |
1066 | return; | |
1067 | set_owner(ehci, --portnum, PORT_OWNER); | |
1068 | } | |
1069 | ||
5407a3c3 FB |
1070 | static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd, |
1071 | int portnum) | |
3a31155c AS |
1072 | { |
1073 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1074 | u32 __iomem *reg; | |
1075 | ||
1076 | if (ehci_is_TDI(ehci)) | |
1077 | return 0; | |
1078 | reg = &ehci->regs->port_status[portnum - 1]; | |
1079 | return ehci_readl(ehci, reg) & PORT_OWNER; | |
1080 | } |