Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
d49d4317 | 2 | * Copyright (C) 2001-2004 by David Brownell |
53bd6a60 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | /* this file is part of ehci-hcd.c */ | |
20 | ||
21 | /*-------------------------------------------------------------------------*/ | |
22 | ||
23 | /* | |
24 | * EHCI Root Hub ... the nonsharable stuff | |
25 | * | |
26 | * Registers don't need cpu_to_le32, that happens transparently | |
27 | */ | |
28 | ||
29 | /*-------------------------------------------------------------------------*/ | |
83722bc9 | 30 | #include <linux/usb/otg.h> |
1da177e4 | 31 | |
58a97ffe AS |
32 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
33 | ||
aff6d18f AS |
34 | #ifdef CONFIG_PM |
35 | ||
383975d7 AS |
36 | static int ehci_hub_control( |
37 | struct usb_hcd *hcd, | |
38 | u16 typeReq, | |
39 | u16 wValue, | |
40 | u16 wIndex, | |
41 | char *buf, | |
42 | u16 wLength | |
43 | ); | |
44 | ||
45 | /* After a power loss, ports that were owned by the companion must be | |
46 | * reset so that the companion can still own them. | |
47 | */ | |
48 | static void ehci_handover_companion_ports(struct ehci_hcd *ehci) | |
49 | { | |
50 | u32 __iomem *reg; | |
51 | u32 status; | |
52 | int port; | |
53 | __le32 buf; | |
54 | struct usb_hcd *hcd = ehci_to_hcd(ehci); | |
55 | ||
56 | if (!ehci->owned_ports) | |
57 | return; | |
58 | ||
59 | /* Give the connections some time to appear */ | |
60 | msleep(20); | |
61 | ||
62 | port = HCS_N_PORTS(ehci->hcs_params); | |
63 | while (port--) { | |
64 | if (test_bit(port, &ehci->owned_ports)) { | |
65 | reg = &ehci->regs->port_status[port]; | |
3c519b84 | 66 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
383975d7 AS |
67 | |
68 | /* Port already owned by companion? */ | |
69 | if (status & PORT_OWNER) | |
70 | clear_bit(port, &ehci->owned_ports); | |
3c519b84 AS |
71 | else if (test_bit(port, &ehci->companion_ports)) |
72 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
383975d7 AS |
73 | else |
74 | ehci_hub_control(hcd, SetPortFeature, | |
75 | USB_PORT_FEAT_RESET, port + 1, | |
76 | NULL, 0); | |
77 | } | |
78 | } | |
79 | ||
80 | if (!ehci->owned_ports) | |
81 | return; | |
82 | msleep(90); /* Wait for resets to complete */ | |
83 | ||
84 | port = HCS_N_PORTS(ehci->hcs_params); | |
85 | while (port--) { | |
86 | if (test_bit(port, &ehci->owned_ports)) { | |
87 | ehci_hub_control(hcd, GetPortStatus, | |
88 | 0, port + 1, | |
89 | (char *) &buf, sizeof(buf)); | |
90 | ||
91 | /* The companion should now own the port, | |
92 | * but if something went wrong the port must not | |
93 | * remain enabled. | |
94 | */ | |
95 | reg = &ehci->regs->port_status[port]; | |
96 | status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
97 | if (status & PORT_OWNER) | |
98 | ehci_writel(ehci, status | PORT_CSC, reg); | |
99 | else { | |
100 | ehci_dbg(ehci, "failed handover port %d: %x\n", | |
101 | port + 1, status); | |
102 | ehci_writel(ehci, status & ~PORT_PE, reg); | |
103 | } | |
104 | } | |
105 | } | |
106 | ||
107 | ehci->owned_ports = 0; | |
108 | } | |
109 | ||
5407a3c3 | 110 | static int __maybe_unused ehci_port_change(struct ehci_hcd *ehci) |
294d95f2 MG |
111 | { |
112 | int i = HCS_N_PORTS(ehci->hcs_params); | |
113 | ||
114 | /* First check if the controller indicates a change event */ | |
115 | ||
116 | if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD) | |
117 | return 1; | |
118 | ||
119 | /* | |
120 | * Not all controllers appear to update this while going from D3 to D0, | |
121 | * so check the individual port status registers as well | |
122 | */ | |
123 | ||
124 | while (i--) | |
125 | if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC) | |
126 | return 1; | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
0b0cd6c8 | 131 | static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, |
4147200d | 132 | bool suspending, bool do_wakeup) |
16032c4f AS |
133 | { |
134 | int port; | |
135 | u32 temp; | |
148fc55f | 136 | unsigned long flags; |
16032c4f AS |
137 | |
138 | /* If remote wakeup is enabled for the root hub but disabled | |
139 | * for the controller, we must adjust all the port wakeup flags | |
140 | * when the controller is suspended or resumed. In all other | |
141 | * cases they don't need to be changed. | |
142 | */ | |
4147200d | 143 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) |
16032c4f AS |
144 | return; |
145 | ||
148fc55f YK |
146 | spin_lock_irqsave(&ehci->lock, flags); |
147 | ||
16032c4f AS |
148 | /* clear phy low-power mode before changing wakeup flags */ |
149 | if (ehci->has_hostpc) { | |
150 | port = HCS_N_PORTS(ehci->hcs_params); | |
151 | while (port--) { | |
152 | u32 __iomem *hostpc_reg; | |
153 | ||
154 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
155 | + HOSTPC0 + 4 * port); | |
156 | temp = ehci_readl(ehci, hostpc_reg); | |
157 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); | |
158 | } | |
148fc55f | 159 | spin_unlock_irqrestore(&ehci->lock, flags); |
16032c4f | 160 | msleep(5); |
148fc55f | 161 | spin_lock_irqsave(&ehci->lock, flags); |
16032c4f AS |
162 | } |
163 | ||
164 | port = HCS_N_PORTS(ehci->hcs_params); | |
165 | while (port--) { | |
166 | u32 __iomem *reg = &ehci->regs->port_status[port]; | |
167 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; | |
168 | u32 t2 = t1 & ~PORT_WAKE_BITS; | |
169 | ||
170 | /* If we are suspending the controller, clear the flags. | |
171 | * If we are resuming the controller, set the wakeup flags. | |
172 | */ | |
173 | if (!suspending) { | |
174 | if (t1 & PORT_CONNECT) | |
175 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; | |
176 | else | |
177 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; | |
178 | } | |
179 | ehci_vdbg(ehci, "port %d, %08x -> %08x\n", | |
180 | port + 1, t1, t2); | |
181 | ehci_writel(ehci, t2, reg); | |
182 | } | |
183 | ||
184 | /* enter phy low-power mode again */ | |
185 | if (ehci->has_hostpc) { | |
186 | port = HCS_N_PORTS(ehci->hcs_params); | |
187 | while (port--) { | |
188 | u32 __iomem *hostpc_reg; | |
189 | ||
190 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
191 | + HOSTPC0 + 4 * port); | |
192 | temp = ehci_readl(ehci, hostpc_reg); | |
193 | ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg); | |
194 | } | |
195 | } | |
ee0b9be8 AS |
196 | |
197 | /* Does the root hub have a port wakeup pending? */ | |
294d95f2 | 198 | if (!suspending && ehci_port_change(ehci)) |
ee0b9be8 | 199 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); |
148fc55f YK |
200 | |
201 | spin_unlock_irqrestore(&ehci->lock, flags); | |
16032c4f AS |
202 | } |
203 | ||
0c0382e3 | 204 | static int ehci_bus_suspend (struct usb_hcd *hcd) |
1da177e4 LT |
205 | { |
206 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
207 | int port; | |
8c03356a | 208 | int mask; |
16032c4f | 209 | int changed; |
1da177e4 | 210 | |
8c774fe8 AS |
211 | ehci_dbg(ehci, "suspend root hub\n"); |
212 | ||
1da177e4 LT |
213 | if (time_before (jiffies, ehci->next_statechange)) |
214 | msleep(5); | |
f8fa7571 AS |
215 | del_timer_sync(&ehci->watchdog); |
216 | del_timer_sync(&ehci->iaa_watchdog); | |
1da177e4 | 217 | |
1da177e4 LT |
218 | spin_lock_irq (&ehci->lock); |
219 | ||
cec3a53c AS |
220 | /* Once the controller is stopped, port resumes that are already |
221 | * in progress won't complete. Hence if remote wakeup is enabled | |
222 | * for the root hub and any ports are in the middle of a resume or | |
223 | * remote wakeup, we must fail the suspend. | |
224 | */ | |
225 | if (hcd->self.root_hub->do_remote_wakeup) { | |
226 | port = HCS_N_PORTS(ehci->hcs_params); | |
227 | while (port--) { | |
228 | if (ehci->reset_done[port] != 0) { | |
229 | spin_unlock_irq(&ehci->lock); | |
230 | ehci_dbg(ehci, "suspend failed because " | |
231 | "port %d is resuming\n", | |
232 | port + 1); | |
233 | return -EBUSY; | |
234 | } | |
235 | } | |
236 | } | |
237 | ||
1da177e4 | 238 | /* stop schedules, clean any completed work */ |
e8799906 | 239 | if (ehci->rh_state == EHCI_RH_RUNNING) |
1da177e4 | 240 | ehci_quiesce (ehci); |
083522d7 | 241 | ehci->command = ehci_readl(ehci, &ehci->regs->command); |
7d12e780 | 242 | ehci_work(ehci); |
1da177e4 | 243 | |
8c03356a AS |
244 | /* Unlike other USB host controller types, EHCI doesn't have |
245 | * any notion of "global" or bus-wide suspend. The driver has | |
246 | * to manually suspend all the active unsuspended ports, and | |
247 | * then manually resume them in the bus_resume() routine. | |
248 | */ | |
249 | ehci->bus_suspended = 0; | |
383975d7 | 250 | ehci->owned_ports = 0; |
16032c4f | 251 | changed = 0; |
cec3a53c | 252 | port = HCS_N_PORTS(ehci->hcs_params); |
1da177e4 LT |
253 | while (port--) { |
254 | u32 __iomem *reg = &ehci->regs->port_status [port]; | |
083522d7 | 255 | u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; |
16032c4f | 256 | u32 t2 = t1 & ~PORT_WAKE_BITS; |
1da177e4 | 257 | |
8c03356a | 258 | /* keep track of which ports we suspend */ |
383975d7 AS |
259 | if (t1 & PORT_OWNER) |
260 | set_bit(port, &ehci->owned_ports); | |
261 | else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) { | |
1da177e4 | 262 | t2 |= PORT_SUSPEND; |
8c03356a AS |
263 | set_bit(port, &ehci->bus_suspended); |
264 | } | |
265 | ||
16032c4f | 266 | /* enable remote wakeup on all ports, if told to do so */ |
331ac6b2 AD |
267 | if (hcd->self.root_hub->do_remote_wakeup) { |
268 | /* only enable appropriate wake bits, otherwise the | |
269 | * hardware can not go phy low power mode. If a race | |
270 | * condition happens here(connection change during bits | |
271 | * set), the port change detection will finally fix it. | |
272 | */ | |
16032c4f | 273 | if (t1 & PORT_CONNECT) |
331ac6b2 | 274 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; |
16032c4f | 275 | else |
331ac6b2 | 276 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; |
16032c4f | 277 | } |
1da177e4 LT |
278 | |
279 | if (t1 != t2) { | |
280 | ehci_vdbg (ehci, "port %d, %08x -> %08x\n", | |
281 | port + 1, t1, t2); | |
083522d7 | 282 | ehci_writel(ehci, t2, reg); |
16032c4f AS |
283 | changed = 1; |
284 | } | |
285 | } | |
331ac6b2 | 286 | |
16032c4f AS |
287 | if (changed && ehci->has_hostpc) { |
288 | spin_unlock_irq(&ehci->lock); | |
289 | msleep(5); /* 5 ms for HCD to enter low-power mode */ | |
290 | spin_lock_irq(&ehci->lock); | |
291 | ||
292 | port = HCS_N_PORTS(ehci->hcs_params); | |
293 | while (port--) { | |
294 | u32 __iomem *hostpc_reg; | |
295 | u32 t3; | |
296 | ||
297 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
298 | + HOSTPC0 + 4 * port); | |
299 | t3 = ehci_readl(ehci, hostpc_reg); | |
300 | ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg); | |
301 | t3 = ehci_readl(ehci, hostpc_reg); | |
302 | ehci_dbg(ehci, "Port %d phy low-power mode %s\n", | |
331ac6b2 AD |
303 | port, (t3 & HOSTPC_PHCD) ? |
304 | "succeeded" : "failed"); | |
1da177e4 LT |
305 | } |
306 | } | |
307 | ||
cd930c93 AS |
308 | /* Apparently some devices need a >= 1-uframe delay here */ |
309 | if (ehci->bus_suspended) | |
310 | udelay(150); | |
311 | ||
1da177e4 LT |
312 | /* turn off now-idle HC */ |
313 | ehci_halt (ehci); | |
e8799906 | 314 | ehci->rh_state = EHCI_RH_SUSPENDED; |
1da177e4 | 315 | |
cdc647a9 DB |
316 | if (ehci->reclaim) |
317 | end_unlink_async(ehci); | |
318 | ||
8c03356a AS |
319 | /* allow remote wakeup */ |
320 | mask = INTR_MASK; | |
58a97ffe | 321 | if (!hcd->self.root_hub->do_remote_wakeup) |
8c03356a | 322 | mask &= ~STS_PCD; |
083522d7 BH |
323 | ehci_writel(ehci, mask, &ehci->regs->intr_enable); |
324 | ehci_readl(ehci, &ehci->regs->intr_enable); | |
8c03356a | 325 | |
1da177e4 LT |
326 | ehci->next_statechange = jiffies + msecs_to_jiffies(10); |
327 | spin_unlock_irq (&ehci->lock); | |
015798b2 JH |
328 | |
329 | /* ehci_work() may have re-enabled the watchdog timer, which we do not | |
330 | * want, and so we must delete any pending watchdog timer events. | |
331 | */ | |
332 | del_timer_sync(&ehci->watchdog); | |
1da177e4 LT |
333 | return 0; |
334 | } | |
335 | ||
336 | ||
337 | /* caller has locked the root hub, and should reset/reinit on error */ | |
0c0382e3 | 338 | static int ehci_bus_resume (struct usb_hcd *hcd) |
1da177e4 LT |
339 | { |
340 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
341 | u32 temp; | |
383975d7 | 342 | u32 power_okay; |
1da177e4 | 343 | int i; |
d0f2fb25 | 344 | unsigned long resume_needed = 0; |
1da177e4 LT |
345 | |
346 | if (time_before (jiffies, ehci->next_statechange)) | |
347 | msleep(5); | |
348 | spin_lock_irq (&ehci->lock); | |
541c7d43 | 349 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
cfa59dab AS |
350 | spin_unlock_irq(&ehci->lock); |
351 | return -ESHUTDOWN; | |
352 | } | |
1da177e4 | 353 | |
ad45f1dc | 354 | if (unlikely(ehci->debug)) { |
872d3599 | 355 | if (!dbgp_reset_prep()) |
ad45f1dc JW |
356 | ehci->debug = NULL; |
357 | else | |
358 | dbgp_external_startup(); | |
359 | } | |
360 | ||
f03c17fc DB |
361 | /* Ideally and we've got a real resume here, and no port's power |
362 | * was lost. (For PCI, that means Vaux was maintained.) But we | |
363 | * could instead be restoring a swsusp snapshot -- so that BIOS was | |
364 | * the last user of the controller, not reset/pm hardware keeping | |
365 | * state we gave to it. | |
366 | */ | |
383975d7 AS |
367 | power_okay = ehci_readl(ehci, &ehci->regs->intr_enable); |
368 | ehci_dbg(ehci, "resume root hub%s\n", | |
369 | power_okay ? "" : " after power loss"); | |
f03c17fc | 370 | |
8c03356a AS |
371 | /* at least some APM implementations will try to deliver |
372 | * IRQs right away, so delay them until we're ready. | |
373 | */ | |
083522d7 | 374 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
8c03356a AS |
375 | |
376 | /* re-init operational registers */ | |
083522d7 BH |
377 | ehci_writel(ehci, 0, &ehci->regs->segment); |
378 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); | |
379 | ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next); | |
1da177e4 LT |
380 | |
381 | /* restore CMD_RUN, framelist size, and irq threshold */ | |
083522d7 | 382 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
e8799906 | 383 | ehci->rh_state = EHCI_RH_RUNNING; |
1da177e4 | 384 | |
e198a314 AS |
385 | /* Some controller/firmware combinations need a delay during which |
386 | * they set up the port statuses. See Bugzilla #8190. */ | |
3a4e72cb VP |
387 | spin_unlock_irq(&ehci->lock); |
388 | msleep(8); | |
389 | spin_lock_irq(&ehci->lock); | |
e198a314 | 390 | |
16032c4f AS |
391 | /* clear phy low-power mode before resume */ |
392 | if (ehci->bus_suspended && ehci->has_hostpc) { | |
393 | i = HCS_N_PORTS(ehci->hcs_params); | |
394 | while (i--) { | |
395 | if (test_bit(i, &ehci->bus_suspended)) { | |
396 | u32 __iomem *hostpc_reg; | |
397 | ||
398 | hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs | |
399 | + HOSTPC0 + 4 * i); | |
400 | temp = ehci_readl(ehci, hostpc_reg); | |
401 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, | |
402 | hostpc_reg); | |
403 | } | |
404 | } | |
405 | spin_unlock_irq(&ehci->lock); | |
406 | msleep(5); | |
407 | spin_lock_irq(&ehci->lock); | |
408 | } | |
409 | ||
8c03356a | 410 | /* manually resume the ports we suspended during bus_suspend() */ |
1da177e4 LT |
411 | i = HCS_N_PORTS (ehci->hcs_params); |
412 | while (i--) { | |
083522d7 | 413 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
58a97ffe | 414 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
8c03356a | 415 | if (test_bit(i, &ehci->bus_suspended) && |
3a4e72cb | 416 | (temp & PORT_SUSPEND)) { |
1da177e4 | 417 | temp |= PORT_RESUME; |
d0f2fb25 | 418 | set_bit(i, &resume_needed); |
3a4e72cb | 419 | } |
083522d7 | 420 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
1da177e4 | 421 | } |
3a4e72cb VP |
422 | |
423 | /* msleep for 20ms only if code is trying to resume port */ | |
424 | if (resume_needed) { | |
425 | spin_unlock_irq(&ehci->lock); | |
426 | msleep(20); | |
427 | spin_lock_irq(&ehci->lock); | |
428 | } | |
429 | ||
1da177e4 | 430 | i = HCS_N_PORTS (ehci->hcs_params); |
1da177e4 | 431 | while (i--) { |
083522d7 | 432 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
d0f2fb25 | 433 | if (test_bit(i, &resume_needed)) { |
8c03356a | 434 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); |
083522d7 | 435 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
8c03356a AS |
436 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); |
437 | } | |
1da177e4 | 438 | } |
083522d7 | 439 | (void) ehci_readl(ehci, &ehci->regs->command); |
1da177e4 LT |
440 | |
441 | /* maybe re-activate the schedule(s) */ | |
442 | temp = 0; | |
443 | if (ehci->async->qh_next.qh) | |
444 | temp |= CMD_ASE; | |
445 | if (ehci->periodic_sched) | |
446 | temp |= CMD_PSE; | |
447 | if (temp) { | |
448 | ehci->command |= temp; | |
083522d7 | 449 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
1da177e4 LT |
450 | } |
451 | ||
452 | ehci->next_statechange = jiffies + msecs_to_jiffies(5); | |
1da177e4 LT |
453 | |
454 | /* Now we can safely re-enable irqs */ | |
083522d7 | 455 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); |
1da177e4 LT |
456 | |
457 | spin_unlock_irq (&ehci->lock); | |
3bb1af52 | 458 | ehci_handover_companion_ports(ehci); |
1da177e4 LT |
459 | return 0; |
460 | } | |
461 | ||
462 | #else | |
463 | ||
0c0382e3 AS |
464 | #define ehci_bus_suspend NULL |
465 | #define ehci_bus_resume NULL | |
1da177e4 LT |
466 | |
467 | #endif /* CONFIG_PM */ | |
468 | ||
57e06c11 AS |
469 | /*-------------------------------------------------------------------------*/ |
470 | ||
57e06c11 | 471 | /* |
90da096e | 472 | * Sets the owner of a port |
57e06c11 | 473 | */ |
90da096e | 474 | static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) |
57e06c11 | 475 | { |
57e06c11 AS |
476 | u32 __iomem *status_reg; |
477 | u32 port_status; | |
90da096e | 478 | int try; |
57e06c11 | 479 | |
90da096e | 480 | status_reg = &ehci->regs->port_status[portnum]; |
57e06c11 AS |
481 | |
482 | /* | |
483 | * The controller won't set the OWNER bit if the port is | |
484 | * enabled, so this loop will sometimes require at least two | |
485 | * iterations: one to disable the port and one to set OWNER. | |
486 | */ | |
57e06c11 AS |
487 | for (try = 4; try > 0; --try) { |
488 | spin_lock_irq(&ehci->lock); | |
489 | port_status = ehci_readl(ehci, status_reg); | |
490 | if ((port_status & PORT_OWNER) == new_owner | |
491 | || (port_status & (PORT_OWNER | PORT_CONNECT)) | |
492 | == 0) | |
493 | try = 0; | |
494 | else { | |
495 | port_status ^= PORT_OWNER; | |
496 | port_status &= ~(PORT_PE | PORT_RWC_BITS); | |
497 | ehci_writel(ehci, port_status, status_reg); | |
498 | } | |
499 | spin_unlock_irq(&ehci->lock); | |
500 | if (try > 1) | |
501 | msleep(5); | |
502 | } | |
90da096e BR |
503 | } |
504 | ||
1da177e4 LT |
505 | /*-------------------------------------------------------------------------*/ |
506 | ||
507 | static int check_reset_complete ( | |
508 | struct ehci_hcd *ehci, | |
509 | int index, | |
e6316565 | 510 | u32 __iomem *status_reg, |
1da177e4 LT |
511 | int port_status |
512 | ) { | |
cd4cdc93 | 513 | if (!(port_status & PORT_CONNECT)) |
1da177e4 | 514 | return port_status; |
1da177e4 LT |
515 | |
516 | /* if reset finished and it's still not enabled -- handoff */ | |
517 | if (!(port_status & PORT_PE)) { | |
518 | ||
519 | /* with integrated TT, there's nobody to hand it to! */ | |
520 | if (ehci_is_TDI(ehci)) { | |
521 | ehci_dbg (ehci, | |
522 | "Failed to enable port %d on root hub TT\n", | |
523 | index+1); | |
524 | return port_status; | |
525 | } | |
526 | ||
527 | ehci_dbg (ehci, "port %d full speed --> companion\n", | |
528 | index + 1); | |
529 | ||
530 | // what happens if HCS_N_CC(params) == 0 ? | |
531 | port_status |= PORT_OWNER; | |
10f6524a | 532 | port_status &= ~PORT_RWC_BITS; |
e6316565 | 533 | ehci_writel(ehci, port_status, status_reg); |
1da177e4 | 534 | |
796bcae7 VB |
535 | /* ensure 440EPX ohci controller state is operational */ |
536 | if (ehci->has_amcc_usb23) | |
537 | set_ohci_hcfs(ehci, 1); | |
538 | } else { | |
1da177e4 | 539 | ehci_dbg (ehci, "port %d high speed\n", index + 1); |
796bcae7 VB |
540 | /* ensure 440EPx ohci controller state is suspended */ |
541 | if (ehci->has_amcc_usb23) | |
542 | set_ohci_hcfs(ehci, 0); | |
543 | } | |
1da177e4 LT |
544 | |
545 | return port_status; | |
546 | } | |
547 | ||
548 | /*-------------------------------------------------------------------------*/ | |
549 | ||
550 | ||
551 | /* build "status change" packet (one or two bytes) from HC registers */ | |
552 | ||
553 | static int | |
554 | ehci_hub_status_data (struct usb_hcd *hcd, char *buf) | |
555 | { | |
556 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
557 | u32 temp, status = 0; | |
93f1a47c | 558 | u32 mask; |
1da177e4 LT |
559 | int ports, i, retval = 1; |
560 | unsigned long flags; | |
5a9cdf33 | 561 | u32 ppcd = 0; |
1da177e4 LT |
562 | |
563 | /* if !USB_SUSPEND, root hub timers won't get shut down ... */ | |
e8799906 | 564 | if (ehci->rh_state != EHCI_RH_RUNNING) |
1da177e4 LT |
565 | return 0; |
566 | ||
567 | /* init status to no-changes */ | |
568 | buf [0] = 0; | |
569 | ports = HCS_N_PORTS (ehci->hcs_params); | |
570 | if (ports > 7) { | |
571 | buf [1] = 0; | |
572 | retval++; | |
573 | } | |
53bd6a60 | 574 | |
93f1a47c DB |
575 | /* Some boards (mostly VIA?) report bogus overcurrent indications, |
576 | * causing massive log spam unless we completely ignore them. It | |
3a4fa0a2 | 577 | * may be relevant that VIA VT8235 controllers, where PORT_POWER is |
93f1a47c DB |
578 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to |
579 | * PORT_POWER; that's surprising, but maybe within-spec. | |
580 | */ | |
581 | if (!ignore_oc) | |
582 | mask = PORT_CSC | PORT_PEC | PORT_OCC; | |
583 | else | |
584 | mask = PORT_CSC | PORT_PEC; | |
585 | // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND | |
586 | ||
1da177e4 LT |
587 | /* no hub change reports (bit 0) for now (power, ...) */ |
588 | ||
589 | /* port N changes (bit N)? */ | |
590 | spin_lock_irqsave (&ehci->lock, flags); | |
5a9cdf33 AD |
591 | |
592 | /* get per-port change detect bits */ | |
593 | if (ehci->has_ppcd) | |
594 | ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16; | |
595 | ||
1da177e4 | 596 | for (i = 0; i < ports; i++) { |
5a9cdf33 AD |
597 | /* leverage per-port change bits feature */ |
598 | if (ehci->has_ppcd && !(ppcd & (1 << i))) | |
599 | continue; | |
083522d7 | 600 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
625b5c9a AS |
601 | |
602 | /* | |
603 | * Return status information even for ports with OWNER set. | |
604 | * Otherwise khubd wouldn't see the disconnect event when a | |
605 | * high-speed device is switched over to the companion | |
606 | * controller by the user. | |
607 | */ | |
608 | ||
eafe5b99 AS |
609 | if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) |
610 | || (ehci->reset_done[i] && time_after_eq( | |
611 | jiffies, ehci->reset_done[i]))) { | |
1da177e4 LT |
612 | if (i < 7) |
613 | buf [0] |= 1 << (i + 1); | |
614 | else | |
615 | buf [1] |= 1 << (i - 7); | |
616 | status = STS_PCD; | |
617 | } | |
618 | } | |
619 | /* FIXME autosuspend idle root hubs */ | |
620 | spin_unlock_irqrestore (&ehci->lock, flags); | |
621 | return status ? retval : 0; | |
622 | } | |
623 | ||
624 | /*-------------------------------------------------------------------------*/ | |
625 | ||
626 | static void | |
627 | ehci_hub_descriptor ( | |
628 | struct ehci_hcd *ehci, | |
629 | struct usb_hub_descriptor *desc | |
630 | ) { | |
631 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
632 | u16 temp; | |
633 | ||
634 | desc->bDescriptorType = 0x29; | |
635 | desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */ | |
636 | desc->bHubContrCurrent = 0; | |
637 | ||
638 | desc->bNbrPorts = ports; | |
639 | temp = 1 + (ports / 8); | |
640 | desc->bDescLength = 7 + 2 * temp; | |
641 | ||
642 | /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ | |
dbe79bbe JY |
643 | memset(&desc->u.hs.DeviceRemovable[0], 0, temp); |
644 | memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); | |
1da177e4 LT |
645 | |
646 | temp = 0x0008; /* per-port overcurrent reporting */ | |
647 | if (HCS_PPC (ehci->hcs_params)) | |
648 | temp |= 0x0001; /* per-port power control */ | |
56c1e26d DB |
649 | else |
650 | temp |= 0x0002; /* no power switching */ | |
1da177e4 LT |
651 | #if 0 |
652 | // re-enable when we support USB_PORT_FEAT_INDICATOR below. | |
653 | if (HCS_INDICATOR (ehci->hcs_params)) | |
654 | temp |= 0x0080; /* per-port indicators (LEDs) */ | |
655 | #endif | |
fd05e720 | 656 | desc->wHubCharacteristics = cpu_to_le16(temp); |
1da177e4 LT |
657 | } |
658 | ||
659 | /*-------------------------------------------------------------------------*/ | |
660 | ||
1da177e4 LT |
661 | static int ehci_hub_control ( |
662 | struct usb_hcd *hcd, | |
663 | u16 typeReq, | |
664 | u16 wValue, | |
665 | u16 wIndex, | |
666 | char *buf, | |
667 | u16 wLength | |
668 | ) { | |
669 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
670 | int ports = HCS_N_PORTS (ehci->hcs_params); | |
383975d7 AS |
671 | u32 __iomem *status_reg = &ehci->regs->port_status[ |
672 | (wIndex & 0xff) - 1]; | |
331ac6b2 AD |
673 | u32 __iomem *hostpc_reg = NULL; |
674 | u32 temp, temp1, status; | |
1da177e4 LT |
675 | unsigned long flags; |
676 | int retval = 0; | |
f0d7f273 | 677 | unsigned selector; |
1da177e4 LT |
678 | |
679 | /* | |
680 | * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. | |
681 | * HCS_INDICATOR may say we can change LEDs to off/amber/green. | |
682 | * (track current state ourselves) ... blink for diagnostics, | |
683 | * power, "this is the one", etc. EHCI spec supports this. | |
684 | */ | |
685 | ||
331ac6b2 AD |
686 | if (ehci->has_hostpc) |
687 | hostpc_reg = (u32 __iomem *)((u8 *)ehci->regs | |
688 | + HOSTPC0 + 4 * ((wIndex & 0xff) - 1)); | |
1da177e4 LT |
689 | spin_lock_irqsave (&ehci->lock, flags); |
690 | switch (typeReq) { | |
691 | case ClearHubFeature: | |
692 | switch (wValue) { | |
693 | case C_HUB_LOCAL_POWER: | |
694 | case C_HUB_OVER_CURRENT: | |
695 | /* no hub-wide feature/status flags */ | |
696 | break; | |
697 | default: | |
698 | goto error; | |
699 | } | |
700 | break; | |
701 | case ClearPortFeature: | |
702 | if (!wIndex || wIndex > ports) | |
703 | goto error; | |
704 | wIndex--; | |
e6316565 | 705 | temp = ehci_readl(ehci, status_reg); |
625b5c9a AS |
706 | |
707 | /* | |
708 | * Even if OWNER is set, so the port is owned by the | |
709 | * companion controller, khubd needs to be able to clear | |
710 | * the port-change status bits (especially | |
749da5f8 | 711 | * USB_PORT_STAT_C_CONNECTION). |
625b5c9a | 712 | */ |
1da177e4 LT |
713 | |
714 | switch (wValue) { | |
715 | case USB_PORT_FEAT_ENABLE: | |
e6316565 | 716 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); |
1da177e4 LT |
717 | break; |
718 | case USB_PORT_FEAT_C_ENABLE: | |
083522d7 | 719 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_PEC, |
e6316565 | 720 | status_reg); |
1da177e4 LT |
721 | break; |
722 | case USB_PORT_FEAT_SUSPEND: | |
723 | if (temp & PORT_RESET) | |
724 | goto error; | |
f8aeb3bb DB |
725 | if (ehci->no_selective_suspend) |
726 | break; | |
83722bc9 AG |
727 | #ifdef CONFIG_USB_OTG |
728 | if ((hcd->self.otg_port == (wIndex + 1)) | |
729 | && hcd->self.b_hnp_enable) { | |
6e13c650 | 730 | otg_start_hnp(ehci->transceiver->otg); |
83722bc9 AG |
731 | break; |
732 | } | |
733 | #endif | |
16032c4f AS |
734 | if (!(temp & PORT_SUSPEND)) |
735 | break; | |
736 | if ((temp & PORT_PE) == 0) | |
737 | goto error; | |
738 | ||
739 | /* clear phy low-power mode before resume */ | |
740 | if (hostpc_reg) { | |
741 | temp1 = ehci_readl(ehci, hostpc_reg); | |
742 | ehci_writel(ehci, temp1 & ~HOSTPC_PHCD, | |
eab80de0 | 743 | hostpc_reg); |
16032c4f AS |
744 | spin_unlock_irqrestore(&ehci->lock, flags); |
745 | msleep(5);/* wait to leave low-power mode */ | |
746 | spin_lock_irqsave(&ehci->lock, flags); | |
1da177e4 | 747 | } |
16032c4f AS |
748 | /* resume signaling for 20 msec */ |
749 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); | |
750 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); | |
751 | ehci->reset_done[wIndex] = jiffies | |
752 | + msecs_to_jiffies(20); | |
1da177e4 LT |
753 | break; |
754 | case USB_PORT_FEAT_C_SUSPEND: | |
d1f114d1 | 755 | clear_bit(wIndex, &ehci->port_c_suspend); |
1da177e4 LT |
756 | break; |
757 | case USB_PORT_FEAT_POWER: | |
758 | if (HCS_PPC (ehci->hcs_params)) | |
083522d7 BH |
759 | ehci_writel(ehci, |
760 | temp & ~(PORT_RWC_BITS | PORT_POWER), | |
e6316565 | 761 | status_reg); |
1da177e4 LT |
762 | break; |
763 | case USB_PORT_FEAT_C_CONNECTION: | |
48f24970 AD |
764 | if (ehci->has_lpm) { |
765 | /* clear PORTSC bits on disconnect */ | |
766 | temp &= ~PORT_LPM; | |
767 | temp &= ~PORT_DEV_ADDR; | |
768 | } | |
083522d7 | 769 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_CSC, |
e6316565 | 770 | status_reg); |
1da177e4 LT |
771 | break; |
772 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
083522d7 | 773 | ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_OCC, |
e6316565 | 774 | status_reg); |
1da177e4 LT |
775 | break; |
776 | case USB_PORT_FEAT_C_RESET: | |
777 | /* GetPortStatus clears reset */ | |
778 | break; | |
779 | default: | |
780 | goto error; | |
781 | } | |
083522d7 | 782 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ |
1da177e4 LT |
783 | break; |
784 | case GetHubDescriptor: | |
785 | ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *) | |
786 | buf); | |
787 | break; | |
788 | case GetHubStatus: | |
789 | /* no hub-wide feature/status flags */ | |
790 | memset (buf, 0, 4); | |
791 | //cpu_to_le32s ((u32 *) buf); | |
792 | break; | |
793 | case GetPortStatus: | |
794 | if (!wIndex || wIndex > ports) | |
795 | goto error; | |
796 | wIndex--; | |
797 | status = 0; | |
e6316565 | 798 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
799 | |
800 | // wPortChange bits | |
801 | if (temp & PORT_CSC) | |
749da5f8 | 802 | status |= USB_PORT_STAT_C_CONNECTION << 16; |
1da177e4 | 803 | if (temp & PORT_PEC) |
749da5f8 | 804 | status |= USB_PORT_STAT_C_ENABLE << 16; |
756aa6b3 CE |
805 | |
806 | if ((temp & PORT_OCC) && !ignore_oc){ | |
749da5f8 | 807 | status |= USB_PORT_STAT_C_OVERCURRENT << 16; |
1da177e4 | 808 | |
756aa6b3 CE |
809 | /* |
810 | * Hubs should disable port power on over-current. | |
811 | * However, not all EHCI implementations do this | |
812 | * automatically, even if they _do_ support per-port | |
813 | * power switching; they're allowed to just limit the | |
814 | * current. khubd will turn the power back on. | |
815 | */ | |
81463c1d | 816 | if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { |
756aa6b3 CE |
817 | ehci_writel(ehci, |
818 | temp & ~(PORT_RWC_BITS | PORT_POWER), | |
819 | status_reg); | |
81463c1d | 820 | temp = ehci_readl(ehci, status_reg); |
756aa6b3 CE |
821 | } |
822 | } | |
823 | ||
1da177e4 | 824 | /* whoever resumes must GetPortStatus to complete it!! */ |
629e4427 AS |
825 | if (temp & PORT_RESUME) { |
826 | ||
827 | /* Remote Wakeup received? */ | |
828 | if (!ehci->reset_done[wIndex]) { | |
829 | /* resume signaling for 20 msec */ | |
830 | ehci->reset_done[wIndex] = jiffies | |
831 | + msecs_to_jiffies(20); | |
832 | /* check the port again */ | |
833 | mod_timer(&ehci_to_hcd(ehci)->rh_timer, | |
834 | ehci->reset_done[wIndex]); | |
835 | } | |
1da177e4 | 836 | |
629e4427 AS |
837 | /* resume completed? */ |
838 | else if (time_after_eq(jiffies, | |
839 | ehci->reset_done[wIndex])) { | |
eafe5b99 | 840 | clear_bit(wIndex, &ehci->suspended_ports); |
d1f114d1 | 841 | set_bit(wIndex, &ehci->port_c_suspend); |
629e4427 AS |
842 | ehci->reset_done[wIndex] = 0; |
843 | ||
844 | /* stop resume signaling */ | |
845 | temp = ehci_readl(ehci, status_reg); | |
846 | ehci_writel(ehci, | |
e6316565 AS |
847 | temp & ~(PORT_RWC_BITS | PORT_RESUME), |
848 | status_reg); | |
629e4427 | 849 | retval = handshake(ehci, status_reg, |
083522d7 | 850 | PORT_RESUME, 0, 2000 /* 2msec */); |
629e4427 AS |
851 | if (retval != 0) { |
852 | ehci_err(ehci, | |
853 | "port %d resume error %d\n", | |
854 | wIndex + 1, retval); | |
855 | goto error; | |
856 | } | |
857 | temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); | |
1da177e4 | 858 | } |
1da177e4 LT |
859 | } |
860 | ||
861 | /* whoever resets must GetPortStatus to complete it!! */ | |
862 | if ((temp & PORT_RESET) | |
629e4427 AS |
863 | && time_after_eq(jiffies, |
864 | ehci->reset_done[wIndex])) { | |
749da5f8 | 865 | status |= USB_PORT_STAT_C_RESET << 16; |
1da177e4 LT |
866 | ehci->reset_done [wIndex] = 0; |
867 | ||
868 | /* force reset to complete */ | |
083522d7 | 869 | ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET), |
e6316565 | 870 | status_reg); |
c22fa3ac DB |
871 | /* REVISIT: some hardware needs 550+ usec to clear |
872 | * this bit; seems too long to spin routinely... | |
873 | */ | |
e6316565 | 874 | retval = handshake(ehci, status_reg, |
6307e096 | 875 | PORT_RESET, 0, 1000); |
1da177e4 LT |
876 | if (retval != 0) { |
877 | ehci_err (ehci, "port %d reset error %d\n", | |
878 | wIndex + 1, retval); | |
879 | goto error; | |
880 | } | |
881 | ||
882 | /* see what we found out */ | |
e6316565 AS |
883 | temp = check_reset_complete (ehci, wIndex, status_reg, |
884 | ehci_readl(ehci, status_reg)); | |
1da177e4 LT |
885 | } |
886 | ||
eafe5b99 AS |
887 | if (!(temp & (PORT_RESUME|PORT_RESET))) |
888 | ehci->reset_done[wIndex] = 0; | |
889 | ||
57e06c11 AS |
890 | /* transfer dedicated ports to the companion hc */ |
891 | if ((temp & PORT_CONNECT) && | |
892 | test_bit(wIndex, &ehci->companion_ports)) { | |
893 | temp &= ~PORT_RWC_BITS; | |
894 | temp |= PORT_OWNER; | |
895 | ehci_writel(ehci, temp, status_reg); | |
896 | ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1); | |
897 | temp = ehci_readl(ehci, status_reg); | |
898 | } | |
899 | ||
625b5c9a AS |
900 | /* |
901 | * Even if OWNER is set, there's no harm letting khubd | |
902 | * see the wPortStatus values (they should all be 0 except | |
903 | * for PORT_POWER anyway). | |
904 | */ | |
905 | ||
906 | if (temp & PORT_CONNECT) { | |
749da5f8 | 907 | status |= USB_PORT_STAT_CONNECTION; |
625b5c9a | 908 | // status may be from integrated TT |
331ac6b2 AD |
909 | if (ehci->has_hostpc) { |
910 | temp1 = ehci_readl(ehci, hostpc_reg); | |
911 | status |= ehci_port_speed(ehci, temp1); | |
912 | } else | |
913 | status |= ehci_port_speed(ehci, temp); | |
1da177e4 | 914 | } |
625b5c9a | 915 | if (temp & PORT_PE) |
749da5f8 | 916 | status |= USB_PORT_STAT_ENABLE; |
eafe5b99 AS |
917 | |
918 | /* maybe the port was unsuspended without our knowledge */ | |
919 | if (temp & (PORT_SUSPEND|PORT_RESUME)) { | |
749da5f8 | 920 | status |= USB_PORT_STAT_SUSPEND; |
eafe5b99 AS |
921 | } else if (test_bit(wIndex, &ehci->suspended_ports)) { |
922 | clear_bit(wIndex, &ehci->suspended_ports); | |
923 | ehci->reset_done[wIndex] = 0; | |
924 | if (temp & PORT_PE) | |
925 | set_bit(wIndex, &ehci->port_c_suspend); | |
926 | } | |
927 | ||
625b5c9a | 928 | if (temp & PORT_OC) |
749da5f8 | 929 | status |= USB_PORT_STAT_OVERCURRENT; |
625b5c9a | 930 | if (temp & PORT_RESET) |
749da5f8 | 931 | status |= USB_PORT_STAT_RESET; |
625b5c9a | 932 | if (temp & PORT_POWER) |
749da5f8 | 933 | status |= USB_PORT_STAT_POWER; |
d1f114d1 | 934 | if (test_bit(wIndex, &ehci->port_c_suspend)) |
749da5f8 | 935 | status |= USB_PORT_STAT_C_SUSPEND << 16; |
1da177e4 | 936 | |
9776afc8 | 937 | #ifndef VERBOSE_DEBUG |
1da177e4 LT |
938 | if (status & ~0xffff) /* only if wPortChange is interesting */ |
939 | #endif | |
940 | dbg_port (ehci, "GetStatus", wIndex + 1, temp); | |
a5abdeaf | 941 | put_unaligned_le32(status, buf); |
1da177e4 LT |
942 | break; |
943 | case SetHubFeature: | |
944 | switch (wValue) { | |
945 | case C_HUB_LOCAL_POWER: | |
946 | case C_HUB_OVER_CURRENT: | |
947 | /* no hub-wide feature/status flags */ | |
948 | break; | |
949 | default: | |
950 | goto error; | |
951 | } | |
952 | break; | |
953 | case SetPortFeature: | |
f0d7f273 DB |
954 | selector = wIndex >> 8; |
955 | wIndex &= 0xff; | |
8d053c79 JW |
956 | if (unlikely(ehci->debug)) { |
957 | /* If the debug port is active any port | |
958 | * feature requests should get denied */ | |
959 | if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) && | |
960 | (readl(&ehci->debug->control) & DBGP_ENABLED)) { | |
961 | retval = -ENODEV; | |
962 | goto error_exit; | |
963 | } | |
964 | } | |
1da177e4 LT |
965 | if (!wIndex || wIndex > ports) |
966 | goto error; | |
967 | wIndex--; | |
e6316565 | 968 | temp = ehci_readl(ehci, status_reg); |
1da177e4 LT |
969 | if (temp & PORT_OWNER) |
970 | break; | |
971 | ||
10f6524a | 972 | temp &= ~PORT_RWC_BITS; |
1da177e4 LT |
973 | switch (wValue) { |
974 | case USB_PORT_FEAT_SUSPEND: | |
f8aeb3bb DB |
975 | if (ehci->no_selective_suspend) |
976 | break; | |
1da177e4 LT |
977 | if ((temp & PORT_PE) == 0 |
978 | || (temp & PORT_RESET) != 0) | |
979 | goto error; | |
b9df7942 | 980 | |
331ac6b2 AD |
981 | /* After above check the port must be connected. |
982 | * Set appropriate bit thus could put phy into low power | |
983 | * mode if we have hostpc feature | |
984 | */ | |
b9df7942 AD |
985 | temp &= ~PORT_WKCONN_E; |
986 | temp |= PORT_WKDISC_E | PORT_WKOC_E; | |
987 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); | |
331ac6b2 | 988 | if (hostpc_reg) { |
b9df7942 | 989 | spin_unlock_irqrestore(&ehci->lock, flags); |
331ac6b2 | 990 | msleep(5);/* 5ms for HCD enter low pwr mode */ |
b9df7942 | 991 | spin_lock_irqsave(&ehci->lock, flags); |
331ac6b2 AD |
992 | temp1 = ehci_readl(ehci, hostpc_reg); |
993 | ehci_writel(ehci, temp1 | HOSTPC_PHCD, | |
994 | hostpc_reg); | |
995 | temp1 = ehci_readl(ehci, hostpc_reg); | |
996 | ehci_dbg(ehci, "Port%d phy low pwr mode %s\n", | |
997 | wIndex, (temp1 & HOSTPC_PHCD) ? | |
998 | "succeeded" : "failed"); | |
999 | } | |
eafe5b99 | 1000 | set_bit(wIndex, &ehci->suspended_ports); |
1da177e4 LT |
1001 | break; |
1002 | case USB_PORT_FEAT_POWER: | |
1003 | if (HCS_PPC (ehci->hcs_params)) | |
083522d7 | 1004 | ehci_writel(ehci, temp | PORT_POWER, |
e6316565 | 1005 | status_reg); |
1da177e4 LT |
1006 | break; |
1007 | case USB_PORT_FEAT_RESET: | |
1008 | if (temp & PORT_RESUME) | |
1009 | goto error; | |
1010 | /* line status bits may report this as low speed, | |
1011 | * which can be fine if this root hub has a | |
1012 | * transaction translator built in. | |
1013 | */ | |
1014 | if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT | |
1015 | && !ehci_is_TDI(ehci) | |
1016 | && PORT_USB11 (temp)) { | |
1017 | ehci_dbg (ehci, | |
1018 | "port %d low speed --> companion\n", | |
1019 | wIndex + 1); | |
1020 | temp |= PORT_OWNER; | |
1021 | } else { | |
1022 | ehci_vdbg (ehci, "port %d reset\n", wIndex + 1); | |
1023 | temp |= PORT_RESET; | |
1024 | temp &= ~PORT_PE; | |
1025 | ||
1026 | /* | |
1027 | * caller must wait, then call GetPortStatus | |
1028 | * usb 2.0 spec says 50 ms resets on root | |
1029 | */ | |
1030 | ehci->reset_done [wIndex] = jiffies | |
1031 | + msecs_to_jiffies (50); | |
1032 | } | |
e6316565 | 1033 | ehci_writel(ehci, temp, status_reg); |
1da177e4 | 1034 | break; |
f0d7f273 DB |
1035 | |
1036 | /* For downstream facing ports (these): one hub port is put | |
1037 | * into test mode according to USB2 11.24.2.13, then the hub | |
1038 | * must be reset (which for root hub now means rmmod+modprobe, | |
1039 | * or else system reboot). See EHCI 2.3.9 and 4.14 for info | |
1040 | * about the EHCI-specific stuff. | |
1041 | */ | |
1042 | case USB_PORT_FEAT_TEST: | |
1043 | if (!selector || selector > 5) | |
1044 | goto error; | |
1045 | ehci_quiesce(ehci); | |
77636c86 BT |
1046 | |
1047 | /* Put all enabled ports into suspend */ | |
1048 | while (ports--) { | |
1049 | u32 __iomem *sreg = | |
1050 | &ehci->regs->port_status[ports]; | |
1051 | ||
1052 | temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; | |
1053 | if (temp & PORT_PE) | |
1054 | ehci_writel(ehci, temp | PORT_SUSPEND, | |
1055 | sreg); | |
1056 | } | |
f0d7f273 | 1057 | ehci_halt(ehci); |
77636c86 | 1058 | temp = ehci_readl(ehci, status_reg); |
f0d7f273 | 1059 | temp |= selector << 16; |
e6316565 | 1060 | ehci_writel(ehci, temp, status_reg); |
f0d7f273 DB |
1061 | break; |
1062 | ||
1da177e4 LT |
1063 | default: |
1064 | goto error; | |
1065 | } | |
083522d7 | 1066 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ |
1da177e4 LT |
1067 | break; |
1068 | ||
1069 | default: | |
1070 | error: | |
1071 | /* "stall" on error */ | |
1072 | retval = -EPIPE; | |
1073 | } | |
8d053c79 | 1074 | error_exit: |
1da177e4 LT |
1075 | spin_unlock_irqrestore (&ehci->lock, flags); |
1076 | return retval; | |
1077 | } | |
90da096e | 1078 | |
5407a3c3 FB |
1079 | static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd, |
1080 | int portnum) | |
90da096e BR |
1081 | { |
1082 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1083 | ||
1084 | if (ehci_is_TDI(ehci)) | |
1085 | return; | |
1086 | set_owner(ehci, --portnum, PORT_OWNER); | |
1087 | } | |
1088 | ||
5407a3c3 FB |
1089 | static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd, |
1090 | int portnum) | |
3a31155c AS |
1091 | { |
1092 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
1093 | u32 __iomem *reg; | |
1094 | ||
1095 | if (ehci_is_TDI(ehci)) | |
1096 | return 0; | |
1097 | reg = &ehci->regs->port_status[portnum - 1]; | |
1098 | return ehci_readl(ehci, reg) & PORT_OWNER; | |
1099 | } |