Commit | Line | Data |
---|---|---|
54ab2b02 | 1 | /* |
4792a15b | 2 | * ehci-omap.c - driver for USBHOST on OMAP3/4 processors |
54ab2b02 | 3 | * |
4792a15b AG |
4 | * Bus Glue for the EHCI controllers in OMAP3/4 |
5 | * Tested on several OMAP3 boards, and OMAP4 Pandaboard | |
54ab2b02 | 6 | * |
19403165 | 7 | * Copyright (C) 2007-2011 Texas Instruments, Inc. |
54ab2b02 | 8 | * Author: Vikram Pandita <vikram.pandita@ti.com> |
4792a15b | 9 | * Author: Anand Gadiyar <gadiyar@ti.com> |
19403165 | 10 | * Author: Keshava Munegowda <keshava_mgowda@ti.com> |
54ab2b02 FB |
11 | * |
12 | * Copyright (C) 2009 Nokia Corporation | |
13 | * Contact: Felipe Balbi <felipe.balbi@nokia.com> | |
14 | * | |
15 | * Based on "ehci-fsl.c" and "ehci-au1xxx.c" ehci glue layers | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License as published by | |
19 | * the Free Software Foundation; either version 2 of the License, or | |
20 | * (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
30 | * | |
19403165 | 31 | * TODO (last updated Feb 27, 2010): |
54ab2b02 FB |
32 | * - add kernel-doc |
33 | * - enable AUTOIDLE | |
54ab2b02 | 34 | * - add suspend/resume |
4792a15b AG |
35 | * - add HSIC and TLL support |
36 | * - convert to use hwmod and runtime PM | |
54ab2b02 FB |
37 | */ |
38 | ||
39 | #include <linux/platform_device.h> | |
5a0e3ad6 | 40 | #include <linux/slab.h> |
5aa4af2c | 41 | #include <linux/usb/ulpi.h> |
c76f782c | 42 | #include <plat/usb.h> |
6e3d4bec | 43 | #include <linux/regulator/consumer.h> |
6c984b06 | 44 | #include <linux/pm_runtime.h> |
1fcb57d0 | 45 | #include <linux/gpio.h> |
354ab856 | 46 | #include <linux/clk.h> |
54ab2b02 | 47 | |
54ab2b02 | 48 | /* EHCI Register Set */ |
572538de AG |
49 | #define EHCI_INSNREG04 (0xA0) |
50 | #define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5) | |
54ab2b02 FB |
51 | #define EHCI_INSNREG05_ULPI (0xA4) |
52 | #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT 31 | |
53 | #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT 24 | |
54 | #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT 22 | |
55 | #define EHCI_INSNREG05_ULPI_REGADD_SHIFT 16 | |
56 | #define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT 8 | |
57 | #define EHCI_INSNREG05_ULPI_WRDATA_SHIFT 0 | |
58 | ||
354ab856 AG |
59 | /* Errata i693 */ |
60 | static struct clk *utmi_p1_fck; | |
61 | static struct clk *utmi_p2_fck; | |
62 | static struct clk *xclk60mhsp1_ck; | |
63 | static struct clk *xclk60mhsp2_ck; | |
64 | static struct clk *usbhost_p1_fck; | |
65 | static struct clk *usbhost_p2_fck; | |
66 | static struct clk *init_60m_fclk; | |
67 | ||
19403165 | 68 | /*-------------------------------------------------------------------------*/ |
4792a15b | 69 | |
19403165 | 70 | static const struct hc_driver ehci_omap_hc_driver; |
4792a15b | 71 | |
a42ccdc1 | 72 | |
19403165 | 73 | static inline void ehci_write(void __iomem *base, u32 reg, u32 val) |
54ab2b02 FB |
74 | { |
75 | __raw_writel(val, base + reg); | |
76 | } | |
77 | ||
19403165 | 78 | static inline u32 ehci_read(void __iomem *base, u32 reg) |
54ab2b02 FB |
79 | { |
80 | return __raw_readl(base + reg); | |
81 | } | |
82 | ||
354ab856 AG |
83 | /* Erratum i693 workaround sequence */ |
84 | static void omap_ehci_erratum_i693(struct ehci_hcd *ehci) | |
85 | { | |
86 | int ret = 0; | |
87 | ||
88 | /* Switch to the internal 60 MHz clock */ | |
89 | ret = clk_set_parent(utmi_p1_fck, init_60m_fclk); | |
90 | if (ret != 0) | |
91 | ehci_err(ehci, "init_60m_fclk set parent" | |
92 | "failed error:%d\n", ret); | |
93 | ||
94 | ret = clk_set_parent(utmi_p2_fck, init_60m_fclk); | |
95 | if (ret != 0) | |
96 | ehci_err(ehci, "init_60m_fclk set parent" | |
97 | "failed error:%d\n", ret); | |
98 | ||
99 | clk_enable(usbhost_p1_fck); | |
100 | clk_enable(usbhost_p2_fck); | |
101 | ||
102 | /* Wait 1ms and switch back to the external clock */ | |
103 | mdelay(1); | |
104 | ret = clk_set_parent(utmi_p1_fck, xclk60mhsp1_ck); | |
105 | if (ret != 0) | |
106 | ehci_err(ehci, "xclk60mhsp1_ck set parent" | |
107 | "failed error:%d\n", ret); | |
108 | ||
109 | ret = clk_set_parent(utmi_p2_fck, xclk60mhsp2_ck); | |
110 | if (ret != 0) | |
111 | ehci_err(ehci, "xclk60mhsp2_ck set parent" | |
112 | "failed error:%d\n", ret); | |
113 | ||
114 | clk_disable(usbhost_p1_fck); | |
115 | clk_disable(usbhost_p2_fck); | |
116 | } | |
117 | ||
19403165 | 118 | static void omap_ehci_soft_phy_reset(struct platform_device *pdev, u8 port) |
5aa4af2c | 119 | { |
19403165 | 120 | struct usb_hcd *hcd = dev_get_drvdata(&pdev->dev); |
5aa4af2c AKG |
121 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); |
122 | unsigned reg = 0; | |
123 | ||
124 | reg = ULPI_FUNC_CTRL_RESET | |
125 | /* FUNCTION_CTRL_SET register */ | |
126 | | (ULPI_SET(ULPI_FUNC_CTRL) << EHCI_INSNREG05_ULPI_REGADD_SHIFT) | |
127 | /* Write */ | |
128 | | (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) | |
129 | /* PORTn */ | |
130 | | ((port + 1) << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) | |
131 | /* start ULPI access*/ | |
132 | | (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT); | |
133 | ||
19403165 | 134 | ehci_write(hcd->regs, EHCI_INSNREG05_ULPI, reg); |
5aa4af2c AKG |
135 | |
136 | /* Wait for ULPI access completion */ | |
19403165 | 137 | while ((ehci_read(hcd->regs, EHCI_INSNREG05_ULPI) |
5aa4af2c AKG |
138 | & (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT))) { |
139 | cpu_relax(); | |
140 | ||
141 | if (time_after(jiffies, timeout)) { | |
19403165 | 142 | dev_dbg(&pdev->dev, "phy reset operation timed out\n"); |
5aa4af2c AKG |
143 | break; |
144 | } | |
145 | } | |
146 | } | |
147 | ||
354ab856 AG |
148 | static int omap_ehci_hub_control( |
149 | struct usb_hcd *hcd, | |
150 | u16 typeReq, | |
151 | u16 wValue, | |
152 | u16 wIndex, | |
153 | char *buf, | |
154 | u16 wLength | |
155 | ) | |
156 | { | |
157 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
158 | u32 __iomem *status_reg = &ehci->regs->port_status[ | |
159 | (wIndex & 0xff) - 1]; | |
160 | u32 temp; | |
161 | unsigned long flags; | |
162 | int retval = 0; | |
163 | ||
164 | spin_lock_irqsave(&ehci->lock, flags); | |
165 | ||
166 | if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { | |
167 | temp = ehci_readl(ehci, status_reg); | |
168 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { | |
169 | retval = -EPIPE; | |
170 | goto done; | |
171 | } | |
172 | ||
173 | temp &= ~PORT_WKCONN_E; | |
174 | temp |= PORT_WKDISC_E | PORT_WKOC_E; | |
175 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); | |
176 | ||
177 | omap_ehci_erratum_i693(ehci); | |
178 | ||
179 | set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); | |
180 | goto done; | |
181 | } | |
182 | ||
183 | spin_unlock_irqrestore(&ehci->lock, flags); | |
184 | ||
185 | /* Handle the hub control events here */ | |
186 | return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); | |
187 | done: | |
188 | spin_unlock_irqrestore(&ehci->lock, flags); | |
189 | return retval; | |
190 | } | |
191 | ||
d4aefec5 ML |
192 | static void disable_put_regulator( |
193 | struct ehci_hcd_omap_platform_data *pdata) | |
194 | { | |
195 | int i; | |
196 | ||
197 | for (i = 0 ; i < OMAP3_HS_USB_PORTS ; i++) { | |
198 | if (pdata->regulator[i]) { | |
199 | regulator_disable(pdata->regulator[i]); | |
200 | regulator_put(pdata->regulator[i]); | |
201 | } | |
202 | } | |
203 | } | |
54ab2b02 FB |
204 | |
205 | /* configure so an HC device and id are always provided */ | |
206 | /* always called with process context; sleeping is OK */ | |
207 | ||
208 | /** | |
209 | * ehci_hcd_omap_probe - initialize TI-based HCDs | |
210 | * | |
211 | * Allocates basic resources for this USB host controller, and | |
212 | * then invokes the start() method for the HCD associated with it | |
213 | * through the hotplug entry's driver_data. | |
214 | */ | |
215 | static int ehci_hcd_omap_probe(struct platform_device *pdev) | |
216 | { | |
19403165 KM |
217 | struct device *dev = &pdev->dev; |
218 | struct ehci_hcd_omap_platform_data *pdata = dev->platform_data; | |
219 | struct resource *res; | |
220 | struct usb_hcd *hcd; | |
221 | void __iomem *regs; | |
222 | struct ehci_hcd *omap_ehci; | |
223 | int ret = -ENODEV; | |
224 | int irq; | |
6e3d4bec KM |
225 | int i; |
226 | char supply[7]; | |
54ab2b02 | 227 | |
19403165 KM |
228 | if (usb_disabled()) |
229 | return -ENODEV; | |
54ab2b02 | 230 | |
19403165 KM |
231 | if (!dev->parent) { |
232 | dev_err(dev, "Missing parent device\n"); | |
233 | return -ENODEV; | |
54ab2b02 FB |
234 | } |
235 | ||
19403165 KM |
236 | irq = platform_get_irq_byname(pdev, "ehci-irq"); |
237 | if (irq < 0) { | |
238 | dev_err(dev, "EHCI irq failed\n"); | |
239 | return -ENODEV; | |
240 | } | |
54ab2b02 | 241 | |
19403165 KM |
242 | res = platform_get_resource_byname(pdev, |
243 | IORESOURCE_MEM, "ehci"); | |
244 | if (!res) { | |
245 | dev_err(dev, "UHH EHCI get resource failed\n"); | |
246 | return -ENODEV; | |
247 | } | |
248 | ||
249 | regs = ioremap(res->start, resource_size(res)); | |
250 | if (!regs) { | |
251 | dev_err(dev, "UHH EHCI ioremap failed\n"); | |
252 | return -ENOMEM; | |
54ab2b02 FB |
253 | } |
254 | ||
19403165 KM |
255 | hcd = usb_create_hcd(&ehci_omap_hc_driver, dev, |
256 | dev_name(dev)); | |
54ab2b02 | 257 | if (!hcd) { |
19403165 | 258 | dev_err(dev, "failed to create hcd with err %d\n", ret); |
54ab2b02 | 259 | ret = -ENOMEM; |
19403165 | 260 | goto err_io; |
54ab2b02 FB |
261 | } |
262 | ||
54ab2b02 FB |
263 | hcd->rsrc_start = res->start; |
264 | hcd->rsrc_len = resource_size(res); | |
19403165 | 265 | hcd->regs = regs; |
54ab2b02 | 266 | |
6e3d4bec KM |
267 | /* get ehci regulator and enable */ |
268 | for (i = 0 ; i < OMAP3_HS_USB_PORTS ; i++) { | |
269 | if (pdata->port_mode[i] != OMAP_EHCI_PORT_MODE_PHY) { | |
270 | pdata->regulator[i] = NULL; | |
271 | continue; | |
272 | } | |
273 | snprintf(supply, sizeof(supply), "hsusb%d", i); | |
274 | pdata->regulator[i] = regulator_get(dev, supply); | |
275 | if (IS_ERR(pdata->regulator[i])) { | |
276 | pdata->regulator[i] = NULL; | |
277 | dev_dbg(dev, | |
278 | "failed to get ehci port%d regulator\n", i); | |
279 | } else { | |
280 | regulator_enable(pdata->regulator[i]); | |
281 | } | |
282 | } | |
283 | ||
1fcb57d0 KM |
284 | if (pdata->phy_reset) { |
285 | if (gpio_is_valid(pdata->reset_gpio_port[0])) | |
286 | gpio_request_one(pdata->reset_gpio_port[0], | |
287 | GPIOF_OUT_INIT_LOW, "USB1 PHY reset"); | |
288 | ||
289 | if (gpio_is_valid(pdata->reset_gpio_port[1])) | |
290 | gpio_request_one(pdata->reset_gpio_port[1], | |
291 | GPIOF_OUT_INIT_LOW, "USB2 PHY reset"); | |
292 | ||
293 | /* Hold the PHY in RESET for enough time till DIR is high */ | |
294 | udelay(10); | |
295 | } | |
296 | ||
6c984b06 KM |
297 | pm_runtime_enable(dev); |
298 | pm_runtime_get_sync(dev); | |
54ab2b02 | 299 | |
19403165 KM |
300 | /* |
301 | * An undocumented "feature" in the OMAP3 EHCI controller, | |
302 | * causes suspended ports to be taken out of suspend when | |
303 | * the USBCMD.Run/Stop bit is cleared (for example when | |
304 | * we do ehci_bus_suspend). | |
305 | * This breaks suspend-resume if the root-hub is allowed | |
306 | * to suspend. Writing 1 to this undocumented register bit | |
307 | * disables this feature and restores normal behavior. | |
308 | */ | |
309 | ehci_write(regs, EHCI_INSNREG04, | |
310 | EHCI_INSNREG04_DISABLE_UNSUSPEND); | |
54ab2b02 | 311 | |
19403165 KM |
312 | /* Soft reset the PHY using PHY reset command over ULPI */ |
313 | if (pdata->port_mode[0] == OMAP_EHCI_PORT_MODE_PHY) | |
314 | omap_ehci_soft_phy_reset(pdev, 0); | |
315 | if (pdata->port_mode[1] == OMAP_EHCI_PORT_MODE_PHY) | |
316 | omap_ehci_soft_phy_reset(pdev, 1); | |
88114266 | 317 | |
19403165 KM |
318 | omap_ehci = hcd_to_ehci(hcd); |
319 | omap_ehci->sbrn = 0x20; | |
54ab2b02 | 320 | |
19403165 KM |
321 | /* we know this is the memory we want, no need to ioremap again */ |
322 | omap_ehci->caps = hcd->regs; | |
323 | omap_ehci->regs = hcd->regs | |
c430131a | 324 | + HC_LENGTH(ehci, readl(&omap_ehci->caps->hc_capbase)); |
54ab2b02 | 325 | |
19403165 KM |
326 | dbg_hcs_params(omap_ehci, "reset"); |
327 | dbg_hcc_params(omap_ehci, "reset"); | |
bdb581bd | 328 | |
54ab2b02 | 329 | /* cache this readonly data; minimize chip reads */ |
19403165 | 330 | omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params); |
54ab2b02 | 331 | |
876e0df9 GL |
332 | ehci_reset(omap_ehci); |
333 | ||
1fcb57d0 KM |
334 | if (pdata->phy_reset) { |
335 | /* Hold the PHY in RESET for enough time till | |
336 | * PHY is settled and ready | |
337 | */ | |
338 | udelay(10); | |
339 | ||
340 | if (gpio_is_valid(pdata->reset_gpio_port[0])) | |
7b18389d | 341 | gpio_set_value_cansleep(pdata->reset_gpio_port[0], 1); |
1fcb57d0 KM |
342 | |
343 | if (gpio_is_valid(pdata->reset_gpio_port[1])) | |
7b18389d | 344 | gpio_set_value_cansleep(pdata->reset_gpio_port[1], 1); |
1fcb57d0 KM |
345 | } |
346 | ||
3aa2ae74 RD |
347 | ret = usb_add_hcd(hcd, irq, IRQF_SHARED); |
348 | if (ret) { | |
349 | dev_err(dev, "failed to add hcd with err %d\n", ret); | |
350 | goto err_add_hcd; | |
351 | } | |
352 | ||
353 | /* root ports should always stay powered */ | |
354 | ehci_port_power(omap_ehci, 1); | |
355 | ||
354ab856 AG |
356 | /* get clocks */ |
357 | utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); | |
358 | if (IS_ERR(utmi_p1_fck)) { | |
359 | ret = PTR_ERR(utmi_p1_fck); | |
360 | dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); | |
361 | goto err_add_hcd; | |
362 | } | |
363 | ||
364 | xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); | |
365 | if (IS_ERR(xclk60mhsp1_ck)) { | |
366 | ret = PTR_ERR(xclk60mhsp1_ck); | |
367 | dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret); | |
368 | goto err_utmi_p1_fck; | |
369 | } | |
370 | ||
371 | utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk"); | |
372 | if (IS_ERR(utmi_p2_fck)) { | |
373 | ret = PTR_ERR(utmi_p2_fck); | |
374 | dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); | |
375 | goto err_xclk60mhsp1_ck; | |
376 | } | |
377 | ||
378 | xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck"); | |
379 | if (IS_ERR(xclk60mhsp2_ck)) { | |
380 | ret = PTR_ERR(xclk60mhsp2_ck); | |
381 | dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret); | |
382 | goto err_utmi_p2_fck; | |
383 | } | |
384 | ||
385 | usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk"); | |
386 | if (IS_ERR(usbhost_p1_fck)) { | |
387 | ret = PTR_ERR(usbhost_p1_fck); | |
388 | dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret); | |
389 | goto err_xclk60mhsp2_ck; | |
390 | } | |
391 | ||
392 | usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); | |
393 | if (IS_ERR(usbhost_p2_fck)) { | |
394 | ret = PTR_ERR(usbhost_p2_fck); | |
395 | dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); | |
396 | goto err_usbhost_p1_fck; | |
397 | } | |
398 | ||
399 | init_60m_fclk = clk_get(dev, "init_60m_fclk"); | |
400 | if (IS_ERR(init_60m_fclk)) { | |
401 | ret = PTR_ERR(init_60m_fclk); | |
402 | dev_err(dev, "init_60m_fclk failed error:%d\n", ret); | |
403 | goto err_usbhost_p2_fck; | |
404 | } | |
405 | ||
54ab2b02 FB |
406 | return 0; |
407 | ||
354ab856 AG |
408 | err_usbhost_p2_fck: |
409 | clk_put(usbhost_p2_fck); | |
410 | ||
411 | err_usbhost_p1_fck: | |
412 | clk_put(usbhost_p1_fck); | |
413 | ||
414 | err_xclk60mhsp2_ck: | |
415 | clk_put(xclk60mhsp2_ck); | |
416 | ||
417 | err_utmi_p2_fck: | |
418 | clk_put(utmi_p2_fck); | |
419 | ||
420 | err_xclk60mhsp1_ck: | |
421 | clk_put(xclk60mhsp1_ck); | |
422 | ||
423 | err_utmi_p1_fck: | |
424 | clk_put(utmi_p1_fck); | |
425 | ||
54ab2b02 | 426 | err_add_hcd: |
d4aefec5 | 427 | disable_put_regulator(pdata); |
6c984b06 | 428 | pm_runtime_put_sync(dev); |
54ab2b02 | 429 | |
19403165 | 430 | err_io: |
d4aefec5 | 431 | iounmap(regs); |
54ab2b02 FB |
432 | return ret; |
433 | } | |
434 | ||
54ab2b02 FB |
435 | |
436 | /** | |
437 | * ehci_hcd_omap_remove - shutdown processing for EHCI HCDs | |
438 | * @pdev: USB Host Controller being removed | |
439 | * | |
440 | * Reverses the effect of usb_ehci_hcd_omap_probe(), first invoking | |
441 | * the HCD's stop() method. It is always called from a thread | |
442 | * context, normally "rmmod", "apmd", or something similar. | |
443 | */ | |
444 | static int ehci_hcd_omap_remove(struct platform_device *pdev) | |
445 | { | |
1fcb57d0 KM |
446 | struct device *dev = &pdev->dev; |
447 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
448 | struct ehci_hcd_omap_platform_data *pdata = dev->platform_data; | |
54ab2b02 FB |
449 | |
450 | usb_remove_hcd(hcd); | |
d4aefec5 ML |
451 | disable_put_regulator(dev->platform_data); |
452 | iounmap(hcd->regs); | |
54ab2b02 | 453 | usb_put_hcd(hcd); |
354ab856 AG |
454 | |
455 | clk_put(utmi_p1_fck); | |
456 | clk_put(utmi_p2_fck); | |
457 | clk_put(xclk60mhsp1_ck); | |
458 | clk_put(xclk60mhsp2_ck); | |
459 | clk_put(usbhost_p1_fck); | |
460 | clk_put(usbhost_p2_fck); | |
461 | clk_put(init_60m_fclk); | |
462 | ||
6c984b06 KM |
463 | pm_runtime_put_sync(dev); |
464 | pm_runtime_disable(dev); | |
465 | ||
1fcb57d0 KM |
466 | if (pdata->phy_reset) { |
467 | if (gpio_is_valid(pdata->reset_gpio_port[0])) | |
468 | gpio_free(pdata->reset_gpio_port[0]); | |
469 | ||
470 | if (gpio_is_valid(pdata->reset_gpio_port[1])) | |
471 | gpio_free(pdata->reset_gpio_port[1]); | |
472 | } | |
54ab2b02 FB |
473 | return 0; |
474 | } | |
475 | ||
476 | static void ehci_hcd_omap_shutdown(struct platform_device *pdev) | |
477 | { | |
19403165 | 478 | struct usb_hcd *hcd = dev_get_drvdata(&pdev->dev); |
54ab2b02 FB |
479 | |
480 | if (hcd->driver->shutdown) | |
481 | hcd->driver->shutdown(hcd); | |
482 | } | |
483 | ||
484 | static struct platform_driver ehci_hcd_omap_driver = { | |
485 | .probe = ehci_hcd_omap_probe, | |
486 | .remove = ehci_hcd_omap_remove, | |
487 | .shutdown = ehci_hcd_omap_shutdown, | |
488 | /*.suspend = ehci_hcd_omap_suspend, */ | |
489 | /*.resume = ehci_hcd_omap_resume, */ | |
490 | .driver = { | |
491 | .name = "ehci-omap", | |
492 | } | |
493 | }; | |
494 | ||
495 | /*-------------------------------------------------------------------------*/ | |
496 | ||
497 | static const struct hc_driver ehci_omap_hc_driver = { | |
498 | .description = hcd_name, | |
499 | .product_desc = "OMAP-EHCI Host Controller", | |
500 | .hcd_priv_size = sizeof(struct ehci_hcd), | |
501 | ||
502 | /* | |
503 | * generic hardware linkage | |
504 | */ | |
505 | .irq = ehci_irq, | |
506 | .flags = HCD_MEMORY | HCD_USB2, | |
507 | ||
508 | /* | |
509 | * basic lifecycle operations | |
510 | */ | |
511 | .reset = ehci_init, | |
512 | .start = ehci_run, | |
513 | .stop = ehci_stop, | |
514 | .shutdown = ehci_shutdown, | |
515 | ||
516 | /* | |
517 | * managing i/o requests and associated device resources | |
518 | */ | |
519 | .urb_enqueue = ehci_urb_enqueue, | |
520 | .urb_dequeue = ehci_urb_dequeue, | |
521 | .endpoint_disable = ehci_endpoint_disable, | |
522 | .endpoint_reset = ehci_endpoint_reset, | |
523 | ||
524 | /* | |
525 | * scheduling support | |
526 | */ | |
527 | .get_frame_number = ehci_get_frame, | |
528 | ||
529 | /* | |
530 | * root hub support | |
531 | */ | |
532 | .hub_status_data = ehci_hub_status_data, | |
354ab856 | 533 | .hub_control = omap_ehci_hub_control, |
54ab2b02 FB |
534 | .bus_suspend = ehci_bus_suspend, |
535 | .bus_resume = ehci_bus_resume, | |
536 | ||
537 | .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, | |
538 | }; | |
539 | ||
540 | MODULE_ALIAS("platform:omap-ehci"); | |
541 | MODULE_AUTHOR("Texas Instruments, Inc."); | |
542 | MODULE_AUTHOR("Felipe Balbi <felipe.balbi@nokia.com>"); | |
543 |