Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2001-2004 by David Brownell | |
3 | * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers | |
53bd6a60 | 4 | * |
1da177e4 LT |
5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
12 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
13 | * for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software Foundation, | |
17 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | */ | |
19 | ||
20 | /* this file is part of ehci-hcd.c */ | |
21 | ||
22 | /*-------------------------------------------------------------------------*/ | |
23 | ||
24 | /* | |
25 | * EHCI scheduled transaction support: interrupt, iso, split iso | |
26 | * These are called "periodic" transactions in the EHCI spec. | |
27 | * | |
28 | * Note that for interrupt transfers, the QH/QTD manipulation is shared | |
29 | * with the "asynchronous" transaction support (control/bulk transfers). | |
30 | * The only real difference is in how interrupt transfers are scheduled. | |
31 | * | |
32 | * For ISO, we make an "iso_stream" head to serve the same role as a QH. | |
33 | * It keeps track of every ITD (or SITD) that's linked, and holds enough | |
34 | * pre-calculated schedule data to make appending to the queue be quick. | |
35 | */ | |
36 | ||
37 | static int ehci_get_frame (struct usb_hcd *hcd); | |
38 | ||
68aa95d5 AS |
39 | #ifdef CONFIG_PCI |
40 | ||
41 | static unsigned ehci_read_frame_index(struct ehci_hcd *ehci) | |
42 | { | |
43 | unsigned uf; | |
44 | ||
45 | /* | |
46 | * The MosChip MCS9990 controller updates its microframe counter | |
47 | * a little before the frame counter, and occasionally we will read | |
48 | * the invalid intermediate value. Avoid problems by checking the | |
49 | * microframe number (the low-order 3 bits); if they are 0 then | |
50 | * re-read the register to get the correct value. | |
51 | */ | |
52 | uf = ehci_readl(ehci, &ehci->regs->frame_index); | |
53 | if (unlikely(ehci->frame_index_bug && ((uf & 7) == 0))) | |
54 | uf = ehci_readl(ehci, &ehci->regs->frame_index); | |
55 | return uf; | |
56 | } | |
57 | ||
58 | #endif | |
59 | ||
1da177e4 LT |
60 | /*-------------------------------------------------------------------------*/ |
61 | ||
62 | /* | |
63 | * periodic_next_shadow - return "next" pointer on shadow list | |
64 | * @periodic: host pointer to qh/itd/sitd | |
65 | * @tag: hardware tag for type of this record | |
66 | */ | |
67 | static union ehci_shadow * | |
6dbd682b SR |
68 | periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic, |
69 | __hc32 tag) | |
1da177e4 | 70 | { |
6dbd682b | 71 | switch (hc32_to_cpu(ehci, tag)) { |
1da177e4 LT |
72 | case Q_TYPE_QH: |
73 | return &periodic->qh->qh_next; | |
74 | case Q_TYPE_FSTN: | |
75 | return &periodic->fstn->fstn_next; | |
76 | case Q_TYPE_ITD: | |
77 | return &periodic->itd->itd_next; | |
78 | // case Q_TYPE_SITD: | |
79 | default: | |
80 | return &periodic->sitd->sitd_next; | |
81 | } | |
82 | } | |
83 | ||
3807e26d AD |
84 | static __hc32 * |
85 | shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic, | |
86 | __hc32 tag) | |
87 | { | |
88 | switch (hc32_to_cpu(ehci, tag)) { | |
89 | /* our ehci_shadow.qh is actually software part */ | |
90 | case Q_TYPE_QH: | |
91 | return &periodic->qh->hw->hw_next; | |
92 | /* others are hw parts */ | |
93 | default: | |
94 | return periodic->hw_next; | |
95 | } | |
96 | } | |
97 | ||
1da177e4 LT |
98 | /* caller must hold ehci->lock */ |
99 | static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) | |
100 | { | |
6dbd682b SR |
101 | union ehci_shadow *prev_p = &ehci->pshadow[frame]; |
102 | __hc32 *hw_p = &ehci->periodic[frame]; | |
1da177e4 LT |
103 | union ehci_shadow here = *prev_p; |
104 | ||
105 | /* find predecessor of "ptr"; hw and shadow lists are in sync */ | |
106 | while (here.ptr && here.ptr != ptr) { | |
6dbd682b SR |
107 | prev_p = periodic_next_shadow(ehci, prev_p, |
108 | Q_NEXT_TYPE(ehci, *hw_p)); | |
3807e26d AD |
109 | hw_p = shadow_next_periodic(ehci, &here, |
110 | Q_NEXT_TYPE(ehci, *hw_p)); | |
1da177e4 LT |
111 | here = *prev_p; |
112 | } | |
113 | /* an interrupt entry (at list end) could have been shared */ | |
114 | if (!here.ptr) | |
115 | return; | |
116 | ||
117 | /* update shadow and hardware lists ... the old "next" pointers | |
118 | * from ptr may still be in use, the caller updates them. | |
119 | */ | |
6dbd682b SR |
120 | *prev_p = *periodic_next_shadow(ehci, &here, |
121 | Q_NEXT_TYPE(ehci, *hw_p)); | |
3d091a6f AX |
122 | |
123 | if (!ehci->use_dummy_qh || | |
124 | *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p)) | |
125 | != EHCI_LIST_END(ehci)) | |
126 | *hw_p = *shadow_next_periodic(ehci, &here, | |
127 | Q_NEXT_TYPE(ehci, *hw_p)); | |
128 | else | |
129 | *hw_p = ehci->dummy->qh_dma; | |
1da177e4 LT |
130 | } |
131 | ||
132 | /* how many of the uframe's 125 usecs are allocated? */ | |
133 | static unsigned short | |
134 | periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) | |
135 | { | |
6dbd682b | 136 | __hc32 *hw_p = &ehci->periodic [frame]; |
1da177e4 LT |
137 | union ehci_shadow *q = &ehci->pshadow [frame]; |
138 | unsigned usecs = 0; | |
3807e26d | 139 | struct ehci_qh_hw *hw; |
1da177e4 LT |
140 | |
141 | while (q->ptr) { | |
6dbd682b | 142 | switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) { |
1da177e4 | 143 | case Q_TYPE_QH: |
3807e26d | 144 | hw = q->qh->hw; |
1da177e4 | 145 | /* is it in the S-mask? */ |
3807e26d | 146 | if (hw->hw_info2 & cpu_to_hc32(ehci, 1 << uframe)) |
1da177e4 LT |
147 | usecs += q->qh->usecs; |
148 | /* ... or C-mask? */ | |
3807e26d | 149 | if (hw->hw_info2 & cpu_to_hc32(ehci, |
6dbd682b | 150 | 1 << (8 + uframe))) |
1da177e4 | 151 | usecs += q->qh->c_usecs; |
3807e26d | 152 | hw_p = &hw->hw_next; |
1da177e4 LT |
153 | q = &q->qh->qh_next; |
154 | break; | |
155 | // case Q_TYPE_FSTN: | |
156 | default: | |
157 | /* for "save place" FSTNs, count the relevant INTR | |
158 | * bandwidth from the previous frame | |
159 | */ | |
6dbd682b | 160 | if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) { |
1da177e4 LT |
161 | ehci_dbg (ehci, "ignoring FSTN cost ...\n"); |
162 | } | |
163 | hw_p = &q->fstn->hw_next; | |
164 | q = &q->fstn->fstn_next; | |
165 | break; | |
166 | case Q_TYPE_ITD: | |
3b6fcfd0 KW |
167 | if (q->itd->hw_transaction[uframe]) |
168 | usecs += q->itd->stream->usecs; | |
1da177e4 LT |
169 | hw_p = &q->itd->hw_next; |
170 | q = &q->itd->itd_next; | |
171 | break; | |
172 | case Q_TYPE_SITD: | |
173 | /* is it in the S-mask? (count SPLIT, DATA) */ | |
6dbd682b SR |
174 | if (q->sitd->hw_uframe & cpu_to_hc32(ehci, |
175 | 1 << uframe)) { | |
1da177e4 | 176 | if (q->sitd->hw_fullspeed_ep & |
6dbd682b | 177 | cpu_to_hc32(ehci, 1<<31)) |
1da177e4 LT |
178 | usecs += q->sitd->stream->usecs; |
179 | else /* worst case for OUT start-split */ | |
180 | usecs += HS_USECS_ISO (188); | |
181 | } | |
182 | ||
183 | /* ... C-mask? (count CSPLIT, DATA) */ | |
184 | if (q->sitd->hw_uframe & | |
6dbd682b | 185 | cpu_to_hc32(ehci, 1 << (8 + uframe))) { |
1da177e4 LT |
186 | /* worst case for IN complete-split */ |
187 | usecs += q->sitd->stream->c_usecs; | |
188 | } | |
189 | ||
190 | hw_p = &q->sitd->hw_next; | |
191 | q = &q->sitd->sitd_next; | |
192 | break; | |
193 | } | |
194 | } | |
195 | #ifdef DEBUG | |
cc62a7eb | 196 | if (usecs > ehci->uframe_periodic_max) |
1da177e4 LT |
197 | ehci_err (ehci, "uframe %d sched overrun: %d usecs\n", |
198 | frame * 8 + uframe, usecs); | |
199 | #endif | |
200 | return usecs; | |
201 | } | |
202 | ||
203 | /*-------------------------------------------------------------------------*/ | |
204 | ||
205 | static int same_tt (struct usb_device *dev1, struct usb_device *dev2) | |
206 | { | |
207 | if (!dev1->tt || !dev2->tt) | |
208 | return 0; | |
209 | if (dev1->tt != dev2->tt) | |
210 | return 0; | |
211 | if (dev1->tt->multi) | |
212 | return dev1->ttport == dev2->ttport; | |
213 | else | |
214 | return 1; | |
215 | } | |
216 | ||
ba47f66b DS |
217 | #ifdef CONFIG_USB_EHCI_TT_NEWSCHED |
218 | ||
219 | /* Which uframe does the low/fullspeed transfer start in? | |
220 | * | |
221 | * The parameter is the mask of ssplits in "H-frame" terms | |
222 | * and this returns the transfer start uframe in "B-frame" terms, | |
223 | * which allows both to match, e.g. a ssplit in "H-frame" uframe 0 | |
224 | * will cause a transfer in "B-frame" uframe 0. "B-frames" lag | |
225 | * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7. | |
226 | */ | |
6dbd682b | 227 | static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask) |
ba47f66b | 228 | { |
6dbd682b | 229 | unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask); |
ba47f66b DS |
230 | if (!smask) { |
231 | ehci_err(ehci, "invalid empty smask!\n"); | |
232 | /* uframe 7 can't have bw so this will indicate failure */ | |
233 | return 7; | |
234 | } | |
235 | return ffs(smask) - 1; | |
236 | } | |
237 | ||
238 | static const unsigned char | |
239 | max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 }; | |
240 | ||
241 | /* carryover low/fullspeed bandwidth that crosses uframe boundries */ | |
242 | static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8]) | |
243 | { | |
244 | int i; | |
245 | for (i=0; i<7; i++) { | |
246 | if (max_tt_usecs[i] < tt_usecs[i]) { | |
247 | tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i]; | |
248 | tt_usecs[i] = max_tt_usecs[i]; | |
249 | } | |
250 | } | |
251 | } | |
252 | ||
253 | /* How many of the tt's periodic downstream 1000 usecs are allocated? | |
254 | * | |
255 | * While this measures the bandwidth in terms of usecs/uframe, | |
256 | * the low/fullspeed bus has no notion of uframes, so any particular | |
257 | * low/fullspeed transfer can "carry over" from one uframe to the next, | |
258 | * since the TT just performs downstream transfers in sequence. | |
259 | * | |
dc0d5c1e | 260 | * For example two separate 100 usec transfers can start in the same uframe, |
ba47f66b DS |
261 | * and the second one would "carry over" 75 usecs into the next uframe. |
262 | */ | |
263 | static void | |
264 | periodic_tt_usecs ( | |
265 | struct ehci_hcd *ehci, | |
266 | struct usb_device *dev, | |
267 | unsigned frame, | |
268 | unsigned short tt_usecs[8] | |
269 | ) | |
270 | { | |
6dbd682b | 271 | __hc32 *hw_p = &ehci->periodic [frame]; |
ba47f66b DS |
272 | union ehci_shadow *q = &ehci->pshadow [frame]; |
273 | unsigned char uf; | |
274 | ||
275 | memset(tt_usecs, 0, 16); | |
276 | ||
277 | while (q->ptr) { | |
6dbd682b | 278 | switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) { |
ba47f66b DS |
279 | case Q_TYPE_ITD: |
280 | hw_p = &q->itd->hw_next; | |
281 | q = &q->itd->itd_next; | |
282 | continue; | |
283 | case Q_TYPE_QH: | |
284 | if (same_tt(dev, q->qh->dev)) { | |
3807e26d | 285 | uf = tt_start_uframe(ehci, q->qh->hw->hw_info2); |
ba47f66b DS |
286 | tt_usecs[uf] += q->qh->tt_usecs; |
287 | } | |
3807e26d | 288 | hw_p = &q->qh->hw->hw_next; |
ba47f66b DS |
289 | q = &q->qh->qh_next; |
290 | continue; | |
291 | case Q_TYPE_SITD: | |
292 | if (same_tt(dev, q->sitd->urb->dev)) { | |
293 | uf = tt_start_uframe(ehci, q->sitd->hw_uframe); | |
294 | tt_usecs[uf] += q->sitd->stream->tt_usecs; | |
295 | } | |
296 | hw_p = &q->sitd->hw_next; | |
297 | q = &q->sitd->sitd_next; | |
298 | continue; | |
299 | // case Q_TYPE_FSTN: | |
300 | default: | |
6dbd682b SR |
301 | ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n", |
302 | frame); | |
ba47f66b DS |
303 | hw_p = &q->fstn->hw_next; |
304 | q = &q->fstn->fstn_next; | |
305 | } | |
306 | } | |
307 | ||
308 | carryover_tt_bandwidth(tt_usecs); | |
309 | ||
310 | if (max_tt_usecs[7] < tt_usecs[7]) | |
311 | ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n", | |
312 | frame, tt_usecs[7] - max_tt_usecs[7]); | |
313 | } | |
314 | ||
315 | /* | |
316 | * Return true if the device's tt's downstream bus is available for a | |
317 | * periodic transfer of the specified length (usecs), starting at the | |
318 | * specified frame/uframe. Note that (as summarized in section 11.19 | |
319 | * of the usb 2.0 spec) TTs can buffer multiple transactions for each | |
320 | * uframe. | |
321 | * | |
322 | * The uframe parameter is when the fullspeed/lowspeed transfer | |
323 | * should be executed in "B-frame" terms, which is the same as the | |
324 | * highspeed ssplit's uframe (which is in "H-frame" terms). For example | |
325 | * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0. | |
326 | * See the EHCI spec sec 4.5 and fig 4.7. | |
327 | * | |
328 | * This checks if the full/lowspeed bus, at the specified starting uframe, | |
329 | * has the specified bandwidth available, according to rules listed | |
330 | * in USB 2.0 spec section 11.18.1 fig 11-60. | |
331 | * | |
332 | * This does not check if the transfer would exceed the max ssplit | |
333 | * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4, | |
334 | * since proper scheduling limits ssplits to less than 16 per uframe. | |
335 | */ | |
336 | static int tt_available ( | |
337 | struct ehci_hcd *ehci, | |
338 | unsigned period, | |
339 | struct usb_device *dev, | |
340 | unsigned frame, | |
341 | unsigned uframe, | |
342 | u16 usecs | |
343 | ) | |
344 | { | |
345 | if ((period == 0) || (uframe >= 7)) /* error */ | |
346 | return 0; | |
347 | ||
348 | for (; frame < ehci->periodic_size; frame += period) { | |
349 | unsigned short tt_usecs[8]; | |
350 | ||
351 | periodic_tt_usecs (ehci, dev, frame, tt_usecs); | |
352 | ||
353 | ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in" | |
354 | " schedule %d/%d/%d/%d/%d/%d/%d/%d\n", | |
355 | frame, usecs, uframe, | |
356 | tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3], | |
357 | tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]); | |
358 | ||
359 | if (max_tt_usecs[uframe] <= tt_usecs[uframe]) { | |
360 | ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n", | |
361 | frame, uframe); | |
362 | return 0; | |
363 | } | |
364 | ||
365 | /* special case for isoc transfers larger than 125us: | |
366 | * the first and each subsequent fully used uframe | |
367 | * must be empty, so as to not illegally delay | |
368 | * already scheduled transactions | |
369 | */ | |
370 | if (125 < usecs) { | |
c065c60e | 371 | int ufs = (usecs / 125); |
ba47f66b DS |
372 | int i; |
373 | for (i = uframe; i < (uframe + ufs) && i < 8; i++) | |
374 | if (0 < tt_usecs[i]) { | |
375 | ehci_vdbg(ehci, | |
376 | "multi-uframe xfer can't fit " | |
377 | "in frame %d uframe %d\n", | |
378 | frame, i); | |
379 | return 0; | |
380 | } | |
381 | } | |
382 | ||
383 | tt_usecs[uframe] += usecs; | |
384 | ||
385 | carryover_tt_bandwidth(tt_usecs); | |
386 | ||
387 | /* fail if the carryover pushed bw past the last uframe's limit */ | |
388 | if (max_tt_usecs[7] < tt_usecs[7]) { | |
389 | ehci_vdbg(ehci, | |
390 | "tt unavailable usecs %d frame %d uframe %d\n", | |
391 | usecs, frame, uframe); | |
392 | return 0; | |
393 | } | |
394 | } | |
395 | ||
396 | return 1; | |
397 | } | |
398 | ||
399 | #else | |
400 | ||
1da177e4 LT |
401 | /* return true iff the device's transaction translator is available |
402 | * for a periodic transfer starting at the specified frame, using | |
403 | * all the uframes in the mask. | |
404 | */ | |
405 | static int tt_no_collision ( | |
406 | struct ehci_hcd *ehci, | |
407 | unsigned period, | |
408 | struct usb_device *dev, | |
409 | unsigned frame, | |
410 | u32 uf_mask | |
411 | ) | |
412 | { | |
413 | if (period == 0) /* error */ | |
414 | return 0; | |
415 | ||
416 | /* note bandwidth wastage: split never follows csplit | |
417 | * (different dev or endpoint) until the next uframe. | |
418 | * calling convention doesn't make that distinction. | |
419 | */ | |
420 | for (; frame < ehci->periodic_size; frame += period) { | |
421 | union ehci_shadow here; | |
6dbd682b | 422 | __hc32 type; |
3807e26d | 423 | struct ehci_qh_hw *hw; |
1da177e4 LT |
424 | |
425 | here = ehci->pshadow [frame]; | |
6dbd682b | 426 | type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]); |
1da177e4 | 427 | while (here.ptr) { |
6dbd682b | 428 | switch (hc32_to_cpu(ehci, type)) { |
1da177e4 | 429 | case Q_TYPE_ITD: |
6dbd682b | 430 | type = Q_NEXT_TYPE(ehci, here.itd->hw_next); |
1da177e4 LT |
431 | here = here.itd->itd_next; |
432 | continue; | |
433 | case Q_TYPE_QH: | |
3807e26d | 434 | hw = here.qh->hw; |
1da177e4 LT |
435 | if (same_tt (dev, here.qh->dev)) { |
436 | u32 mask; | |
437 | ||
6dbd682b | 438 | mask = hc32_to_cpu(ehci, |
3807e26d | 439 | hw->hw_info2); |
1da177e4 LT |
440 | /* "knows" no gap is needed */ |
441 | mask |= mask >> 8; | |
442 | if (mask & uf_mask) | |
443 | break; | |
444 | } | |
3807e26d | 445 | type = Q_NEXT_TYPE(ehci, hw->hw_next); |
1da177e4 LT |
446 | here = here.qh->qh_next; |
447 | continue; | |
448 | case Q_TYPE_SITD: | |
449 | if (same_tt (dev, here.sitd->urb->dev)) { | |
450 | u16 mask; | |
451 | ||
6dbd682b | 452 | mask = hc32_to_cpu(ehci, here.sitd |
1da177e4 LT |
453 | ->hw_uframe); |
454 | /* FIXME assumes no gap for IN! */ | |
455 | mask |= mask >> 8; | |
456 | if (mask & uf_mask) | |
457 | break; | |
458 | } | |
6dbd682b | 459 | type = Q_NEXT_TYPE(ehci, here.sitd->hw_next); |
1da177e4 LT |
460 | here = here.sitd->sitd_next; |
461 | continue; | |
462 | // case Q_TYPE_FSTN: | |
463 | default: | |
464 | ehci_dbg (ehci, | |
465 | "periodic frame %d bogus type %d\n", | |
466 | frame, type); | |
467 | } | |
468 | ||
469 | /* collision or error */ | |
470 | return 0; | |
471 | } | |
472 | } | |
473 | ||
474 | /* no collision */ | |
475 | return 1; | |
476 | } | |
477 | ||
ba47f66b DS |
478 | #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */ |
479 | ||
1da177e4 LT |
480 | /*-------------------------------------------------------------------------*/ |
481 | ||
482 | static int enable_periodic (struct ehci_hcd *ehci) | |
483 | { | |
1da177e4 LT |
484 | int status; |
485 | ||
01c17142 DB |
486 | if (ehci->periodic_sched++) |
487 | return 0; | |
488 | ||
1da177e4 LT |
489 | /* did clearing PSE did take effect yet? |
490 | * takes effect only at frame boundaries... | |
491 | */ | |
c765d4ca KW |
492 | status = handshake_on_error_set_halt(ehci, &ehci->regs->status, |
493 | STS_PSS, 0, 9 * 125); | |
69fff59d AS |
494 | if (status) { |
495 | usb_hc_died(ehci_to_hcd(ehci)); | |
1da177e4 | 496 | return status; |
69fff59d | 497 | } |
1da177e4 | 498 | |
3d9545cc AS |
499 | ehci->command |= CMD_PSE; |
500 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | |
1da177e4 | 501 | /* posted write ... PSS happens later */ |
1da177e4 LT |
502 | |
503 | /* make sure ehci_work scans these */ | |
68aa95d5 | 504 | ehci->next_uframe = ehci_read_frame_index(ehci) |
083522d7 | 505 | % (ehci->periodic_size << 3); |
ee4ecb8a ON |
506 | if (unlikely(ehci->broken_periodic)) |
507 | ehci->last_periodic_enable = ktime_get_real(); | |
1da177e4 LT |
508 | return 0; |
509 | } | |
510 | ||
511 | static int disable_periodic (struct ehci_hcd *ehci) | |
512 | { | |
1da177e4 LT |
513 | int status; |
514 | ||
01c17142 DB |
515 | if (--ehci->periodic_sched) |
516 | return 0; | |
517 | ||
ee4ecb8a ON |
518 | if (unlikely(ehci->broken_periodic)) { |
519 | /* delay experimentally determined */ | |
520 | ktime_t safe = ktime_add_us(ehci->last_periodic_enable, 1000); | |
521 | ktime_t now = ktime_get_real(); | |
522 | s64 delay = ktime_us_delta(safe, now); | |
523 | ||
524 | if (unlikely(delay > 0)) | |
525 | udelay(delay); | |
526 | } | |
527 | ||
1da177e4 LT |
528 | /* did setting PSE not take effect yet? |
529 | * takes effect only at frame boundaries... | |
530 | */ | |
c765d4ca KW |
531 | status = handshake_on_error_set_halt(ehci, &ehci->regs->status, |
532 | STS_PSS, STS_PSS, 9 * 125); | |
69fff59d AS |
533 | if (status) { |
534 | usb_hc_died(ehci_to_hcd(ehci)); | |
1da177e4 | 535 | return status; |
69fff59d | 536 | } |
1da177e4 | 537 | |
3d9545cc AS |
538 | ehci->command &= ~CMD_PSE; |
539 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | |
1da177e4 LT |
540 | /* posted write ... */ |
541 | ||
0e5f231b | 542 | free_cached_lists(ehci); |
d63c66d2 | 543 | |
1da177e4 LT |
544 | ehci->next_uframe = -1; |
545 | return 0; | |
546 | } | |
547 | ||
548 | /*-------------------------------------------------------------------------*/ | |
549 | ||
550 | /* periodic schedule slots have iso tds (normal or split) first, then a | |
551 | * sparse tree for active interrupt transfers. | |
552 | * | |
553 | * this just links in a qh; caller guarantees uframe masks are set right. | |
554 | * no FSTN support (yet; ehci 0.96+) | |
555 | */ | |
556 | static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) | |
557 | { | |
558 | unsigned i; | |
559 | unsigned period = qh->period; | |
560 | ||
561 | dev_dbg (&qh->dev->dev, | |
562 | "link qh%d-%04x/%p start %d [%d/%d us]\n", | |
3807e26d AD |
563 | period, hc32_to_cpup(ehci, &qh->hw->hw_info2) |
564 | & (QH_CMASK | QH_SMASK), | |
1da177e4 LT |
565 | qh, qh->start, qh->usecs, qh->c_usecs); |
566 | ||
567 | /* high bandwidth, or otherwise every microframe */ | |
568 | if (period == 0) | |
569 | period = 1; | |
570 | ||
571 | for (i = qh->start; i < ehci->periodic_size; i += period) { | |
6dbd682b SR |
572 | union ehci_shadow *prev = &ehci->pshadow[i]; |
573 | __hc32 *hw_p = &ehci->periodic[i]; | |
1da177e4 | 574 | union ehci_shadow here = *prev; |
6dbd682b | 575 | __hc32 type = 0; |
1da177e4 LT |
576 | |
577 | /* skip the iso nodes at list head */ | |
578 | while (here.ptr) { | |
6dbd682b SR |
579 | type = Q_NEXT_TYPE(ehci, *hw_p); |
580 | if (type == cpu_to_hc32(ehci, Q_TYPE_QH)) | |
1da177e4 | 581 | break; |
6dbd682b | 582 | prev = periodic_next_shadow(ehci, prev, type); |
3807e26d | 583 | hw_p = shadow_next_periodic(ehci, &here, type); |
1da177e4 LT |
584 | here = *prev; |
585 | } | |
586 | ||
587 | /* sorting each branch by period (slow-->fast) | |
588 | * enables sharing interior tree nodes | |
589 | */ | |
590 | while (here.ptr && qh != here.qh) { | |
591 | if (qh->period > here.qh->period) | |
592 | break; | |
593 | prev = &here.qh->qh_next; | |
3807e26d | 594 | hw_p = &here.qh->hw->hw_next; |
1da177e4 LT |
595 | here = *prev; |
596 | } | |
597 | /* link in this qh, unless some earlier pass did that */ | |
598 | if (qh != here.qh) { | |
599 | qh->qh_next = here; | |
600 | if (here.qh) | |
3807e26d | 601 | qh->hw->hw_next = *hw_p; |
1da177e4 LT |
602 | wmb (); |
603 | prev->qh = qh; | |
6dbd682b | 604 | *hw_p = QH_NEXT (ehci, qh->qh_dma); |
1da177e4 LT |
605 | } |
606 | } | |
607 | qh->qh_state = QH_STATE_LINKED; | |
ef4638f9 | 608 | qh->xacterrs = 0; |
1da177e4 LT |
609 | |
610 | /* update per-qh bandwidth for usbfs */ | |
611 | ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period | |
612 | ? ((qh->usecs + qh->c_usecs) / qh->period) | |
613 | : (qh->usecs * 8); | |
614 | ||
615 | /* maybe enable periodic schedule processing */ | |
01c17142 | 616 | return enable_periodic(ehci); |
1da177e4 LT |
617 | } |
618 | ||
01c17142 | 619 | static int qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh) |
1da177e4 LT |
620 | { |
621 | unsigned i; | |
622 | unsigned period; | |
623 | ||
624 | // FIXME: | |
625 | // IF this isn't high speed | |
626 | // and this qh is active in the current uframe | |
627 | // (and overlay token SplitXstate is false?) | |
628 | // THEN | |
551509d2 | 629 | // qh->hw_info1 |= cpu_to_hc32(1 << 7 /* "ignore" */); |
1da177e4 LT |
630 | |
631 | /* high bandwidth, or otherwise part of every microframe */ | |
632 | if ((period = qh->period) == 0) | |
633 | period = 1; | |
634 | ||
635 | for (i = qh->start; i < ehci->periodic_size; i += period) | |
636 | periodic_unlink (ehci, i, qh); | |
637 | ||
638 | /* update per-qh bandwidth for usbfs */ | |
639 | ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period | |
640 | ? ((qh->usecs + qh->c_usecs) / qh->period) | |
641 | : (qh->usecs * 8); | |
642 | ||
643 | dev_dbg (&qh->dev->dev, | |
644 | "unlink qh%d-%04x/%p start %d [%d/%d us]\n", | |
7dedacf4 | 645 | qh->period, |
3807e26d | 646 | hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK), |
1da177e4 LT |
647 | qh, qh->start, qh->usecs, qh->c_usecs); |
648 | ||
649 | /* qh->qh_next still "live" to HC */ | |
650 | qh->qh_state = QH_STATE_UNLINK; | |
651 | qh->qh_next.ptr = NULL; | |
1da177e4 LT |
652 | |
653 | /* maybe turn off periodic schedule */ | |
01c17142 | 654 | return disable_periodic(ehci); |
1da177e4 LT |
655 | } |
656 | ||
657 | static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh) | |
658 | { | |
a448c9d8 AS |
659 | unsigned wait; |
660 | struct ehci_qh_hw *hw = qh->hw; | |
661 | int rc; | |
662 | ||
663 | /* If the QH isn't linked then there's nothing we can do | |
664 | * unless we were called during a giveback, in which case | |
665 | * qh_completions() has to deal with it. | |
666 | */ | |
667 | if (qh->qh_state != QH_STATE_LINKED) { | |
668 | if (qh->qh_state == QH_STATE_COMPLETING) | |
669 | qh->needs_rescan = 1; | |
670 | return; | |
671 | } | |
1da177e4 LT |
672 | |
673 | qh_unlink_periodic (ehci, qh); | |
674 | ||
675 | /* simple/paranoid: always delay, expecting the HC needs to read | |
676 | * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and | |
677 | * expect khubd to clean up after any CSPLITs we won't issue. | |
678 | * active high speed queues may need bigger delays... | |
679 | */ | |
680 | if (list_empty (&qh->qtd_list) | |
6dbd682b | 681 | || (cpu_to_hc32(ehci, QH_CMASK) |
3807e26d | 682 | & hw->hw_info2) != 0) |
1da177e4 LT |
683 | wait = 2; |
684 | else | |
685 | wait = 55; /* worst case: 3 * 1024 */ | |
686 | ||
687 | udelay (wait); | |
688 | qh->qh_state = QH_STATE_IDLE; | |
3807e26d | 689 | hw->hw_next = EHCI_LIST_END(ehci); |
1da177e4 | 690 | wmb (); |
a448c9d8 AS |
691 | |
692 | qh_completions(ehci, qh); | |
693 | ||
694 | /* reschedule QH iff another request is queued */ | |
695 | if (!list_empty(&qh->qtd_list) && | |
e8799906 | 696 | ehci->rh_state == EHCI_RH_RUNNING) { |
a448c9d8 AS |
697 | rc = qh_schedule(ehci, qh); |
698 | ||
699 | /* An error here likely indicates handshake failure | |
700 | * or no space left in the schedule. Neither fault | |
701 | * should happen often ... | |
702 | * | |
703 | * FIXME kill the now-dysfunctional queued urbs | |
704 | */ | |
705 | if (rc != 0) | |
706 | ehci_err(ehci, "can't reschedule qh %p, err %d\n", | |
707 | qh, rc); | |
708 | } | |
1da177e4 LT |
709 | } |
710 | ||
711 | /*-------------------------------------------------------------------------*/ | |
712 | ||
713 | static int check_period ( | |
53bd6a60 | 714 | struct ehci_hcd *ehci, |
1da177e4 LT |
715 | unsigned frame, |
716 | unsigned uframe, | |
717 | unsigned period, | |
718 | unsigned usecs | |
719 | ) { | |
720 | int claimed; | |
721 | ||
722 | /* complete split running into next frame? | |
723 | * given FSTN support, we could sometimes check... | |
724 | */ | |
725 | if (uframe >= 8) | |
726 | return 0; | |
727 | ||
cc62a7eb KS |
728 | /* convert "usecs we need" to "max already claimed" */ |
729 | usecs = ehci->uframe_periodic_max - usecs; | |
1da177e4 LT |
730 | |
731 | /* we "know" 2 and 4 uframe intervals were rejected; so | |
732 | * for period 0, check _every_ microframe in the schedule. | |
733 | */ | |
734 | if (unlikely (period == 0)) { | |
735 | do { | |
736 | for (uframe = 0; uframe < 7; uframe++) { | |
737 | claimed = periodic_usecs (ehci, frame, uframe); | |
738 | if (claimed > usecs) | |
739 | return 0; | |
740 | } | |
741 | } while ((frame += 1) < ehci->periodic_size); | |
742 | ||
743 | /* just check the specified uframe, at that period */ | |
744 | } else { | |
745 | do { | |
746 | claimed = periodic_usecs (ehci, frame, uframe); | |
747 | if (claimed > usecs) | |
748 | return 0; | |
749 | } while ((frame += period) < ehci->periodic_size); | |
750 | } | |
751 | ||
752 | // success! | |
753 | return 1; | |
754 | } | |
755 | ||
756 | static int check_intr_schedule ( | |
53bd6a60 | 757 | struct ehci_hcd *ehci, |
1da177e4 LT |
758 | unsigned frame, |
759 | unsigned uframe, | |
760 | const struct ehci_qh *qh, | |
6dbd682b | 761 | __hc32 *c_maskp |
1da177e4 LT |
762 | ) |
763 | { | |
53bd6a60 | 764 | int retval = -ENOSPC; |
ba47f66b | 765 | u8 mask = 0; |
1da177e4 LT |
766 | |
767 | if (qh->c_usecs && uframe >= 6) /* FSTN territory? */ | |
768 | goto done; | |
769 | ||
770 | if (!check_period (ehci, frame, uframe, qh->period, qh->usecs)) | |
771 | goto done; | |
772 | if (!qh->c_usecs) { | |
773 | retval = 0; | |
774 | *c_maskp = 0; | |
775 | goto done; | |
776 | } | |
777 | ||
ba47f66b DS |
778 | #ifdef CONFIG_USB_EHCI_TT_NEWSCHED |
779 | if (tt_available (ehci, qh->period, qh->dev, frame, uframe, | |
780 | qh->tt_usecs)) { | |
781 | unsigned i; | |
782 | ||
783 | /* TODO : this may need FSTN for SSPLIT in uframe 5. */ | |
784 | for (i=uframe+1; i<8 && i<uframe+4; i++) | |
785 | if (!check_period (ehci, frame, i, | |
786 | qh->period, qh->c_usecs)) | |
787 | goto done; | |
788 | else | |
789 | mask |= 1 << i; | |
790 | ||
791 | retval = 0; | |
792 | ||
6dbd682b | 793 | *c_maskp = cpu_to_hc32(ehci, mask << 8); |
ba47f66b DS |
794 | } |
795 | #else | |
1da177e4 LT |
796 | /* Make sure this tt's buffer is also available for CSPLITs. |
797 | * We pessimize a bit; probably the typical full speed case | |
798 | * doesn't need the second CSPLIT. | |
53bd6a60 | 799 | * |
1da177e4 LT |
800 | * NOTE: both SPLIT and CSPLIT could be checked in just |
801 | * one smart pass... | |
802 | */ | |
803 | mask = 0x03 << (uframe + qh->gap_uf); | |
6dbd682b | 804 | *c_maskp = cpu_to_hc32(ehci, mask << 8); |
1da177e4 LT |
805 | |
806 | mask |= 1 << uframe; | |
807 | if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) { | |
808 | if (!check_period (ehci, frame, uframe + qh->gap_uf + 1, | |
809 | qh->period, qh->c_usecs)) | |
810 | goto done; | |
811 | if (!check_period (ehci, frame, uframe + qh->gap_uf, | |
812 | qh->period, qh->c_usecs)) | |
813 | goto done; | |
814 | retval = 0; | |
815 | } | |
ba47f66b | 816 | #endif |
1da177e4 LT |
817 | done: |
818 | return retval; | |
819 | } | |
820 | ||
821 | /* "first fit" scheduling policy used the first time through, | |
822 | * or when the previous schedule slot can't be re-used. | |
823 | */ | |
6dbd682b | 824 | static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh) |
1da177e4 | 825 | { |
53bd6a60 | 826 | int status; |
1da177e4 | 827 | unsigned uframe; |
6dbd682b | 828 | __hc32 c_mask; |
1da177e4 | 829 | unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */ |
3807e26d | 830 | struct ehci_qh_hw *hw = qh->hw; |
1da177e4 LT |
831 | |
832 | qh_refresh(ehci, qh); | |
3807e26d | 833 | hw->hw_next = EHCI_LIST_END(ehci); |
1da177e4 LT |
834 | frame = qh->start; |
835 | ||
836 | /* reuse the previous schedule slots, if we can */ | |
837 | if (frame < qh->period) { | |
3807e26d | 838 | uframe = ffs(hc32_to_cpup(ehci, &hw->hw_info2) & QH_SMASK); |
1da177e4 LT |
839 | status = check_intr_schedule (ehci, frame, --uframe, |
840 | qh, &c_mask); | |
841 | } else { | |
842 | uframe = 0; | |
843 | c_mask = 0; | |
844 | status = -ENOSPC; | |
845 | } | |
846 | ||
847 | /* else scan the schedule to find a group of slots such that all | |
848 | * uframes have enough periodic bandwidth available. | |
849 | */ | |
850 | if (status) { | |
851 | /* "normal" case, uframing flexible except with splits */ | |
852 | if (qh->period) { | |
68335e81 AS |
853 | int i; |
854 | ||
855 | for (i = qh->period; status && i > 0; --i) { | |
856 | frame = ++ehci->random_frame % qh->period; | |
1da177e4 LT |
857 | for (uframe = 0; uframe < 8; uframe++) { |
858 | status = check_intr_schedule (ehci, | |
859 | frame, uframe, qh, | |
860 | &c_mask); | |
861 | if (status == 0) | |
862 | break; | |
863 | } | |
68335e81 | 864 | } |
1da177e4 LT |
865 | |
866 | /* qh->period == 0 means every uframe */ | |
867 | } else { | |
868 | frame = 0; | |
869 | status = check_intr_schedule (ehci, 0, 0, qh, &c_mask); | |
870 | } | |
871 | if (status) | |
872 | goto done; | |
873 | qh->start = frame; | |
874 | ||
875 | /* reset S-frame and (maybe) C-frame masks */ | |
3807e26d AD |
876 | hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK)); |
877 | hw->hw_info2 |= qh->period | |
6dbd682b SR |
878 | ? cpu_to_hc32(ehci, 1 << uframe) |
879 | : cpu_to_hc32(ehci, QH_SMASK); | |
3807e26d | 880 | hw->hw_info2 |= c_mask; |
1da177e4 LT |
881 | } else |
882 | ehci_dbg (ehci, "reused qh %p schedule\n", qh); | |
883 | ||
884 | /* stuff into the periodic schedule */ | |
53bd6a60 | 885 | status = qh_link_periodic (ehci, qh); |
1da177e4 LT |
886 | done: |
887 | return status; | |
888 | } | |
889 | ||
890 | static int intr_submit ( | |
891 | struct ehci_hcd *ehci, | |
1da177e4 LT |
892 | struct urb *urb, |
893 | struct list_head *qtd_list, | |
55016f10 | 894 | gfp_t mem_flags |
1da177e4 LT |
895 | ) { |
896 | unsigned epnum; | |
897 | unsigned long flags; | |
898 | struct ehci_qh *qh; | |
e9df41c5 | 899 | int status; |
1da177e4 LT |
900 | struct list_head empty; |
901 | ||
902 | /* get endpoint and transfer/schedule data */ | |
e9df41c5 | 903 | epnum = urb->ep->desc.bEndpointAddress; |
1da177e4 LT |
904 | |
905 | spin_lock_irqsave (&ehci->lock, flags); | |
906 | ||
541c7d43 | 907 | if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { |
8de98402 | 908 | status = -ESHUTDOWN; |
e9df41c5 | 909 | goto done_not_linked; |
8de98402 | 910 | } |
e9df41c5 AS |
911 | status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb); |
912 | if (unlikely(status)) | |
913 | goto done_not_linked; | |
8de98402 | 914 | |
1da177e4 LT |
915 | /* get qh and force any scheduling errors */ |
916 | INIT_LIST_HEAD (&empty); | |
e9df41c5 | 917 | qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv); |
1da177e4 LT |
918 | if (qh == NULL) { |
919 | status = -ENOMEM; | |
920 | goto done; | |
921 | } | |
922 | if (qh->qh_state == QH_STATE_IDLE) { | |
923 | if ((status = qh_schedule (ehci, qh)) != 0) | |
924 | goto done; | |
925 | } | |
926 | ||
927 | /* then queue the urb's tds to the qh */ | |
e9df41c5 | 928 | qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv); |
1da177e4 LT |
929 | BUG_ON (qh == NULL); |
930 | ||
931 | /* ... update usbfs periodic stats */ | |
932 | ehci_to_hcd(ehci)->self.bandwidth_int_reqs++; | |
933 | ||
934 | done: | |
e9df41c5 AS |
935 | if (unlikely(status)) |
936 | usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); | |
937 | done_not_linked: | |
1da177e4 LT |
938 | spin_unlock_irqrestore (&ehci->lock, flags); |
939 | if (status) | |
940 | qtd_list_free (ehci, urb, qtd_list); | |
941 | ||
942 | return status; | |
943 | } | |
944 | ||
945 | /*-------------------------------------------------------------------------*/ | |
946 | ||
947 | /* ehci_iso_stream ops work with both ITD and SITD */ | |
948 | ||
949 | static struct ehci_iso_stream * | |
55016f10 | 950 | iso_stream_alloc (gfp_t mem_flags) |
1da177e4 LT |
951 | { |
952 | struct ehci_iso_stream *stream; | |
953 | ||
7b842b6e | 954 | stream = kzalloc(sizeof *stream, mem_flags); |
1da177e4 | 955 | if (likely (stream != NULL)) { |
1da177e4 LT |
956 | INIT_LIST_HEAD(&stream->td_list); |
957 | INIT_LIST_HEAD(&stream->free_list); | |
958 | stream->next_uframe = -1; | |
959 | stream->refcount = 1; | |
960 | } | |
961 | return stream; | |
962 | } | |
963 | ||
964 | static void | |
965 | iso_stream_init ( | |
966 | struct ehci_hcd *ehci, | |
967 | struct ehci_iso_stream *stream, | |
968 | struct usb_device *dev, | |
969 | int pipe, | |
970 | unsigned interval | |
971 | ) | |
972 | { | |
973 | static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f }; | |
974 | ||
975 | u32 buf1; | |
976 | unsigned epnum, maxp; | |
977 | int is_input; | |
978 | long bandwidth; | |
979 | ||
980 | /* | |
981 | * this might be a "high bandwidth" highspeed endpoint, | |
982 | * as encoded in the ep descriptor's wMaxPacket field | |
983 | */ | |
984 | epnum = usb_pipeendpoint (pipe); | |
985 | is_input = usb_pipein (pipe) ? USB_DIR_IN : 0; | |
986 | maxp = usb_maxpacket(dev, pipe, !is_input); | |
987 | if (is_input) { | |
988 | buf1 = (1 << 11); | |
989 | } else { | |
990 | buf1 = 0; | |
991 | } | |
992 | ||
993 | /* knows about ITD vs SITD */ | |
994 | if (dev->speed == USB_SPEED_HIGH) { | |
995 | unsigned multi = hb_mult(maxp); | |
996 | ||
997 | stream->highspeed = 1; | |
998 | ||
999 | maxp = max_packet(maxp); | |
1000 | buf1 |= maxp; | |
1001 | maxp *= multi; | |
1002 | ||
6dbd682b SR |
1003 | stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum); |
1004 | stream->buf1 = cpu_to_hc32(ehci, buf1); | |
1005 | stream->buf2 = cpu_to_hc32(ehci, multi); | |
1da177e4 LT |
1006 | |
1007 | /* usbfs wants to report the average usecs per frame tied up | |
1008 | * when transfers on this endpoint are scheduled ... | |
1009 | */ | |
1010 | stream->usecs = HS_USECS_ISO (maxp); | |
1011 | bandwidth = stream->usecs * 8; | |
372dd6e8 | 1012 | bandwidth /= interval; |
1da177e4 LT |
1013 | |
1014 | } else { | |
1015 | u32 addr; | |
d0384200 | 1016 | int think_time; |
469d0229 | 1017 | int hs_transfers; |
1da177e4 LT |
1018 | |
1019 | addr = dev->ttport << 24; | |
1020 | if (!ehci_is_TDI(ehci) | |
1021 | || (dev->tt->hub != | |
1022 | ehci_to_hcd(ehci)->self.root_hub)) | |
1023 | addr |= dev->tt->hub->devnum << 16; | |
1024 | addr |= epnum << 8; | |
1025 | addr |= dev->devnum; | |
1026 | stream->usecs = HS_USECS_ISO (maxp); | |
d0384200 | 1027 | think_time = dev->tt ? dev->tt->think_time : 0; |
1028 | stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time ( | |
1029 | dev->speed, is_input, 1, maxp)); | |
469d0229 | 1030 | hs_transfers = max (1u, (maxp + 187) / 188); |
1da177e4 LT |
1031 | if (is_input) { |
1032 | u32 tmp; | |
1033 | ||
1034 | addr |= 1 << 31; | |
1035 | stream->c_usecs = stream->usecs; | |
1036 | stream->usecs = HS_USECS_ISO (1); | |
1037 | stream->raw_mask = 1; | |
1038 | ||
469d0229 CL |
1039 | /* c-mask as specified in USB 2.0 11.18.4 3.c */ |
1040 | tmp = (1 << (hs_transfers + 2)) - 1; | |
1041 | stream->raw_mask |= tmp << (8 + 2); | |
1da177e4 | 1042 | } else |
469d0229 | 1043 | stream->raw_mask = smask_out [hs_transfers - 1]; |
1da177e4 | 1044 | bandwidth = stream->usecs + stream->c_usecs; |
372dd6e8 | 1045 | bandwidth /= interval << 3; |
1da177e4 LT |
1046 | |
1047 | /* stream->splits gets created from raw_mask later */ | |
6dbd682b | 1048 | stream->address = cpu_to_hc32(ehci, addr); |
1da177e4 LT |
1049 | } |
1050 | stream->bandwidth = bandwidth; | |
1051 | ||
1052 | stream->udev = dev; | |
1053 | ||
1054 | stream->bEndpointAddress = is_input | epnum; | |
1055 | stream->interval = interval; | |
1056 | stream->maxp = maxp; | |
1057 | } | |
1058 | ||
1059 | static void | |
1060 | iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream) | |
1061 | { | |
1062 | stream->refcount--; | |
1063 | ||
1064 | /* free whenever just a dev->ep reference remains. | |
1065 | * not like a QH -- no persistent state (toggle, halt) | |
1066 | */ | |
1067 | if (stream->refcount == 1) { | |
1da177e4 LT |
1068 | // BUG_ON (!list_empty(&stream->td_list)); |
1069 | ||
1070 | while (!list_empty (&stream->free_list)) { | |
1071 | struct list_head *entry; | |
1072 | ||
1073 | entry = stream->free_list.next; | |
1074 | list_del (entry); | |
1075 | ||
1076 | /* knows about ITD vs SITD */ | |
1077 | if (stream->highspeed) { | |
1078 | struct ehci_itd *itd; | |
1079 | ||
1080 | itd = list_entry (entry, struct ehci_itd, | |
1081 | itd_list); | |
1082 | dma_pool_free (ehci->itd_pool, itd, | |
1083 | itd->itd_dma); | |
1084 | } else { | |
1085 | struct ehci_sitd *sitd; | |
1086 | ||
1087 | sitd = list_entry (entry, struct ehci_sitd, | |
1088 | sitd_list); | |
1089 | dma_pool_free (ehci->sitd_pool, sitd, | |
1090 | sitd->sitd_dma); | |
1091 | } | |
1092 | } | |
1093 | ||
1da177e4 | 1094 | stream->bEndpointAddress &= 0x0f; |
9aa09d2f KW |
1095 | if (stream->ep) |
1096 | stream->ep->hcpriv = NULL; | |
1da177e4 | 1097 | |
1da177e4 LT |
1098 | kfree(stream); |
1099 | } | |
1100 | } | |
1101 | ||
1102 | static inline struct ehci_iso_stream * | |
1103 | iso_stream_get (struct ehci_iso_stream *stream) | |
1104 | { | |
1105 | if (likely (stream != NULL)) | |
1106 | stream->refcount++; | |
1107 | return stream; | |
1108 | } | |
1109 | ||
1110 | static struct ehci_iso_stream * | |
1111 | iso_stream_find (struct ehci_hcd *ehci, struct urb *urb) | |
1112 | { | |
1113 | unsigned epnum; | |
1114 | struct ehci_iso_stream *stream; | |
1115 | struct usb_host_endpoint *ep; | |
1116 | unsigned long flags; | |
1117 | ||
1118 | epnum = usb_pipeendpoint (urb->pipe); | |
1119 | if (usb_pipein(urb->pipe)) | |
1120 | ep = urb->dev->ep_in[epnum]; | |
1121 | else | |
1122 | ep = urb->dev->ep_out[epnum]; | |
1123 | ||
1124 | spin_lock_irqsave (&ehci->lock, flags); | |
1125 | stream = ep->hcpriv; | |
1126 | ||
1127 | if (unlikely (stream == NULL)) { | |
1128 | stream = iso_stream_alloc(GFP_ATOMIC); | |
1129 | if (likely (stream != NULL)) { | |
1130 | /* dev->ep owns the initial refcount */ | |
1131 | ep->hcpriv = stream; | |
1132 | stream->ep = ep; | |
1133 | iso_stream_init(ehci, stream, urb->dev, urb->pipe, | |
1134 | urb->interval); | |
1135 | } | |
1136 | ||
1082f57a CL |
1137 | /* if dev->ep [epnum] is a QH, hw is set */ |
1138 | } else if (unlikely (stream->hw != NULL)) { | |
1da177e4 LT |
1139 | ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n", |
1140 | urb->dev->devpath, epnum, | |
1141 | usb_pipein(urb->pipe) ? "in" : "out"); | |
1142 | stream = NULL; | |
1143 | } | |
1144 | ||
1145 | /* caller guarantees an eventual matching iso_stream_put */ | |
1146 | stream = iso_stream_get (stream); | |
1147 | ||
1148 | spin_unlock_irqrestore (&ehci->lock, flags); | |
1149 | return stream; | |
1150 | } | |
1151 | ||
1152 | /*-------------------------------------------------------------------------*/ | |
1153 | ||
1154 | /* ehci_iso_sched ops can be ITD-only or SITD-only */ | |
1155 | ||
1156 | static struct ehci_iso_sched * | |
55016f10 | 1157 | iso_sched_alloc (unsigned packets, gfp_t mem_flags) |
1da177e4 LT |
1158 | { |
1159 | struct ehci_iso_sched *iso_sched; | |
1160 | int size = sizeof *iso_sched; | |
1161 | ||
1162 | size += packets * sizeof (struct ehci_iso_packet); | |
80b6ca48 | 1163 | iso_sched = kzalloc(size, mem_flags); |
1da177e4 | 1164 | if (likely (iso_sched != NULL)) { |
1da177e4 LT |
1165 | INIT_LIST_HEAD (&iso_sched->td_list); |
1166 | } | |
1167 | return iso_sched; | |
1168 | } | |
1169 | ||
1170 | static inline void | |
6dbd682b SR |
1171 | itd_sched_init( |
1172 | struct ehci_hcd *ehci, | |
1da177e4 LT |
1173 | struct ehci_iso_sched *iso_sched, |
1174 | struct ehci_iso_stream *stream, | |
1175 | struct urb *urb | |
1176 | ) | |
1177 | { | |
1178 | unsigned i; | |
1179 | dma_addr_t dma = urb->transfer_dma; | |
1180 | ||
1181 | /* how many uframes are needed for these transfers */ | |
1182 | iso_sched->span = urb->number_of_packets * stream->interval; | |
1183 | ||
1184 | /* figure out per-uframe itd fields that we'll need later | |
1185 | * when we fit new itds into the schedule. | |
1186 | */ | |
1187 | for (i = 0; i < urb->number_of_packets; i++) { | |
1188 | struct ehci_iso_packet *uframe = &iso_sched->packet [i]; | |
1189 | unsigned length; | |
1190 | dma_addr_t buf; | |
1191 | u32 trans; | |
1192 | ||
1193 | length = urb->iso_frame_desc [i].length; | |
1194 | buf = dma + urb->iso_frame_desc [i].offset; | |
1195 | ||
1196 | trans = EHCI_ISOC_ACTIVE; | |
1197 | trans |= buf & 0x0fff; | |
1198 | if (unlikely (((i + 1) == urb->number_of_packets)) | |
1199 | && !(urb->transfer_flags & URB_NO_INTERRUPT)) | |
1200 | trans |= EHCI_ITD_IOC; | |
1201 | trans |= length << 16; | |
6dbd682b | 1202 | uframe->transaction = cpu_to_hc32(ehci, trans); |
1da177e4 | 1203 | |
77078570 | 1204 | /* might need to cross a buffer page within a uframe */ |
1da177e4 LT |
1205 | uframe->bufp = (buf & ~(u64)0x0fff); |
1206 | buf += length; | |
1207 | if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff)))) | |
1208 | uframe->cross = 1; | |
1209 | } | |
1210 | } | |
1211 | ||
1212 | static void | |
1213 | iso_sched_free ( | |
1214 | struct ehci_iso_stream *stream, | |
1215 | struct ehci_iso_sched *iso_sched | |
1216 | ) | |
1217 | { | |
1218 | if (!iso_sched) | |
1219 | return; | |
1220 | // caller must hold ehci->lock! | |
1221 | list_splice (&iso_sched->td_list, &stream->free_list); | |
1222 | kfree (iso_sched); | |
1223 | } | |
1224 | ||
1225 | static int | |
1226 | itd_urb_transaction ( | |
1227 | struct ehci_iso_stream *stream, | |
1228 | struct ehci_hcd *ehci, | |
1229 | struct urb *urb, | |
55016f10 | 1230 | gfp_t mem_flags |
1da177e4 LT |
1231 | ) |
1232 | { | |
1233 | struct ehci_itd *itd; | |
1234 | dma_addr_t itd_dma; | |
1235 | int i; | |
1236 | unsigned num_itds; | |
1237 | struct ehci_iso_sched *sched; | |
1238 | unsigned long flags; | |
1239 | ||
1240 | sched = iso_sched_alloc (urb->number_of_packets, mem_flags); | |
1241 | if (unlikely (sched == NULL)) | |
1242 | return -ENOMEM; | |
1243 | ||
6dbd682b | 1244 | itd_sched_init(ehci, sched, stream, urb); |
1da177e4 LT |
1245 | |
1246 | if (urb->interval < 8) | |
1247 | num_itds = 1 + (sched->span + 7) / 8; | |
1248 | else | |
1249 | num_itds = urb->number_of_packets; | |
1250 | ||
1251 | /* allocate/init ITDs */ | |
1252 | spin_lock_irqsave (&ehci->lock, flags); | |
1253 | for (i = 0; i < num_itds; i++) { | |
1254 | ||
1255 | /* free_list.next might be cache-hot ... but maybe | |
1256 | * the HC caches it too. avoid that issue for now. | |
1257 | */ | |
1258 | ||
1259 | /* prefer previously-allocated itds */ | |
1260 | if (likely (!list_empty(&stream->free_list))) { | |
1261 | itd = list_entry (stream->free_list.prev, | |
6dbd682b | 1262 | struct ehci_itd, itd_list); |
1da177e4 LT |
1263 | list_del (&itd->itd_list); |
1264 | itd_dma = itd->itd_dma; | |
3d01f0fe | 1265 | } else { |
1da177e4 LT |
1266 | spin_unlock_irqrestore (&ehci->lock, flags); |
1267 | itd = dma_pool_alloc (ehci->itd_pool, mem_flags, | |
1268 | &itd_dma); | |
1269 | spin_lock_irqsave (&ehci->lock, flags); | |
3d01f0fe KW |
1270 | if (!itd) { |
1271 | iso_sched_free(stream, sched); | |
1272 | spin_unlock_irqrestore(&ehci->lock, flags); | |
1273 | return -ENOMEM; | |
1274 | } | |
1da177e4 LT |
1275 | } |
1276 | ||
1da177e4 LT |
1277 | memset (itd, 0, sizeof *itd); |
1278 | itd->itd_dma = itd_dma; | |
1279 | list_add (&itd->itd_list, &sched->td_list); | |
1280 | } | |
1281 | spin_unlock_irqrestore (&ehci->lock, flags); | |
1282 | ||
1283 | /* temporarily store schedule info in hcpriv */ | |
1284 | urb->hcpriv = sched; | |
1285 | urb->error_count = 0; | |
1286 | return 0; | |
1287 | } | |
1288 | ||
1289 | /*-------------------------------------------------------------------------*/ | |
1290 | ||
1291 | static inline int | |
1292 | itd_slot_ok ( | |
1293 | struct ehci_hcd *ehci, | |
1294 | u32 mod, | |
1295 | u32 uframe, | |
1296 | u8 usecs, | |
1297 | u32 period | |
1298 | ) | |
1299 | { | |
1300 | uframe %= period; | |
1301 | do { | |
cc62a7eb | 1302 | /* can't commit more than uframe_periodic_max usec */ |
1da177e4 | 1303 | if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7) |
cc62a7eb | 1304 | > (ehci->uframe_periodic_max - usecs)) |
1da177e4 LT |
1305 | return 0; |
1306 | ||
1307 | /* we know urb->interval is 2^N uframes */ | |
1308 | uframe += period; | |
1309 | } while (uframe < mod); | |
1310 | return 1; | |
1311 | } | |
1312 | ||
1313 | static inline int | |
1314 | sitd_slot_ok ( | |
1315 | struct ehci_hcd *ehci, | |
1316 | u32 mod, | |
1317 | struct ehci_iso_stream *stream, | |
1318 | u32 uframe, | |
1319 | struct ehci_iso_sched *sched, | |
1320 | u32 period_uframes | |
1321 | ) | |
1322 | { | |
1323 | u32 mask, tmp; | |
1324 | u32 frame, uf; | |
1325 | ||
1326 | mask = stream->raw_mask << (uframe & 7); | |
1327 | ||
1328 | /* for IN, don't wrap CSPLIT into the next frame */ | |
1329 | if (mask & ~0xffff) | |
1330 | return 0; | |
1331 | ||
65b8e5cb AS |
1332 | /* check bandwidth */ |
1333 | uframe %= period_uframes; | |
1334 | frame = uframe >> 3; | |
1335 | ||
1336 | #ifdef CONFIG_USB_EHCI_TT_NEWSCHED | |
1337 | /* The tt's fullspeed bus bandwidth must be available. | |
1338 | * tt_available scheduling guarantees 10+% for control/bulk. | |
1339 | */ | |
1340 | uf = uframe & 7; | |
1341 | if (!tt_available(ehci, period_uframes >> 3, | |
1342 | stream->udev, frame, uf, stream->tt_usecs)) | |
1343 | return 0; | |
1344 | #else | |
1345 | /* tt must be idle for start(s), any gap, and csplit. | |
1346 | * assume scheduling slop leaves 10+% for control/bulk. | |
1347 | */ | |
1348 | if (!tt_no_collision(ehci, period_uframes >> 3, | |
1349 | stream->udev, frame, mask)) | |
1350 | return 0; | |
1351 | #endif | |
1352 | ||
1da177e4 LT |
1353 | /* this multi-pass logic is simple, but performance may |
1354 | * suffer when the schedule data isn't cached. | |
1355 | */ | |
1da177e4 LT |
1356 | do { |
1357 | u32 max_used; | |
1358 | ||
1359 | frame = uframe >> 3; | |
1360 | uf = uframe & 7; | |
1361 | ||
1da177e4 | 1362 | /* check starts (OUT uses more than one) */ |
cc62a7eb | 1363 | max_used = ehci->uframe_periodic_max - stream->usecs; |
1da177e4 LT |
1364 | for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) { |
1365 | if (periodic_usecs (ehci, frame, uf) > max_used) | |
1366 | return 0; | |
1367 | } | |
1368 | ||
1369 | /* for IN, check CSPLIT */ | |
1370 | if (stream->c_usecs) { | |
0c734622 | 1371 | uf = uframe & 7; |
cc62a7eb | 1372 | max_used = ehci->uframe_periodic_max - stream->c_usecs; |
1da177e4 LT |
1373 | do { |
1374 | tmp = 1 << uf; | |
1375 | tmp <<= 8; | |
1376 | if ((stream->raw_mask & tmp) == 0) | |
1377 | continue; | |
1378 | if (periodic_usecs (ehci, frame, uf) | |
1379 | > max_used) | |
1380 | return 0; | |
1381 | } while (++uf < 8); | |
1382 | } | |
1383 | ||
1384 | /* we know urb->interval is 2^N uframes */ | |
1385 | uframe += period_uframes; | |
1386 | } while (uframe < mod); | |
1387 | ||
6dbd682b | 1388 | stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7)); |
1da177e4 LT |
1389 | return 1; |
1390 | } | |
1391 | ||
1392 | /* | |
1393 | * This scheduler plans almost as far into the future as it has actual | |
1394 | * periodic schedule slots. (Affected by TUNE_FLS, which defaults to | |
1395 | * "as small as possible" to be cache-friendlier.) That limits the size | |
1396 | * transfers you can stream reliably; avoid more than 64 msec per urb. | |
1397 | * Also avoid queue depths of less than ehci's worst irq latency (affected | |
1398 | * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter, | |
1399 | * and other factors); or more than about 230 msec total (for portability, | |
1400 | * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler! | |
1401 | */ | |
1402 | ||
d7e055f1 | 1403 | #define SCHEDULE_SLOP 80 /* microframes */ |
1da177e4 LT |
1404 | |
1405 | static int | |
1406 | iso_stream_schedule ( | |
1407 | struct ehci_hcd *ehci, | |
1408 | struct urb *urb, | |
1409 | struct ehci_iso_stream *stream | |
1410 | ) | |
1411 | { | |
ffda0803 | 1412 | u32 now, next, start, period, span; |
1da177e4 LT |
1413 | int status; |
1414 | unsigned mod = ehci->periodic_size << 3; | |
1415 | struct ehci_iso_sched *sched = urb->hcpriv; | |
1416 | ||
ffda0803 AS |
1417 | period = urb->interval; |
1418 | span = sched->span; | |
1419 | if (!stream->highspeed) { | |
1420 | period <<= 3; | |
1421 | span <<= 3; | |
1422 | } | |
1423 | ||
1424 | if (span > mod - SCHEDULE_SLOP) { | |
1da177e4 LT |
1425 | ehci_dbg (ehci, "iso request %p too long\n", urb); |
1426 | status = -EFBIG; | |
1427 | goto fail; | |
1428 | } | |
1429 | ||
68aa95d5 | 1430 | now = ehci_read_frame_index(ehci) & (mod - 1); |
1da177e4 | 1431 | |
b40e43fc AS |
1432 | /* Typical case: reuse current schedule, stream is still active. |
1433 | * Hopefully there are no gaps from the host falling behind | |
1434 | * (irq delays etc), but if there are we'll take the next | |
1435 | * slot in the schedule, implicitly assuming URB_ISO_ASAP. | |
1da177e4 LT |
1436 | */ |
1437 | if (likely (!list_empty (&stream->td_list))) { | |
1fb2e055 | 1438 | u32 excess; |
dccd574c SS |
1439 | |
1440 | /* For high speed devices, allow scheduling within the | |
ae68a83b AS |
1441 | * isochronous scheduling threshold. For full speed devices |
1442 | * and Intel PCI-based controllers, don't (work around for | |
1443 | * Intel ICH9 bug). | |
dccd574c | 1444 | */ |
ae68a83b | 1445 | if (!stream->highspeed && ehci->fs_i_thresh) |
dccd574c SS |
1446 | next = now + ehci->i_thresh; |
1447 | else | |
1448 | next = now; | |
b40e43fc | 1449 | |
1fb2e055 AS |
1450 | /* Fell behind (by up to twice the slop amount)? |
1451 | * We decide based on the time of the last currently-scheduled | |
1452 | * slot, not the time of the next available slot. | |
1453 | */ | |
1454 | excess = (stream->next_uframe - period - next) & (mod - 1); | |
1455 | if (excess >= mod - 2 * SCHEDULE_SLOP) | |
1456 | start = next + excess - mod + period * | |
1457 | DIV_ROUND_UP(mod - excess, period); | |
1458 | else | |
1459 | start = next + excess + period; | |
1460 | if (start - now >= mod) { | |
1461 | ehci_dbg(ehci, "request %p would overflow (%d+%d >= %d)\n", | |
1462 | urb, start - now - period, period, | |
1463 | mod); | |
b40e43fc AS |
1464 | status = -EFBIG; |
1465 | goto fail; | |
1466 | } | |
1da177e4 LT |
1467 | } |
1468 | ||
1469 | /* need to schedule; when's the next (u)frame we could start? | |
1470 | * this is bigger than ehci->i_thresh allows; scheduling itself | |
1471 | * isn't free, the slop should handle reasonably slow cpus. it | |
1472 | * can also help high bandwidth if the dma and irq loads don't | |
1473 | * jump until after the queue is primed. | |
1474 | */ | |
1fb2e055 | 1475 | else { |
e3420901 | 1476 | int done = 0; |
1fb2e055 AS |
1477 | start = SCHEDULE_SLOP + (now & ~0x07); |
1478 | ||
1479 | /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */ | |
1480 | ||
811c926c TP |
1481 | /* find a uframe slot with enough bandwidth. |
1482 | * Early uframes are more precious because full-speed | |
1483 | * iso IN transfers can't use late uframes, | |
1484 | * and therefore they should be allocated last. | |
1485 | */ | |
1486 | next = start; | |
1487 | start += period; | |
1488 | do { | |
1489 | start--; | |
1fb2e055 AS |
1490 | /* check schedule: enough space? */ |
1491 | if (stream->highspeed) { | |
1492 | if (itd_slot_ok(ehci, mod, start, | |
1493 | stream->usecs, period)) | |
e3420901 | 1494 | done = 1; |
1fb2e055 AS |
1495 | } else { |
1496 | if ((start % 8) >= 6) | |
1497 | continue; | |
1498 | if (sitd_slot_ok(ehci, mod, stream, | |
1499 | start, sched, period)) | |
e3420901 | 1500 | done = 1; |
1fb2e055 | 1501 | } |
e3420901 | 1502 | } while (start > next && !done); |
1da177e4 | 1503 | |
1fb2e055 | 1504 | /* no room in the schedule */ |
e3420901 | 1505 | if (!done) { |
1fb2e055 AS |
1506 | ehci_dbg(ehci, "iso resched full %p (now %d max %d)\n", |
1507 | urb, now, now + mod); | |
1508 | status = -ENOSPC; | |
1509 | goto fail; | |
1da177e4 LT |
1510 | } |
1511 | } | |
1512 | ||
1fb2e055 AS |
1513 | /* Tried to schedule too far into the future? */ |
1514 | if (unlikely(start - now + span - period | |
1515 | >= mod - 2 * SCHEDULE_SLOP)) { | |
1516 | ehci_dbg(ehci, "request %p would overflow (%d+%d >= %d)\n", | |
1517 | urb, start - now, span - period, | |
1518 | mod - 2 * SCHEDULE_SLOP); | |
1519 | status = -EFBIG; | |
1520 | goto fail; | |
1521 | } | |
1da177e4 | 1522 | |
1fb2e055 | 1523 | stream->next_uframe = start & (mod - 1); |
1da177e4 | 1524 | |
1da177e4 LT |
1525 | /* report high speed start in uframes; full speed, in frames */ |
1526 | urb->start_frame = stream->next_uframe; | |
1527 | if (!stream->highspeed) | |
1528 | urb->start_frame >>= 3; | |
1529 | return 0; | |
1fb2e055 AS |
1530 | |
1531 | fail: | |
1532 | iso_sched_free(stream, sched); | |
1533 | urb->hcpriv = NULL; | |
1534 | return status; | |
1da177e4 LT |
1535 | } |
1536 | ||
1537 | /*-------------------------------------------------------------------------*/ | |
1538 | ||
1539 | static inline void | |
6dbd682b SR |
1540 | itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream, |
1541 | struct ehci_itd *itd) | |
1da177e4 LT |
1542 | { |
1543 | int i; | |
1544 | ||
77078570 | 1545 | /* it's been recently zeroed */ |
6dbd682b | 1546 | itd->hw_next = EHCI_LIST_END(ehci); |
1da177e4 LT |
1547 | itd->hw_bufp [0] = stream->buf0; |
1548 | itd->hw_bufp [1] = stream->buf1; | |
1549 | itd->hw_bufp [2] = stream->buf2; | |
1550 | ||
1551 | for (i = 0; i < 8; i++) | |
1552 | itd->index[i] = -1; | |
1553 | ||
1554 | /* All other fields are filled when scheduling */ | |
1555 | } | |
1556 | ||
1557 | static inline void | |
6dbd682b SR |
1558 | itd_patch( |
1559 | struct ehci_hcd *ehci, | |
1da177e4 LT |
1560 | struct ehci_itd *itd, |
1561 | struct ehci_iso_sched *iso_sched, | |
1562 | unsigned index, | |
77078570 | 1563 | u16 uframe |
1da177e4 LT |
1564 | ) |
1565 | { | |
1566 | struct ehci_iso_packet *uf = &iso_sched->packet [index]; | |
1567 | unsigned pg = itd->pg; | |
1568 | ||
1569 | // BUG_ON (pg == 6 && uf->cross); | |
1570 | ||
1571 | uframe &= 0x07; | |
1572 | itd->index [uframe] = index; | |
1573 | ||
6dbd682b SR |
1574 | itd->hw_transaction[uframe] = uf->transaction; |
1575 | itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12); | |
1576 | itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0); | |
1577 | itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32)); | |
1da177e4 LT |
1578 | |
1579 | /* iso_frame_desc[].offset must be strictly increasing */ | |
77078570 | 1580 | if (unlikely (uf->cross)) { |
1da177e4 | 1581 | u64 bufp = uf->bufp + 4096; |
6dbd682b | 1582 | |
1da177e4 | 1583 | itd->pg = ++pg; |
6dbd682b SR |
1584 | itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0); |
1585 | itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32)); | |
1da177e4 LT |
1586 | } |
1587 | } | |
1588 | ||
1589 | static inline void | |
1590 | itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd) | |
1591 | { | |
92bc3648 CL |
1592 | union ehci_shadow *prev = &ehci->pshadow[frame]; |
1593 | __hc32 *hw_p = &ehci->periodic[frame]; | |
1594 | union ehci_shadow here = *prev; | |
1595 | __hc32 type = 0; | |
1596 | ||
1597 | /* skip any iso nodes which might belong to previous microframes */ | |
1598 | while (here.ptr) { | |
1599 | type = Q_NEXT_TYPE(ehci, *hw_p); | |
1600 | if (type == cpu_to_hc32(ehci, Q_TYPE_QH)) | |
1601 | break; | |
1602 | prev = periodic_next_shadow(ehci, prev, type); | |
1603 | hw_p = shadow_next_periodic(ehci, &here, type); | |
1604 | here = *prev; | |
1605 | } | |
1606 | ||
1607 | itd->itd_next = here; | |
1608 | itd->hw_next = *hw_p; | |
1609 | prev->itd = itd; | |
1da177e4 LT |
1610 | itd->frame = frame; |
1611 | wmb (); | |
92bc3648 | 1612 | *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD); |
1da177e4 LT |
1613 | } |
1614 | ||
1615 | /* fit urb's itds into the selected schedule slot; activate as needed */ | |
1616 | static int | |
1617 | itd_link_urb ( | |
1618 | struct ehci_hcd *ehci, | |
1619 | struct urb *urb, | |
1620 | unsigned mod, | |
1621 | struct ehci_iso_stream *stream | |
1622 | ) | |
1623 | { | |
77078570 | 1624 | int packet; |
1da177e4 LT |
1625 | unsigned next_uframe, uframe, frame; |
1626 | struct ehci_iso_sched *iso_sched = urb->hcpriv; | |
1627 | struct ehci_itd *itd; | |
1628 | ||
bccbefaa | 1629 | next_uframe = stream->next_uframe & (mod - 1); |
1da177e4 LT |
1630 | |
1631 | if (unlikely (list_empty(&stream->td_list))) { | |
1632 | ehci_to_hcd(ehci)->self.bandwidth_allocated | |
1633 | += stream->bandwidth; | |
1634 | ehci_vdbg (ehci, | |
1635 | "schedule devp %s ep%d%s-iso period %d start %d.%d\n", | |
1636 | urb->dev->devpath, stream->bEndpointAddress & 0x0f, | |
1637 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out", | |
1638 | urb->interval, | |
1639 | next_uframe >> 3, next_uframe & 0x7); | |
1da177e4 | 1640 | } |
05570297 AH |
1641 | |
1642 | if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) { | |
ad93562b AX |
1643 | if (ehci->amd_pll_fix == 1) |
1644 | usb_amd_quirk_pll_disable(); | |
05570297 AH |
1645 | } |
1646 | ||
1da177e4 LT |
1647 | ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++; |
1648 | ||
1649 | /* fill iTDs uframe by uframe */ | |
1650 | for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) { | |
1651 | if (itd == NULL) { | |
1652 | /* ASSERT: we have all necessary itds */ | |
1653 | // BUG_ON (list_empty (&iso_sched->td_list)); | |
1654 | ||
1655 | /* ASSERT: no itds for this endpoint in this uframe */ | |
1656 | ||
1657 | itd = list_entry (iso_sched->td_list.next, | |
1658 | struct ehci_itd, itd_list); | |
1659 | list_move_tail (&itd->itd_list, &stream->td_list); | |
1660 | itd->stream = iso_stream_get (stream); | |
508db8c9 | 1661 | itd->urb = urb; |
6dbd682b | 1662 | itd_init (ehci, stream, itd); |
1da177e4 LT |
1663 | } |
1664 | ||
1665 | uframe = next_uframe & 0x07; | |
1666 | frame = next_uframe >> 3; | |
1667 | ||
6dbd682b | 1668 | itd_patch(ehci, itd, iso_sched, packet, uframe); |
1da177e4 LT |
1669 | |
1670 | next_uframe += stream->interval; | |
bccbefaa | 1671 | next_uframe &= mod - 1; |
1da177e4 LT |
1672 | packet++; |
1673 | ||
1674 | /* link completed itds into the schedule */ | |
1675 | if (((next_uframe >> 3) != frame) | |
1676 | || packet == urb->number_of_packets) { | |
bccbefaa | 1677 | itd_link(ehci, frame & (ehci->periodic_size - 1), itd); |
1da177e4 LT |
1678 | itd = NULL; |
1679 | } | |
1680 | } | |
1681 | stream->next_uframe = next_uframe; | |
1682 | ||
1683 | /* don't need that schedule data any more */ | |
1684 | iso_sched_free (stream, iso_sched); | |
1685 | urb->hcpriv = NULL; | |
1686 | ||
1687 | timer_action (ehci, TIMER_IO_WATCHDOG); | |
01c17142 | 1688 | return enable_periodic(ehci); |
1da177e4 LT |
1689 | } |
1690 | ||
1691 | #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR) | |
1692 | ||
30bf54e6 DB |
1693 | /* Process and recycle a completed ITD. Return true iff its urb completed, |
1694 | * and hence its completion callback probably added things to the hardware | |
1695 | * schedule. | |
1696 | * | |
1697 | * Note that we carefully avoid recycling this descriptor until after any | |
1698 | * completion callback runs, so that it won't be reused quickly. That is, | |
1699 | * assuming (a) no more than two urbs per frame on this endpoint, and also | |
1700 | * (b) only this endpoint's completions submit URBs. It seems some silicon | |
1701 | * corrupts things if you reuse completed descriptors very quickly... | |
1702 | */ | |
1da177e4 LT |
1703 | static unsigned |
1704 | itd_complete ( | |
1705 | struct ehci_hcd *ehci, | |
7d12e780 | 1706 | struct ehci_itd *itd |
1da177e4 LT |
1707 | ) { |
1708 | struct urb *urb = itd->urb; | |
1709 | struct usb_iso_packet_descriptor *desc; | |
1710 | u32 t; | |
1711 | unsigned uframe; | |
1712 | int urb_index = -1; | |
1713 | struct ehci_iso_stream *stream = itd->stream; | |
1714 | struct usb_device *dev; | |
30bf54e6 | 1715 | unsigned retval = false; |
1da177e4 LT |
1716 | |
1717 | /* for each uframe with a packet */ | |
1718 | for (uframe = 0; uframe < 8; uframe++) { | |
1719 | if (likely (itd->index[uframe] == -1)) | |
1720 | continue; | |
1721 | urb_index = itd->index[uframe]; | |
1722 | desc = &urb->iso_frame_desc [urb_index]; | |
1723 | ||
6dbd682b | 1724 | t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]); |
1da177e4 | 1725 | itd->hw_transaction [uframe] = 0; |
1da177e4 LT |
1726 | |
1727 | /* report transfer status */ | |
1728 | if (unlikely (t & ISO_ERRS)) { | |
1729 | urb->error_count++; | |
1730 | if (t & EHCI_ISOC_BUF_ERR) | |
1731 | desc->status = usb_pipein (urb->pipe) | |
1732 | ? -ENOSR /* hc couldn't read */ | |
1733 | : -ECOMM; /* hc couldn't write */ | |
1734 | else if (t & EHCI_ISOC_BABBLE) | |
1735 | desc->status = -EOVERFLOW; | |
1736 | else /* (t & EHCI_ISOC_XACTERR) */ | |
1737 | desc->status = -EPROTO; | |
1738 | ||
1739 | /* HC need not update length with this error */ | |
ec6d67e3 AS |
1740 | if (!(t & EHCI_ISOC_BABBLE)) { |
1741 | desc->actual_length = EHCI_ITD_LENGTH(t); | |
1742 | urb->actual_length += desc->actual_length; | |
1743 | } | |
1da177e4 LT |
1744 | } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) { |
1745 | desc->status = 0; | |
ec6d67e3 AS |
1746 | desc->actual_length = EHCI_ITD_LENGTH(t); |
1747 | urb->actual_length += desc->actual_length; | |
b40e43fc AS |
1748 | } else { |
1749 | /* URB was too late */ | |
1750 | desc->status = -EXDEV; | |
1da177e4 LT |
1751 | } |
1752 | } | |
1753 | ||
1da177e4 LT |
1754 | /* handle completion now? */ |
1755 | if (likely ((urb_index + 1) != urb->number_of_packets)) | |
30bf54e6 | 1756 | goto done; |
1da177e4 LT |
1757 | |
1758 | /* ASSERT: it's really the last itd for this urb | |
1759 | list_for_each_entry (itd, &stream->td_list, itd_list) | |
1760 | BUG_ON (itd->urb == urb); | |
1761 | */ | |
1762 | ||
aa16ca30 | 1763 | /* give urb back to the driver; completion often (re)submits */ |
6a8e87b2 | 1764 | dev = urb->dev; |
14c04c0f | 1765 | ehci_urb_done(ehci, urb, 0); |
30bf54e6 | 1766 | retval = true; |
1da177e4 | 1767 | urb = NULL; |
01c17142 | 1768 | (void) disable_periodic(ehci); |
1da177e4 LT |
1769 | ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--; |
1770 | ||
05570297 | 1771 | if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) { |
ad93562b AX |
1772 | if (ehci->amd_pll_fix == 1) |
1773 | usb_amd_quirk_pll_enable(); | |
05570297 AH |
1774 | } |
1775 | ||
508db8c9 | 1776 | if (unlikely(list_is_singular(&stream->td_list))) { |
1da177e4 LT |
1777 | ehci_to_hcd(ehci)->self.bandwidth_allocated |
1778 | -= stream->bandwidth; | |
1779 | ehci_vdbg (ehci, | |
1780 | "deschedule devp %s ep%d%s-iso\n", | |
1781 | dev->devpath, stream->bEndpointAddress & 0x0f, | |
1782 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); | |
1783 | } | |
1784 | iso_stream_put (ehci, stream); | |
9aa09d2f | 1785 | |
30bf54e6 | 1786 | done: |
30bf54e6 | 1787 | itd->urb = NULL; |
9aa09d2f KW |
1788 | if (ehci->clock_frame != itd->frame || itd->index[7] != -1) { |
1789 | /* OK to recycle this ITD now. */ | |
1790 | itd->stream = NULL; | |
1791 | list_move(&itd->itd_list, &stream->free_list); | |
1792 | iso_stream_put(ehci, stream); | |
1793 | } else { | |
1794 | /* HW might remember this ITD, so we can't recycle it yet. | |
1795 | * Move it to a safe place until a new frame starts. | |
1796 | */ | |
1797 | list_move(&itd->itd_list, &ehci->cached_itd_list); | |
1798 | if (stream->refcount == 2) { | |
1799 | /* If iso_stream_put() were called here, stream | |
1800 | * would be freed. Instead, just prevent reuse. | |
1801 | */ | |
1802 | stream->ep->hcpriv = NULL; | |
1803 | stream->ep = NULL; | |
1804 | } | |
1805 | } | |
30bf54e6 | 1806 | return retval; |
1da177e4 LT |
1807 | } |
1808 | ||
1809 | /*-------------------------------------------------------------------------*/ | |
1810 | ||
5db539e4 | 1811 | static int itd_submit (struct ehci_hcd *ehci, struct urb *urb, |
55016f10 | 1812 | gfp_t mem_flags) |
1da177e4 LT |
1813 | { |
1814 | int status = -EINVAL; | |
1815 | unsigned long flags; | |
1816 | struct ehci_iso_stream *stream; | |
1817 | ||
1818 | /* Get iso_stream head */ | |
1819 | stream = iso_stream_find (ehci, urb); | |
1820 | if (unlikely (stream == NULL)) { | |
1821 | ehci_dbg (ehci, "can't get iso stream\n"); | |
1822 | return -ENOMEM; | |
1823 | } | |
1824 | if (unlikely (urb->interval != stream->interval)) { | |
1825 | ehci_dbg (ehci, "can't change iso interval %d --> %d\n", | |
1826 | stream->interval, urb->interval); | |
1827 | goto done; | |
1828 | } | |
1829 | ||
1830 | #ifdef EHCI_URB_TRACE | |
1831 | ehci_dbg (ehci, | |
1832 | "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n", | |
441b62c1 | 1833 | __func__, urb->dev->devpath, urb, |
1da177e4 LT |
1834 | usb_pipeendpoint (urb->pipe), |
1835 | usb_pipein (urb->pipe) ? "in" : "out", | |
1836 | urb->transfer_buffer_length, | |
1837 | urb->number_of_packets, urb->interval, | |
1838 | stream); | |
1839 | #endif | |
1840 | ||
1841 | /* allocate ITDs w/o locking anything */ | |
1842 | status = itd_urb_transaction (stream, ehci, urb, mem_flags); | |
1843 | if (unlikely (status < 0)) { | |
1844 | ehci_dbg (ehci, "can't init itds\n"); | |
1845 | goto done; | |
1846 | } | |
1847 | ||
1848 | /* schedule ... need to lock */ | |
1849 | spin_lock_irqsave (&ehci->lock, flags); | |
541c7d43 | 1850 | if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { |
8de98402 | 1851 | status = -ESHUTDOWN; |
e9df41c5 AS |
1852 | goto done_not_linked; |
1853 | } | |
1854 | status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb); | |
1855 | if (unlikely(status)) | |
1856 | goto done_not_linked; | |
1857 | status = iso_stream_schedule(ehci, urb, stream); | |
53bd6a60 | 1858 | if (likely (status == 0)) |
1da177e4 | 1859 | itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream); |
e9df41c5 AS |
1860 | else |
1861 | usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); | |
1862 | done_not_linked: | |
1da177e4 LT |
1863 | spin_unlock_irqrestore (&ehci->lock, flags); |
1864 | ||
1865 | done: | |
1866 | if (unlikely (status < 0)) | |
1867 | iso_stream_put (ehci, stream); | |
1868 | return status; | |
1869 | } | |
1870 | ||
1da177e4 LT |
1871 | /*-------------------------------------------------------------------------*/ |
1872 | ||
1873 | /* | |
1874 | * "Split ISO TDs" ... used for USB 1.1 devices going through the | |
1875 | * TTs in USB 2.0 hubs. These need microframe scheduling. | |
1876 | */ | |
1877 | ||
1878 | static inline void | |
6dbd682b SR |
1879 | sitd_sched_init( |
1880 | struct ehci_hcd *ehci, | |
1da177e4 LT |
1881 | struct ehci_iso_sched *iso_sched, |
1882 | struct ehci_iso_stream *stream, | |
1883 | struct urb *urb | |
1884 | ) | |
1885 | { | |
1886 | unsigned i; | |
1887 | dma_addr_t dma = urb->transfer_dma; | |
1888 | ||
1889 | /* how many frames are needed for these transfers */ | |
1890 | iso_sched->span = urb->number_of_packets * stream->interval; | |
1891 | ||
1892 | /* figure out per-frame sitd fields that we'll need later | |
1893 | * when we fit new sitds into the schedule. | |
1894 | */ | |
1895 | for (i = 0; i < urb->number_of_packets; i++) { | |
1896 | struct ehci_iso_packet *packet = &iso_sched->packet [i]; | |
1897 | unsigned length; | |
1898 | dma_addr_t buf; | |
1899 | u32 trans; | |
1900 | ||
1901 | length = urb->iso_frame_desc [i].length & 0x03ff; | |
1902 | buf = dma + urb->iso_frame_desc [i].offset; | |
1903 | ||
1904 | trans = SITD_STS_ACTIVE; | |
1905 | if (((i + 1) == urb->number_of_packets) | |
1906 | && !(urb->transfer_flags & URB_NO_INTERRUPT)) | |
1907 | trans |= SITD_IOC; | |
1908 | trans |= length << 16; | |
6dbd682b | 1909 | packet->transaction = cpu_to_hc32(ehci, trans); |
1da177e4 LT |
1910 | |
1911 | /* might need to cross a buffer page within a td */ | |
1912 | packet->bufp = buf; | |
1913 | packet->buf1 = (buf + length) & ~0x0fff; | |
1914 | if (packet->buf1 != (buf & ~(u64)0x0fff)) | |
1915 | packet->cross = 1; | |
1916 | ||
53bd6a60 | 1917 | /* OUT uses multiple start-splits */ |
1da177e4 LT |
1918 | if (stream->bEndpointAddress & USB_DIR_IN) |
1919 | continue; | |
1920 | length = (length + 187) / 188; | |
1921 | if (length > 1) /* BEGIN vs ALL */ | |
1922 | length |= 1 << 3; | |
1923 | packet->buf1 |= length; | |
1924 | } | |
1925 | } | |
1926 | ||
1927 | static int | |
1928 | sitd_urb_transaction ( | |
1929 | struct ehci_iso_stream *stream, | |
1930 | struct ehci_hcd *ehci, | |
1931 | struct urb *urb, | |
55016f10 | 1932 | gfp_t mem_flags |
1da177e4 LT |
1933 | ) |
1934 | { | |
1935 | struct ehci_sitd *sitd; | |
1936 | dma_addr_t sitd_dma; | |
1937 | int i; | |
1938 | struct ehci_iso_sched *iso_sched; | |
1939 | unsigned long flags; | |
1940 | ||
1941 | iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags); | |
1942 | if (iso_sched == NULL) | |
1943 | return -ENOMEM; | |
1944 | ||
6dbd682b | 1945 | sitd_sched_init(ehci, iso_sched, stream, urb); |
1da177e4 LT |
1946 | |
1947 | /* allocate/init sITDs */ | |
1948 | spin_lock_irqsave (&ehci->lock, flags); | |
1949 | for (i = 0; i < urb->number_of_packets; i++) { | |
1950 | ||
1951 | /* NOTE: for now, we don't try to handle wraparound cases | |
1952 | * for IN (using sitd->hw_backpointer, like a FSTN), which | |
1953 | * means we never need two sitds for full speed packets. | |
1954 | */ | |
1955 | ||
1956 | /* free_list.next might be cache-hot ... but maybe | |
1957 | * the HC caches it too. avoid that issue for now. | |
1958 | */ | |
1959 | ||
1960 | /* prefer previously-allocated sitds */ | |
1961 | if (!list_empty(&stream->free_list)) { | |
1962 | sitd = list_entry (stream->free_list.prev, | |
1963 | struct ehci_sitd, sitd_list); | |
1964 | list_del (&sitd->sitd_list); | |
1965 | sitd_dma = sitd->sitd_dma; | |
3d01f0fe | 1966 | } else { |
1da177e4 LT |
1967 | spin_unlock_irqrestore (&ehci->lock, flags); |
1968 | sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags, | |
1969 | &sitd_dma); | |
1970 | spin_lock_irqsave (&ehci->lock, flags); | |
3d01f0fe KW |
1971 | if (!sitd) { |
1972 | iso_sched_free(stream, iso_sched); | |
1973 | spin_unlock_irqrestore(&ehci->lock, flags); | |
1974 | return -ENOMEM; | |
1975 | } | |
1da177e4 LT |
1976 | } |
1977 | ||
1da177e4 LT |
1978 | memset (sitd, 0, sizeof *sitd); |
1979 | sitd->sitd_dma = sitd_dma; | |
1980 | list_add (&sitd->sitd_list, &iso_sched->td_list); | |
1981 | } | |
1982 | ||
1983 | /* temporarily store schedule info in hcpriv */ | |
1984 | urb->hcpriv = iso_sched; | |
1985 | urb->error_count = 0; | |
1986 | ||
1987 | spin_unlock_irqrestore (&ehci->lock, flags); | |
1988 | return 0; | |
1989 | } | |
1990 | ||
1991 | /*-------------------------------------------------------------------------*/ | |
1992 | ||
1993 | static inline void | |
6dbd682b SR |
1994 | sitd_patch( |
1995 | struct ehci_hcd *ehci, | |
1da177e4 LT |
1996 | struct ehci_iso_stream *stream, |
1997 | struct ehci_sitd *sitd, | |
1998 | struct ehci_iso_sched *iso_sched, | |
1999 | unsigned index | |
2000 | ) | |
2001 | { | |
2002 | struct ehci_iso_packet *uf = &iso_sched->packet [index]; | |
2003 | u64 bufp = uf->bufp; | |
2004 | ||
6dbd682b | 2005 | sitd->hw_next = EHCI_LIST_END(ehci); |
1da177e4 LT |
2006 | sitd->hw_fullspeed_ep = stream->address; |
2007 | sitd->hw_uframe = stream->splits; | |
2008 | sitd->hw_results = uf->transaction; | |
6dbd682b | 2009 | sitd->hw_backpointer = EHCI_LIST_END(ehci); |
1da177e4 LT |
2010 | |
2011 | bufp = uf->bufp; | |
6dbd682b SR |
2012 | sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp); |
2013 | sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32); | |
1da177e4 | 2014 | |
6dbd682b | 2015 | sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1); |
1da177e4 LT |
2016 | if (uf->cross) |
2017 | bufp += 4096; | |
6dbd682b | 2018 | sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32); |
1da177e4 LT |
2019 | sitd->index = index; |
2020 | } | |
2021 | ||
2022 | static inline void | |
2023 | sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd) | |
2024 | { | |
2025 | /* note: sitd ordering could matter (CSPLIT then SSPLIT) */ | |
2026 | sitd->sitd_next = ehci->pshadow [frame]; | |
2027 | sitd->hw_next = ehci->periodic [frame]; | |
2028 | ehci->pshadow [frame].sitd = sitd; | |
2029 | sitd->frame = frame; | |
2030 | wmb (); | |
6dbd682b | 2031 | ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD); |
1da177e4 LT |
2032 | } |
2033 | ||
2034 | /* fit urb's sitds into the selected schedule slot; activate as needed */ | |
2035 | static int | |
2036 | sitd_link_urb ( | |
2037 | struct ehci_hcd *ehci, | |
2038 | struct urb *urb, | |
2039 | unsigned mod, | |
2040 | struct ehci_iso_stream *stream | |
2041 | ) | |
2042 | { | |
2043 | int packet; | |
2044 | unsigned next_uframe; | |
2045 | struct ehci_iso_sched *sched = urb->hcpriv; | |
2046 | struct ehci_sitd *sitd; | |
2047 | ||
2048 | next_uframe = stream->next_uframe; | |
2049 | ||
2050 | if (list_empty(&stream->td_list)) { | |
2051 | /* usbfs ignores TT bandwidth */ | |
2052 | ehci_to_hcd(ehci)->self.bandwidth_allocated | |
2053 | += stream->bandwidth; | |
2054 | ehci_vdbg (ehci, | |
2055 | "sched devp %s ep%d%s-iso [%d] %dms/%04x\n", | |
2056 | urb->dev->devpath, stream->bEndpointAddress & 0x0f, | |
2057 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out", | |
bccbefaa | 2058 | (next_uframe >> 3) & (ehci->periodic_size - 1), |
6dbd682b | 2059 | stream->interval, hc32_to_cpu(ehci, stream->splits)); |
1da177e4 | 2060 | } |
05570297 AH |
2061 | |
2062 | if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) { | |
ad93562b AX |
2063 | if (ehci->amd_pll_fix == 1) |
2064 | usb_amd_quirk_pll_disable(); | |
05570297 AH |
2065 | } |
2066 | ||
1da177e4 LT |
2067 | ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++; |
2068 | ||
2069 | /* fill sITDs frame by frame */ | |
2070 | for (packet = 0, sitd = NULL; | |
2071 | packet < urb->number_of_packets; | |
2072 | packet++) { | |
2073 | ||
2074 | /* ASSERT: we have all necessary sitds */ | |
2075 | BUG_ON (list_empty (&sched->td_list)); | |
2076 | ||
2077 | /* ASSERT: no itds for this endpoint in this frame */ | |
2078 | ||
2079 | sitd = list_entry (sched->td_list.next, | |
2080 | struct ehci_sitd, sitd_list); | |
2081 | list_move_tail (&sitd->sitd_list, &stream->td_list); | |
2082 | sitd->stream = iso_stream_get (stream); | |
508db8c9 | 2083 | sitd->urb = urb; |
1da177e4 | 2084 | |
6dbd682b | 2085 | sitd_patch(ehci, stream, sitd, sched, packet); |
bccbefaa | 2086 | sitd_link(ehci, (next_uframe >> 3) & (ehci->periodic_size - 1), |
1da177e4 LT |
2087 | sitd); |
2088 | ||
2089 | next_uframe += stream->interval << 3; | |
1da177e4 | 2090 | } |
bccbefaa | 2091 | stream->next_uframe = next_uframe & (mod - 1); |
1da177e4 LT |
2092 | |
2093 | /* don't need that schedule data any more */ | |
2094 | iso_sched_free (stream, sched); | |
2095 | urb->hcpriv = NULL; | |
2096 | ||
2097 | timer_action (ehci, TIMER_IO_WATCHDOG); | |
01c17142 | 2098 | return enable_periodic(ehci); |
1da177e4 LT |
2099 | } |
2100 | ||
2101 | /*-------------------------------------------------------------------------*/ | |
2102 | ||
2103 | #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \ | |
53bd6a60 | 2104 | | SITD_STS_XACT | SITD_STS_MMF) |
1da177e4 | 2105 | |
30bf54e6 DB |
2106 | /* Process and recycle a completed SITD. Return true iff its urb completed, |
2107 | * and hence its completion callback probably added things to the hardware | |
2108 | * schedule. | |
2109 | * | |
2110 | * Note that we carefully avoid recycling this descriptor until after any | |
2111 | * completion callback runs, so that it won't be reused quickly. That is, | |
2112 | * assuming (a) no more than two urbs per frame on this endpoint, and also | |
2113 | * (b) only this endpoint's completions submit URBs. It seems some silicon | |
2114 | * corrupts things if you reuse completed descriptors very quickly... | |
2115 | */ | |
1da177e4 LT |
2116 | static unsigned |
2117 | sitd_complete ( | |
2118 | struct ehci_hcd *ehci, | |
7d12e780 | 2119 | struct ehci_sitd *sitd |
1da177e4 LT |
2120 | ) { |
2121 | struct urb *urb = sitd->urb; | |
2122 | struct usb_iso_packet_descriptor *desc; | |
2123 | u32 t; | |
2124 | int urb_index = -1; | |
2125 | struct ehci_iso_stream *stream = sitd->stream; | |
2126 | struct usb_device *dev; | |
30bf54e6 | 2127 | unsigned retval = false; |
1da177e4 LT |
2128 | |
2129 | urb_index = sitd->index; | |
2130 | desc = &urb->iso_frame_desc [urb_index]; | |
6dbd682b | 2131 | t = hc32_to_cpup(ehci, &sitd->hw_results); |
1da177e4 LT |
2132 | |
2133 | /* report transfer status */ | |
2134 | if (t & SITD_ERRS) { | |
2135 | urb->error_count++; | |
2136 | if (t & SITD_STS_DBE) | |
2137 | desc->status = usb_pipein (urb->pipe) | |
2138 | ? -ENOSR /* hc couldn't read */ | |
2139 | : -ECOMM; /* hc couldn't write */ | |
2140 | else if (t & SITD_STS_BABBLE) | |
2141 | desc->status = -EOVERFLOW; | |
2142 | else /* XACT, MMF, etc */ | |
2143 | desc->status = -EPROTO; | |
2144 | } else { | |
2145 | desc->status = 0; | |
ec6d67e3 AS |
2146 | desc->actual_length = desc->length - SITD_LENGTH(t); |
2147 | urb->actual_length += desc->actual_length; | |
1da177e4 | 2148 | } |
1da177e4 LT |
2149 | |
2150 | /* handle completion now? */ | |
2151 | if ((urb_index + 1) != urb->number_of_packets) | |
30bf54e6 | 2152 | goto done; |
1da177e4 LT |
2153 | |
2154 | /* ASSERT: it's really the last sitd for this urb | |
2155 | list_for_each_entry (sitd, &stream->td_list, sitd_list) | |
2156 | BUG_ON (sitd->urb == urb); | |
2157 | */ | |
2158 | ||
aa16ca30 | 2159 | /* give urb back to the driver; completion often (re)submits */ |
6a8e87b2 | 2160 | dev = urb->dev; |
14c04c0f | 2161 | ehci_urb_done(ehci, urb, 0); |
30bf54e6 | 2162 | retval = true; |
1da177e4 | 2163 | urb = NULL; |
01c17142 | 2164 | (void) disable_periodic(ehci); |
1da177e4 LT |
2165 | ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--; |
2166 | ||
05570297 | 2167 | if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) { |
ad93562b AX |
2168 | if (ehci->amd_pll_fix == 1) |
2169 | usb_amd_quirk_pll_enable(); | |
05570297 AH |
2170 | } |
2171 | ||
508db8c9 | 2172 | if (list_is_singular(&stream->td_list)) { |
1da177e4 LT |
2173 | ehci_to_hcd(ehci)->self.bandwidth_allocated |
2174 | -= stream->bandwidth; | |
2175 | ehci_vdbg (ehci, | |
2176 | "deschedule devp %s ep%d%s-iso\n", | |
2177 | dev->devpath, stream->bEndpointAddress & 0x0f, | |
2178 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); | |
2179 | } | |
2180 | iso_stream_put (ehci, stream); | |
0e5f231b | 2181 | |
30bf54e6 | 2182 | done: |
30bf54e6 | 2183 | sitd->urb = NULL; |
0e5f231b AS |
2184 | if (ehci->clock_frame != sitd->frame) { |
2185 | /* OK to recycle this SITD now. */ | |
2186 | sitd->stream = NULL; | |
2187 | list_move(&sitd->sitd_list, &stream->free_list); | |
2188 | iso_stream_put(ehci, stream); | |
2189 | } else { | |
2190 | /* HW might remember this SITD, so we can't recycle it yet. | |
2191 | * Move it to a safe place until a new frame starts. | |
2192 | */ | |
2193 | list_move(&sitd->sitd_list, &ehci->cached_sitd_list); | |
2194 | if (stream->refcount == 2) { | |
2195 | /* If iso_stream_put() were called here, stream | |
2196 | * would be freed. Instead, just prevent reuse. | |
2197 | */ | |
2198 | stream->ep->hcpriv = NULL; | |
2199 | stream->ep = NULL; | |
2200 | } | |
2201 | } | |
30bf54e6 | 2202 | return retval; |
1da177e4 LT |
2203 | } |
2204 | ||
2205 | ||
5db539e4 | 2206 | static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb, |
55016f10 | 2207 | gfp_t mem_flags) |
1da177e4 LT |
2208 | { |
2209 | int status = -EINVAL; | |
2210 | unsigned long flags; | |
2211 | struct ehci_iso_stream *stream; | |
2212 | ||
2213 | /* Get iso_stream head */ | |
2214 | stream = iso_stream_find (ehci, urb); | |
2215 | if (stream == NULL) { | |
2216 | ehci_dbg (ehci, "can't get iso stream\n"); | |
2217 | return -ENOMEM; | |
2218 | } | |
2219 | if (urb->interval != stream->interval) { | |
2220 | ehci_dbg (ehci, "can't change iso interval %d --> %d\n", | |
2221 | stream->interval, urb->interval); | |
2222 | goto done; | |
2223 | } | |
2224 | ||
2225 | #ifdef EHCI_URB_TRACE | |
2226 | ehci_dbg (ehci, | |
2227 | "submit %p dev%s ep%d%s-iso len %d\n", | |
2228 | urb, urb->dev->devpath, | |
2229 | usb_pipeendpoint (urb->pipe), | |
2230 | usb_pipein (urb->pipe) ? "in" : "out", | |
2231 | urb->transfer_buffer_length); | |
2232 | #endif | |
2233 | ||
2234 | /* allocate SITDs */ | |
2235 | status = sitd_urb_transaction (stream, ehci, urb, mem_flags); | |
2236 | if (status < 0) { | |
2237 | ehci_dbg (ehci, "can't init sitds\n"); | |
2238 | goto done; | |
2239 | } | |
2240 | ||
2241 | /* schedule ... need to lock */ | |
2242 | spin_lock_irqsave (&ehci->lock, flags); | |
541c7d43 | 2243 | if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { |
8de98402 | 2244 | status = -ESHUTDOWN; |
e9df41c5 AS |
2245 | goto done_not_linked; |
2246 | } | |
2247 | status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb); | |
2248 | if (unlikely(status)) | |
2249 | goto done_not_linked; | |
2250 | status = iso_stream_schedule(ehci, urb, stream); | |
53bd6a60 | 2251 | if (status == 0) |
1da177e4 | 2252 | sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream); |
e9df41c5 AS |
2253 | else |
2254 | usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); | |
2255 | done_not_linked: | |
1da177e4 LT |
2256 | spin_unlock_irqrestore (&ehci->lock, flags); |
2257 | ||
2258 | done: | |
2259 | if (status < 0) | |
2260 | iso_stream_put (ehci, stream); | |
2261 | return status; | |
2262 | } | |
2263 | ||
1da177e4 LT |
2264 | /*-------------------------------------------------------------------------*/ |
2265 | ||
0e5f231b | 2266 | static void free_cached_lists(struct ehci_hcd *ehci) |
9aa09d2f KW |
2267 | { |
2268 | struct ehci_itd *itd, *n; | |
0e5f231b | 2269 | struct ehci_sitd *sitd, *sn; |
9aa09d2f KW |
2270 | |
2271 | list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) { | |
2272 | struct ehci_iso_stream *stream = itd->stream; | |
2273 | itd->stream = NULL; | |
2274 | list_move(&itd->itd_list, &stream->free_list); | |
2275 | iso_stream_put(ehci, stream); | |
2276 | } | |
0e5f231b AS |
2277 | |
2278 | list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) { | |
2279 | struct ehci_iso_stream *stream = sitd->stream; | |
2280 | sitd->stream = NULL; | |
2281 | list_move(&sitd->sitd_list, &stream->free_list); | |
2282 | iso_stream_put(ehci, stream); | |
2283 | } | |
9aa09d2f KW |
2284 | } |
2285 | ||
2286 | /*-------------------------------------------------------------------------*/ | |
2287 | ||
1da177e4 | 2288 | static void |
7d12e780 | 2289 | scan_periodic (struct ehci_hcd *ehci) |
1da177e4 | 2290 | { |
b40e43fc | 2291 | unsigned now_uframe, frame, clock, clock_frame, mod; |
1da177e4 LT |
2292 | unsigned modified; |
2293 | ||
2294 | mod = ehci->periodic_size << 3; | |
2295 | ||
2296 | /* | |
2297 | * When running, scan from last scan point up to "now" | |
2298 | * else clean up by scanning everything that's left. | |
2299 | * Touches as few pages as possible: cache-friendly. | |
2300 | */ | |
2301 | now_uframe = ehci->next_uframe; | |
c0c53dbc | 2302 | if (ehci->rh_state >= EHCI_RH_RUNNING) { |
68aa95d5 | 2303 | clock = ehci_read_frame_index(ehci); |
bccbefaa | 2304 | clock_frame = (clock >> 3) & (ehci->periodic_size - 1); |
9aa09d2f | 2305 | } else { |
1da177e4 | 2306 | clock = now_uframe + mod - 1; |
9aa09d2f KW |
2307 | clock_frame = -1; |
2308 | } | |
2309 | if (ehci->clock_frame != clock_frame) { | |
0e5f231b | 2310 | free_cached_lists(ehci); |
9aa09d2f KW |
2311 | ehci->clock_frame = clock_frame; |
2312 | } | |
bccbefaa | 2313 | clock &= mod - 1; |
b40e43fc | 2314 | clock_frame = clock >> 3; |
1e12c910 | 2315 | ++ehci->periodic_stamp; |
1da177e4 LT |
2316 | |
2317 | for (;;) { | |
2318 | union ehci_shadow q, *q_p; | |
6dbd682b | 2319 | __hc32 type, *hw_p; |
79592b72 | 2320 | unsigned incomplete = false; |
1da177e4 | 2321 | |
1da177e4 | 2322 | frame = now_uframe >> 3; |
1da177e4 LT |
2323 | |
2324 | restart: | |
2325 | /* scan each element in frame's queue for completions */ | |
2326 | q_p = &ehci->pshadow [frame]; | |
2327 | hw_p = &ehci->periodic [frame]; | |
2328 | q.ptr = q_p->ptr; | |
6dbd682b | 2329 | type = Q_NEXT_TYPE(ehci, *hw_p); |
1da177e4 LT |
2330 | modified = 0; |
2331 | ||
2332 | while (q.ptr != NULL) { | |
2333 | unsigned uf; | |
2334 | union ehci_shadow temp; | |
2335 | int live; | |
2336 | ||
c0c53dbc | 2337 | live = (ehci->rh_state >= EHCI_RH_RUNNING); |
6dbd682b | 2338 | switch (hc32_to_cpu(ehci, type)) { |
1da177e4 LT |
2339 | case Q_TYPE_QH: |
2340 | /* handle any completions */ | |
c83e1a9f | 2341 | temp.qh = q.qh; |
3807e26d | 2342 | type = Q_NEXT_TYPE(ehci, q.qh->hw->hw_next); |
1da177e4 | 2343 | q = q.qh->qh_next; |
1e12c910 AS |
2344 | if (temp.qh->stamp != ehci->periodic_stamp) { |
2345 | modified = qh_completions(ehci, temp.qh); | |
2346 | if (!modified) | |
2347 | temp.qh->stamp = ehci->periodic_stamp; | |
2348 | if (unlikely(list_empty(&temp.qh->qtd_list) || | |
2349 | temp.qh->needs_rescan)) | |
2350 | intr_deschedule(ehci, temp.qh); | |
2351 | } | |
1da177e4 LT |
2352 | break; |
2353 | case Q_TYPE_FSTN: | |
2354 | /* for "save place" FSTNs, look at QH entries | |
2355 | * in the previous frame for completions. | |
2356 | */ | |
6dbd682b | 2357 | if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) { |
2d0fe1bb GKH |
2358 | ehci_dbg(ehci, |
2359 | "ignoring completions from FSTNs\n"); | |
1da177e4 | 2360 | } |
6dbd682b | 2361 | type = Q_NEXT_TYPE(ehci, q.fstn->hw_next); |
1da177e4 LT |
2362 | q = q.fstn->fstn_next; |
2363 | break; | |
2364 | case Q_TYPE_ITD: | |
79592b72 DB |
2365 | /* If this ITD is still active, leave it for |
2366 | * later processing ... check the next entry. | |
b40e43fc AS |
2367 | * No need to check for activity unless the |
2368 | * frame is current. | |
79592b72 | 2369 | */ |
b40e43fc AS |
2370 | if (frame == clock_frame && live) { |
2371 | rmb(); | |
2372 | for (uf = 0; uf < 8; uf++) { | |
2373 | if (q.itd->hw_transaction[uf] & | |
2374 | ITD_ACTIVE(ehci)) | |
2375 | break; | |
2376 | } | |
2377 | if (uf < 8) { | |
2378 | incomplete = true; | |
2379 | q_p = &q.itd->itd_next; | |
2380 | hw_p = &q.itd->hw_next; | |
2381 | type = Q_NEXT_TYPE(ehci, | |
6dbd682b | 2382 | q.itd->hw_next); |
b40e43fc AS |
2383 | q = *q_p; |
2384 | break; | |
2385 | } | |
1da177e4 | 2386 | } |
1da177e4 | 2387 | |
79592b72 DB |
2388 | /* Take finished ITDs out of the schedule |
2389 | * and process them: recycle, maybe report | |
2390 | * URB completion. HC won't cache the | |
1da177e4 LT |
2391 | * pointer for much longer, if at all. |
2392 | */ | |
2393 | *q_p = q.itd->itd_next; | |
3d091a6f AX |
2394 | if (!ehci->use_dummy_qh || |
2395 | q.itd->hw_next != EHCI_LIST_END(ehci)) | |
2396 | *hw_p = q.itd->hw_next; | |
2397 | else | |
2398 | *hw_p = ehci->dummy->qh_dma; | |
6dbd682b | 2399 | type = Q_NEXT_TYPE(ehci, q.itd->hw_next); |
1da177e4 | 2400 | wmb(); |
7d12e780 | 2401 | modified = itd_complete (ehci, q.itd); |
1da177e4 LT |
2402 | q = *q_p; |
2403 | break; | |
2404 | case Q_TYPE_SITD: | |
79592b72 DB |
2405 | /* If this SITD is still active, leave it for |
2406 | * later processing ... check the next entry. | |
b40e43fc AS |
2407 | * No need to check for activity unless the |
2408 | * frame is current. | |
79592b72 | 2409 | */ |
22e18694 | 2410 | if (((frame == clock_frame) || |
bccbefaa | 2411 | (((frame + 1) & (ehci->periodic_size - 1)) |
22e18694 DE |
2412 | == clock_frame)) |
2413 | && live | |
2414 | && (q.sitd->hw_results & | |
2415 | SITD_ACTIVE(ehci))) { | |
2416 | ||
79592b72 | 2417 | incomplete = true; |
1da177e4 LT |
2418 | q_p = &q.sitd->sitd_next; |
2419 | hw_p = &q.sitd->hw_next; | |
6dbd682b SR |
2420 | type = Q_NEXT_TYPE(ehci, |
2421 | q.sitd->hw_next); | |
1da177e4 LT |
2422 | q = *q_p; |
2423 | break; | |
2424 | } | |
79592b72 DB |
2425 | |
2426 | /* Take finished SITDs out of the schedule | |
2427 | * and process them: recycle, maybe report | |
2428 | * URB completion. | |
2429 | */ | |
1da177e4 | 2430 | *q_p = q.sitd->sitd_next; |
3d091a6f AX |
2431 | if (!ehci->use_dummy_qh || |
2432 | q.sitd->hw_next != EHCI_LIST_END(ehci)) | |
2433 | *hw_p = q.sitd->hw_next; | |
2434 | else | |
2435 | *hw_p = ehci->dummy->qh_dma; | |
6dbd682b | 2436 | type = Q_NEXT_TYPE(ehci, q.sitd->hw_next); |
1da177e4 | 2437 | wmb(); |
7d12e780 | 2438 | modified = sitd_complete (ehci, q.sitd); |
1da177e4 LT |
2439 | q = *q_p; |
2440 | break; | |
2441 | default: | |
2d0fe1bb | 2442 | ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n", |
1da177e4 LT |
2443 | type, frame, q.ptr); |
2444 | // BUG (); | |
2445 | q.ptr = NULL; | |
2446 | } | |
2447 | ||
2448 | /* assume completion callbacks modify the queue */ | |
aa16ca30 DB |
2449 | if (unlikely (modified)) { |
2450 | if (likely(ehci->periodic_sched > 0)) | |
2451 | goto restart; | |
01c17142 | 2452 | /* short-circuit this scan */ |
aa16ca30 DB |
2453 | now_uframe = clock; |
2454 | break; | |
2455 | } | |
1da177e4 LT |
2456 | } |
2457 | ||
79592b72 DB |
2458 | /* If we can tell we caught up to the hardware, stop now. |
2459 | * We can't advance our scan without collecting the ISO | |
2460 | * transfers that are still pending in this frame. | |
2461 | */ | |
c0c53dbc | 2462 | if (incomplete && ehci->rh_state >= EHCI_RH_RUNNING) { |
79592b72 DB |
2463 | ehci->next_uframe = now_uframe; |
2464 | break; | |
2465 | } | |
1da177e4 LT |
2466 | |
2467 | // FIXME: this assumes we won't get lapped when | |
2468 | // latencies climb; that should be rare, but... | |
2469 | // detect it, and just go all the way around. | |
2470 | // FLR might help detect this case, so long as latencies | |
2471 | // don't exceed periodic_size msec (default 1.024 sec). | |
2472 | ||
2473 | // FIXME: likewise assumes HC doesn't halt mid-scan | |
2474 | ||
2475 | if (now_uframe == clock) { | |
2476 | unsigned now; | |
2477 | ||
c0c53dbc | 2478 | if (ehci->rh_state < EHCI_RH_RUNNING |
aa16ca30 | 2479 | || ehci->periodic_sched == 0) |
1da177e4 LT |
2480 | break; |
2481 | ehci->next_uframe = now_uframe; | |
68aa95d5 | 2482 | now = ehci_read_frame_index(ehci) & (mod - 1); |
1da177e4 LT |
2483 | if (now_uframe == now) |
2484 | break; | |
2485 | ||
2486 | /* rescan the rest of this frame, then ... */ | |
2487 | clock = now; | |
b40e43fc | 2488 | clock_frame = clock >> 3; |
9aa09d2f | 2489 | if (ehci->clock_frame != clock_frame) { |
0e5f231b | 2490 | free_cached_lists(ehci); |
9aa09d2f | 2491 | ehci->clock_frame = clock_frame; |
1e12c910 | 2492 | ++ehci->periodic_stamp; |
9aa09d2f | 2493 | } |
1da177e4 LT |
2494 | } else { |
2495 | now_uframe++; | |
bccbefaa | 2496 | now_uframe &= mod - 1; |
1da177e4 | 2497 | } |
53bd6a60 | 2498 | } |
1da177e4 | 2499 | } |