Commit | Line | Data |
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d58b4bcc AS |
1 | /* |
2 | * Copyright (C) 2012 by Alan Stern | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | */ | |
14 | ||
15 | /* This file is part of ehci-hcd.c */ | |
16 | ||
17 | /*-------------------------------------------------------------------------*/ | |
18 | ||
3ca9aeba AS |
19 | /* Set a bit in the USBCMD register */ |
20 | static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit) | |
21 | { | |
22 | ehci->command |= bit; | |
23 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | |
24 | ||
25 | /* unblock posted write */ | |
26 | ehci_readl(ehci, &ehci->regs->command); | |
27 | } | |
28 | ||
29 | /* Clear a bit in the USBCMD register */ | |
30 | static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit) | |
31 | { | |
32 | ehci->command &= ~bit; | |
33 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | |
34 | ||
35 | /* unblock posted write */ | |
36 | ehci_readl(ehci, &ehci->regs->command); | |
37 | } | |
38 | ||
39 | /*-------------------------------------------------------------------------*/ | |
40 | ||
d58b4bcc AS |
41 | /* |
42 | * EHCI timer support... Now using hrtimers. | |
43 | * | |
44 | * Lots of different events are triggered from ehci->hrtimer. Whenever | |
45 | * the timer routine runs, it checks each possible event; events that are | |
46 | * currently enabled and whose expiration time has passed get handled. | |
47 | * The set of enabled events is stored as a collection of bitflags in | |
48 | * ehci->enabled_hrtimer_events, and they are numbered in order of | |
49 | * increasing delay values (ranging between 1 ms and 100 ms). | |
50 | * | |
51 | * Rather than implementing a sorted list or tree of all pending events, | |
52 | * we keep track only of the lowest-numbered pending event, in | |
53 | * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its | |
54 | * expiration time is set to the timeout value for this event. | |
55 | * | |
56 | * As a result, events might not get handled right away; the actual delay | |
57 | * could be anywhere up to twice the requested delay. This doesn't | |
58 | * matter, because none of the events are especially time-critical. The | |
59 | * ones that matter most all have a delay of 1 ms, so they will be | |
60 | * handled after 2 ms at most, which is okay. In addition to this, we | |
61 | * allow for an expiration range of 1 ms. | |
62 | */ | |
63 | ||
64 | /* | |
65 | * Delay lengths for the hrtimer event types. | |
66 | * Keep this list sorted by delay length, in the same order as | |
67 | * the event types indexed by enum ehci_hrtimer_event in ehci.h. | |
68 | */ | |
69 | static unsigned event_delays_ns[] = { | |
31446610 | 70 | 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */ |
3ca9aeba | 71 | 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */ |
bf6387bc | 72 | 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */ |
df202255 | 73 | 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */ |
55934eb3 | 74 | 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */ |
32830f20 | 75 | 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */ |
9d938747 | 76 | 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */ |
3ca9aeba | 77 | 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */ |
31446610 | 78 | 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */ |
18aafe64 | 79 | 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */ |
d58b4bcc AS |
80 | }; |
81 | ||
82 | /* Enable a pending hrtimer event */ | |
83 | static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event, | |
84 | bool resched) | |
85 | { | |
86 | ktime_t *timeout = &ehci->hr_timeouts[event]; | |
87 | ||
88 | if (resched) | |
89 | *timeout = ktime_add(ktime_get(), | |
90 | ktime_set(0, event_delays_ns[event])); | |
91 | ehci->enabled_hrtimer_events |= (1 << event); | |
92 | ||
93 | /* Track only the lowest-numbered pending event */ | |
94 | if (event < ehci->next_hrtimer_event) { | |
95 | ehci->next_hrtimer_event = event; | |
96 | hrtimer_start_range_ns(&ehci->hrtimer, *timeout, | |
97 | NSEC_PER_MSEC, HRTIMER_MODE_ABS); | |
98 | } | |
99 | } | |
100 | ||
101 | ||
31446610 AS |
102 | /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */ |
103 | static void ehci_poll_ASS(struct ehci_hcd *ehci) | |
104 | { | |
105 | unsigned actual, want; | |
106 | ||
107 | /* Don't enable anything if the controller isn't running (e.g., died) */ | |
108 | if (ehci->rh_state != EHCI_RH_RUNNING) | |
109 | return; | |
110 | ||
111 | want = (ehci->command & CMD_ASE) ? STS_ASS : 0; | |
112 | actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS; | |
113 | ||
114 | if (want != actual) { | |
115 | ||
116 | /* Poll again later, but give up after about 20 ms */ | |
117 | if (ehci->ASS_poll_count++ < 20) { | |
118 | ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true); | |
119 | return; | |
120 | } | |
d16ba487 AS |
121 | ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n", |
122 | want, actual); | |
31446610 AS |
123 | } |
124 | ehci->ASS_poll_count = 0; | |
125 | ||
126 | /* The status is up-to-date; restart or stop the schedule as needed */ | |
127 | if (want == 0) { /* Stopped */ | |
128 | if (ehci->async_count > 0) | |
129 | ehci_set_command_bit(ehci, CMD_ASE); | |
130 | ||
131 | } else { /* Running */ | |
132 | if (ehci->async_count == 0) { | |
133 | ||
134 | /* Turn off the schedule after a while */ | |
135 | ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC, | |
136 | true); | |
137 | } | |
138 | } | |
139 | } | |
140 | ||
141 | /* Turn off the async schedule after a brief delay */ | |
142 | static void ehci_disable_ASE(struct ehci_hcd *ehci) | |
143 | { | |
144 | ehci_clear_command_bit(ehci, CMD_ASE); | |
145 | } | |
146 | ||
147 | ||
3ca9aeba AS |
148 | /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */ |
149 | static void ehci_poll_PSS(struct ehci_hcd *ehci) | |
150 | { | |
151 | unsigned actual, want; | |
152 | ||
153 | /* Don't do anything if the controller isn't running (e.g., died) */ | |
154 | if (ehci->rh_state != EHCI_RH_RUNNING) | |
155 | return; | |
156 | ||
157 | want = (ehci->command & CMD_PSE) ? STS_PSS : 0; | |
158 | actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS; | |
159 | ||
160 | if (want != actual) { | |
161 | ||
162 | /* Poll again later, but give up after about 20 ms */ | |
163 | if (ehci->PSS_poll_count++ < 20) { | |
164 | ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true); | |
165 | return; | |
166 | } | |
d16ba487 AS |
167 | ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n", |
168 | want, actual); | |
3ca9aeba AS |
169 | } |
170 | ehci->PSS_poll_count = 0; | |
171 | ||
172 | /* The status is up-to-date; restart or stop the schedule as needed */ | |
173 | if (want == 0) { /* Stopped */ | |
569b394f | 174 | if (ehci->periodic_count > 0) |
3ca9aeba | 175 | ehci_set_command_bit(ehci, CMD_PSE); |
3ca9aeba AS |
176 | |
177 | } else { /* Running */ | |
178 | if (ehci->periodic_count == 0) { | |
179 | ||
180 | /* Turn off the schedule after a while */ | |
181 | ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC, | |
182 | true); | |
183 | } | |
184 | } | |
185 | } | |
186 | ||
187 | /* Turn off the periodic schedule after a brief delay */ | |
188 | static void ehci_disable_PSE(struct ehci_hcd *ehci) | |
189 | { | |
190 | ehci_clear_command_bit(ehci, CMD_PSE); | |
3ca9aeba AS |
191 | } |
192 | ||
193 | ||
bf6387bc AS |
194 | /* Poll the STS_HALT status bit; see when a dead controller stops */ |
195 | static void ehci_handle_controller_death(struct ehci_hcd *ehci) | |
196 | { | |
197 | if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) { | |
198 | ||
199 | /* Give up after a few milliseconds */ | |
200 | if (ehci->died_poll_count++ < 5) { | |
201 | /* Try again later */ | |
202 | ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true); | |
203 | return; | |
204 | } | |
205 | ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n"); | |
206 | } | |
207 | ||
208 | /* Clean up the mess */ | |
209 | ehci->rh_state = EHCI_RH_HALTED; | |
210 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); | |
211 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | |
212 | ehci_work(ehci); | |
3c273a05 | 213 | end_unlink_async(ehci); |
bf6387bc AS |
214 | |
215 | /* Not in process context, so don't try to reset the controller */ | |
216 | } | |
217 | ||
218 | ||
df202255 AS |
219 | /* Handle unlinked interrupt QHs once they are gone from the hardware */ |
220 | static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci) | |
221 | { | |
222 | bool stopped = (ehci->rh_state < EHCI_RH_RUNNING); | |
223 | ||
224 | /* | |
225 | * Process all the QHs on the intr_unlink list that were added | |
226 | * before the current unlink cycle began. The list is in | |
227 | * temporal order, so stop when we reach the first entry in the | |
228 | * current cycle. But if the root hub isn't running then | |
229 | * process all the QHs on the list. | |
230 | */ | |
231 | ehci->intr_unlinking = true; | |
232 | while (ehci->intr_unlink) { | |
233 | struct ehci_qh *qh = ehci->intr_unlink; | |
234 | ||
235 | if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle) | |
236 | break; | |
237 | ehci->intr_unlink = qh->unlink_next; | |
238 | qh->unlink_next = NULL; | |
239 | end_unlink_intr(ehci, qh); | |
240 | } | |
241 | ||
242 | /* Handle remaining entries later */ | |
243 | if (ehci->intr_unlink) { | |
244 | ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true); | |
245 | ++ehci->intr_unlink_cycle; | |
246 | } | |
247 | ehci->intr_unlinking = false; | |
248 | } | |
249 | ||
250 | ||
55934eb3 AS |
251 | /* Start another free-iTDs/siTDs cycle */ |
252 | static void start_free_itds(struct ehci_hcd *ehci) | |
253 | { | |
254 | if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) { | |
255 | ehci->last_itd_to_free = list_entry( | |
256 | ehci->cached_itd_list.prev, | |
257 | struct ehci_itd, itd_list); | |
258 | ehci->last_sitd_to_free = list_entry( | |
259 | ehci->cached_sitd_list.prev, | |
260 | struct ehci_sitd, sitd_list); | |
261 | ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true); | |
262 | } | |
263 | } | |
264 | ||
265 | /* Wait for controller to stop using old iTDs and siTDs */ | |
266 | static void end_free_itds(struct ehci_hcd *ehci) | |
267 | { | |
268 | struct ehci_itd *itd, *n; | |
269 | struct ehci_sitd *sitd, *sn; | |
270 | ||
271 | if (ehci->rh_state < EHCI_RH_RUNNING) { | |
272 | ehci->last_itd_to_free = NULL; | |
273 | ehci->last_sitd_to_free = NULL; | |
274 | } | |
275 | ||
276 | list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) { | |
277 | list_del(&itd->itd_list); | |
278 | dma_pool_free(ehci->itd_pool, itd, itd->itd_dma); | |
279 | if (itd == ehci->last_itd_to_free) | |
280 | break; | |
281 | } | |
282 | list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) { | |
283 | list_del(&sitd->sitd_list); | |
284 | dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma); | |
285 | if (sitd == ehci->last_sitd_to_free) | |
286 | break; | |
287 | } | |
288 | ||
289 | if (!list_empty(&ehci->cached_itd_list) || | |
290 | !list_empty(&ehci->cached_sitd_list)) | |
291 | start_free_itds(ehci); | |
292 | } | |
293 | ||
294 | ||
9d938747 AS |
295 | /* Handle lost (or very late) IAA interrupts */ |
296 | static void ehci_iaa_watchdog(struct ehci_hcd *ehci) | |
297 | { | |
298 | if (ehci->rh_state != EHCI_RH_RUNNING) | |
299 | return; | |
300 | ||
301 | /* | |
302 | * Lost IAA irqs wedge things badly; seen first with a vt8235. | |
303 | * So we need this watchdog, but must protect it against both | |
304 | * (a) SMP races against real IAA firing and retriggering, and | |
305 | * (b) clean HC shutdown, when IAA watchdog was pending. | |
306 | */ | |
3c273a05 | 307 | if (ehci->async_iaa) { |
9d938747 AS |
308 | u32 cmd, status; |
309 | ||
310 | /* If we get here, IAA is *REALLY* late. It's barely | |
311 | * conceivable that the system is so busy that CMD_IAAD | |
312 | * is still legitimately set, so let's be sure it's | |
313 | * clear before we read STS_IAA. (The HC should clear | |
314 | * CMD_IAAD when it sets STS_IAA.) | |
315 | */ | |
316 | cmd = ehci_readl(ehci, &ehci->regs->command); | |
317 | ||
318 | /* | |
319 | * If IAA is set here it either legitimately triggered | |
320 | * after the watchdog timer expired (_way_ late, so we'll | |
321 | * still count it as lost) ... or a silicon erratum: | |
322 | * - VIA seems to set IAA without triggering the IRQ; | |
323 | * - IAAD potentially cleared without setting IAA. | |
324 | */ | |
325 | status = ehci_readl(ehci, &ehci->regs->status); | |
326 | if ((status & STS_IAA) || !(cmd & CMD_IAAD)) { | |
327 | COUNT(ehci->stats.lost_iaa); | |
328 | ehci_writel(ehci, STS_IAA, &ehci->regs->status); | |
329 | } | |
330 | ||
331 | ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n", | |
332 | status, cmd); | |
333 | end_unlink_async(ehci); | |
334 | } | |
335 | } | |
336 | ||
337 | ||
18aafe64 AS |
338 | /* Enable the I/O watchdog, if appropriate */ |
339 | static void turn_on_io_watchdog(struct ehci_hcd *ehci) | |
340 | { | |
341 | /* Not needed if the controller isn't running or it's already enabled */ | |
342 | if (ehci->rh_state != EHCI_RH_RUNNING || | |
343 | (ehci->enabled_hrtimer_events & | |
344 | BIT(EHCI_HRTIMER_IO_WATCHDOG))) | |
345 | return; | |
346 | ||
347 | /* | |
348 | * Isochronous transfers always need the watchdog. | |
349 | * For other sorts we use it only if the flag is set. | |
350 | */ | |
351 | if (ehci->isoc_count > 0 || (ehci->need_io_watchdog && | |
352 | ehci->async_count + ehci->intr_count > 0)) | |
353 | ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true); | |
354 | } | |
355 | ||
356 | ||
d58b4bcc AS |
357 | /* |
358 | * Handler functions for the hrtimer event types. | |
359 | * Keep this array in the same order as the event types indexed by | |
360 | * enum ehci_hrtimer_event in ehci.h. | |
361 | */ | |
362 | static void (*event_handlers[])(struct ehci_hcd *) = { | |
31446610 | 363 | ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */ |
3ca9aeba | 364 | ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */ |
bf6387bc | 365 | ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */ |
df202255 | 366 | ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */ |
55934eb3 | 367 | end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */ |
32830f20 | 368 | unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */ |
9d938747 | 369 | ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */ |
3ca9aeba | 370 | ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */ |
31446610 | 371 | ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */ |
18aafe64 | 372 | ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */ |
d58b4bcc AS |
373 | }; |
374 | ||
375 | static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t) | |
376 | { | |
377 | struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer); | |
378 | ktime_t now; | |
379 | unsigned long events; | |
380 | unsigned long flags; | |
381 | unsigned e; | |
382 | ||
383 | spin_lock_irqsave(&ehci->lock, flags); | |
384 | ||
385 | events = ehci->enabled_hrtimer_events; | |
386 | ehci->enabled_hrtimer_events = 0; | |
387 | ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT; | |
388 | ||
389 | /* | |
390 | * Check each pending event. If its time has expired, handle | |
391 | * the event; otherwise re-enable it. | |
392 | */ | |
393 | now = ktime_get(); | |
394 | for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS) { | |
395 | if (now.tv64 >= ehci->hr_timeouts[e].tv64) | |
396 | event_handlers[e](ehci); | |
397 | else | |
398 | ehci_enable_event(ehci, e, false); | |
399 | } | |
400 | ||
401 | spin_unlock_irqrestore(&ehci->lock, flags); | |
402 | return HRTIMER_NORESTART; | |
403 | } |