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236dd4d1 AV |
1 | /* |
2 | * Freescale QUICC Engine USB Host Controller Driver | |
3 | * | |
4 | * Copyright (c) Freescale Semicondutor, Inc. 2006. | |
5 | * Shlomi Gridish <gridish@freescale.com> | |
6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | |
7 | * Copyright (c) Logic Product Development, Inc. 2007 | |
8 | * Peter Barada <peterb@logicpd.com> | |
9 | * Copyright (c) MontaVista Software, Inc. 2008. | |
10 | * Anton Vorontsov <avorontsov@ru.mvista.com> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms of the GNU General Public License as published by the | |
14 | * Free Software Foundation; either version 2 of the License, or (at your | |
15 | * option) any later version. | |
16 | */ | |
17 | ||
18 | #ifndef __FHCI_H | |
19 | #define __FHCI_H | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/kfifo.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/usb.h> | |
27729aad | 28 | #include <linux/usb/hcd.h> |
236dd4d1 | 29 | #include <asm/qe.h> |
236dd4d1 AV |
30 | |
31 | #define USB_CLOCK 48000000 | |
32 | ||
33 | #define FHCI_PRAM_SIZE 0x100 | |
34 | ||
35 | #define MAX_EDS 32 | |
36 | #define MAX_TDS 32 | |
37 | ||
38 | ||
39 | /* CRC16 field size */ | |
40 | #define CRC_SIZE 2 | |
41 | ||
42 | /* USB protocol overhead for each frame transmitted from the host */ | |
43 | #define PROTOCOL_OVERHEAD 7 | |
44 | ||
45 | /* Packet structure, info field */ | |
46 | #define PKT_PID_DATA0 0x80000000 /* PID - Data toggle zero */ | |
47 | #define PKT_PID_DATA1 0x40000000 /* PID - Data toggle one */ | |
48 | #define PKT_PID_SETUP 0x20000000 /* PID - Setup bit */ | |
49 | #define PKT_SETUP_STATUS 0x10000000 /* Setup status bit */ | |
50 | #define PKT_SETADDR_STATUS 0x08000000 /* Set address status bit */ | |
51 | #define PKT_SET_HOST_LAST 0x04000000 /* Last data packet */ | |
52 | #define PKT_HOST_DATA 0x02000000 /* Data packet */ | |
53 | #define PKT_FIRST_IN_FRAME 0x01000000 /* First packet in the frame */ | |
54 | #define PKT_TOKEN_FRAME 0x00800000 /* Token packet */ | |
55 | #define PKT_ZLP 0x00400000 /* Zero length packet */ | |
56 | #define PKT_IN_TOKEN_FRAME 0x00200000 /* IN token packet */ | |
57 | #define PKT_OUT_TOKEN_FRAME 0x00100000 /* OUT token packet */ | |
58 | #define PKT_SETUP_TOKEN_FRAME 0x00080000 /* SETUP token packet */ | |
59 | #define PKT_STALL_FRAME 0x00040000 /* STALL packet */ | |
60 | #define PKT_NACK_FRAME 0x00020000 /* NACK packet */ | |
61 | #define PKT_NO_PID 0x00010000 /* No PID */ | |
62 | #define PKT_NO_CRC 0x00008000 /* don't append CRC */ | |
63 | #define PKT_HOST_COMMAND 0x00004000 /* Host command packet */ | |
64 | #define PKT_DUMMY_PACKET 0x00002000 /* Dummy packet, used for mmm */ | |
65 | #define PKT_LOW_SPEED_PACKET 0x00001000 /* Low-Speed packet */ | |
66 | ||
67 | #define TRANS_OK (0) | |
68 | #define TRANS_INPROGRESS (-1) | |
69 | #define TRANS_DISCARD (-2) | |
70 | #define TRANS_FAIL (-3) | |
71 | ||
72 | #define PS_INT 0 | |
73 | #define PS_DISCONNECTED 1 | |
74 | #define PS_CONNECTED 2 | |
75 | #define PS_READY 3 | |
76 | #define PS_MISSING 4 | |
77 | ||
78 | /* Transfer Descriptor status field */ | |
79 | #define USB_TD_OK 0x00000000 /* TD transmited or received ok */ | |
80 | #define USB_TD_INPROGRESS 0x80000000 /* TD is being transmitted */ | |
81 | #define USB_TD_RX_ER_NONOCT 0x40000000 /* Tx Non Octet Aligned Packet */ | |
82 | #define USB_TD_RX_ER_BITSTUFF 0x20000000 /* Frame Aborted-Received pkt */ | |
83 | #define USB_TD_RX_ER_CRC 0x10000000 /* CRC error */ | |
84 | #define USB_TD_RX_ER_OVERUN 0x08000000 /* Over - run occured */ | |
85 | #define USB_TD_RX_ER_PID 0x04000000 /* wrong PID received */ | |
86 | #define USB_TD_RX_DATA_UNDERUN 0x02000000 /* shorter than expected */ | |
87 | #define USB_TD_RX_DATA_OVERUN 0x01000000 /* longer than expected */ | |
88 | #define USB_TD_TX_ER_NAK 0x00800000 /* NAK handshake */ | |
89 | #define USB_TD_TX_ER_STALL 0x00400000 /* STALL handshake */ | |
90 | #define USB_TD_TX_ER_TIMEOUT 0x00200000 /* transmit time out */ | |
91 | #define USB_TD_TX_ER_UNDERUN 0x00100000 /* transmit underrun */ | |
92 | ||
93 | #define USB_TD_ERROR (USB_TD_RX_ER_NONOCT | USB_TD_RX_ER_BITSTUFF | \ | |
94 | USB_TD_RX_ER_CRC | USB_TD_RX_ER_OVERUN | USB_TD_RX_ER_PID | \ | |
95 | USB_TD_RX_DATA_UNDERUN | USB_TD_RX_DATA_OVERUN | \ | |
96 | USB_TD_TX_ER_NAK | USB_TD_TX_ER_STALL | \ | |
97 | USB_TD_TX_ER_TIMEOUT | USB_TD_TX_ER_UNDERUN) | |
98 | ||
99 | /* Transfer Descriptor toggle field */ | |
100 | #define USB_TD_TOGGLE_DATA0 0 | |
101 | #define USB_TD_TOGGLE_DATA1 1 | |
102 | #define USB_TD_TOGGLE_CARRY 2 | |
103 | ||
104 | /* #define MULTI_DATA_BUS */ | |
105 | ||
106 | /* Bus mode register RBMR/TBMR */ | |
107 | #define BUS_MODE_GBL 0x20 /* Global snooping */ | |
108 | #define BUS_MODE_BO 0x18 /* Byte ordering */ | |
109 | #define BUS_MODE_BO_BE 0x10 /* Byte ordering - Big-endian */ | |
110 | #define BUS_MODE_DTB 0x02 /* Data bus */ | |
111 | ||
112 | /* FHCI QE USB Register Description */ | |
113 | ||
114 | /* USB Mode Register bit define */ | |
115 | #define USB_MODE_EN 0x01 | |
116 | #define USB_MODE_HOST 0x02 | |
117 | #define USB_MODE_TEST 0x04 | |
118 | #define USB_MODE_SFTE 0x08 | |
119 | #define USB_MODE_RESUME 0x40 | |
120 | #define USB_MODE_LSS 0x80 | |
121 | ||
122 | /* USB Slave Address Register Mask */ | |
123 | #define USB_SLVADDR_MASK 0x7F | |
124 | ||
125 | /* USB Endpoint register define */ | |
126 | #define USB_EPNUM_MASK 0xF000 | |
127 | #define USB_EPNUM_SHIFT 12 | |
128 | ||
129 | #define USB_TRANS_MODE_SHIFT 8 | |
130 | #define USB_TRANS_CTR 0x0000 | |
131 | #define USB_TRANS_INT 0x0100 | |
132 | #define USB_TRANS_BULK 0x0200 | |
133 | #define USB_TRANS_ISO 0x0300 | |
134 | ||
135 | #define USB_EP_MF 0x0020 | |
136 | #define USB_EP_RTE 0x0010 | |
137 | ||
138 | #define USB_THS_SHIFT 2 | |
139 | #define USB_THS_MASK 0x000c | |
140 | #define USB_THS_NORMAL 0x0 | |
141 | #define USB_THS_IGNORE_IN 0x0004 | |
142 | #define USB_THS_NACK 0x0008 | |
143 | #define USB_THS_STALL 0x000c | |
144 | ||
145 | #define USB_RHS_SHIFT 0 | |
146 | #define USB_RHS_MASK 0x0003 | |
147 | #define USB_RHS_NORMAL 0x0 | |
148 | #define USB_RHS_IGNORE_OUT 0x0001 | |
149 | #define USB_RHS_NACK 0x0002 | |
150 | #define USB_RHS_STALL 0x0003 | |
151 | ||
152 | #define USB_RTHS_MASK 0x000f | |
153 | ||
154 | /* USB Command Register define */ | |
155 | #define USB_CMD_STR_FIFO 0x80 | |
156 | #define USB_CMD_FLUSH_FIFO 0x40 | |
157 | #define USB_CMD_ISFT 0x20 | |
158 | #define USB_CMD_DSFT 0x10 | |
159 | #define USB_CMD_EP_MASK 0x03 | |
160 | ||
161 | /* USB Event and Mask Register define */ | |
162 | #define USB_E_MSF_MASK 0x0800 | |
163 | #define USB_E_SFT_MASK 0x0400 | |
164 | #define USB_E_RESET_MASK 0x0200 | |
165 | #define USB_E_IDLE_MASK 0x0100 | |
166 | #define USB_E_TXE4_MASK 0x0080 | |
167 | #define USB_E_TXE3_MASK 0x0040 | |
168 | #define USB_E_TXE2_MASK 0x0020 | |
169 | #define USB_E_TXE1_MASK 0x0010 | |
170 | #define USB_E_SOF_MASK 0x0008 | |
171 | #define USB_E_BSY_MASK 0x0004 | |
172 | #define USB_E_TXB_MASK 0x0002 | |
173 | #define USB_E_RXB_MASK 0x0001 | |
174 | ||
175 | /* Freescale USB Host controller registers */ | |
176 | struct fhci_regs { | |
177 | u8 usb_mod; /* mode register */ | |
178 | u8 usb_addr; /* address register */ | |
179 | u8 usb_comm; /* command register */ | |
180 | u8 reserved1[1]; | |
181 | __be16 usb_ep[4]; /* endpoint register */ | |
182 | u8 reserved2[4]; | |
183 | __be16 usb_event; /* event register */ | |
184 | u8 reserved3[2]; | |
185 | __be16 usb_mask; /* mask register */ | |
186 | u8 reserved4[1]; | |
187 | u8 usb_status; /* status register */ | |
188 | __be16 usb_sof_tmr; /* Start Of Frame timer */ | |
189 | u8 reserved5[2]; | |
190 | __be16 usb_frame_num; /* frame number register */ | |
191 | u8 reserved6[1]; | |
192 | }; | |
193 | ||
194 | /* Freescale USB HOST */ | |
195 | struct fhci_pram { | |
196 | __be16 ep_ptr[4]; /* Endpoint porter reg */ | |
197 | __be32 rx_state; /* Rx internal state */ | |
198 | __be32 rx_ptr; /* Rx internal data pointer */ | |
199 | __be16 frame_num; /* Frame number */ | |
200 | __be16 rx_cnt; /* Rx byte count */ | |
201 | __be32 rx_temp; /* Rx temp */ | |
202 | __be32 rx_data_temp; /* Rx data temp */ | |
203 | __be16 rx_u_ptr; /* Rx microcode return address temp */ | |
204 | u8 reserved1[2]; /* reserved area */ | |
205 | __be32 sof_tbl; /* SOF lookup table pointer */ | |
206 | u8 sof_u_crc_temp; /* SOF micorcode CRC5 temp reg */ | |
207 | u8 reserved2[0xdb]; | |
208 | }; | |
209 | ||
210 | /* Freescale USB Endpoint*/ | |
211 | struct fhci_ep_pram { | |
212 | __be16 rx_base; /* Rx BD base address */ | |
213 | __be16 tx_base; /* Tx BD base address */ | |
214 | u8 rx_func_code; /* Rx function code */ | |
215 | u8 tx_func_code; /* Tx function code */ | |
216 | __be16 rx_buff_len; /* Rx buffer length */ | |
217 | __be16 rx_bd_ptr; /* Rx BD pointer */ | |
218 | __be16 tx_bd_ptr; /* Tx BD pointer */ | |
219 | __be32 tx_state; /* Tx internal state */ | |
220 | __be32 tx_ptr; /* Tx internal data pointer */ | |
221 | __be16 tx_crc; /* temp transmit CRC */ | |
222 | __be16 tx_cnt; /* Tx byte count */ | |
223 | __be32 tx_temp; /* Tx temp */ | |
224 | __be16 tx_u_ptr; /* Tx microcode return address temp */ | |
225 | __be16 reserved; | |
226 | }; | |
227 | ||
228 | struct fhci_controller_list { | |
229 | struct list_head ctrl_list; /* control endpoints */ | |
230 | struct list_head bulk_list; /* bulk endpoints */ | |
231 | struct list_head iso_list; /* isochronous endpoints */ | |
232 | struct list_head intr_list; /* interruput endpoints */ | |
233 | struct list_head done_list; /* done transfers */ | |
234 | }; | |
235 | ||
236 | struct virtual_root_hub { | |
237 | int dev_num; /* USB address of the root hub */ | |
238 | u32 feature; /* indicates what feature has been set */ | |
239 | struct usb_hub_status hub; | |
240 | struct usb_port_status port; | |
241 | }; | |
242 | ||
243 | enum fhci_gpios { | |
244 | GPIO_USBOE = 0, | |
245 | GPIO_USBTP, | |
246 | GPIO_USBTN, | |
247 | GPIO_USBRP, | |
248 | GPIO_USBRN, | |
249 | /* these are optional */ | |
250 | GPIO_SPEED, | |
251 | GPIO_POWER, | |
252 | NUM_GPIOS, | |
253 | }; | |
254 | ||
255 | enum fhci_pins { | |
256 | PIN_USBOE = 0, | |
257 | PIN_USBTP, | |
258 | PIN_USBTN, | |
259 | NUM_PINS, | |
260 | }; | |
261 | ||
262 | struct fhci_hcd { | |
263 | enum qe_clock fullspeed_clk; | |
264 | enum qe_clock lowspeed_clk; | |
265 | struct qe_pin *pins[NUM_PINS]; | |
266 | int gpios[NUM_GPIOS]; | |
267 | bool alow_gpios[NUM_GPIOS]; | |
268 | ||
269 | struct fhci_regs __iomem *regs; /* I/O memory used to communicate */ | |
270 | struct fhci_pram __iomem *pram; /* Parameter RAM */ | |
271 | struct gtm_timer *timer; | |
272 | ||
273 | spinlock_t lock; | |
274 | struct fhci_usb *usb_lld; /* Low-level driver */ | |
275 | struct virtual_root_hub *vroot_hub; /* the virtual root hub */ | |
276 | int active_urbs; | |
277 | struct fhci_controller_list *hc_list; | |
278 | struct tasklet_struct *process_done_task; /* tasklet for done list */ | |
279 | ||
280 | struct list_head empty_eds; | |
281 | struct list_head empty_tds; | |
282 | ||
283 | #ifdef CONFIG_FHCI_DEBUG | |
284 | int usb_irq_stat[13]; | |
285 | struct dentry *dfs_root; | |
286 | struct dentry *dfs_regs; | |
287 | struct dentry *dfs_irq_stat; | |
288 | #endif | |
289 | }; | |
290 | ||
291 | #define USB_FRAME_USAGE 90 | |
292 | #define FRAME_TIME_USAGE (USB_FRAME_USAGE*10) /* frame time usage */ | |
293 | #define SW_FIX_TIME_BETWEEN_TRANSACTION 150 /* SW */ | |
294 | #define MAX_BYTES_PER_FRAME (USB_FRAME_USAGE*15) | |
295 | #define MAX_PERIODIC_FRAME_USAGE 90 | |
296 | ||
297 | /* transaction type */ | |
298 | enum fhci_ta_type { | |
299 | FHCI_TA_IN = 0, /* input transaction */ | |
300 | FHCI_TA_OUT, /* output transaction */ | |
301 | FHCI_TA_SETUP, /* setup transaction */ | |
302 | }; | |
303 | ||
304 | /* transfer mode */ | |
305 | enum fhci_tf_mode { | |
306 | FHCI_TF_CTRL = 0, | |
307 | FHCI_TF_ISO, | |
308 | FHCI_TF_BULK, | |
309 | FHCI_TF_INTR, | |
310 | }; | |
311 | ||
312 | enum fhci_speed { | |
313 | FHCI_FULL_SPEED, | |
314 | FHCI_LOW_SPEED, | |
315 | }; | |
316 | ||
317 | /* endpoint state */ | |
318 | enum fhci_ed_state { | |
319 | FHCI_ED_NEW = 0, /* pipe is new */ | |
320 | FHCI_ED_OPER, /* pipe is operating */ | |
321 | FHCI_ED_URB_DEL, /* pipe is in hold because urb is being deleted */ | |
322 | FHCI_ED_SKIP, /* skip this pipe */ | |
323 | FHCI_ED_HALTED, /* pipe is halted */ | |
324 | }; | |
325 | ||
326 | enum fhci_port_status { | |
327 | FHCI_PORT_POWER_OFF = 0, | |
328 | FHCI_PORT_DISABLED, | |
329 | FHCI_PORT_DISCONNECTING, | |
330 | FHCI_PORT_WAITING, /* waiting for connection */ | |
331 | FHCI_PORT_FULL, /* full speed connected */ | |
332 | FHCI_PORT_LOW, /* low speed connected */ | |
333 | }; | |
334 | ||
335 | enum fhci_mem_alloc { | |
336 | MEM_CACHABLE_SYS = 0x00000001, /* primary DDR,cachable */ | |
337 | MEM_NOCACHE_SYS = 0x00000004, /* primary DDR,non-cachable */ | |
338 | MEM_SECONDARY = 0x00000002, /* either secondary DDR or SDRAM */ | |
339 | MEM_PRAM = 0x00000008, /* multi-user RAM identifier */ | |
340 | }; | |
341 | ||
342 | /* USB default parameters*/ | |
343 | #define DEFAULT_RING_LEN 8 | |
344 | #define DEFAULT_DATA_MEM MEM_CACHABLE_SYS | |
345 | ||
346 | struct ed { | |
347 | u8 dev_addr; /* device address */ | |
348 | u8 ep_addr; /* endpoint address */ | |
349 | enum fhci_tf_mode mode; /* USB transfer mode */ | |
350 | enum fhci_speed speed; | |
351 | unsigned int max_pkt_size; | |
352 | enum fhci_ed_state state; | |
353 | struct list_head td_list; /* a list of all queued TD to this pipe */ | |
354 | struct list_head node; | |
355 | ||
356 | /* read only parameters, should be cleared upon initialization */ | |
357 | u8 toggle_carry; /* toggle carry from the last TD submitted */ | |
358 | u32 last_iso; /* time stamp of last queued ISO transfer */ | |
359 | struct td *td_head; /* a pointer to the current TD handled */ | |
360 | }; | |
361 | ||
362 | struct td { | |
363 | void *data; /* a pointer to the data buffer */ | |
364 | unsigned int len; /* length of the data to be submitted */ | |
365 | unsigned int actual_len; /* actual bytes transfered on this td */ | |
366 | enum fhci_ta_type type; /* transaction type */ | |
367 | u8 toggle; /* toggle for next trans. within this TD */ | |
368 | u16 iso_index; /* ISO transaction index */ | |
369 | u16 start_frame; /* start frame time stamp */ | |
370 | u16 interval; /* interval between trans. (for ISO/Intr) */ | |
371 | u32 status; /* status of the TD */ | |
372 | struct ed *ed; /* a handle to the corresponding ED */ | |
373 | struct urb *urb; /* a handle to the corresponding URB */ | |
374 | bool ioc; /* Inform On Completion */ | |
375 | struct list_head node; | |
376 | ||
377 | /* read only parameters should be cleared upon initialization */ | |
378 | struct packet *pkt; | |
379 | int nak_cnt; | |
380 | int error_cnt; | |
381 | struct list_head frame_lh; | |
382 | }; | |
383 | ||
384 | struct packet { | |
385 | u8 *data; /* packet data */ | |
386 | u32 len; /* packet length */ | |
387 | u32 status; /* status of the packet - equivalent to the status | |
388 | * field for the corresponding structure td */ | |
389 | u32 info; /* packet information */ | |
390 | void __iomem *priv_data; /* private data of the driver (TDs or BDs) */ | |
391 | }; | |
392 | ||
393 | /* struct for each URB */ | |
394 | #define URB_INPROGRESS 0 | |
395 | #define URB_DEL 1 | |
396 | ||
397 | /* URB states (state field) */ | |
398 | #define US_BULK 0 | |
399 | #define US_BULK0 1 | |
400 | ||
401 | /* three setup states */ | |
402 | #define US_CTRL_SETUP 2 | |
403 | #define US_CTRL_DATA 1 | |
404 | #define US_CTRL_ACK 0 | |
405 | ||
406 | #define EP_ZERO 0 | |
407 | ||
408 | struct urb_priv { | |
409 | int num_of_tds; | |
410 | int tds_cnt; | |
411 | int state; | |
412 | ||
413 | struct td **tds; | |
414 | struct ed *ed; | |
415 | struct timer_list time_out; | |
416 | }; | |
417 | ||
418 | struct endpoint { | |
419 | /* Pointer to ep parameter RAM */ | |
420 | struct fhci_ep_pram __iomem *ep_pram_ptr; | |
421 | ||
422 | /* Host transactions */ | |
423 | struct usb_td __iomem *td_base; /* first TD in the ring */ | |
424 | struct usb_td __iomem *conf_td; /* next TD for confirm after transac */ | |
425 | struct usb_td __iomem *empty_td;/* next TD for new transaction req. */ | |
45465487 SS |
426 | struct kfifo empty_frame_Q; /* Empty frames list to use */ |
427 | struct kfifo conf_frame_Q; /* frames passed to TDs,waiting for tx */ | |
428 | struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */ | |
236dd4d1 AV |
429 | |
430 | bool already_pushed_dummy_bd; | |
431 | }; | |
432 | ||
433 | /* struct for each 1mSec frame time */ | |
434 | #define FRAME_IS_TRANSMITTED 0x00 | |
435 | #define FRAME_TIMER_END_TRANSMISSION 0x01 | |
436 | #define FRAME_DATA_END_TRANSMISSION 0x02 | |
437 | #define FRAME_END_TRANSMISSION 0x03 | |
438 | #define FRAME_IS_PREPARED 0x04 | |
439 | ||
440 | struct fhci_time_frame { | |
441 | u16 frame_num; /* frame number */ | |
442 | u16 total_bytes; /* total bytes submitted within this frame */ | |
443 | u8 frame_status; /* flag that indicates to stop fill this frame */ | |
444 | struct list_head tds_list; /* all tds of this frame */ | |
445 | }; | |
446 | ||
447 | /* internal driver structure*/ | |
448 | struct fhci_usb { | |
449 | u16 saved_msk; /* saving of the USB mask register */ | |
450 | struct endpoint *ep0; /* pointer for endpoint0 structure */ | |
451 | int intr_nesting_cnt; /* interrupt nesting counter */ | |
452 | u16 max_frame_usage; /* max frame time usage,in micro-sec */ | |
453 | u16 max_bytes_per_frame; /* max byte can be tx in one time frame */ | |
454 | u32 sw_transaction_time; /* sw complete trans time,in micro-sec */ | |
455 | struct fhci_time_frame *actual_frame; | |
456 | struct fhci_controller_list *hc_list; /* main structure for hc */ | |
457 | struct virtual_root_hub *vroot_hub; | |
458 | enum fhci_port_status port_status; /* v_rh port status */ | |
459 | ||
460 | u32 (*transfer_confirm)(struct fhci_hcd *fhci); | |
461 | ||
462 | struct fhci_hcd *fhci; | |
463 | }; | |
464 | ||
465 | /* | |
466 | * Various helpers and prototypes below. | |
467 | */ | |
468 | ||
469 | static inline u16 get_frame_num(struct fhci_hcd *fhci) | |
470 | { | |
471 | return in_be16(&fhci->pram->frame_num) & 0x07ff; | |
472 | } | |
473 | ||
474 | #define fhci_dbg(fhci, fmt, args...) \ | |
475 | dev_dbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args) | |
476 | #define fhci_vdbg(fhci, fmt, args...) \ | |
477 | dev_vdbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args) | |
478 | #define fhci_err(fhci, fmt, args...) \ | |
479 | dev_err(fhci_to_hcd(fhci)->self.controller, fmt, ##args) | |
480 | #define fhci_info(fhci, fmt, args...) \ | |
481 | dev_info(fhci_to_hcd(fhci)->self.controller, fmt, ##args) | |
482 | #define fhci_warn(fhci, fmt, args...) \ | |
483 | dev_warn(fhci_to_hcd(fhci)->self.controller, fmt, ##args) | |
484 | ||
485 | static inline struct fhci_hcd *hcd_to_fhci(struct usb_hcd *hcd) | |
486 | { | |
487 | return (struct fhci_hcd *)hcd->hcd_priv; | |
488 | } | |
489 | ||
490 | static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci) | |
491 | { | |
492 | return container_of((void *)fhci, struct usb_hcd, hcd_priv); | |
493 | } | |
494 | ||
495 | /* fifo of pointers */ | |
45465487 | 496 | static inline int cq_new(struct kfifo *fifo, int size) |
236dd4d1 | 497 | { |
c1e13f25 | 498 | return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL); |
236dd4d1 AV |
499 | } |
500 | ||
501 | static inline void cq_delete(struct kfifo *kfifo) | |
502 | { | |
503 | kfifo_free(kfifo); | |
504 | } | |
505 | ||
506 | static inline unsigned int cq_howmany(struct kfifo *kfifo) | |
507 | { | |
e64c026d | 508 | return kfifo_len(kfifo) / sizeof(void *); |
236dd4d1 AV |
509 | } |
510 | ||
511 | static inline int cq_put(struct kfifo *kfifo, void *p) | |
512 | { | |
7acd72eb | 513 | return kfifo_in(kfifo, (void *)&p, sizeof(p)); |
236dd4d1 AV |
514 | } |
515 | ||
516 | static inline void *cq_get(struct kfifo *kfifo) | |
517 | { | |
518 | void *p = NULL; | |
519 | ||
7acd72eb | 520 | kfifo_out(kfifo, (void *)&p, sizeof(p)); |
236dd4d1 AV |
521 | return p; |
522 | } | |
523 | ||
524 | /* fhci-hcd.c */ | |
525 | void fhci_start_sof_timer(struct fhci_hcd *fhci); | |
526 | void fhci_stop_sof_timer(struct fhci_hcd *fhci); | |
527 | u16 fhci_get_sof_timer_count(struct fhci_usb *usb); | |
528 | void fhci_usb_enable_interrupt(struct fhci_usb *usb); | |
529 | void fhci_usb_disable_interrupt(struct fhci_usb *usb); | |
530 | int fhci_ioports_check_bus_state(struct fhci_hcd *fhci); | |
531 | ||
532 | /* fhci-mem.c */ | |
533 | void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td); | |
534 | void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed); | |
535 | struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci); | |
536 | struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb, | |
537 | struct urb_priv *urb_priv, struct ed *ed, u16 index, | |
538 | enum fhci_ta_type type, int toggle, u8 *data, u32 len, | |
539 | u16 interval, u16 start_frame, bool ioc); | |
540 | void fhci_add_tds_to_ed(struct ed *ed, struct td **td_list, int number); | |
541 | ||
542 | /* fhci-hub.c */ | |
543 | void fhci_config_transceiver(struct fhci_hcd *fhci, | |
544 | enum fhci_port_status status); | |
545 | void fhci_port_disable(struct fhci_hcd *fhci); | |
546 | void fhci_port_enable(void *lld); | |
547 | void fhci_io_port_generate_reset(struct fhci_hcd *fhci); | |
548 | void fhci_port_reset(void *lld); | |
549 | int fhci_hub_status_data(struct usb_hcd *hcd, char *buf); | |
550 | int fhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |
551 | u16 wIndex, char *buf, u16 wLength); | |
552 | ||
553 | /* fhci-tds.c */ | |
554 | void fhci_flush_bds(struct fhci_usb *usb); | |
555 | void fhci_flush_actual_frame(struct fhci_usb *usb); | |
556 | u32 fhci_host_transaction(struct fhci_usb *usb, struct packet *pkt, | |
557 | enum fhci_ta_type trans_type, u8 dest_addr, | |
558 | u8 dest_ep, enum fhci_tf_mode trans_mode, | |
559 | enum fhci_speed dest_speed, u8 data_toggle); | |
560 | void fhci_host_transmit_actual_frame(struct fhci_usb *usb); | |
561 | void fhci_tx_conf_interrupt(struct fhci_usb *usb); | |
562 | void fhci_push_dummy_bd(struct endpoint *ep); | |
563 | u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem, | |
564 | u32 ring_len); | |
565 | void fhci_init_ep_registers(struct fhci_usb *usb, | |
566 | struct endpoint *ep, | |
567 | enum fhci_mem_alloc data_mem); | |
568 | void fhci_ep0_free(struct fhci_usb *usb); | |
569 | ||
570 | /* fhci-sched.c */ | |
571 | extern struct tasklet_struct fhci_tasklet; | |
572 | void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt); | |
573 | void fhci_flush_all_transmissions(struct fhci_usb *usb); | |
574 | void fhci_schedule_transactions(struct fhci_usb *usb); | |
575 | void fhci_device_connected_interrupt(struct fhci_hcd *fhci); | |
576 | void fhci_device_disconnected_interrupt(struct fhci_hcd *fhci); | |
577 | void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb); | |
578 | u32 fhci_transfer_confirm_callback(struct fhci_hcd *fhci); | |
579 | irqreturn_t fhci_irq(struct usb_hcd *hcd); | |
580 | irqreturn_t fhci_frame_limit_timer_irq(int irq, void *_hcd); | |
581 | ||
582 | /* fhci-q.h */ | |
583 | void fhci_urb_complete_free(struct fhci_hcd *fhci, struct urb *urb); | |
584 | struct td *fhci_remove_td_from_ed(struct ed *ed); | |
585 | struct td *fhci_remove_td_from_frame(struct fhci_time_frame *frame); | |
586 | void fhci_move_td_from_ed_to_done_list(struct fhci_usb *usb, struct ed *ed); | |
587 | struct td *fhci_peek_td_from_frame(struct fhci_time_frame *frame); | |
588 | void fhci_add_td_to_frame(struct fhci_time_frame *frame, struct td *td); | |
589 | struct td *fhci_remove_td_from_done_list(struct fhci_controller_list *p_list); | |
590 | void fhci_done_td(struct urb *urb, struct td *td); | |
591 | void fhci_del_ed_list(struct fhci_hcd *fhci, struct ed *ed); | |
592 | ||
593 | #ifdef CONFIG_FHCI_DEBUG | |
594 | ||
595 | void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er); | |
596 | void fhci_dfs_destroy(struct fhci_hcd *fhci); | |
597 | void fhci_dfs_create(struct fhci_hcd *fhci); | |
598 | ||
599 | #else | |
600 | ||
601 | static inline void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er) {} | |
602 | static inline void fhci_dfs_destroy(struct fhci_hcd *fhci) {} | |
603 | static inline void fhci_dfs_create(struct fhci_hcd *fhci) {} | |
604 | ||
605 | #endif /* CONFIG_FHCI_DEBUG */ | |
606 | ||
607 | #endif /* __FHCI_H */ |