xhci: rework cycle bit checking for new dequeue pointers
[deliverable/linux.git] / drivers / usb / host / max3421-hcd.c
CommitLineData
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1/*
2 * MAX3421 Host Controller driver for USB.
3 *
4 * Author: David Mosberger-Tang <davidm@egauge.net>
5 *
6 * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
7 *
8 * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
9 * controller on a SPI bus.
10 *
11 * Based on:
12 * o MAX3421E datasheet
13 * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
14 * o MAX3421E Programming Guide
15 * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
16 * o gadget/dummy_hcd.c
17 * For USB HCD implementation.
18 * o Arduino MAX3421 driver
19 * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
20 *
21 * This file is licenced under the GPL v2.
22 *
23 * Important note on worst-case (full-speed) packet size constraints
24 * (See USB 2.0 Section 5.6.3 and following):
25 *
26 * - control: 64 bytes
27 * - isochronous: 1023 bytes
28 * - interrupt: 64 bytes
29 * - bulk: 64 bytes
30 *
31 * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
32 * multi-FIFO writes/reads for a single USB packet *except* for isochronous
33 * transfers. We don't support isochronous transfers at this time, so we
34 * just assume that a USB packet always fits into a single FIFO buffer.
35 *
36 * NOTE: The June 2006 version of "MAX3421E Programming Guide"
37 * (AN3785) has conflicting info for the RCVDAVIRQ bit:
38 *
39 * The description of RCVDAVIRQ says "The CPU *must* clear
40 * this IRQ bit (by writing a 1 to it) before reading the
41 * RCVFIFO data.
42 *
43 * However, the earlier section on "Programming BULK-IN
44 * Transfers" says * that:
45 *
46 * After the CPU retrieves the data, it clears the
47 * RCVDAVIRQ bit.
48 *
49 * The December 2006 version has been corrected and it consistently
50 * states the second behavior is the correct one.
51 *
52 * Synchronous SPI transactions sleep so we can't perform any such
53 * transactions while holding a spin-lock (and/or while interrupts are
54 * masked). To achieve this, all SPI transactions are issued from a
55 * single thread (max3421_spi_thread).
56 */
57
58#include <linux/module.h>
59#include <linux/spi/spi.h>
60#include <linux/usb.h>
61#include <linux/usb/hcd.h>
62
63#include <linux/platform_data/max3421-hcd.h>
64
65#define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
66#define DRIVER_VERSION "1.0"
67
68/* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
69#define USB_MAX_FRAME_NUMBER 0x7ff
70#define USB_MAX_RETRIES 3 /* # of retries before error is reported */
71
72/*
73 * Max. # of times we're willing to retransmit a request immediately in
74 * resposne to a NAK. Afterwards, we fall back on trying once a frame.
75 */
76#define NAK_MAX_FAST_RETRANSMITS 2
77
78#define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
79
80/* Port-change mask: */
81#define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
82 USB_PORT_STAT_C_ENABLE | \
83 USB_PORT_STAT_C_SUSPEND | \
84 USB_PORT_STAT_C_OVERCURRENT | \
85 USB_PORT_STAT_C_RESET) << 16)
86
87enum max3421_rh_state {
88 MAX3421_RH_RESET,
89 MAX3421_RH_SUSPENDED,
90 MAX3421_RH_RUNNING
91};
92
93enum pkt_state {
94 PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
95 PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
96 PKT_STATE_TERMINATE /* waiting to terminate control transfer */
97};
98
99enum scheduling_pass {
100 SCHED_PASS_PERIODIC,
101 SCHED_PASS_NON_PERIODIC,
102 SCHED_PASS_DONE
103};
104
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105/* Bit numbers for max3421_hcd->todo: */
106enum {
107 ENABLE_IRQ = 0,
108 RESET_HCD,
109 RESET_PORT,
110 CHECK_UNLINK,
111 IOPIN_UPDATE
112};
113
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114struct max3421_dma_buf {
115 u8 data[2];
116};
117
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118struct max3421_hcd {
119 spinlock_t lock;
120
121 struct task_struct *spi_thread;
122
123 struct max3421_hcd *next;
124
125 enum max3421_rh_state rh_state;
126 /* lower 16 bits contain port status, upper 16 bits the change mask: */
127 u32 port_status;
128
129 unsigned active:1;
130
131 struct list_head ep_list; /* list of EP's with work */
132
133 /*
134 * The following are owned by spi_thread (may be accessed by
135 * SPI-thread without acquiring the HCD lock:
136 */
137 u8 rev; /* chip revision */
138 u16 frame_number;
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139 /*
140 * kmalloc'd buffers guaranteed to be in separate (DMA)
141 * cache-lines:
142 */
143 struct max3421_dma_buf *tx;
144 struct max3421_dma_buf *rx;
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145 /*
146 * URB we're currently processing. Must not be reset to NULL
147 * unless MAX3421E chip is idle:
148 */
149 struct urb *curr_urb;
150 enum scheduling_pass sched_pass;
151 struct usb_device *loaded_dev; /* dev that's loaded into the chip */
152 int loaded_epnum; /* epnum whose toggles are loaded */
153 int urb_done; /* > 0 -> no errors, < 0: errno */
154 size_t curr_len;
155 u8 hien;
156 u8 mode;
157 u8 iopins[2];
2eb5dbdd 158 unsigned long todo;
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159#ifdef DEBUG
160 unsigned long err_stat[16];
161#endif
162};
163
164struct max3421_ep {
165 struct usb_host_endpoint *ep;
166 struct list_head ep_list;
167 u32 naks;
168 u16 last_active; /* frame # this ep was last active */
169 enum pkt_state pkt_state;
170 u8 retries;
171 u8 retransmit; /* packet needs retransmission */
172};
173
174static struct max3421_hcd *max3421_hcd_list;
175
176#define MAX3421_FIFO_SIZE 64
177
178#define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
179#define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
180
181/* SPI commands: */
182#define MAX3421_SPI_DIR_SHIFT 1
183#define MAX3421_SPI_REG_SHIFT 3
184
185#define MAX3421_REG_RCVFIFO 1
186#define MAX3421_REG_SNDFIFO 2
187#define MAX3421_REG_SUDFIFO 4
188#define MAX3421_REG_RCVBC 6
189#define MAX3421_REG_SNDBC 7
190#define MAX3421_REG_USBIRQ 13
191#define MAX3421_REG_USBIEN 14
192#define MAX3421_REG_USBCTL 15
193#define MAX3421_REG_CPUCTL 16
194#define MAX3421_REG_PINCTL 17
195#define MAX3421_REG_REVISION 18
196#define MAX3421_REG_IOPINS1 20
197#define MAX3421_REG_IOPINS2 21
198#define MAX3421_REG_GPINIRQ 22
199#define MAX3421_REG_GPINIEN 23
200#define MAX3421_REG_GPINPOL 24
201#define MAX3421_REG_HIRQ 25
202#define MAX3421_REG_HIEN 26
203#define MAX3421_REG_MODE 27
204#define MAX3421_REG_PERADDR 28
205#define MAX3421_REG_HCTL 29
206#define MAX3421_REG_HXFR 30
207#define MAX3421_REG_HRSL 31
208
209enum {
210 MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
211 MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
212 MAX3421_USBIRQ_VBUSIRQ_BIT
213};
214
215enum {
216 MAX3421_CPUCTL_IE_BIT = 0,
217 MAX3421_CPUCTL_PULSEWID0_BIT = 6,
218 MAX3421_CPUCTL_PULSEWID1_BIT
219};
220
221enum {
222 MAX3421_USBCTL_PWRDOWN_BIT = 4,
223 MAX3421_USBCTL_CHIPRES_BIT
224};
225
226enum {
227 MAX3421_PINCTL_GPXA_BIT = 0,
228 MAX3421_PINCTL_GPXB_BIT,
229 MAX3421_PINCTL_POSINT_BIT,
230 MAX3421_PINCTL_INTLEVEL_BIT,
231 MAX3421_PINCTL_FDUPSPI_BIT,
232 MAX3421_PINCTL_EP0INAK_BIT,
233 MAX3421_PINCTL_EP2INAK_BIT,
234 MAX3421_PINCTL_EP3INAK_BIT,
235};
236
237enum {
238 MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
239 MAX3421_HI_RWU_BIT, /* remote wakeup */
240 MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
241 MAX3421_HI_SNDBAV_BIT, /* send buffer available */
242 MAX3421_HI_SUSDN_BIT, /* suspend operation done */
243 MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
244 MAX3421_HI_FRAME_BIT, /* frame generator */
245 MAX3421_HI_HXFRDN_BIT, /* host transfer done */
246};
247
248enum {
249 MAX3421_HCTL_BUSRST_BIT = 0,
250 MAX3421_HCTL_FRMRST_BIT,
251 MAX3421_HCTL_SAMPLEBUS_BIT,
252 MAX3421_HCTL_SIGRSM_BIT,
253 MAX3421_HCTL_RCVTOG0_BIT,
254 MAX3421_HCTL_RCVTOG1_BIT,
255 MAX3421_HCTL_SNDTOG0_BIT,
256 MAX3421_HCTL_SNDTOG1_BIT
257};
258
259enum {
260 MAX3421_MODE_HOST_BIT = 0,
261 MAX3421_MODE_LOWSPEED_BIT,
262 MAX3421_MODE_HUBPRE_BIT,
263 MAX3421_MODE_SOFKAENAB_BIT,
264 MAX3421_MODE_SEPIRQ_BIT,
265 MAX3421_MODE_DELAYISO_BIT,
266 MAX3421_MODE_DMPULLDN_BIT,
267 MAX3421_MODE_DPPULLDN_BIT
268};
269
270enum {
271 MAX3421_HRSL_OK = 0,
272 MAX3421_HRSL_BUSY,
273 MAX3421_HRSL_BADREQ,
274 MAX3421_HRSL_UNDEF,
275 MAX3421_HRSL_NAK,
276 MAX3421_HRSL_STALL,
277 MAX3421_HRSL_TOGERR,
278 MAX3421_HRSL_WRONGPID,
279 MAX3421_HRSL_BADBC,
280 MAX3421_HRSL_PIDERR,
281 MAX3421_HRSL_PKTERR,
282 MAX3421_HRSL_CRCERR,
283 MAX3421_HRSL_KERR,
284 MAX3421_HRSL_JERR,
285 MAX3421_HRSL_TIMEOUT,
286 MAX3421_HRSL_BABBLE,
287 MAX3421_HRSL_RESULT_MASK = 0xf,
288 MAX3421_HRSL_RCVTOGRD_BIT = 4,
289 MAX3421_HRSL_SNDTOGRD_BIT,
290 MAX3421_HRSL_KSTATUS_BIT,
291 MAX3421_HRSL_JSTATUS_BIT
292};
293
294/* Return same error-codes as ohci.h:cc_to_error: */
295static const int hrsl_to_error[] = {
296 [MAX3421_HRSL_OK] = 0,
297 [MAX3421_HRSL_BUSY] = -EINVAL,
298 [MAX3421_HRSL_BADREQ] = -EINVAL,
299 [MAX3421_HRSL_UNDEF] = -EINVAL,
300 [MAX3421_HRSL_NAK] = -EAGAIN,
301 [MAX3421_HRSL_STALL] = -EPIPE,
302 [MAX3421_HRSL_TOGERR] = -EILSEQ,
303 [MAX3421_HRSL_WRONGPID] = -EPROTO,
304 [MAX3421_HRSL_BADBC] = -EREMOTEIO,
305 [MAX3421_HRSL_PIDERR] = -EPROTO,
306 [MAX3421_HRSL_PKTERR] = -EPROTO,
307 [MAX3421_HRSL_CRCERR] = -EILSEQ,
308 [MAX3421_HRSL_KERR] = -EIO,
309 [MAX3421_HRSL_JERR] = -EIO,
310 [MAX3421_HRSL_TIMEOUT] = -ETIME,
311 [MAX3421_HRSL_BABBLE] = -EOVERFLOW
312};
313
314/*
315 * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
316 * reasonable overview of how control transfers use the the IN/OUT
317 * tokens.
318 */
319#define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
320#define MAX3421_HXFR_SETUP 0x10
321#define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
322#define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
323#define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
324#define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
325#define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
326
327#define field(val, bit) ((val) << (bit))
328
329static inline s16
330frame_diff(u16 left, u16 right)
331{
332 return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
333}
334
335static inline struct max3421_hcd *
336hcd_to_max3421(struct usb_hcd *hcd)
337{
338 return (struct max3421_hcd *) hcd->hcd_priv;
339}
340
341static inline struct usb_hcd *
342max3421_to_hcd(struct max3421_hcd *max3421_hcd)
343{
344 return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
345}
346
347static u8
348spi_rd8(struct usb_hcd *hcd, unsigned int reg)
349{
05dfa5c9 350 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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351 struct spi_device *spi = to_spi_device(hcd->self.controller);
352 struct spi_transfer transfer;
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353 struct spi_message msg;
354
355 memset(&transfer, 0, sizeof(transfer));
356
357 spi_message_init(&msg);
358
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359 max3421_hcd->tx->data[0] =
360 (field(reg, MAX3421_SPI_REG_SHIFT) |
361 field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
2d53139f 362
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363 transfer.tx_buf = max3421_hcd->tx->data;
364 transfer.rx_buf = max3421_hcd->rx->data;
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365 transfer.len = 2;
366
367 spi_message_add_tail(&transfer, &msg);
368 spi_sync(spi, &msg);
369
05dfa5c9 370 return max3421_hcd->rx->data[1];
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371}
372
373static void
374spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
375{
376 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 377 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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378 struct spi_transfer transfer;
379 struct spi_message msg;
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380
381 memset(&transfer, 0, sizeof(transfer));
382
383 spi_message_init(&msg);
384
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385 max3421_hcd->tx->data[0] =
386 (field(reg, MAX3421_SPI_REG_SHIFT) |
387 field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
388 max3421_hcd->tx->data[1] = val;
2d53139f 389
05dfa5c9 390 transfer.tx_buf = max3421_hcd->tx->data;
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391 transfer.len = 2;
392
393 spi_message_add_tail(&transfer, &msg);
394 spi_sync(spi, &msg);
395}
396
397static void
398spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
399{
400 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 401 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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402 struct spi_transfer transfer[2];
403 struct spi_message msg;
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404
405 memset(transfer, 0, sizeof(transfer));
406
407 spi_message_init(&msg);
408
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409 max3421_hcd->tx->data[0] =
410 (field(reg, MAX3421_SPI_REG_SHIFT) |
411 field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
412 transfer[0].tx_buf = max3421_hcd->tx->data;
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413 transfer[0].len = 1;
414
415 transfer[1].rx_buf = buf;
416 transfer[1].len = len;
417
418 spi_message_add_tail(&transfer[0], &msg);
419 spi_message_add_tail(&transfer[1], &msg);
420 spi_sync(spi, &msg);
421}
422
423static void
424spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
425{
426 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 427 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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428 struct spi_transfer transfer[2];
429 struct spi_message msg;
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430
431 memset(transfer, 0, sizeof(transfer));
432
433 spi_message_init(&msg);
434
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435 max3421_hcd->tx->data[0] =
436 (field(reg, MAX3421_SPI_REG_SHIFT) |
437 field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
2d53139f 438
05dfa5c9 439 transfer[0].tx_buf = max3421_hcd->tx->data;
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440 transfer[0].len = 1;
441
442 transfer[1].tx_buf = buf;
443 transfer[1].len = len;
444
445 spi_message_add_tail(&transfer[0], &msg);
446 spi_message_add_tail(&transfer[1], &msg);
447 spi_sync(spi, &msg);
448}
449
450/*
451 * Figure out the correct setting for the LOWSPEED and HUBPRE mode
452 * bits. The HUBPRE bit needs to be set when MAX3421E operates at
453 * full speed, but it's talking to a low-speed device (i.e., through a
454 * hub). Setting that bit ensures that every low-speed packet is
455 * preceded by a full-speed PRE PID. Possible configurations:
456 *
457 * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
458 * FULL FULL => 0 0
459 * FULL LOW => 1 1
460 * LOW LOW => 1 0
461 * LOW FULL => 1 0
462 */
463static void
464max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
465{
466 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
467 u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
468
469 mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
470 mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
471 if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
472 mode |= mode_lowspeed;
473 mode &= ~mode_hubpre;
474 } else if (dev->speed == USB_SPEED_LOW) {
475 mode |= mode_lowspeed | mode_hubpre;
476 } else {
477 mode &= ~(mode_lowspeed | mode_hubpre);
478 }
479 if (mode != max3421_hcd->mode) {
480 max3421_hcd->mode = mode;
481 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
482 }
483
484}
485
486/*
487 * Caller must NOT hold HCD spinlock.
488 */
489static void
490max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
491 int force_toggles)
492{
493 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
494 int old_epnum, same_ep, rcvtog, sndtog;
495 struct usb_device *old_dev;
496 u8 hctl;
497
498 old_dev = max3421_hcd->loaded_dev;
499 old_epnum = max3421_hcd->loaded_epnum;
500
501 same_ep = (dev == old_dev && epnum == old_epnum);
502 if (same_ep && !force_toggles)
503 return;
504
505 if (old_dev && !same_ep) {
506 /* save the old end-points toggles: */
507 u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
508
509 rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
510 sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
511
512 /* no locking: HCD (i.e., we) own toggles, don't we? */
513 usb_settoggle(old_dev, old_epnum, 0, rcvtog);
514 usb_settoggle(old_dev, old_epnum, 1, sndtog);
515 }
516 /* setup new endpoint's toggle bits: */
517 rcvtog = usb_gettoggle(dev, epnum, 0);
518 sndtog = usb_gettoggle(dev, epnum, 1);
519 hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
520 BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
521
522 max3421_hcd->loaded_epnum = epnum;
523 spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
524
525 /*
526 * Note: devnum for one and the same device can change during
527 * address-assignment so it's best to just always load the
528 * address whenever the end-point changed/was forced.
529 */
530 max3421_hcd->loaded_dev = dev;
531 spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
532}
533
534static int
535max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
536{
537 spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
538 return MAX3421_HXFR_SETUP;
539}
540
541static int
542max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
543{
544 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
545 int epnum = usb_pipeendpoint(urb->pipe);
546
547 max3421_hcd->curr_len = 0;
548 max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
549 return MAX3421_HXFR_BULK_IN(epnum);
550}
551
552static int
553max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
554{
555 struct spi_device *spi = to_spi_device(hcd->self.controller);
556 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
557 int epnum = usb_pipeendpoint(urb->pipe);
558 u32 max_packet;
559 void *src;
560
561 src = urb->transfer_buffer + urb->actual_length;
562
563 if (fast_retransmit) {
564 if (max3421_hcd->rev == 0x12) {
565 /* work around rev 0x12 bug: */
566 spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
567 spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
568 spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
569 }
570 return MAX3421_HXFR_BULK_OUT(epnum);
571 }
572
573 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
574
575 if (max_packet > MAX3421_FIFO_SIZE) {
576 /*
577 * We do not support isochronous transfers at this
578 * time.
579 */
580 dev_err(&spi->dev,
581 "%s: packet-size of %u too big (limit is %u bytes)",
582 __func__, max_packet, MAX3421_FIFO_SIZE);
583 max3421_hcd->urb_done = -EMSGSIZE;
584 return -EMSGSIZE;
585 }
586 max3421_hcd->curr_len = min((urb->transfer_buffer_length -
587 urb->actual_length), max_packet);
588
589 spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
590 spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
591 return MAX3421_HXFR_BULK_OUT(epnum);
592}
593
594/*
595 * Issue the next host-transfer command.
596 * Caller must NOT hold HCD spinlock.
597 */
598static void
599max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
600{
601 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
602 struct urb *urb = max3421_hcd->curr_urb;
f9da25c7 603 struct max3421_ep *max3421_ep;
2d53139f
DM
604 int cmd = -EINVAL;
605
606 if (!urb)
607 return; /* nothing to do */
608
f9da25c7
DMT
609 max3421_ep = urb->ep->hcpriv;
610
2d53139f
DM
611 switch (max3421_ep->pkt_state) {
612 case PKT_STATE_SETUP:
613 cmd = max3421_ctrl_setup(hcd, urb);
614 break;
615
616 case PKT_STATE_TRANSFER:
617 if (usb_urb_dir_in(urb))
618 cmd = max3421_transfer_in(hcd, urb);
619 else
620 cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
621 break;
622
623 case PKT_STATE_TERMINATE:
624 /*
625 * IN transfers are terminated with HS_OUT token,
626 * OUT transfers with HS_IN:
627 */
628 if (usb_urb_dir_in(urb))
629 cmd = MAX3421_HXFR_HS_OUT;
630 else
631 cmd = MAX3421_HXFR_HS_IN;
632 break;
633 }
634
635 if (cmd < 0)
636 return;
637
638 /* issue the command and wait for host-xfer-done interrupt: */
639
640 spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
641 max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
642}
643
644/*
645 * Find the next URB to process and start its execution.
646 *
647 * At this time, we do not anticipate ever connecting a USB hub to the
648 * MAX3421 chip, so at most USB device can be connected and we can use
649 * a simplistic scheduler: at the start of a frame, schedule all
650 * periodic transfers. Once that is done, use the remainder of the
651 * frame to process non-periodic (bulk & control) transfers.
652 *
653 * Preconditions:
654 * o Caller must NOT hold HCD spinlock.
655 * o max3421_hcd->curr_urb MUST BE NULL.
656 * o MAX3421E chip must be idle.
657 */
658static int
659max3421_select_and_start_urb(struct usb_hcd *hcd)
660{
661 struct spi_device *spi = to_spi_device(hcd->self.controller);
662 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
663 struct urb *urb, *curr_urb = NULL;
664 struct max3421_ep *max3421_ep;
665 int epnum, force_toggles = 0;
666 struct usb_host_endpoint *ep;
667 struct list_head *pos;
668 unsigned long flags;
669
670 spin_lock_irqsave(&max3421_hcd->lock, flags);
671
672 for (;
673 max3421_hcd->sched_pass < SCHED_PASS_DONE;
674 ++max3421_hcd->sched_pass)
675 list_for_each(pos, &max3421_hcd->ep_list) {
676 urb = NULL;
677 max3421_ep = container_of(pos, struct max3421_ep,
678 ep_list);
679 ep = max3421_ep->ep;
680
681 switch (usb_endpoint_type(&ep->desc)) {
682 case USB_ENDPOINT_XFER_ISOC:
683 case USB_ENDPOINT_XFER_INT:
684 if (max3421_hcd->sched_pass !=
685 SCHED_PASS_PERIODIC)
686 continue;
687 break;
688
689 case USB_ENDPOINT_XFER_CONTROL:
690 case USB_ENDPOINT_XFER_BULK:
691 if (max3421_hcd->sched_pass !=
692 SCHED_PASS_NON_PERIODIC)
693 continue;
694 break;
695 }
696
697 if (list_empty(&ep->urb_list))
698 continue; /* nothing to do */
699 urb = list_first_entry(&ep->urb_list, struct urb,
700 urb_list);
701 if (urb->unlinked) {
702 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
703 __func__, urb, urb->unlinked);
704 max3421_hcd->curr_urb = urb;
705 max3421_hcd->urb_done = 1;
706 spin_unlock_irqrestore(&max3421_hcd->lock,
707 flags);
708 return 1;
709 }
710
711 switch (usb_endpoint_type(&ep->desc)) {
712 case USB_ENDPOINT_XFER_CONTROL:
713 /*
714 * Allow one control transaction per
715 * frame per endpoint:
716 */
717 if (frame_diff(max3421_ep->last_active,
718 max3421_hcd->frame_number) == 0)
719 continue;
720 break;
721
722 case USB_ENDPOINT_XFER_BULK:
723 if (max3421_ep->retransmit
724 && (frame_diff(max3421_ep->last_active,
725 max3421_hcd->frame_number)
726 == 0))
727 /*
728 * We already tried this EP
729 * during this frame and got a
730 * NAK or error; wait for next frame
731 */
732 continue;
733 break;
734
735 case USB_ENDPOINT_XFER_ISOC:
736 case USB_ENDPOINT_XFER_INT:
737 if (frame_diff(max3421_hcd->frame_number,
738 max3421_ep->last_active)
739 < urb->interval)
740 /*
741 * We already processed this
742 * end-point in the current
743 * frame
744 */
745 continue;
746 break;
747 }
748
749 /* move current ep to tail: */
750 list_move_tail(pos, &max3421_hcd->ep_list);
751 curr_urb = urb;
752 goto done;
753 }
754done:
755 if (!curr_urb) {
756 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
757 return 0;
758 }
759
760 urb = max3421_hcd->curr_urb = curr_urb;
761 epnum = usb_endpoint_num(&urb->ep->desc);
762 if (max3421_ep->retransmit)
763 /* restart (part of) a USB transaction: */
764 max3421_ep->retransmit = 0;
765 else {
766 /* start USB transaction: */
767 if (usb_endpoint_xfer_control(&ep->desc)) {
768 /*
769 * See USB 2.0 spec section 8.6.1
770 * Initialization via SETUP Token:
771 */
772 usb_settoggle(urb->dev, epnum, 0, 1);
773 usb_settoggle(urb->dev, epnum, 1, 1);
774 max3421_ep->pkt_state = PKT_STATE_SETUP;
775 force_toggles = 1;
776 } else
777 max3421_ep->pkt_state = PKT_STATE_TRANSFER;
778 }
779
780 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
781
782 max3421_ep->last_active = max3421_hcd->frame_number;
783 max3421_set_address(hcd, urb->dev, epnum, force_toggles);
784 max3421_set_speed(hcd, urb->dev);
785 max3421_next_transfer(hcd, 0);
786 return 1;
787}
788
789/*
790 * Check all endpoints for URBs that got unlinked.
791 *
792 * Caller must NOT hold HCD spinlock.
793 */
794static int
795max3421_check_unlink(struct usb_hcd *hcd)
796{
797 struct spi_device *spi = to_spi_device(hcd->self.controller);
798 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
799 struct list_head *pos, *upos, *next_upos;
800 struct max3421_ep *max3421_ep;
801 struct usb_host_endpoint *ep;
802 struct urb *urb;
803 unsigned long flags;
804 int retval = 0;
805
806 spin_lock_irqsave(&max3421_hcd->lock, flags);
807 list_for_each(pos, &max3421_hcd->ep_list) {
808 max3421_ep = container_of(pos, struct max3421_ep, ep_list);
809 ep = max3421_ep->ep;
810 list_for_each_safe(upos, next_upos, &ep->urb_list) {
811 urb = container_of(upos, struct urb, urb_list);
812 if (urb->unlinked) {
813 retval = 1;
814 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
815 __func__, urb, urb->unlinked);
816 usb_hcd_unlink_urb_from_ep(hcd, urb);
817 spin_unlock_irqrestore(&max3421_hcd->lock,
818 flags);
819 usb_hcd_giveback_urb(hcd, urb, 0);
820 spin_lock_irqsave(&max3421_hcd->lock, flags);
821 }
822 }
823 }
824 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
825 return retval;
826}
827
828/*
829 * Caller must NOT hold HCD spinlock.
830 */
831static void
832max3421_slow_retransmit(struct usb_hcd *hcd)
833{
834 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
835 struct urb *urb = max3421_hcd->curr_urb;
836 struct max3421_ep *max3421_ep;
837
838 max3421_ep = urb->ep->hcpriv;
839 max3421_ep->retransmit = 1;
840 max3421_hcd->curr_urb = NULL;
841}
842
843/*
844 * Caller must NOT hold HCD spinlock.
845 */
846static void
847max3421_recv_data_available(struct usb_hcd *hcd)
848{
849 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
850 struct urb *urb = max3421_hcd->curr_urb;
851 size_t remaining, transfer_size;
852 u8 rcvbc;
853
854 rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
855
856 if (rcvbc > MAX3421_FIFO_SIZE)
857 rcvbc = MAX3421_FIFO_SIZE;
858 if (urb->actual_length >= urb->transfer_buffer_length)
859 remaining = 0;
860 else
861 remaining = urb->transfer_buffer_length - urb->actual_length;
862 transfer_size = rcvbc;
863 if (transfer_size > remaining)
864 transfer_size = remaining;
865 if (transfer_size > 0) {
866 void *dst = urb->transfer_buffer + urb->actual_length;
867
868 spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
869 urb->actual_length += transfer_size;
870 max3421_hcd->curr_len = transfer_size;
871 }
872
873 /* ack the RCVDAV irq now that the FIFO has been read: */
874 spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
875}
876
877static void
878max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
879{
880 struct spi_device *spi = to_spi_device(hcd->self.controller);
881 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
882 u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
883 struct urb *urb = max3421_hcd->curr_urb;
884 struct max3421_ep *max3421_ep = urb->ep->hcpriv;
885 int switch_sndfifo;
886
887 /*
888 * If an OUT command results in any response other than OK
889 * (i.e., error or NAK), we have to perform a dummy-write to
890 * SNDBC so the FIFO gets switched back to us. Otherwise, we
891 * get out of sync with the SNDFIFO double buffer.
892 */
893 switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
894 usb_urb_dir_out(urb));
895
896 switch (result_code) {
897 case MAX3421_HRSL_OK:
898 return; /* this shouldn't happen */
899
900 case MAX3421_HRSL_WRONGPID: /* received wrong PID */
901 case MAX3421_HRSL_BUSY: /* SIE busy */
902 case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
903 case MAX3421_HRSL_UNDEF: /* reserved */
904 case MAX3421_HRSL_KERR: /* K-state instead of response */
905 case MAX3421_HRSL_JERR: /* J-state instead of response */
906 /*
907 * packet experienced an error that we cannot recover
908 * from; report error
909 */
910 max3421_hcd->urb_done = hrsl_to_error[result_code];
911 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
912 __func__, hrsl);
913 break;
914
915 case MAX3421_HRSL_TOGERR:
916 if (usb_urb_dir_in(urb))
917 ; /* don't do anything (device will switch toggle) */
918 else {
919 /* flip the send toggle bit: */
920 int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
921
922 sndtog ^= 1;
923 spi_wr8(hcd, MAX3421_REG_HCTL,
924 BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
925 }
926 /* FALL THROUGH */
927 case MAX3421_HRSL_BADBC: /* bad byte count */
928 case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
929 case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
930 case MAX3421_HRSL_CRCERR: /* CRC error */
931 case MAX3421_HRSL_BABBLE: /* device talked too long */
932 case MAX3421_HRSL_TIMEOUT:
933 if (max3421_ep->retries++ < USB_MAX_RETRIES)
934 /* retry the packet again in the next frame */
935 max3421_slow_retransmit(hcd);
936 else {
937 /* Based on ohci.h cc_to_err[]: */
938 max3421_hcd->urb_done = hrsl_to_error[result_code];
939 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
940 __func__, hrsl);
941 }
942 break;
943
944 case MAX3421_HRSL_STALL:
945 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
946 __func__, hrsl);
947 max3421_hcd->urb_done = hrsl_to_error[result_code];
948 break;
949
950 case MAX3421_HRSL_NAK:
951 /*
952 * Device wasn't ready for data or has no data
953 * available: retry the packet again.
954 */
955 if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
956 max3421_next_transfer(hcd, 1);
957 switch_sndfifo = 0;
958 } else
959 max3421_slow_retransmit(hcd);
960 break;
961 }
962 if (switch_sndfifo)
963 spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
964}
965
966/*
967 * Caller must NOT hold HCD spinlock.
968 */
969static int
970max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
971{
972 struct spi_device *spi = to_spi_device(hcd->self.controller);
973 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
974 u32 max_packet;
975
976 if (urb->actual_length >= urb->transfer_buffer_length)
977 return 1; /* read is complete, so we're done */
978
979 /*
980 * USB 2.0 Section 5.3.2 Pipes: packets must be full size
981 * except for last one.
982 */
983 max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
984 if (max_packet > MAX3421_FIFO_SIZE) {
985 /*
986 * We do not support isochronous transfers at this
987 * time...
988 */
989 dev_err(&spi->dev,
990 "%s: packet-size of %u too big (limit is %u bytes)",
991 __func__, max_packet, MAX3421_FIFO_SIZE);
992 return -EINVAL;
993 }
994
995 if (max3421_hcd->curr_len < max_packet) {
996 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
997 /*
998 * remaining > 0 and received an
999 * unexpected partial packet ->
1000 * error
1001 */
1002 return -EREMOTEIO;
1003 } else
1004 /* short read, but it's OK */
1005 return 1;
1006 }
1007 return 0; /* not done */
1008}
1009
1010/*
1011 * Caller must NOT hold HCD spinlock.
1012 */
1013static int
1014max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
1015{
1016 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1017
1018 urb->actual_length += max3421_hcd->curr_len;
1019 if (urb->actual_length < urb->transfer_buffer_length)
1020 return 0;
1021 if (urb->transfer_flags & URB_ZERO_PACKET) {
1022 /*
1023 * Some hardware needs a zero-size packet at the end
1024 * of a bulk-out transfer if the last transfer was a
1025 * full-sized packet (i.e., such hardware use <
1026 * max_packet as an indicator that the end of the
1027 * packet has been reached).
1028 */
1029 u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
1030
1031 if (max3421_hcd->curr_len == max_packet)
1032 return 0;
1033 }
1034 return 1;
1035}
1036
1037/*
1038 * Caller must NOT hold HCD spinlock.
1039 */
1040static void
1041max3421_host_transfer_done(struct usb_hcd *hcd)
1042{
1043 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1044 struct urb *urb = max3421_hcd->curr_urb;
1045 struct max3421_ep *max3421_ep;
1046 u8 result_code, hrsl;
1047 int urb_done = 0;
1048
1049 max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
1050 BIT(MAX3421_HI_RCVDAV_BIT));
1051
1052 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1053 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
1054
1055#ifdef DEBUG
1056 ++max3421_hcd->err_stat[result_code];
1057#endif
1058
1059 max3421_ep = urb->ep->hcpriv;
1060
1061 if (unlikely(result_code != MAX3421_HRSL_OK)) {
1062 max3421_handle_error(hcd, hrsl);
1063 return;
1064 }
1065
1066 max3421_ep->naks = 0;
1067 max3421_ep->retries = 0;
1068 switch (max3421_ep->pkt_state) {
1069
1070 case PKT_STATE_SETUP:
1071 if (urb->transfer_buffer_length > 0)
1072 max3421_ep->pkt_state = PKT_STATE_TRANSFER;
1073 else
1074 max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1075 break;
1076
1077 case PKT_STATE_TRANSFER:
1078 if (usb_urb_dir_in(urb))
1079 urb_done = max3421_transfer_in_done(hcd, urb);
1080 else
1081 urb_done = max3421_transfer_out_done(hcd, urb);
1082 if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
1083 /*
1084 * We aren't really done - we still need to
1085 * terminate the control transfer:
1086 */
1087 max3421_hcd->urb_done = urb_done = 0;
1088 max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1089 }
1090 break;
1091
1092 case PKT_STATE_TERMINATE:
1093 urb_done = 1;
1094 break;
1095 }
1096
1097 if (urb_done)
1098 max3421_hcd->urb_done = urb_done;
1099 else
1100 max3421_next_transfer(hcd, 0);
1101}
1102
1103/*
1104 * Caller must NOT hold HCD spinlock.
1105 */
1106static void
1107max3421_detect_conn(struct usb_hcd *hcd)
1108{
1109 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1110 unsigned int jk, have_conn = 0;
1111 u32 old_port_status, chg;
1112 unsigned long flags;
1113 u8 hrsl, mode;
1114
1115 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1116
1117 jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
1118 (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
1119
1120 mode = max3421_hcd->mode;
1121
1122 switch (jk) {
1123 case 0x0: /* SE0: disconnect */
1124 /*
1125 * Turn off SOFKAENAB bit to avoid getting interrupt
1126 * every milli-second:
1127 */
1128 mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
1129 break;
1130
1131 case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
1132 case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
1133 if (jk == 0x2)
1134 /* need to switch to the other speed: */
1135 mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
1136 /* turn on SOFKAENAB bit: */
1137 mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
1138 have_conn = 1;
1139 break;
1140
1141 case 0x3: /* illegal */
1142 break;
1143 }
1144
1145 max3421_hcd->mode = mode;
1146 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1147
1148 spin_lock_irqsave(&max3421_hcd->lock, flags);
1149 old_port_status = max3421_hcd->port_status;
1150 if (have_conn)
1151 max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
1152 else
1153 max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
1154 if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
1155 max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
1156 else
1157 max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
1158 chg = (old_port_status ^ max3421_hcd->port_status);
1159 max3421_hcd->port_status |= chg << 16;
1160 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1161}
1162
1163static irqreturn_t
1164max3421_irq_handler(int irq, void *dev_id)
1165{
1166 struct usb_hcd *hcd = dev_id;
1167 struct spi_device *spi = to_spi_device(hcd->self.controller);
1168 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1169
1170 if (max3421_hcd->spi_thread &&
1171 max3421_hcd->spi_thread->state != TASK_RUNNING)
1172 wake_up_process(max3421_hcd->spi_thread);
2eb5dbdd 1173 if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
2d53139f 1174 disable_irq_nosync(spi->irq);
2d53139f
DM
1175 return IRQ_HANDLED;
1176}
1177
1178#ifdef DEBUG
1179
1180static void
1181dump_eps(struct usb_hcd *hcd)
1182{
1183 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1184 struct max3421_ep *max3421_ep;
1185 struct usb_host_endpoint *ep;
1186 struct list_head *pos, *upos;
1187 char ubuf[512], *dp, *end;
1188 unsigned long flags;
1189 struct urb *urb;
1190 int epnum, ret;
1191
1192 spin_lock_irqsave(&max3421_hcd->lock, flags);
1193 list_for_each(pos, &max3421_hcd->ep_list) {
1194 max3421_ep = container_of(pos, struct max3421_ep, ep_list);
1195 ep = max3421_ep->ep;
1196
1197 dp = ubuf;
1198 end = dp + sizeof(ubuf);
1199 *dp = '\0';
1200 list_for_each(upos, &ep->urb_list) {
1201 urb = container_of(upos, struct urb, urb_list);
1202 ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
1203 usb_pipetype(urb->pipe),
1204 usb_urb_dir_in(urb) ? "IN" : "OUT",
1205 urb->actual_length,
1206 urb->transfer_buffer_length);
1207 if (ret < 0 || ret >= end - dp)
1208 break; /* error or buffer full */
1209 dp += ret;
1210 }
1211
1212 epnum = usb_endpoint_num(&ep->desc);
1213 pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
1214 epnum, max3421_ep->pkt_state, max3421_ep->last_active,
1215 max3421_ep->retries, max3421_ep->naks,
1216 max3421_ep->retransmit, ubuf);
1217 }
1218 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1219}
1220
1221#endif /* DEBUG */
1222
1223/* Return zero if no work was performed, 1 otherwise. */
1224static int
1225max3421_handle_irqs(struct usb_hcd *hcd)
1226{
1227 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1228 u32 chg, old_port_status;
1229 unsigned long flags;
1230 u8 hirq;
1231
1232 /*
1233 * Read and ack pending interrupts (CPU must never
1234 * clear SNDBAV directly and RCVDAV must be cleared by
1235 * max3421_recv_data_available()!):
1236 */
1237 hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
1238 hirq &= max3421_hcd->hien;
1239 if (!hirq)
1240 return 0;
1241
1242 spi_wr8(hcd, MAX3421_REG_HIRQ,
1243 hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
1244 BIT(MAX3421_HI_RCVDAV_BIT)));
1245
1246 if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
1247 max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
1248 & USB_MAX_FRAME_NUMBER);
1249 max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1250 }
1251
1252 if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
1253 max3421_recv_data_available(hcd);
1254
1255 if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
1256 max3421_host_transfer_done(hcd);
1257
1258 if (hirq & BIT(MAX3421_HI_CONDET_BIT))
1259 max3421_detect_conn(hcd);
1260
1261 /*
1262 * Now process interrupts that may affect HCD state
1263 * other than the end-points:
1264 */
1265 spin_lock_irqsave(&max3421_hcd->lock, flags);
1266
1267 old_port_status = max3421_hcd->port_status;
1268 if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
1269 if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
1270 /* BUSEVENT due to completion of Bus Reset */
1271 max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
1272 max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
1273 } else {
1274 /* BUSEVENT due to completion of Bus Resume */
1275 pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
1276 }
1277 }
1278 if (hirq & BIT(MAX3421_HI_RWU_BIT))
1279 pr_info("%s: RWU\n", __func__);
1280 if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
1281 pr_info("%s: SUSDN\n", __func__);
1282
1283 chg = (old_port_status ^ max3421_hcd->port_status);
1284 max3421_hcd->port_status |= chg << 16;
1285
1286 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1287
1288#ifdef DEBUG
1289 {
1290 static unsigned long last_time;
1291 char sbuf[16 * 16], *dp, *end;
1292 int i;
1293
1294 if (jiffies - last_time > 5*HZ) {
1295 dp = sbuf;
1296 end = sbuf + sizeof(sbuf);
1297 *dp = '\0';
1298 for (i = 0; i < 16; ++i) {
1299 int ret = snprintf(dp, end - dp, " %lu",
1300 max3421_hcd->err_stat[i]);
1301 if (ret < 0 || ret >= end - dp)
1302 break; /* error or buffer full */
1303 dp += ret;
1304 }
1305 pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
1306 memset(max3421_hcd->err_stat, 0,
1307 sizeof(max3421_hcd->err_stat));
1308 last_time = jiffies;
1309
1310 dump_eps(hcd);
1311 }
1312 }
1313#endif
1314 return 1;
1315}
1316
1317static int
1318max3421_reset_hcd(struct usb_hcd *hcd)
1319{
1320 struct spi_device *spi = to_spi_device(hcd->self.controller);
1321 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1322 int timeout;
1323
1324 /* perform a chip reset and wait for OSCIRQ signal to appear: */
1325 spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
1326 /* clear reset: */
1327 spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
1328 timeout = 1000;
1329 while (1) {
1330 if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
1331 & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
1332 break;
1333 if (--timeout < 0) {
1334 dev_err(&spi->dev,
1335 "timed out waiting for oscillator OK signal");
1336 return 1;
1337 }
1338 cond_resched();
1339 }
1340
1341 /*
1342 * Turn on host mode, automatic generation of SOF packets, and
1343 * enable pull-down registers on DM/DP:
1344 */
1345 max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
1346 BIT(MAX3421_MODE_SOFKAENAB_BIT) |
1347 BIT(MAX3421_MODE_DMPULLDN_BIT) |
1348 BIT(MAX3421_MODE_DPPULLDN_BIT));
1349 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1350
1351 /* reset frame-number: */
1352 max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
1353 spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
1354
1355 /* sample the state of the D+ and D- lines */
1356 spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
1357 max3421_detect_conn(hcd);
1358
1359 /* enable frame, connection-detected, and bus-event interrupts: */
1360 max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
1361 BIT(MAX3421_HI_CONDET_BIT) |
1362 BIT(MAX3421_HI_BUSEVENT_BIT));
1363 spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1364
1365 /* enable interrupts: */
1366 spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
1367 return 1;
1368}
1369
1370static int
1371max3421_urb_done(struct usb_hcd *hcd)
1372{
1373 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1374 unsigned long flags;
1375 struct urb *urb;
1376 int status;
1377
1378 status = max3421_hcd->urb_done;
1379 max3421_hcd->urb_done = 0;
1380 if (status > 0)
1381 status = 0;
1382 urb = max3421_hcd->curr_urb;
1383 if (urb) {
1384 max3421_hcd->curr_urb = NULL;
1385 spin_lock_irqsave(&max3421_hcd->lock, flags);
1386 usb_hcd_unlink_urb_from_ep(hcd, urb);
1387 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1388
1389 /* must be called without the HCD spinlock: */
1390 usb_hcd_giveback_urb(hcd, urb, status);
1391 }
1392 return 1;
1393}
1394
1395static int
1396max3421_spi_thread(void *dev_id)
1397{
1398 struct usb_hcd *hcd = dev_id;
1399 struct spi_device *spi = to_spi_device(hcd->self.controller);
1400 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1401 int i, i_worked = 1;
1402
1403 /* set full-duplex SPI mode, low-active interrupt pin: */
1404 spi_wr8(hcd, MAX3421_REG_PINCTL,
1405 (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
1406 BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
1407
1408 while (!kthread_should_stop()) {
1409 max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
1410 if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
1411 break;
1412 dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
1413 msleep(10000);
1414 }
1415 dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
1416 max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
1417 spi->irq);
1418
1419 while (!kthread_should_stop()) {
1420 if (!i_worked) {
1421 /*
1422 * We'll be waiting for wakeups from the hard
1423 * interrupt handler, so now is a good time to
1424 * sync our hien with the chip:
1425 */
1426 spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1427
1428 set_current_state(TASK_INTERRUPTIBLE);
2eb5dbdd 1429 if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
2d53139f 1430 enable_irq(spi->irq);
2d53139f
DM
1431 schedule();
1432 __set_current_state(TASK_RUNNING);
1433 }
1434
1435 i_worked = 0;
1436
1437 if (max3421_hcd->urb_done)
1438 i_worked |= max3421_urb_done(hcd);
1439 else if (max3421_handle_irqs(hcd))
1440 i_worked = 1;
1441 else if (!max3421_hcd->curr_urb)
1442 i_worked |= max3421_select_and_start_urb(hcd);
1443
2eb5dbdd 1444 if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
2d53139f 1445 /* reset the HCD: */
2d53139f 1446 i_worked |= max3421_reset_hcd(hcd);
2eb5dbdd 1447 if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
2d53139f 1448 /* perform a USB bus reset: */
2d53139f
DM
1449 spi_wr8(hcd, MAX3421_REG_HCTL,
1450 BIT(MAX3421_HCTL_BUSRST_BIT));
1451 i_worked = 1;
1452 }
2eb5dbdd 1453 if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
2d53139f 1454 i_worked |= max3421_check_unlink(hcd);
2eb5dbdd 1455 if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
2d53139f
DM
1456 /*
1457 * IOPINS1/IOPINS2 do not auto-increment, so we can't
1458 * use spi_wr_buf().
1459 */
1460 for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
1461 u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
1462
1463 val = ((val & 0xf0) |
1464 (max3421_hcd->iopins[i] & 0x0f));
1465 spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
1466 max3421_hcd->iopins[i] = val;
1467 }
2d53139f
DM
1468 i_worked = 1;
1469 }
1470 }
1471 set_current_state(TASK_RUNNING);
1472 dev_info(&spi->dev, "SPI thread exiting");
1473 return 0;
1474}
1475
1476static int
1477max3421_reset_port(struct usb_hcd *hcd)
1478{
1479 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1480
1481 max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
1482 USB_PORT_STAT_LOW_SPEED);
a2b63cb5 1483 max3421_hcd->port_status |= USB_PORT_STAT_RESET;
2eb5dbdd 1484 set_bit(RESET_PORT, &max3421_hcd->todo);
2d53139f
DM
1485 wake_up_process(max3421_hcd->spi_thread);
1486 return 0;
1487}
1488
1489static int
1490max3421_reset(struct usb_hcd *hcd)
1491{
1492 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1493
1494 hcd->self.sg_tablesize = 0;
1495 hcd->speed = HCD_USB2;
1496 hcd->self.root_hub->speed = USB_SPEED_FULL;
2eb5dbdd 1497 set_bit(RESET_HCD, &max3421_hcd->todo);
2d53139f
DM
1498 wake_up_process(max3421_hcd->spi_thread);
1499 return 0;
1500}
1501
1502static int
1503max3421_start(struct usb_hcd *hcd)
1504{
1505 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1506
1507 spin_lock_init(&max3421_hcd->lock);
1508 max3421_hcd->rh_state = MAX3421_RH_RUNNING;
1509
1510 INIT_LIST_HEAD(&max3421_hcd->ep_list);
1511
1512 hcd->power_budget = POWER_BUDGET;
1513 hcd->state = HC_STATE_RUNNING;
1514 hcd->uses_new_polling = 1;
1515 return 0;
1516}
1517
1518static void
1519max3421_stop(struct usb_hcd *hcd)
1520{
1521}
1522
1523static int
1524max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1525{
1526 struct spi_device *spi = to_spi_device(hcd->self.controller);
1527 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1528 struct max3421_ep *max3421_ep;
1529 unsigned long flags;
1530 int retval;
1531
1532 switch (usb_pipetype(urb->pipe)) {
1533 case PIPE_INTERRUPT:
1534 case PIPE_ISOCHRONOUS:
1535 if (urb->interval < 0) {
1536 dev_err(&spi->dev,
1537 "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
1538 __func__, urb->interval);
1539 return -EINVAL;
1540 }
1541 default:
1542 break;
1543 }
1544
1545 spin_lock_irqsave(&max3421_hcd->lock, flags);
1546
1547 max3421_ep = urb->ep->hcpriv;
1548 if (!max3421_ep) {
1549 /* gets freed in max3421_endpoint_disable: */
6c0f3695 1550 max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
00c5aa17
DMT
1551 if (!max3421_ep) {
1552 retval = -ENOMEM;
1553 goto out;
1554 }
2d53139f
DM
1555 max3421_ep->ep = urb->ep;
1556 max3421_ep->last_active = max3421_hcd->frame_number;
1557 urb->ep->hcpriv = max3421_ep;
1558
1559 list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
1560 }
1561
1562 retval = usb_hcd_link_urb_to_ep(hcd, urb);
1563 if (retval == 0) {
1564 /* Since we added to the queue, restart scheduling: */
1565 max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1566 wake_up_process(max3421_hcd->spi_thread);
1567 }
1568
00c5aa17 1569out:
2d53139f
DM
1570 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1571 return retval;
1572}
1573
1574static int
1575max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1576{
1577 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1578 unsigned long flags;
1579 int retval;
1580
1581 spin_lock_irqsave(&max3421_hcd->lock, flags);
1582
1583 /*
1584 * This will set urb->unlinked which in turn causes the entry
1585 * to be dropped at the next opportunity.
1586 */
1587 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1588 if (retval == 0) {
2eb5dbdd 1589 set_bit(CHECK_UNLINK, &max3421_hcd->todo);
2d53139f
DM
1590 wake_up_process(max3421_hcd->spi_thread);
1591 }
1592 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1593 return retval;
1594}
1595
1596static void
1597max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1598{
1599 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1600 unsigned long flags;
1601
1602 spin_lock_irqsave(&max3421_hcd->lock, flags);
1603
1604 if (ep->hcpriv) {
1605 struct max3421_ep *max3421_ep = ep->hcpriv;
1606
1607 /* remove myself from the ep_list: */
1608 if (!list_empty(&max3421_ep->ep_list))
1609 list_del(&max3421_ep->ep_list);
1610 kfree(max3421_ep);
1611 ep->hcpriv = NULL;
1612 }
1613
1614 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1615}
1616
1617static int
1618max3421_get_frame_number(struct usb_hcd *hcd)
1619{
1620 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1621 return max3421_hcd->frame_number;
1622}
1623
1624/*
1625 * Should return a non-zero value when any port is undergoing a resume
1626 * transition while the root hub is suspended.
1627 */
1628static int
1629max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
1630{
1631 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1632 unsigned long flags;
1633 int retval = 0;
1634
1635 spin_lock_irqsave(&max3421_hcd->lock, flags);
1636 if (!HCD_HW_ACCESSIBLE(hcd))
1637 goto done;
1638
1639 *buf = 0;
1640 if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
1641 *buf = (1 << 1); /* a hub over-current condition exists */
1642 dev_dbg(hcd->self.controller,
1643 "port status 0x%08x has changes\n",
1644 max3421_hcd->port_status);
1645 retval = 1;
1646 if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
1647 usb_hcd_resume_root_hub(hcd);
1648 }
1649done:
1650 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1651 return retval;
1652}
1653
1654static inline void
1655hub_descriptor(struct usb_hub_descriptor *desc)
1656{
1657 memset(desc, 0, sizeof(*desc));
1658 /*
1659 * See Table 11-13: Hub Descriptor in USB 2.0 spec.
1660 */
1661 desc->bDescriptorType = 0x29; /* hub descriptor */
1662 desc->bDescLength = 9;
1663 desc->wHubCharacteristics = cpu_to_le16(0x0001);
1664 desc->bNbrPorts = 1;
1665}
1666
1667/*
1668 * Set the MAX3421E general-purpose output with number PIN_NUMBER to
1669 * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
1670 * any other value, this function acts as a no-op.
1671 */
1672static void
1673max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
1674{
1675 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1676 u8 mask, idx;
1677
1678 --pin_number;
1679 if (pin_number > 7)
1680 return;
1681
1682 mask = 1u << pin_number;
1683 idx = pin_number / 4;
1684
1685 if (value)
1686 max3421_hcd->iopins[idx] |= mask;
1687 else
1688 max3421_hcd->iopins[idx] &= ~mask;
2eb5dbdd 1689 set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
2d53139f
DM
1690 wake_up_process(max3421_hcd->spi_thread);
1691}
1692
1693static int
1694max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
1695 char *buf, u16 length)
1696{
1697 struct spi_device *spi = to_spi_device(hcd->self.controller);
1698 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1699 struct max3421_hcd_platform_data *pdata;
1700 unsigned long flags;
1701 int retval = 0;
1702
1703 spin_lock_irqsave(&max3421_hcd->lock, flags);
1704
1705 pdata = spi->dev.platform_data;
1706
1707 switch (type_req) {
1708 case ClearHubFeature:
1709 break;
1710 case ClearPortFeature:
1711 switch (value) {
1712 case USB_PORT_FEAT_SUSPEND:
1713 break;
1714 case USB_PORT_FEAT_POWER:
1715 dev_dbg(hcd->self.controller, "power-off\n");
4055e5e5
DMT
1716 max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1717 !pdata->vbus_active_level);
2d53139f
DM
1718 /* FALLS THROUGH */
1719 default:
1720 max3421_hcd->port_status &= ~(1 << value);
1721 }
1722 break;
1723 case GetHubDescriptor:
1724 hub_descriptor((struct usb_hub_descriptor *) buf);
1725 break;
1726
1727 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
1728 case GetPortErrorCount:
1729 case SetHubDepth:
1730 /* USB3 only */
1731 goto error;
1732
1733 case GetHubStatus:
1734 *(__le32 *) buf = cpu_to_le32(0);
1735 break;
1736
1737 case GetPortStatus:
1738 if (index != 1) {
1739 retval = -EPIPE;
1740 goto error;
1741 }
1742 ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
1743 ((__le16 *) buf)[1] =
1744 cpu_to_le16(max3421_hcd->port_status >> 16);
1745 break;
1746
1747 case SetHubFeature:
1748 retval = -EPIPE;
1749 break;
1750
1751 case SetPortFeature:
1752 switch (value) {
1753 case USB_PORT_FEAT_LINK_STATE:
1754 case USB_PORT_FEAT_U1_TIMEOUT:
1755 case USB_PORT_FEAT_U2_TIMEOUT:
1756 case USB_PORT_FEAT_BH_PORT_RESET:
1757 goto error;
1758 case USB_PORT_FEAT_SUSPEND:
1759 if (max3421_hcd->active)
1760 max3421_hcd->port_status |=
1761 USB_PORT_STAT_SUSPEND;
1762 break;
1763 case USB_PORT_FEAT_POWER:
1764 dev_dbg(hcd->self.controller, "power-on\n");
1765 max3421_hcd->port_status |= USB_PORT_STAT_POWER;
4055e5e5
DMT
1766 max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1767 pdata->vbus_active_level);
2d53139f
DM
1768 break;
1769 case USB_PORT_FEAT_RESET:
1770 max3421_reset_port(hcd);
1771 /* FALLS THROUGH */
1772 default:
1773 if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
1774 != 0)
1775 max3421_hcd->port_status |= (1 << value);
1776 }
1777 break;
1778
1779 default:
1780 dev_dbg(hcd->self.controller,
1781 "hub control req%04x v%04x i%04x l%d\n",
1782 type_req, value, index, length);
1783error: /* "protocol stall" on error */
1784 retval = -EPIPE;
1785 }
1786
1787 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1788 return retval;
1789}
1790
1791static int
1792max3421_bus_suspend(struct usb_hcd *hcd)
1793{
1794 return -1;
1795}
1796
1797static int
1798max3421_bus_resume(struct usb_hcd *hcd)
1799{
1800 return -1;
1801}
1802
1803/*
1804 * The SPI driver already takes care of DMA-mapping/unmapping, so no
1805 * reason to do it twice.
1806 */
1807static int
1808max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1809{
1810 return 0;
1811}
1812
1813static void
1814max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
1815{
1816}
1817
1818static struct hc_driver max3421_hcd_desc = {
1819 .description = "max3421",
1820 .product_desc = DRIVER_DESC,
1821 .hcd_priv_size = sizeof(struct max3421_hcd),
1822 .flags = HCD_USB11,
1823 .reset = max3421_reset,
1824 .start = max3421_start,
1825 .stop = max3421_stop,
1826 .get_frame_number = max3421_get_frame_number,
1827 .urb_enqueue = max3421_urb_enqueue,
1828 .urb_dequeue = max3421_urb_dequeue,
1829 .map_urb_for_dma = max3421_map_urb_for_dma,
1830 .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
1831 .endpoint_disable = max3421_endpoint_disable,
1832 .hub_status_data = max3421_hub_status_data,
1833 .hub_control = max3421_hub_control,
1834 .bus_suspend = max3421_bus_suspend,
1835 .bus_resume = max3421_bus_resume,
1836};
1837
1838static int
1839max3421_probe(struct spi_device *spi)
1840{
1841 struct max3421_hcd *max3421_hcd;
05dfa5c9
DMT
1842 struct usb_hcd *hcd = NULL;
1843 int retval = -ENOMEM;
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1844
1845 if (spi_setup(spi) < 0) {
1846 dev_err(&spi->dev, "Unable to setup SPI bus");
1847 return -EFAULT;
1848 }
1849
1850 hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
1851 dev_name(&spi->dev));
1852 if (!hcd) {
1853 dev_err(&spi->dev, "failed to create HCD structure\n");
05dfa5c9 1854 goto error;
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1855 }
1856 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1857 max3421_hcd = hcd_to_max3421(hcd);
1858 max3421_hcd->next = max3421_hcd_list;
1859 max3421_hcd_list = max3421_hcd;
1860 INIT_LIST_HEAD(&max3421_hcd->ep_list);
1861
05dfa5c9
DMT
1862 max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
1863 if (!max3421_hcd->tx) {
1864 dev_err(&spi->dev, "failed to kmalloc tx buffer\n");
1865 goto error;
1866 }
1867 max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
1868 if (!max3421_hcd->rx) {
1869 dev_err(&spi->dev, "failed to kmalloc rx buffer\n");
1870 goto error;
1871 }
1872
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1873 max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
1874 "max3421_spi_thread");
1875 if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
1876 dev_err(&spi->dev,
1877 "failed to create SPI thread (out of memory)\n");
05dfa5c9 1878 goto error;
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DM
1879 }
1880
1881 retval = usb_add_hcd(hcd, 0, 0);
1882 if (retval) {
1883 dev_err(&spi->dev, "failed to add HCD\n");
05dfa5c9 1884 goto error;
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1885 }
1886
1887 retval = request_irq(spi->irq, max3421_irq_handler,
1888 IRQF_TRIGGER_LOW, "max3421", hcd);
1889 if (retval < 0) {
2d53139f 1890 dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
05dfa5c9 1891 goto error;
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1892 }
1893 return 0;
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DMT
1894
1895error:
1896 if (hcd) {
1897 kfree(max3421_hcd->tx);
1898 kfree(max3421_hcd->rx);
1899 if (max3421_hcd->spi_thread)
1900 kthread_stop(max3421_hcd->spi_thread);
1901 usb_put_hcd(hcd);
1902 }
1903 return retval;
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1904}
1905
1906static int
1907max3421_remove(struct spi_device *spi)
1908{
1909 struct max3421_hcd *max3421_hcd = NULL, **prev;
1910 struct usb_hcd *hcd = NULL;
1911 unsigned long flags;
1912
1913 for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
1914 max3421_hcd = *prev;
1915 hcd = max3421_to_hcd(max3421_hcd);
1916 if (hcd->self.controller == &spi->dev)
1917 break;
1918 }
1919 if (!max3421_hcd) {
1920 dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
1921 spi);
1922 return -ENODEV;
1923 }
1924
1925 usb_remove_hcd(hcd);
1926
1927 spin_lock_irqsave(&max3421_hcd->lock, flags);
1928
1929 kthread_stop(max3421_hcd->spi_thread);
1930 *prev = max3421_hcd->next;
1931
1932 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1933
1934 free_irq(spi->irq, hcd);
1935
1936 usb_put_hcd(hcd);
1937 return 0;
1938}
1939
1940static struct spi_driver max3421_driver = {
1941 .probe = max3421_probe,
1942 .remove = max3421_remove,
1943 .driver = {
1944 .name = "max3421-hcd",
1945 .owner = THIS_MODULE,
1946 },
1947};
1948
7df45d5f 1949module_spi_driver(max3421_driver);
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1950
1951MODULE_DESCRIPTION(DRIVER_DESC);
1952MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
1953MODULE_LICENSE("GPL");
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