Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> | |
6 | * | |
7 | * [ Initialisation is based on Linus' ] | |
8 | * [ uhci code and gregs ohci fragments ] | |
9 | * [ (C) Copyright 1999 Linus Torvalds ] | |
10 | * [ (C) Copyright 1999 Gregory P. Smith] | |
11 | * | |
12 | * | |
13 | * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller | |
14 | * interfaces (though some non-x86 Intel chips use it). It supports | |
15 | * smarter hardware than UHCI. A download link for the spec available | |
16 | * through the http://www.usb.org website. | |
17 | * | |
18 | * History: | |
19 | * | |
20 | * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer) | |
21 | * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net) | |
22 | * 2003/02/24 show registers in sysfs (Kevin Brosius) | |
23 | * | |
24 | * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and | |
25 | * bandwidth accounting; if debugging, show schedules in driverfs | |
26 | * 2002/07/19 fixes to management of ED and schedule state. | |
27 | * 2002/06/09 SA-1111 support (Christopher Hoover) | |
28 | * 2002/06/01 remember frame when HC won't see EDs any more; use that info | |
29 | * to fix urb unlink races caused by interrupt latency assumptions; | |
30 | * minor ED field and function naming updates | |
31 | * 2002/01/18 package as a patch for 2.5.3; this should match the | |
32 | * 2.4.17 kernel modulo some bugs being fixed. | |
33 | * | |
34 | * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes | |
35 | * from post-2.4.5 patches. | |
36 | * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning | |
37 | * 2001/09/07 match PCI PM changes, errnos from Linus' tree | |
38 | * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify; | |
39 | * pbook pci quirks gone (please fix pbook pci sw!) (db) | |
40 | * | |
41 | * 2001/04/08 Identify version on module load (gb) | |
42 | * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam); | |
43 | pci_map_single (db) | |
44 | * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db) | |
45 | * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam) | |
46 | * | |
47 | * 2000/09/26 fixed races in removing the private portion of the urb | |
48 | * 2000/09/07 disable bulk and control lists when unlinking the last | |
49 | * endpoint descriptor in order to avoid unrecoverable errors on | |
50 | * the Lucent chips. (rwc@sgi) | |
51 | * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some | |
52 | * urb unlink probs, indentation fixes | |
53 | * 2000/08/11 various oops fixes mostly affecting iso and cleanup from | |
54 | * device unplugs. | |
55 | * 2000/06/28 use PCI hotplug framework, for better power management | |
56 | * and for Cardbus support (David Brownell) | |
57 | * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling | |
58 | * when the controller loses power; handle UE; cleanup; ... | |
59 | * | |
60 | * v5.2 1999/12/07 URB 3rd preview, | |
61 | * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi) | |
62 | * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume | |
63 | * i386: HUB, Keyboard, Mouse, Printer | |
64 | * | |
65 | * v4.3 1999/10/27 multiple HCs, bulk_request | |
66 | * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes | |
67 | * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl. | |
68 | * v4.0 1999/08/18 | |
69 | * v3.0 1999/06/25 | |
70 | * v2.1 1999/05/09 code clean up | |
71 | * v2.0 1999/05/04 | |
72 | * v1.0 1999/04/27 initial release | |
73 | * | |
74 | * This file is licenced under the GPL. | |
75 | */ | |
76 | ||
77 | #include <linux/config.h> | |
78 | ||
79 | #ifdef CONFIG_USB_DEBUG | |
80 | # define DEBUG | |
81 | #else | |
82 | # undef DEBUG | |
83 | #endif | |
84 | ||
85 | #include <linux/module.h> | |
86 | #include <linux/moduleparam.h> | |
87 | #include <linux/pci.h> | |
88 | #include <linux/kernel.h> | |
89 | #include <linux/delay.h> | |
90 | #include <linux/ioport.h> | |
91 | #include <linux/sched.h> | |
92 | #include <linux/slab.h> | |
93 | #include <linux/smp_lock.h> | |
94 | #include <linux/errno.h> | |
95 | #include <linux/init.h> | |
96 | #include <linux/timer.h> | |
97 | #include <linux/list.h> | |
1da177e4 LT |
98 | #include <linux/usb.h> |
99 | #include <linux/usb_otg.h> | |
1da177e4 | 100 | #include <linux/dma-mapping.h> |
f4df0e33 DB |
101 | #include <linux/dmapool.h> |
102 | #include <linux/reboot.h> | |
1da177e4 LT |
103 | |
104 | #include <asm/io.h> | |
105 | #include <asm/irq.h> | |
106 | #include <asm/system.h> | |
107 | #include <asm/unaligned.h> | |
108 | #include <asm/byteorder.h> | |
109 | ||
f4df0e33 | 110 | #include "../core/hcd.h" |
1da177e4 | 111 | |
f4df0e33 | 112 | #define DRIVER_VERSION "2005 April 22" |
1da177e4 LT |
113 | #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell" |
114 | #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver" | |
115 | ||
116 | /*-------------------------------------------------------------------------*/ | |
117 | ||
118 | // #define OHCI_VERBOSE_DEBUG /* not always helpful */ | |
119 | ||
120 | /* For initializing controller (mask in an HCFS mode too) */ | |
121 | #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR | |
122 | #define OHCI_INTR_INIT \ | |
123 | (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH) | |
124 | ||
125 | #ifdef __hppa__ | |
126 | /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */ | |
127 | #define IR_DISABLE | |
128 | #endif | |
129 | ||
130 | #ifdef CONFIG_ARCH_OMAP | |
131 | /* OMAP doesn't support IR (no SMM; not needed) */ | |
132 | #define IR_DISABLE | |
133 | #endif | |
134 | ||
135 | /*-------------------------------------------------------------------------*/ | |
136 | ||
137 | static const char hcd_name [] = "ohci_hcd"; | |
138 | ||
139 | #include "ohci.h" | |
140 | ||
141 | static void ohci_dump (struct ohci_hcd *ohci, int verbose); | |
142 | static int ohci_init (struct ohci_hcd *ohci); | |
143 | static void ohci_stop (struct usb_hcd *hcd); | |
f4df0e33 | 144 | static int ohci_reboot (struct notifier_block *, unsigned long , void *); |
1da177e4 LT |
145 | |
146 | #include "ohci-hub.c" | |
147 | #include "ohci-dbg.c" | |
148 | #include "ohci-mem.c" | |
149 | #include "ohci-q.c" | |
150 | ||
151 | ||
152 | /* | |
153 | * On architectures with edge-triggered interrupts we must never return | |
154 | * IRQ_NONE. | |
155 | */ | |
156 | #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */ | |
157 | #define IRQ_NOTMINE IRQ_HANDLED | |
158 | #else | |
159 | #define IRQ_NOTMINE IRQ_NONE | |
160 | #endif | |
161 | ||
162 | ||
163 | /* Some boards misreport power switching/overcurrent */ | |
164 | static int distrust_firmware = 1; | |
165 | module_param (distrust_firmware, bool, 0); | |
166 | MODULE_PARM_DESC (distrust_firmware, | |
167 | "true to distrust firmware power/overcurrent setup"); | |
168 | ||
169 | /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */ | |
170 | static int no_handshake = 0; | |
171 | module_param (no_handshake, bool, 0); | |
172 | MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake"); | |
173 | ||
174 | /*-------------------------------------------------------------------------*/ | |
175 | ||
176 | /* | |
177 | * queue up an urb for anything except the root hub | |
178 | */ | |
179 | static int ohci_urb_enqueue ( | |
180 | struct usb_hcd *hcd, | |
181 | struct usb_host_endpoint *ep, | |
182 | struct urb *urb, | |
5db539e4 | 183 | unsigned mem_flags |
1da177e4 LT |
184 | ) { |
185 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
186 | struct ed *ed; | |
187 | urb_priv_t *urb_priv; | |
188 | unsigned int pipe = urb->pipe; | |
189 | int i, size = 0; | |
190 | unsigned long flags; | |
191 | int retval = 0; | |
192 | ||
193 | #ifdef OHCI_VERBOSE_DEBUG | |
194 | urb_print (urb, "SUB", usb_pipein (pipe)); | |
195 | #endif | |
196 | ||
197 | /* every endpoint has a ed, locate and maybe (re)initialize it */ | |
198 | if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval))) | |
199 | return -ENOMEM; | |
200 | ||
201 | /* for the private part of the URB we need the number of TDs (size) */ | |
202 | switch (ed->type) { | |
203 | case PIPE_CONTROL: | |
204 | /* td_submit_urb() doesn't yet handle these */ | |
205 | if (urb->transfer_buffer_length > 4096) | |
206 | return -EMSGSIZE; | |
207 | ||
208 | /* 1 TD for setup, 1 for ACK, plus ... */ | |
209 | size = 2; | |
210 | /* FALLTHROUGH */ | |
211 | // case PIPE_INTERRUPT: | |
212 | // case PIPE_BULK: | |
213 | default: | |
214 | /* one TD for every 4096 Bytes (can be upto 8K) */ | |
215 | size += urb->transfer_buffer_length / 4096; | |
216 | /* ... and for any remaining bytes ... */ | |
217 | if ((urb->transfer_buffer_length % 4096) != 0) | |
218 | size++; | |
219 | /* ... and maybe a zero length packet to wrap it up */ | |
220 | if (size == 0) | |
221 | size++; | |
222 | else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0 | |
223 | && (urb->transfer_buffer_length | |
224 | % usb_maxpacket (urb->dev, pipe, | |
225 | usb_pipeout (pipe))) == 0) | |
226 | size++; | |
227 | break; | |
228 | case PIPE_ISOCHRONOUS: /* number of packets from URB */ | |
229 | size = urb->number_of_packets; | |
230 | break; | |
231 | } | |
232 | ||
233 | /* allocate the private part of the URB */ | |
234 | urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *), | |
235 | mem_flags); | |
236 | if (!urb_priv) | |
237 | return -ENOMEM; | |
238 | memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *)); | |
239 | INIT_LIST_HEAD (&urb_priv->pending); | |
240 | urb_priv->length = size; | |
241 | urb_priv->ed = ed; | |
242 | ||
243 | /* allocate the TDs (deferring hash chain updates) */ | |
244 | for (i = 0; i < size; i++) { | |
245 | urb_priv->td [i] = td_alloc (ohci, mem_flags); | |
246 | if (!urb_priv->td [i]) { | |
247 | urb_priv->length = i; | |
248 | urb_free_priv (ohci, urb_priv); | |
249 | return -ENOMEM; | |
250 | } | |
251 | } | |
252 | ||
253 | spin_lock_irqsave (&ohci->lock, flags); | |
254 | ||
255 | /* don't submit to a dead HC */ | |
256 | if (!HC_IS_RUNNING(hcd->state)) { | |
257 | retval = -ENODEV; | |
258 | goto fail; | |
259 | } | |
260 | ||
261 | /* in case of unlink-during-submit */ | |
262 | spin_lock (&urb->lock); | |
263 | if (urb->status != -EINPROGRESS) { | |
264 | spin_unlock (&urb->lock); | |
265 | urb->hcpriv = urb_priv; | |
266 | finish_urb (ohci, urb, NULL); | |
267 | retval = 0; | |
268 | goto fail; | |
269 | } | |
270 | ||
271 | /* schedule the ed if needed */ | |
272 | if (ed->state == ED_IDLE) { | |
273 | retval = ed_schedule (ohci, ed); | |
274 | if (retval < 0) | |
275 | goto fail0; | |
276 | if (ed->type == PIPE_ISOCHRONOUS) { | |
277 | u16 frame = ohci_frame_no(ohci); | |
278 | ||
279 | /* delay a few frames before the first TD */ | |
280 | frame += max_t (u16, 8, ed->interval); | |
281 | frame &= ~(ed->interval - 1); | |
282 | frame |= ed->branch; | |
283 | urb->start_frame = frame; | |
284 | ||
285 | /* yes, only URB_ISO_ASAP is supported, and | |
286 | * urb->start_frame is never used as input. | |
287 | */ | |
288 | } | |
289 | } else if (ed->type == PIPE_ISOCHRONOUS) | |
290 | urb->start_frame = ed->last_iso + ed->interval; | |
291 | ||
292 | /* fill the TDs and link them to the ed; and | |
293 | * enable that part of the schedule, if needed | |
294 | * and update count of queued periodic urbs | |
295 | */ | |
296 | urb->hcpriv = urb_priv; | |
297 | td_submit_urb (ohci, urb); | |
298 | ||
299 | fail0: | |
300 | spin_unlock (&urb->lock); | |
301 | fail: | |
302 | if (retval) | |
303 | urb_free_priv (ohci, urb_priv); | |
304 | spin_unlock_irqrestore (&ohci->lock, flags); | |
305 | return retval; | |
306 | } | |
307 | ||
308 | /* | |
309 | * decouple the URB from the HC queues (TDs, urb_priv); it's | |
310 | * already marked using urb->status. reporting is always done | |
311 | * asynchronously, and we might be dealing with an urb that's | |
312 | * partially transferred, or an ED with other urbs being unlinked. | |
313 | */ | |
314 | static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) | |
315 | { | |
316 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
317 | unsigned long flags; | |
318 | ||
319 | #ifdef OHCI_VERBOSE_DEBUG | |
320 | urb_print (urb, "UNLINK", 1); | |
321 | #endif | |
322 | ||
323 | spin_lock_irqsave (&ohci->lock, flags); | |
324 | if (HC_IS_RUNNING(hcd->state)) { | |
325 | urb_priv_t *urb_priv; | |
326 | ||
327 | /* Unless an IRQ completed the unlink while it was being | |
328 | * handed to us, flag it for unlink and giveback, and force | |
329 | * some upcoming INTR_SF to call finish_unlinks() | |
330 | */ | |
331 | urb_priv = urb->hcpriv; | |
332 | if (urb_priv) { | |
333 | if (urb_priv->ed->state == ED_OPER) | |
334 | start_ed_unlink (ohci, urb_priv->ed); | |
335 | } | |
336 | } else { | |
337 | /* | |
338 | * with HC dead, we won't respect hc queue pointers | |
339 | * any more ... just clean up every urb's memory. | |
340 | */ | |
341 | if (urb->hcpriv) | |
342 | finish_urb (ohci, urb, NULL); | |
343 | } | |
344 | spin_unlock_irqrestore (&ohci->lock, flags); | |
345 | return 0; | |
346 | } | |
347 | ||
348 | /*-------------------------------------------------------------------------*/ | |
349 | ||
350 | /* frees config/altsetting state for endpoints, | |
351 | * including ED memory, dummy TD, and bulk/intr data toggle | |
352 | */ | |
353 | ||
354 | static void | |
355 | ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |
356 | { | |
357 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
358 | unsigned long flags; | |
359 | struct ed *ed = ep->hcpriv; | |
360 | unsigned limit = 1000; | |
361 | ||
362 | /* ASSERT: any requests/urbs are being unlinked */ | |
363 | /* ASSERT: nobody can be submitting urbs for this any more */ | |
364 | ||
365 | if (!ed) | |
366 | return; | |
367 | ||
368 | rescan: | |
369 | spin_lock_irqsave (&ohci->lock, flags); | |
370 | ||
371 | if (!HC_IS_RUNNING (hcd->state)) { | |
372 | sanitize: | |
373 | ed->state = ED_IDLE; | |
374 | finish_unlinks (ohci, 0, NULL); | |
375 | } | |
376 | ||
377 | switch (ed->state) { | |
378 | case ED_UNLINK: /* wait for hw to finish? */ | |
379 | /* major IRQ delivery trouble loses INTR_SF too... */ | |
380 | if (limit-- == 0) { | |
381 | ohci_warn (ohci, "IRQ INTR_SF lossage\n"); | |
382 | goto sanitize; | |
383 | } | |
384 | spin_unlock_irqrestore (&ohci->lock, flags); | |
22c43863 | 385 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
386 | goto rescan; |
387 | case ED_IDLE: /* fully unlinked */ | |
388 | if (list_empty (&ed->td_list)) { | |
389 | td_free (ohci, ed->dummy); | |
390 | ed_free (ohci, ed); | |
391 | break; | |
392 | } | |
393 | /* else FALL THROUGH */ | |
394 | default: | |
395 | /* caller was supposed to have unlinked any requests; | |
396 | * that's not our job. can't recover; must leak ed. | |
397 | */ | |
398 | ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n", | |
399 | ed, ep->desc.bEndpointAddress, ed->state, | |
400 | list_empty (&ed->td_list) ? "" : " (has tds)"); | |
401 | td_free (ohci, ed->dummy); | |
402 | break; | |
403 | } | |
404 | ep->hcpriv = NULL; | |
405 | spin_unlock_irqrestore (&ohci->lock, flags); | |
406 | return; | |
407 | } | |
408 | ||
409 | static int ohci_get_frame (struct usb_hcd *hcd) | |
410 | { | |
411 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
412 | ||
413 | return ohci_frame_no(ohci); | |
414 | } | |
415 | ||
416 | static void ohci_usb_reset (struct ohci_hcd *ohci) | |
417 | { | |
418 | ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); | |
419 | ohci->hc_control &= OHCI_CTRL_RWC; | |
420 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); | |
421 | } | |
422 | ||
f4df0e33 DB |
423 | /* reboot notifier forcibly disables IRQs and DMA, helping kexec and |
424 | * other cases where the next software may expect clean state from the | |
425 | * "firmware". this is bus-neutral, unlike shutdown() methods. | |
426 | */ | |
427 | static int | |
428 | ohci_reboot (struct notifier_block *block, unsigned long code, void *null) | |
429 | { | |
430 | struct ohci_hcd *ohci; | |
431 | ||
432 | ohci = container_of (block, struct ohci_hcd, reboot_notifier); | |
433 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | |
434 | ohci_usb_reset (ohci); | |
435 | /* flush the writes */ | |
436 | (void) ohci_readl (ohci, &ohci->regs->control); | |
437 | return 0; | |
438 | } | |
439 | ||
1da177e4 LT |
440 | /*-------------------------------------------------------------------------* |
441 | * HC functions | |
442 | *-------------------------------------------------------------------------*/ | |
443 | ||
444 | /* init memory, and kick BIOS/SMM off */ | |
445 | ||
446 | static int ohci_init (struct ohci_hcd *ohci) | |
447 | { | |
448 | int ret; | |
449 | ||
450 | disable (ohci); | |
451 | ohci->regs = ohci_to_hcd(ohci)->regs; | |
452 | ohci->next_statechange = jiffies; | |
453 | ||
454 | #ifndef IR_DISABLE | |
455 | /* SMM owns the HC? not for long! */ | |
456 | if (!no_handshake && ohci_readl (ohci, | |
457 | &ohci->regs->control) & OHCI_CTRL_IR) { | |
458 | u32 temp; | |
459 | ||
460 | ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n"); | |
461 | ||
462 | /* this timeout is arbitrary. we make it long, so systems | |
463 | * depending on usb keyboards may be usable even if the | |
464 | * BIOS/SMM code seems pretty broken. | |
465 | */ | |
466 | temp = 500; /* arbitrary: five seconds */ | |
467 | ||
468 | ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable); | |
469 | ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus); | |
470 | while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) { | |
471 | msleep (10); | |
472 | if (--temp == 0) { | |
473 | ohci_err (ohci, "USB HC takeover failed!" | |
474 | " (BIOS/SMM bug)\n"); | |
475 | return -EBUSY; | |
476 | } | |
477 | } | |
478 | ohci_usb_reset (ohci); | |
479 | } | |
480 | #endif | |
481 | ||
482 | /* Disable HC interrupts */ | |
483 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | |
484 | // flush the writes | |
485 | (void) ohci_readl (ohci, &ohci->regs->control); | |
486 | ||
487 | if (ohci->hcca) | |
488 | return 0; | |
489 | ||
490 | ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller, | |
491 | sizeof *ohci->hcca, &ohci->hcca_dma, 0); | |
492 | if (!ohci->hcca) | |
493 | return -ENOMEM; | |
494 | ||
495 | if ((ret = ohci_mem_init (ohci)) < 0) | |
496 | ohci_stop (ohci_to_hcd(ohci)); | |
497 | ||
498 | return ret; | |
499 | ||
500 | } | |
501 | ||
502 | /*-------------------------------------------------------------------------*/ | |
503 | ||
504 | /* Start an OHCI controller, set the BUS operational | |
505 | * resets USB and controller | |
506 | * enable interrupts | |
1da177e4 LT |
507 | */ |
508 | static int ohci_run (struct ohci_hcd *ohci) | |
509 | { | |
510 | u32 mask, temp; | |
1da177e4 LT |
511 | int first = ohci->fminterval == 0; |
512 | ||
513 | disable (ohci); | |
514 | ||
515 | /* boot firmware should have set this up (5.1.1.3.1) */ | |
516 | if (first) { | |
517 | ||
518 | temp = ohci_readl (ohci, &ohci->regs->fminterval); | |
519 | ohci->fminterval = temp & 0x3fff; | |
520 | if (ohci->fminterval != FI) | |
521 | ohci_dbg (ohci, "fminterval delta %d\n", | |
522 | ohci->fminterval - FI); | |
523 | ohci->fminterval |= FSMP (ohci->fminterval) << 16; | |
524 | /* also: power/overcurrent flags in roothub.a */ | |
525 | } | |
526 | ||
527 | /* Reset USB nearly "by the book". RemoteWakeupConnected | |
528 | * saved if boot firmware (BIOS/SMM/...) told us it's connected | |
529 | * (for OHCI integrated on mainboard, it normally is) | |
530 | */ | |
531 | ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); | |
532 | ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", | |
533 | hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), | |
534 | ohci->hc_control); | |
535 | ||
536 | if (ohci->hc_control & OHCI_CTRL_RWC | |
537 | && !(ohci->flags & OHCI_QUIRK_AMD756)) | |
538 | ohci_to_hcd(ohci)->can_wakeup = 1; | |
539 | ||
540 | switch (ohci->hc_control & OHCI_CTRL_HCFS) { | |
541 | case OHCI_USB_OPER: | |
542 | temp = 0; | |
543 | break; | |
544 | case OHCI_USB_SUSPEND: | |
545 | case OHCI_USB_RESUME: | |
546 | ohci->hc_control &= OHCI_CTRL_RWC; | |
547 | ohci->hc_control |= OHCI_USB_RESUME; | |
548 | temp = 10 /* msec wait */; | |
549 | break; | |
550 | // case OHCI_USB_RESET: | |
551 | default: | |
552 | ohci->hc_control &= OHCI_CTRL_RWC; | |
553 | ohci->hc_control |= OHCI_USB_RESET; | |
554 | temp = 50 /* msec wait */; | |
555 | break; | |
556 | } | |
557 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); | |
558 | // flush the writes | |
559 | (void) ohci_readl (ohci, &ohci->regs->control); | |
560 | msleep(temp); | |
561 | temp = roothub_a (ohci); | |
562 | if (!(temp & RH_A_NPS)) { | |
563 | unsigned ports = temp & RH_A_NDP; | |
564 | ||
565 | /* power down each port */ | |
566 | for (temp = 0; temp < ports; temp++) | |
567 | ohci_writel (ohci, RH_PS_LSDA, | |
568 | &ohci->regs->roothub.portstatus [temp]); | |
569 | } | |
570 | // flush those writes | |
571 | (void) ohci_readl (ohci, &ohci->regs->control); | |
572 | memset (ohci->hcca, 0, sizeof (struct ohci_hcca)); | |
573 | ||
574 | /* 2msec timelimit here means no irqs/preempt */ | |
575 | spin_lock_irq (&ohci->lock); | |
576 | ||
577 | retry: | |
578 | /* HC Reset requires max 10 us delay */ | |
579 | ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus); | |
580 | temp = 30; /* ... allow extra time */ | |
581 | while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) { | |
582 | if (--temp == 0) { | |
583 | spin_unlock_irq (&ohci->lock); | |
584 | ohci_err (ohci, "USB HC reset timed out!\n"); | |
585 | return -1; | |
586 | } | |
587 | udelay (1); | |
588 | } | |
589 | ||
590 | /* now we're in the SUSPEND state ... must go OPERATIONAL | |
591 | * within 2msec else HC enters RESUME | |
592 | * | |
593 | * ... but some hardware won't init fmInterval "by the book" | |
594 | * (SiS, OPTi ...), so reset again instead. SiS doesn't need | |
595 | * this if we write fmInterval after we're OPERATIONAL. | |
596 | * Unclear about ALi, ServerWorks, and others ... this could | |
597 | * easily be a longstanding bug in chip init on Linux. | |
598 | */ | |
599 | if (ohci->flags & OHCI_QUIRK_INITRESET) { | |
600 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); | |
601 | // flush those writes | |
602 | (void) ohci_readl (ohci, &ohci->regs->control); | |
603 | } | |
604 | ||
605 | /* Tell the controller where the control and bulk lists are | |
606 | * The lists are empty now. */ | |
607 | ohci_writel (ohci, 0, &ohci->regs->ed_controlhead); | |
608 | ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead); | |
609 | ||
610 | /* a reset clears this */ | |
611 | ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca); | |
612 | ||
613 | periodic_reinit (ohci); | |
614 | ||
615 | /* some OHCI implementations are finicky about how they init. | |
616 | * bogus values here mean not even enumeration could work. | |
617 | */ | |
618 | if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0 | |
619 | || !ohci_readl (ohci, &ohci->regs->periodicstart)) { | |
620 | if (!(ohci->flags & OHCI_QUIRK_INITRESET)) { | |
621 | ohci->flags |= OHCI_QUIRK_INITRESET; | |
622 | ohci_dbg (ohci, "enabling initreset quirk\n"); | |
623 | goto retry; | |
624 | } | |
625 | spin_unlock_irq (&ohci->lock); | |
626 | ohci_err (ohci, "init err (%08x %04x)\n", | |
627 | ohci_readl (ohci, &ohci->regs->fminterval), | |
628 | ohci_readl (ohci, &ohci->regs->periodicstart)); | |
629 | return -EOVERFLOW; | |
630 | } | |
631 | ||
632 | /* start controller operations */ | |
633 | ohci->hc_control &= OHCI_CTRL_RWC; | |
634 | ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; | |
635 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); | |
636 | ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; | |
637 | ||
638 | /* wake on ConnectStatusChange, matching external hubs */ | |
639 | ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); | |
640 | ||
641 | /* Choose the interrupts we care about now, others later on demand */ | |
642 | mask = OHCI_INTR_INIT; | |
643 | ohci_writel (ohci, mask, &ohci->regs->intrstatus); | |
644 | ohci_writel (ohci, mask, &ohci->regs->intrenable); | |
645 | ||
646 | /* handle root hub init quirks ... */ | |
647 | temp = roothub_a (ohci); | |
648 | temp &= ~(RH_A_PSM | RH_A_OCPM); | |
649 | if (ohci->flags & OHCI_QUIRK_SUPERIO) { | |
650 | /* NSC 87560 and maybe others */ | |
651 | temp |= RH_A_NOCP; | |
652 | temp &= ~(RH_A_POTPGT | RH_A_NPS); | |
653 | ohci_writel (ohci, temp, &ohci->regs->roothub.a); | |
654 | } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) { | |
655 | /* hub power always on; required for AMD-756 and some | |
656 | * Mac platforms. ganged overcurrent reporting, if any. | |
657 | */ | |
658 | temp |= RH_A_NPS; | |
659 | ohci_writel (ohci, temp, &ohci->regs->roothub.a); | |
660 | } | |
661 | ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status); | |
662 | ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM, | |
663 | &ohci->regs->roothub.b); | |
664 | // flush those writes | |
665 | (void) ohci_readl (ohci, &ohci->regs->control); | |
666 | ||
667 | spin_unlock_irq (&ohci->lock); | |
668 | ||
669 | // POTPGT delay is bits 24-31, in 2 ms units. | |
670 | mdelay ((temp >> 23) & 0x1fe); | |
1da177e4 LT |
671 | ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; |
672 | ||
673 | ohci_dump (ohci, 1); | |
674 | ||
edfd6aee | 675 | if (ohci_to_hcd(ohci)->self.root_hub == NULL) { |
676 | register_reboot_notifier (&ohci->reboot_notifier); | |
247f3105 | 677 | create_debug_files (ohci); |
edfd6aee | 678 | } |
1da177e4 | 679 | |
1da177e4 LT |
680 | return 0; |
681 | } | |
682 | ||
683 | /*-------------------------------------------------------------------------*/ | |
684 | ||
685 | /* an interrupt happens */ | |
686 | ||
687 | static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs) | |
688 | { | |
689 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
690 | struct ohci_regs __iomem *regs = ohci->regs; | |
691 | int ints; | |
692 | ||
693 | /* we can eliminate a (slow) ohci_readl() | |
694 | if _only_ WDH caused this irq */ | |
695 | if ((ohci->hcca->done_head != 0) | |
696 | && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head) | |
697 | & 0x01)) { | |
698 | ints = OHCI_INTR_WDH; | |
699 | ||
700 | /* cardbus/... hardware gone before remove() */ | |
701 | } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) { | |
702 | disable (ohci); | |
703 | ohci_dbg (ohci, "device removed!\n"); | |
704 | return IRQ_HANDLED; | |
705 | ||
706 | /* interrupt for some other device? */ | |
707 | } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) { | |
708 | return IRQ_NOTMINE; | |
709 | } | |
710 | ||
711 | if (ints & OHCI_INTR_UE) { | |
712 | disable (ohci); | |
713 | ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); | |
714 | // e.g. due to PCI Master/Target Abort | |
715 | ||
716 | ohci_dump (ohci, 1); | |
717 | ohci_usb_reset (ohci); | |
718 | } | |
719 | ||
720 | if (ints & OHCI_INTR_RD) { | |
721 | ohci_vdbg (ohci, "resume detect\n"); | |
e0fd3cbc | 722 | ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus); |
1da177e4 LT |
723 | if (hcd->state != HC_STATE_QUIESCING) |
724 | schedule_work(&ohci->rh_resume); | |
725 | } | |
726 | ||
727 | if (ints & OHCI_INTR_WDH) { | |
728 | if (HC_IS_RUNNING(hcd->state)) | |
729 | ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable); | |
730 | spin_lock (&ohci->lock); | |
731 | dl_done_list (ohci, ptregs); | |
732 | spin_unlock (&ohci->lock); | |
733 | if (HC_IS_RUNNING(hcd->state)) | |
734 | ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable); | |
735 | } | |
736 | ||
737 | /* could track INTR_SO to reduce available PCI/... bandwidth */ | |
738 | ||
739 | /* handle any pending URB/ED unlinks, leaving INTR_SF enabled | |
740 | * when there's still unlinking to be done (next frame). | |
741 | */ | |
742 | spin_lock (&ohci->lock); | |
743 | if (ohci->ed_rm_list) | |
744 | finish_unlinks (ohci, ohci_frame_no(ohci), ptregs); | |
745 | if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list | |
746 | && HC_IS_RUNNING(hcd->state)) | |
747 | ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable); | |
748 | spin_unlock (&ohci->lock); | |
749 | ||
750 | if (HC_IS_RUNNING(hcd->state)) { | |
751 | ohci_writel (ohci, ints, ®s->intrstatus); | |
752 | ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable); | |
753 | // flush those writes | |
754 | (void) ohci_readl (ohci, &ohci->regs->control); | |
755 | } | |
756 | ||
757 | return IRQ_HANDLED; | |
758 | } | |
759 | ||
760 | /*-------------------------------------------------------------------------*/ | |
761 | ||
762 | static void ohci_stop (struct usb_hcd *hcd) | |
763 | { | |
764 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
765 | ||
766 | ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", | |
767 | hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), | |
768 | hcd->state); | |
769 | ohci_dump (ohci, 1); | |
770 | ||
771 | flush_scheduled_work(); | |
772 | ||
773 | ohci_usb_reset (ohci); | |
774 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | |
775 | ||
776 | remove_debug_files (ohci); | |
f4df0e33 | 777 | unregister_reboot_notifier (&ohci->reboot_notifier); |
1da177e4 LT |
778 | ohci_mem_cleanup (ohci); |
779 | if (ohci->hcca) { | |
780 | dma_free_coherent (hcd->self.controller, | |
781 | sizeof *ohci->hcca, | |
782 | ohci->hcca, ohci->hcca_dma); | |
783 | ohci->hcca = NULL; | |
784 | ohci->hcca_dma = 0; | |
785 | } | |
786 | } | |
787 | ||
788 | /*-------------------------------------------------------------------------*/ | |
789 | ||
790 | /* must not be called from interrupt context */ | |
791 | ||
792 | #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM) | |
793 | ||
794 | static int ohci_restart (struct ohci_hcd *ohci) | |
795 | { | |
796 | int temp; | |
797 | int i; | |
798 | struct urb_priv *priv; | |
799 | struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub; | |
800 | ||
801 | /* mark any devices gone, so they do nothing till khubd disconnects. | |
802 | * recycle any "live" eds/tds (and urbs) right away. | |
803 | * later, khubd disconnect processing will recycle the other state, | |
804 | * (either as disconnect/reconnect, or maybe someday as a reset). | |
805 | */ | |
806 | spin_lock_irq(&ohci->lock); | |
807 | disable (ohci); | |
808 | for (i = 0; i < root->maxchild; i++) { | |
809 | if (root->children [i]) | |
810 | usb_set_device_state (root->children[i], | |
811 | USB_STATE_NOTATTACHED); | |
812 | } | |
813 | if (!list_empty (&ohci->pending)) | |
814 | ohci_dbg(ohci, "abort schedule...\n"); | |
815 | list_for_each_entry (priv, &ohci->pending, pending) { | |
816 | struct urb *urb = priv->td[0]->urb; | |
817 | struct ed *ed = priv->ed; | |
818 | ||
819 | switch (ed->state) { | |
820 | case ED_OPER: | |
821 | ed->state = ED_UNLINK; | |
822 | ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE); | |
823 | ed_deschedule (ohci, ed); | |
824 | ||
825 | ed->ed_next = ohci->ed_rm_list; | |
826 | ed->ed_prev = NULL; | |
827 | ohci->ed_rm_list = ed; | |
828 | /* FALLTHROUGH */ | |
829 | case ED_UNLINK: | |
830 | break; | |
831 | default: | |
832 | ohci_dbg(ohci, "bogus ed %p state %d\n", | |
833 | ed, ed->state); | |
834 | } | |
835 | ||
836 | spin_lock (&urb->lock); | |
837 | urb->status = -ESHUTDOWN; | |
838 | spin_unlock (&urb->lock); | |
839 | } | |
840 | finish_unlinks (ohci, 0, NULL); | |
841 | spin_unlock_irq(&ohci->lock); | |
842 | ||
843 | /* paranoia, in case that didn't work: */ | |
844 | ||
845 | /* empty the interrupt branches */ | |
846 | for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; | |
847 | for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; | |
848 | ||
849 | /* no EDs to remove */ | |
850 | ohci->ed_rm_list = NULL; | |
851 | ||
852 | /* empty control and bulk lists */ | |
853 | ohci->ed_controltail = NULL; | |
854 | ohci->ed_bulktail = NULL; | |
855 | ||
856 | if ((temp = ohci_run (ohci)) < 0) { | |
857 | ohci_err (ohci, "can't restart, %d\n", temp); | |
858 | return temp; | |
859 | } else { | |
860 | /* here we "know" root ports should always stay powered, | |
861 | * and that if we try to turn them back on the root hub | |
862 | * will respond to CSC processing. | |
863 | */ | |
864 | i = roothub_a (ohci) & RH_A_NDP; | |
865 | while (i--) | |
866 | ohci_writel (ohci, RH_PS_PSS, | |
867 | &ohci->regs->roothub.portstatus [temp]); | |
868 | ohci_dbg (ohci, "restart complete\n"); | |
869 | } | |
870 | return 0; | |
871 | } | |
872 | #endif | |
873 | ||
874 | /*-------------------------------------------------------------------------*/ | |
875 | ||
876 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC | |
877 | ||
878 | MODULE_AUTHOR (DRIVER_AUTHOR); | |
879 | MODULE_DESCRIPTION (DRIVER_INFO); | |
880 | MODULE_LICENSE ("GPL"); | |
881 | ||
882 | #ifdef CONFIG_PCI | |
883 | #include "ohci-pci.c" | |
884 | #endif | |
885 | ||
886 | #ifdef CONFIG_SA1111 | |
887 | #include "ohci-sa1111.c" | |
888 | #endif | |
889 | ||
3eb0c5f4 BD |
890 | #ifdef CONFIG_ARCH_S3C2410 |
891 | #include "ohci-s3c2410.c" | |
892 | #endif | |
893 | ||
1da177e4 LT |
894 | #ifdef CONFIG_ARCH_OMAP |
895 | #include "ohci-omap.c" | |
896 | #endif | |
897 | ||
898 | #ifdef CONFIG_ARCH_LH7A404 | |
899 | #include "ohci-lh7a404.c" | |
900 | #endif | |
901 | ||
902 | #ifdef CONFIG_PXA27x | |
903 | #include "ohci-pxa27x.c" | |
904 | #endif | |
905 | ||
906 | #ifdef CONFIG_SOC_AU1X00 | |
907 | #include "ohci-au1xxx.c" | |
908 | #endif | |
909 | ||
910 | #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC | |
911 | #include "ohci-ppc-soc.c" | |
912 | #endif | |
913 | ||
914 | #if !(defined(CONFIG_PCI) \ | |
915 | || defined(CONFIG_SA1111) \ | |
3eb0c5f4 | 916 | || defined(CONFIG_ARCH_S3C2410) \ |
1da177e4 LT |
917 | || defined(CONFIG_ARCH_OMAP) \ |
918 | || defined (CONFIG_ARCH_LH7A404) \ | |
919 | || defined (CONFIG_PXA27x) \ | |
920 | || defined (CONFIG_SOC_AU1X00) \ | |
921 | || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ | |
922 | ) | |
923 | #error "missing bus glue for ohci-hcd" | |
924 | #endif |