Commit | Line | Data |
---|---|---|
60bbfc84 | 1 | /* |
28643104 | 2 | * driver for NXP USB Host devices |
60bbfc84 | 3 | * |
28643104 | 4 | * Currently supported OHCI host devices: |
53dc25ad | 5 | * - NXP LPC32xx |
60bbfc84 VW |
6 | * |
7 | * Authors: Dmitry Chigirev <source@mvista.com> | |
dd9048af | 8 | * Vitaly Wool <vitalywool@gmail.com> |
60bbfc84 VW |
9 | * |
10 | * register initialization is based on code examples provided by Philips | |
11 | * Copyright (c) 2005 Koninklijke Philips Electronics N.V. | |
12 | * | |
13 | * NOTE: This driver does not have suspend/resume functionality | |
14 | * This driver is intended for engineering development purposes only | |
15 | * | |
16 | * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under | |
17 | * the terms of the GNU General Public License version 2. This program | |
18 | * is licensed "as is" without any warranty of any kind, whether express | |
19 | * or implied. | |
20 | */ | |
21 | #include <linux/clk.h> | |
30330b8f MG |
22 | #include <linux/dma-mapping.h> |
23 | #include <linux/io.h> | |
60bbfc84 | 24 | #include <linux/i2c.h> |
30330b8f MG |
25 | #include <linux/kernel.h> |
26 | #include <linux/module.h> | |
2265efea | 27 | #include <linux/of.h> |
30330b8f | 28 | #include <linux/platform_device.h> |
73108aa9 | 29 | #include <linux/usb/isp1301.h> |
30330b8f MG |
30 | #include <linux/usb.h> |
31 | #include <linux/usb/hcd.h> | |
32 | ||
33 | #include "ohci.h" | |
34 | ||
60bbfc84 | 35 | |
a09e64fb | 36 | #include <mach/hardware.h> |
53dc25ad | 37 | #include <asm/mach-types.h> |
60bbfc84 | 38 | #include <asm/io.h> |
60bbfc84 | 39 | |
a09e64fb RK |
40 | #include <mach/platform.h> |
41 | #include <mach/irqs.h> | |
60bbfc84 | 42 | |
53dc25ad RS |
43 | #define USB_CONFIG_BASE 0x31020000 |
44 | #define PWRMAN_BASE 0x40004000 | |
45 | ||
46 | #define USB_CTRL IO_ADDRESS(PWRMAN_BASE + 0x64) | |
60bbfc84 VW |
47 | |
48 | /* USB_CTRL bit defines */ | |
49 | #define USB_SLAVE_HCLK_EN (1 << 24) | |
a6a99cf0 | 50 | #define USB_DEV_NEED_CLK_EN (1 << 22) |
60bbfc84 | 51 | #define USB_HOST_NEED_CLK_EN (1 << 21) |
a6a99cf0 | 52 | #define PAD_CONTROL_LAST_DRIVEN (1 << 19) |
60bbfc84 | 53 | |
53dc25ad | 54 | #define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110) |
60bbfc84 VW |
55 | |
56 | /* USB_OTG_STAT_CONTROL bit defines */ | |
57 | #define TRANSPARENT_I2C_EN (1 << 7) | |
58 | #define HOST_EN (1 << 0) | |
59 | ||
53dc25ad RS |
60 | /* On LPC32xx, those are undefined */ |
61 | #ifndef start_int_set_falling_edge | |
62 | #define start_int_set_falling_edge(irq) | |
63 | #define start_int_set_rising_edge(irq) | |
64 | #define start_int_ack(irq) | |
65 | #define start_int_mask(irq) | |
66 | #define start_int_umask(irq) | |
67 | #endif | |
68 | ||
30330b8f MG |
69 | #define DRIVER_DESC "OHCI NXP driver" |
70 | ||
71 | static const char hcd_name[] = "ohci-nxp"; | |
72 | static struct hc_driver __read_mostly ohci_nxp_hc_driver; | |
73 | ||
09ce497e | 74 | static struct i2c_client *isp1301_i2c_client; |
60bbfc84 VW |
75 | |
76 | extern int usb_disabled(void); | |
60bbfc84 | 77 | |
78091dc2 APS |
78 | static struct clk *usb_pll_clk; |
79 | static struct clk *usb_dev_clk; | |
80 | static struct clk *usb_otg_clk; | |
60bbfc84 | 81 | |
53dc25ad RS |
82 | static void isp1301_configure_lpc32xx(void) |
83 | { | |
84 | /* LPC32XX only supports DAT_SE0 USB mode */ | |
85 | /* This sequence is important */ | |
86 | ||
87 | /* Disable transparent UART mode first */ | |
88 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
89 | (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), | |
90 | MC1_UART_EN); | |
91 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
92 | (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), | |
93 | ~MC1_SPEED_REG); | |
94 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
95 | ISP1301_I2C_MODE_CONTROL_1, MC1_SPEED_REG); | |
96 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
97 | (ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR), | |
98 | ~0); | |
99 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
100 | ISP1301_I2C_MODE_CONTROL_2, | |
101 | (MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL)); | |
102 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
103 | (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), ~0); | |
104 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
105 | ISP1301_I2C_MODE_CONTROL_1, MC1_DAT_SE0); | |
106 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
107 | ISP1301_I2C_OTG_CONTROL_1, | |
108 | (OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN)); | |
109 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
110 | (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), | |
111 | (OTG1_DM_PULLUP | OTG1_DP_PULLUP)); | |
112 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
113 | ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR, ~0); | |
114 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
115 | ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR, | |
116 | ~0); | |
117 | i2c_smbus_write_byte_data(isp1301_i2c_client, | |
118 | ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0); | |
119 | ||
120 | /* Enable usb_need_clk clock after transceiver is initialized */ | |
a6a99cf0 | 121 | __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL); |
53dc25ad RS |
122 | |
123 | printk(KERN_INFO "ISP1301 Vendor ID : 0x%04x\n", | |
124 | i2c_smbus_read_word_data(isp1301_i2c_client, 0x00)); | |
125 | printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n", | |
126 | i2c_smbus_read_word_data(isp1301_i2c_client, 0x02)); | |
127 | printk(KERN_INFO "ISP1301 Version ID : 0x%04x\n", | |
128 | i2c_smbus_read_word_data(isp1301_i2c_client, 0x14)); | |
129 | } | |
130 | ||
131 | static void isp1301_configure(void) | |
132 | { | |
d684f05f | 133 | isp1301_configure_lpc32xx(); |
60bbfc84 VW |
134 | } |
135 | ||
136 | static inline void isp1301_vbus_on(void) | |
137 | { | |
a6a36008 RS |
138 | i2c_smbus_write_byte_data(isp1301_i2c_client, ISP1301_I2C_OTG_CONTROL_1, |
139 | OTG1_VBUS_DRV); | |
60bbfc84 VW |
140 | } |
141 | ||
142 | static inline void isp1301_vbus_off(void) | |
143 | { | |
a6a36008 RS |
144 | i2c_smbus_write_byte_data(isp1301_i2c_client, |
145 | ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR, | |
146 | OTG1_VBUS_DRV); | |
60bbfc84 VW |
147 | } |
148 | ||
30330b8f | 149 | static void ohci_nxp_start_hc(void) |
60bbfc84 VW |
150 | { |
151 | unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN; | |
152 | __raw_writel(tmp, USB_OTG_STAT_CONTROL); | |
153 | isp1301_vbus_on(); | |
154 | } | |
155 | ||
30330b8f | 156 | static void ohci_nxp_stop_hc(void) |
60bbfc84 VW |
157 | { |
158 | unsigned long tmp; | |
159 | isp1301_vbus_off(); | |
160 | tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN; | |
161 | __raw_writel(tmp, USB_OTG_STAT_CONTROL); | |
162 | } | |
163 | ||
30330b8f | 164 | static int ohci_hcd_nxp_probe(struct platform_device *pdev) |
60bbfc84 VW |
165 | { |
166 | struct usb_hcd *hcd = 0; | |
28643104 | 167 | const struct hc_driver *driver = &ohci_nxp_hc_driver; |
a6a99cf0 | 168 | struct resource *res; |
60bbfc84 | 169 | int ret = 0, irq; |
73108aa9 RS |
170 | struct device_node *isp1301_node; |
171 | ||
172 | if (pdev->dev.of_node) { | |
173 | isp1301_node = of_parse_phandle(pdev->dev.of_node, | |
174 | "transceiver", 0); | |
175 | } else { | |
176 | isp1301_node = NULL; | |
177 | } | |
178 | ||
179 | isp1301_i2c_client = isp1301_get_client(isp1301_node); | |
180 | if (!isp1301_i2c_client) { | |
b3517d5d | 181 | return -EPROBE_DEFER; |
73108aa9 | 182 | } |
60bbfc84 | 183 | |
e1fd7341 | 184 | ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
22d9d8e8 RK |
185 | if (ret) |
186 | goto fail_disable; | |
a6a99cf0 | 187 | |
28643104 | 188 | dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (nxp)\n", hcd_name); |
60bbfc84 | 189 | if (usb_disabled()) { |
b6c227ed | 190 | dev_err(&pdev->dev, "USB is disabled\n"); |
60bbfc84 | 191 | ret = -ENODEV; |
b3517d5d | 192 | goto fail_disable; |
60bbfc84 VW |
193 | } |
194 | ||
60bbfc84 | 195 | /* Enable AHB slave USB clock, needed for further USB clock control */ |
a6a99cf0 | 196 | __raw_writel(USB_SLAVE_HCLK_EN | PAD_CONTROL_LAST_DRIVEN, USB_CTRL); |
60bbfc84 | 197 | |
60bbfc84 | 198 | /* Enable USB PLL */ |
ac8d81f3 | 199 | usb_pll_clk = devm_clk_get(&pdev->dev, "ck_pll5"); |
78091dc2 | 200 | if (IS_ERR(usb_pll_clk)) { |
b6c227ed | 201 | dev_err(&pdev->dev, "failed to acquire USB PLL\n"); |
78091dc2 | 202 | ret = PTR_ERR(usb_pll_clk); |
ac8d81f3 | 203 | goto fail_disable; |
60bbfc84 VW |
204 | } |
205 | ||
9ae79876 | 206 | ret = clk_prepare_enable(usb_pll_clk); |
60bbfc84 | 207 | if (ret < 0) { |
b6c227ed | 208 | dev_err(&pdev->dev, "failed to start USB PLL\n"); |
ac8d81f3 | 209 | goto fail_disable; |
60bbfc84 VW |
210 | } |
211 | ||
78091dc2 | 212 | ret = clk_set_rate(usb_pll_clk, 48000); |
60bbfc84 | 213 | if (ret < 0) { |
b6c227ed | 214 | dev_err(&pdev->dev, "failed to set USB clock rate\n"); |
b3517d5d | 215 | goto fail_rate; |
60bbfc84 VW |
216 | } |
217 | ||
78091dc2 | 218 | /* Enable USB device clock */ |
ac8d81f3 | 219 | usb_dev_clk = devm_clk_get(&pdev->dev, "ck_usbd"); |
78091dc2 APS |
220 | if (IS_ERR(usb_dev_clk)) { |
221 | dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n"); | |
222 | ret = PTR_ERR(usb_dev_clk); | |
ac8d81f3 | 223 | goto fail_rate; |
78091dc2 APS |
224 | } |
225 | ||
9ae79876 | 226 | ret = clk_prepare_enable(usb_dev_clk); |
78091dc2 APS |
227 | if (ret < 0) { |
228 | dev_err(&pdev->dev, "failed to start USB DEV Clock\n"); | |
ac8d81f3 | 229 | goto fail_rate; |
78091dc2 APS |
230 | } |
231 | ||
232 | /* Enable USB otg clocks */ | |
ac8d81f3 | 233 | usb_otg_clk = devm_clk_get(&pdev->dev, "ck_usb_otg"); |
78091dc2 APS |
234 | if (IS_ERR(usb_otg_clk)) { |
235 | dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n"); | |
2ec15a6f | 236 | ret = PTR_ERR(usb_otg_clk); |
b3517d5d | 237 | goto fail_otg; |
78091dc2 APS |
238 | } |
239 | ||
60bbfc84 VW |
240 | __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL); |
241 | ||
9ae79876 | 242 | ret = clk_prepare_enable(usb_otg_clk); |
78091dc2 APS |
243 | if (ret < 0) { |
244 | dev_err(&pdev->dev, "failed to start USB DEV Clock\n"); | |
ac8d81f3 | 245 | goto fail_otg; |
78091dc2 | 246 | } |
60bbfc84 | 247 | |
78091dc2 | 248 | isp1301_configure(); |
60bbfc84 | 249 | |
a6a99cf0 | 250 | hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); |
60bbfc84 | 251 | if (!hcd) { |
b6c227ed | 252 | dev_err(&pdev->dev, "Failed to allocate HC buffer\n"); |
60bbfc84 | 253 | ret = -ENOMEM; |
b3517d5d | 254 | goto fail_hcd; |
60bbfc84 VW |
255 | } |
256 | ||
a6a99cf0 | 257 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
148e1134 TR |
258 | hcd->regs = devm_ioremap_resource(&pdev->dev, res); |
259 | if (IS_ERR(hcd->regs)) { | |
260 | ret = PTR_ERR(hcd->regs); | |
b3517d5d | 261 | goto fail_resource; |
60bbfc84 | 262 | } |
a6a99cf0 RS |
263 | hcd->rsrc_start = res->start; |
264 | hcd->rsrc_len = resource_size(res); | |
60bbfc84 VW |
265 | |
266 | irq = platform_get_irq(pdev, 0); | |
267 | if (irq < 0) { | |
268 | ret = -ENXIO; | |
b3517d5d | 269 | goto fail_resource; |
60bbfc84 VW |
270 | } |
271 | ||
30330b8f | 272 | ohci_nxp_start_hc(); |
60bbfc84 | 273 | platform_set_drvdata(pdev, hcd); |
60bbfc84 VW |
274 | |
275 | dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq); | |
b5dd18d8 | 276 | ret = usb_add_hcd(hcd, irq, 0); |
3c9740a1 PC |
277 | if (ret == 0) { |
278 | device_wakeup_enable(hcd->self.controller); | |
60bbfc84 | 279 | return ret; |
3c9740a1 | 280 | } |
60bbfc84 | 281 | |
30330b8f | 282 | ohci_nxp_stop_hc(); |
b3517d5d | 283 | fail_resource: |
60bbfc84 | 284 | usb_put_hcd(hcd); |
b3517d5d | 285 | fail_hcd: |
9ae79876 | 286 | clk_disable_unprepare(usb_otg_clk); |
b3517d5d | 287 | fail_otg: |
9ae79876 | 288 | clk_disable_unprepare(usb_dev_clk); |
b3517d5d | 289 | fail_rate: |
9ae79876 | 290 | clk_disable_unprepare(usb_pll_clk); |
b3517d5d | 291 | fail_disable: |
3a407e73 | 292 | isp1301_i2c_client = NULL; |
60bbfc84 VW |
293 | return ret; |
294 | } | |
295 | ||
30330b8f | 296 | static int ohci_hcd_nxp_remove(struct platform_device *pdev) |
60bbfc84 VW |
297 | { |
298 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | |
299 | ||
300 | usb_remove_hcd(hcd); | |
30330b8f | 301 | ohci_nxp_stop_hc(); |
60bbfc84 | 302 | usb_put_hcd(hcd); |
b1a0c423 | 303 | clk_disable_unprepare(usb_otg_clk); |
9ae79876 | 304 | clk_disable_unprepare(usb_dev_clk); |
b1a0c423 | 305 | clk_disable_unprepare(usb_pll_clk); |
3a407e73 | 306 | isp1301_i2c_client = NULL; |
60bbfc84 | 307 | |
60bbfc84 VW |
308 | return 0; |
309 | } | |
310 | ||
f4fce61d KS |
311 | /* work with hotplug and coldplug */ |
312 | MODULE_ALIAS("platform:usb-ohci"); | |
313 | ||
2265efea | 314 | #ifdef CONFIG_OF |
30330b8f | 315 | static const struct of_device_id ohci_hcd_nxp_match[] = { |
2265efea RS |
316 | { .compatible = "nxp,ohci-nxp" }, |
317 | {}, | |
318 | }; | |
30330b8f | 319 | MODULE_DEVICE_TABLE(of, ohci_hcd_nxp_match); |
2265efea RS |
320 | #endif |
321 | ||
30330b8f | 322 | static struct platform_driver ohci_hcd_nxp_driver = { |
60bbfc84 VW |
323 | .driver = { |
324 | .name = "usb-ohci", | |
30330b8f | 325 | .of_match_table = of_match_ptr(ohci_hcd_nxp_match), |
60bbfc84 | 326 | }, |
30330b8f MG |
327 | .probe = ohci_hcd_nxp_probe, |
328 | .remove = ohci_hcd_nxp_remove, | |
60bbfc84 VW |
329 | }; |
330 | ||
30330b8f MG |
331 | static int __init ohci_nxp_init(void) |
332 | { | |
333 | if (usb_disabled()) | |
334 | return -ENODEV; | |
335 | ||
336 | pr_info("%s: " DRIVER_DESC "\n", hcd_name); | |
337 | ||
338 | ohci_init_driver(&ohci_nxp_hc_driver, NULL); | |
339 | return platform_driver_register(&ohci_hcd_nxp_driver); | |
340 | } | |
341 | module_init(ohci_nxp_init); | |
342 | ||
343 | static void __exit ohci_nxp_cleanup(void) | |
344 | { | |
345 | platform_driver_unregister(&ohci_hcd_nxp_driver); | |
346 | } | |
347 | module_exit(ohci_nxp_cleanup); | |
348 | ||
349 | MODULE_DESCRIPTION(DRIVER_DESC); | |
350 | MODULE_LICENSE("GPL v2"); |