Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
bd35078f | 7 | * |
1da177e4 LT |
8 | * OMAP Bus Glue |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
b5dd18d8 | 17 | #include <linux/signal.h> |
4e57b681 | 18 | #include <linux/jiffies.h> |
d052d1be | 19 | #include <linux/platform_device.h> |
f8ce2547 | 20 | #include <linux/clk.h> |
ded017ee | 21 | #include <linux/err.h> |
944e1bff | 22 | #include <linux/gpio.h> |
4e57b681 | 23 | |
1da177e4 LT |
24 | #include <asm/io.h> |
25 | #include <asm/mach-types.h> | |
26 | ||
70c494c3 | 27 | #include <mach/mux.h> |
ce491cf8 | 28 | #include <plat/fpga.h> |
b924b204 TL |
29 | |
30 | #include <mach/hardware.h> | |
31 | #include <mach/irqs.h> | |
32 | #include <mach/usb.h> | |
1da177e4 LT |
33 | |
34 | ||
35 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
36 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
37 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
38 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
39 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
40 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
41 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
42 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
43 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
44 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
45 | ||
46 | ||
47 | #ifndef CONFIG_ARCH_OMAP | |
48 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
49 | #endif | |
50 | ||
51 | #ifdef CONFIG_TPS65010 | |
6d16bfb5 | 52 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
53 | #else |
54 | ||
55 | #define LOW 0 | |
56 | #define HIGH 1 | |
57 | ||
58 | #define GPIO1 1 | |
59 | ||
60 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
61 | { | |
62 | return 0; | |
63 | } | |
64 | ||
65 | #endif | |
66 | ||
67 | extern int usb_disabled(void); | |
68 | extern int ocpi_enable(void); | |
69 | ||
70 | static struct clk *usb_host_ck; | |
bd35078f DB |
71 | static struct clk *usb_dc_ck; |
72 | static int host_enabled; | |
73 | static int host_initialized; | |
1da177e4 LT |
74 | |
75 | static void omap_ohci_clock_power(int on) | |
76 | { | |
77 | if (on) { | |
bd35078f | 78 | clk_enable(usb_dc_ck); |
1da177e4 LT |
79 | clk_enable(usb_host_ck); |
80 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
81 | udelay(100); | |
82 | } else { | |
83 | clk_disable(usb_host_ck); | |
bd35078f | 84 | clk_disable(usb_dc_ck); |
1da177e4 LT |
85 | } |
86 | } | |
87 | ||
88 | /* | |
89 | * Board specific gang-switched transceiver power on/off. | |
90 | * NOTE: OSK supplies power from DC, not battery. | |
91 | */ | |
92 | static int omap_ohci_transceiver_power(int on) | |
93 | { | |
94 | if (on) { | |
95 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
96 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 97 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
98 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
99 | else if (machine_is_omap_osk()) | |
100 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
101 | } else { | |
102 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
103 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 104 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
105 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
106 | else if (machine_is_omap_osk()) | |
107 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
108 | } | |
109 | ||
110 | return 0; | |
111 | } | |
112 | ||
bd35078f | 113 | #ifdef CONFIG_ARCH_OMAP15XX |
1da177e4 LT |
114 | /* |
115 | * OMAP-1510 specific Local Bus clock on/off | |
116 | */ | |
117 | static int omap_1510_local_bus_power(int on) | |
118 | { | |
119 | if (on) { | |
120 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
121 | udelay(200); | |
122 | } else { | |
123 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
124 | } | |
125 | ||
126 | return 0; | |
127 | } | |
128 | ||
129 | /* | |
130 | * OMAP-1510 specific Local Bus initialization | |
131 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
bd35078f DB |
132 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
133 | * __dma_to_virt() which need to match with the physical | |
1da177e4 LT |
134 | * Local Bus address below. |
135 | */ | |
136 | static int omap_1510_local_bus_init(void) | |
137 | { | |
138 | unsigned int tlb; | |
139 | unsigned long lbaddr, physaddr; | |
140 | ||
bd35078f | 141 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
1da177e4 LT |
142 | OMAP1510_LB_CLOCK_DIV); |
143 | ||
144 | /* Configure the Local Bus MMU table */ | |
145 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
146 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
147 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
148 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
bd35078f | 149 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
1da177e4 LT |
150 | OMAP1510_LB_MMU_CAM_L); |
151 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
152 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
153 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
154 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
155 | } | |
156 | ||
157 | /* Enable the walking table */ | |
158 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
159 | udelay(200); | |
160 | ||
161 | return 0; | |
162 | } | |
bd35078f DB |
163 | #else |
164 | #define omap_1510_local_bus_power(x) {} | |
165 | #define omap_1510_local_bus_init() {} | |
166 | #endif | |
1da177e4 LT |
167 | |
168 | #ifdef CONFIG_USB_OTG | |
169 | ||
170 | static void start_hnp(struct ohci_hcd *ohci) | |
171 | { | |
c2e935a7 RZ |
172 | struct usb_hcd *hcd = ohci_to_hcd(ohci); |
173 | const unsigned port = hcd->self.otg_port - 1; | |
1da177e4 | 174 | unsigned long flags; |
f35ae634 | 175 | u32 l; |
1da177e4 | 176 | |
c2e935a7 | 177 | otg_start_hnp(hcd->phy->otg); |
1da177e4 LT |
178 | |
179 | local_irq_save(flags); | |
c2e935a7 | 180 | hcd->phy->state = OTG_STATE_A_SUSPEND; |
1da177e4 | 181 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); |
f35ae634 TL |
182 | l = omap_readl(OTG_CTRL); |
183 | l &= ~OTG_A_BUSREQ; | |
184 | omap_writel(l, OTG_CTRL); | |
1da177e4 LT |
185 | local_irq_restore(flags); |
186 | } | |
187 | ||
188 | #endif | |
189 | ||
190 | /*-------------------------------------------------------------------------*/ | |
191 | ||
bd35078f | 192 | static int ohci_omap_init(struct usb_hcd *hcd) |
1da177e4 | 193 | { |
bd35078f DB |
194 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
195 | struct omap_usb_config *config = hcd->self.controller->platform_data; | |
1da177e4 LT |
196 | int need_transceiver = (config->otg != 0); |
197 | int ret; | |
198 | ||
bd35078f | 199 | dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
1da177e4 LT |
200 | |
201 | if (config->otg) { | |
202 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
203 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 204 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
205 | } |
206 | ||
207 | /* boards can use OTG transceivers in non-OTG modes */ | |
208 | need_transceiver = need_transceiver | |
209 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
210 | ||
d3645d39 PW |
211 | /* XXX OMAP16xx only */ |
212 | if (config->ocpi_enable) | |
213 | config->ocpi_enable(); | |
1da177e4 | 214 | |
c3df1a26 | 215 | #ifdef CONFIG_USB_OTG |
1da177e4 | 216 | if (need_transceiver) { |
ff9cce82 GKH |
217 | hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2); |
218 | if (!IS_ERR_OR_NULL(hcd->phy)) { | |
c2e935a7 | 219 | int status = otg_set_host(hcd->phy->otg, |
1da177e4 | 220 | &ohci_to_hcd(ohci)->self); |
c2e935a7 RZ |
221 | dev_dbg(hcd->self.controller, "init %s phy, status %d\n", |
222 | hcd->phy->label, status); | |
1da177e4 | 223 | if (status) { |
ff9cce82 | 224 | usb_put_phy(hcd->phy); |
1da177e4 LT |
225 | return status; |
226 | } | |
227 | } else { | |
c2e935a7 | 228 | dev_err(hcd->self.controller, "can't find phy\n"); |
1da177e4 LT |
229 | return -ENODEV; |
230 | } | |
e8b24450 | 231 | ohci->start_hnp = start_hnp; |
1da177e4 LT |
232 | } |
233 | #endif | |
234 | ||
235 | omap_ohci_clock_power(1); | |
236 | ||
9b466c3b | 237 | if (cpu_is_omap15xx()) { |
1da177e4 LT |
238 | omap_1510_local_bus_power(1); |
239 | omap_1510_local_bus_init(); | |
240 | } | |
241 | ||
242 | if ((ret = ohci_init(ohci)) < 0) | |
243 | return ret; | |
244 | ||
245 | /* board-specific power switching and overcurrent support */ | |
246 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
247 | u32 rh = roothub_a (ohci); | |
248 | ||
249 | /* power switching (ganged by default) */ | |
250 | rh &= ~RH_A_NPS; | |
251 | ||
252 | /* TPS2045 switch for internal transceiver (port 1) */ | |
253 | if (machine_is_omap_osk()) { | |
bc96c0ad | 254 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
255 | |
256 | rh &= ~RH_A_NOCP; | |
257 | ||
258 | /* gpio9 for overcurrent detction */ | |
259 | omap_cfg_reg(W8_1610_GPIO9); | |
944e1bff | 260 | gpio_request(9, "OHCI overcurrent"); |
40e3925b | 261 | gpio_direction_input(9); |
1da177e4 LT |
262 | |
263 | /* for paranoia's sake: disable USB.PUEN */ | |
264 | omap_cfg_reg(W4_USB_HIGHZ); | |
265 | } | |
266 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
1133cd8a | 267 | ohci->flags &= ~OHCI_QUIRK_HUB_POWER; |
bd35078f DB |
268 | } else if (machine_is_nokia770()) { |
269 | /* We require a self-powered hub, which should have | |
270 | * plenty of power. */ | |
271 | ohci_to_hcd(ohci)->power_budget = 0; | |
1da177e4 LT |
272 | } |
273 | ||
274 | /* FIXME khubd hub requests should manage power switching */ | |
275 | omap_ohci_transceiver_power(1); | |
276 | ||
277 | /* board init will have already handled HMC and mux setup. | |
278 | * any external transceiver should already be initialized | |
279 | * too, so all configured ports use the right signaling now. | |
280 | */ | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
bd35078f | 285 | static void ohci_omap_stop(struct usb_hcd *hcd) |
1da177e4 | 286 | { |
bd35078f | 287 | dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
715bfc22 | 288 | ohci_stop(hcd); |
1da177e4 LT |
289 | omap_ohci_clock_power(0); |
290 | } | |
291 | ||
292 | ||
293 | /*-------------------------------------------------------------------------*/ | |
294 | ||
1da177e4 LT |
295 | /** |
296 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
297 | * Context: !in_interrupt() | |
298 | * | |
299 | * Allocates basic resources for this USB host controller, and | |
300 | * then invokes the start() method for the HCD associated with it | |
301 | * through the hotplug entry's driver_data. | |
302 | */ | |
bd35078f | 303 | static int usb_hcd_omap_probe (const struct hc_driver *driver, |
1da177e4 LT |
304 | struct platform_device *pdev) |
305 | { | |
48944738 | 306 | int retval, irq; |
1da177e4 LT |
307 | struct usb_hcd *hcd = 0; |
308 | struct ohci_hcd *ohci; | |
309 | ||
310 | if (pdev->num_resources != 2) { | |
bd35078f | 311 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", |
1da177e4 LT |
312 | pdev->num_resources); |
313 | return -ENODEV; | |
314 | } | |
315 | ||
bd35078f | 316 | if (pdev->resource[0].flags != IORESOURCE_MEM |
1da177e4 LT |
317 | || pdev->resource[1].flags != IORESOURCE_IRQ) { |
318 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
319 | return -ENODEV; | |
320 | } | |
321 | ||
953a7e84 | 322 | usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
1da177e4 LT |
323 | if (IS_ERR(usb_host_ck)) |
324 | return PTR_ERR(usb_host_ck); | |
325 | ||
9b466c3b | 326 | if (!cpu_is_omap15xx()) |
953a7e84 | 327 | usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
bd35078f | 328 | else |
953a7e84 | 329 | usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
bd35078f DB |
330 | |
331 | if (IS_ERR(usb_dc_ck)) { | |
332 | clk_put(usb_host_ck); | |
333 | return PTR_ERR(usb_dc_ck); | |
334 | } | |
335 | ||
336 | ||
7071a3ce | 337 | hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev)); |
1da177e4 LT |
338 | if (!hcd) { |
339 | retval = -ENOMEM; | |
340 | goto err0; | |
341 | } | |
342 | hcd->rsrc_start = pdev->resource[0].start; | |
343 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
344 | ||
345 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
346 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
347 | retval = -EBUSY; | |
348 | goto err1; | |
349 | } | |
350 | ||
55c381e4 RK |
351 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
352 | if (!hcd->regs) { | |
353 | dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); | |
354 | retval = -ENOMEM; | |
355 | goto err2; | |
356 | } | |
1da177e4 LT |
357 | |
358 | ohci = hcd_to_ohci(hcd); | |
359 | ohci_hcd_init(ohci); | |
360 | ||
bd35078f DB |
361 | host_initialized = 0; |
362 | host_enabled = 1; | |
1da177e4 | 363 | |
48944738 DV |
364 | irq = platform_get_irq(pdev, 0); |
365 | if (irq < 0) { | |
366 | retval = -ENXIO; | |
55c381e4 | 367 | goto err3; |
48944738 | 368 | } |
b5dd18d8 | 369 | retval = usb_add_hcd(hcd, irq, 0); |
bd35078f | 370 | if (retval) |
55c381e4 | 371 | goto err3; |
bd35078f DB |
372 | |
373 | host_initialized = 1; | |
374 | ||
375 | if (!host_enabled) | |
376 | omap_ohci_clock_power(0); | |
1da177e4 | 377 | |
bd35078f | 378 | return 0; |
55c381e4 RK |
379 | err3: |
380 | iounmap(hcd->regs); | |
1da177e4 LT |
381 | err2: |
382 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
383 | err1: | |
384 | usb_put_hcd(hcd); | |
385 | err0: | |
bd35078f | 386 | clk_put(usb_dc_ck); |
1da177e4 LT |
387 | clk_put(usb_host_ck); |
388 | return retval; | |
389 | } | |
390 | ||
391 | ||
392 | /* may be called with controller, bus, and devices active */ | |
393 | ||
394 | /** | |
395 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
396 | * @dev: USB Host Controller being removed | |
397 | * Context: !in_interrupt() | |
398 | * | |
399 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
400 | * the HCD's stop() method. It is always called from a thread | |
401 | * context, normally "rmmod", "apmd", or something similar. | |
1da177e4 | 402 | */ |
bd35078f DB |
403 | static inline void |
404 | usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
1da177e4 LT |
405 | { |
406 | usb_remove_hcd(hcd); | |
ff9cce82 | 407 | if (!IS_ERR_OR_NULL(hcd->phy)) { |
c2e935a7 | 408 | (void) otg_set_host(hcd->phy->otg, 0); |
ff9cce82 | 409 | usb_put_phy(hcd->phy); |
bd35078f | 410 | } |
1da177e4 | 411 | if (machine_is_omap_osk()) |
944e1bff | 412 | gpio_free(9); |
55c381e4 | 413 | iounmap(hcd->regs); |
1da177e4 LT |
414 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
415 | usb_put_hcd(hcd); | |
bd35078f | 416 | clk_put(usb_dc_ck); |
1da177e4 LT |
417 | clk_put(usb_host_ck); |
418 | } | |
419 | ||
420 | /*-------------------------------------------------------------------------*/ | |
421 | ||
bd35078f | 422 | static int |
1da177e4 LT |
423 | ohci_omap_start (struct usb_hcd *hcd) |
424 | { | |
425 | struct omap_usb_config *config; | |
426 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
427 | int ret; | |
428 | ||
bd35078f DB |
429 | if (!host_enabled) |
430 | return 0; | |
1da177e4 | 431 | config = hcd->self.controller->platform_data; |
d413984a DB |
432 | if (config->otg || config->rwc) { |
433 | ohci->hc_control = OHCI_CTRL_RWC; | |
1da177e4 | 434 | writel(OHCI_CTRL_RWC, &ohci->regs->control); |
d413984a | 435 | } |
1da177e4 LT |
436 | |
437 | if ((ret = ohci_run (ohci)) < 0) { | |
438 | dev_err(hcd->self.controller, "can't start\n"); | |
439 | ohci_stop (hcd); | |
440 | return ret; | |
441 | } | |
442 | return 0; | |
443 | } | |
444 | ||
445 | /*-------------------------------------------------------------------------*/ | |
446 | ||
447 | static const struct hc_driver ohci_omap_hc_driver = { | |
448 | .description = hcd_name, | |
449 | .product_desc = "OMAP OHCI", | |
450 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
451 | ||
452 | /* | |
453 | * generic hardware linkage | |
454 | */ | |
455 | .irq = ohci_irq, | |
456 | .flags = HCD_USB11 | HCD_MEMORY, | |
457 | ||
458 | /* | |
459 | * basic lifecycle operations | |
460 | */ | |
bd35078f | 461 | .reset = ohci_omap_init, |
1da177e4 | 462 | .start = ohci_omap_start, |
bd35078f | 463 | .stop = ohci_omap_stop, |
dd9048af | 464 | .shutdown = ohci_shutdown, |
1da177e4 LT |
465 | |
466 | /* | |
467 | * managing i/o requests and associated device resources | |
468 | */ | |
469 | .urb_enqueue = ohci_urb_enqueue, | |
470 | .urb_dequeue = ohci_urb_dequeue, | |
471 | .endpoint_disable = ohci_endpoint_disable, | |
472 | ||
473 | /* | |
474 | * scheduling support | |
475 | */ | |
476 | .get_frame_number = ohci_get_frame, | |
477 | ||
478 | /* | |
479 | * root hub support | |
480 | */ | |
481 | .hub_status_data = ohci_hub_status_data, | |
482 | .hub_control = ohci_hub_control, | |
8ad7fe16 | 483 | #ifdef CONFIG_PM |
0c0382e3 AS |
484 | .bus_suspend = ohci_bus_suspend, |
485 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
486 | #endif |
487 | .start_port_reset = ohci_start_port_reset, | |
488 | }; | |
489 | ||
490 | /*-------------------------------------------------------------------------*/ | |
491 | ||
3ae5eaec | 492 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 493 | { |
3ae5eaec | 494 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
495 | } |
496 | ||
3ae5eaec | 497 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 498 | { |
3ae5eaec | 499 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 500 | |
3ae5eaec | 501 | usb_hcd_omap_remove(hcd, dev); |
3ae5eaec | 502 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
503 | |
504 | return 0; | |
505 | } | |
506 | ||
507 | /*-------------------------------------------------------------------------*/ | |
508 | ||
509 | #ifdef CONFIG_PM | |
510 | ||
3ae5eaec | 511 | static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message) |
1da177e4 | 512 | { |
3ae5eaec | 513 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
f197b2c5 DB |
514 | |
515 | if (time_before(jiffies, ohci->next_statechange)) | |
516 | msleep(5); | |
517 | ohci->next_statechange = jiffies; | |
518 | ||
519 | omap_ohci_clock_power(0); | |
f197b2c5 | 520 | return 0; |
1da177e4 LT |
521 | } |
522 | ||
3ae5eaec | 523 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 524 | { |
43bbb7e0 AS |
525 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
526 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
1da177e4 | 527 | |
b404a5b0 | 528 | if (time_before(jiffies, ohci->next_statechange)) |
529 | msleep(5); | |
530 | ohci->next_statechange = jiffies; | |
f197b2c5 | 531 | |
b404a5b0 | 532 | omap_ohci_clock_power(1); |
43bbb7e0 | 533 | ohci_finish_controller_resume(hcd); |
f197b2c5 | 534 | return 0; |
1da177e4 LT |
535 | } |
536 | ||
537 | #endif | |
538 | ||
539 | /*-------------------------------------------------------------------------*/ | |
540 | ||
541 | /* | |
542 | * Driver definition to register with the OMAP bus | |
543 | */ | |
3ae5eaec | 544 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
545 | .probe = ohci_hcd_omap_drv_probe, |
546 | .remove = ohci_hcd_omap_drv_remove, | |
dd9048af | 547 | .shutdown = usb_hcd_platform_shutdown, |
1da177e4 LT |
548 | #ifdef CONFIG_PM |
549 | .suspend = ohci_omap_suspend, | |
550 | .resume = ohci_omap_resume, | |
551 | #endif | |
3ae5eaec RK |
552 | .driver = { |
553 | .owner = THIS_MODULE, | |
554 | .name = "ohci", | |
555 | }, | |
1da177e4 LT |
556 | }; |
557 | ||
f4fce61d | 558 | MODULE_ALIAS("platform:ohci"); |