Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
7 | * | |
8 | * OMAP Bus Glue | |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
4e57b681 TS |
17 | #include <linux/signal.h> /* SA_INTERRUPT */ |
18 | #include <linux/jiffies.h> | |
d052d1be | 19 | #include <linux/platform_device.h> |
4e57b681 | 20 | |
1da177e4 LT |
21 | #include <asm/hardware.h> |
22 | #include <asm/io.h> | |
23 | #include <asm/mach-types.h> | |
24 | ||
1da177e4 LT |
25 | #include <asm/arch/mux.h> |
26 | #include <asm/arch/irqs.h> | |
27 | #include <asm/arch/gpio.h> | |
28 | #include <asm/arch/fpga.h> | |
29 | #include <asm/arch/usb.h> | |
30 | #include <asm/hardware/clock.h> | |
31 | ||
32 | ||
33 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
34 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
35 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
36 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
37 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
38 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
39 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
40 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
41 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
42 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
43 | ||
44 | ||
45 | #ifndef CONFIG_ARCH_OMAP | |
46 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
47 | #endif | |
48 | ||
49 | #ifdef CONFIG_TPS65010 | |
50 | #include <asm/arch/tps65010.h> | |
51 | #else | |
52 | ||
53 | #define LOW 0 | |
54 | #define HIGH 1 | |
55 | ||
56 | #define GPIO1 1 | |
57 | ||
58 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
59 | { | |
60 | return 0; | |
61 | } | |
62 | ||
63 | #endif | |
64 | ||
65 | extern int usb_disabled(void); | |
66 | extern int ocpi_enable(void); | |
67 | ||
68 | static struct clk *usb_host_ck; | |
69 | ||
70 | static void omap_ohci_clock_power(int on) | |
71 | { | |
72 | if (on) { | |
73 | clk_enable(usb_host_ck); | |
74 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
75 | udelay(100); | |
76 | } else { | |
77 | clk_disable(usb_host_ck); | |
78 | } | |
79 | } | |
80 | ||
81 | /* | |
82 | * Board specific gang-switched transceiver power on/off. | |
83 | * NOTE: OSK supplies power from DC, not battery. | |
84 | */ | |
85 | static int omap_ohci_transceiver_power(int on) | |
86 | { | |
87 | if (on) { | |
88 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
89 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
90 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), | |
91 | INNOVATOR_FPGA_CAM_USB_CONTROL); | |
92 | else if (machine_is_omap_osk()) | |
93 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
94 | } else { | |
95 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
96 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
97 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), | |
98 | INNOVATOR_FPGA_CAM_USB_CONTROL); | |
99 | else if (machine_is_omap_osk()) | |
100 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
101 | } | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | /* | |
107 | * OMAP-1510 specific Local Bus clock on/off | |
108 | */ | |
109 | static int omap_1510_local_bus_power(int on) | |
110 | { | |
111 | if (on) { | |
112 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
113 | udelay(200); | |
114 | } else { | |
115 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
116 | } | |
117 | ||
118 | return 0; | |
119 | } | |
120 | ||
121 | /* | |
122 | * OMAP-1510 specific Local Bus initialization | |
123 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
124 | * See also arch/mach-omap/memory.h for __virt_to_dma() and | |
125 | * __dma_to_virt() which need to match with the physical | |
126 | * Local Bus address below. | |
127 | */ | |
128 | static int omap_1510_local_bus_init(void) | |
129 | { | |
130 | unsigned int tlb; | |
131 | unsigned long lbaddr, physaddr; | |
132 | ||
133 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, | |
134 | OMAP1510_LB_CLOCK_DIV); | |
135 | ||
136 | /* Configure the Local Bus MMU table */ | |
137 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
138 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
139 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
140 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
141 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, | |
142 | OMAP1510_LB_MMU_CAM_L); | |
143 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
144 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
145 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
146 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
147 | } | |
148 | ||
149 | /* Enable the walking table */ | |
150 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
151 | udelay(200); | |
152 | ||
153 | return 0; | |
154 | } | |
155 | ||
156 | #ifdef CONFIG_USB_OTG | |
157 | ||
158 | static void start_hnp(struct ohci_hcd *ohci) | |
159 | { | |
160 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; | |
161 | unsigned long flags; | |
162 | ||
163 | otg_start_hnp(ohci->transceiver); | |
164 | ||
165 | local_irq_save(flags); | |
166 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; | |
167 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); | |
168 | OTG_CTRL_REG &= ~OTG_A_BUSREQ; | |
169 | local_irq_restore(flags); | |
170 | } | |
171 | ||
172 | #endif | |
173 | ||
174 | /*-------------------------------------------------------------------------*/ | |
175 | ||
176 | static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev) | |
177 | { | |
178 | struct omap_usb_config *config = pdev->dev.platform_data; | |
179 | int need_transceiver = (config->otg != 0); | |
180 | int ret; | |
181 | ||
182 | dev_dbg(&pdev->dev, "starting USB Controller\n"); | |
183 | ||
184 | if (config->otg) { | |
185 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
186 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 187 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
188 | } |
189 | ||
190 | /* boards can use OTG transceivers in non-OTG modes */ | |
191 | need_transceiver = need_transceiver | |
192 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
193 | ||
194 | if (cpu_is_omap16xx()) | |
195 | ocpi_enable(); | |
196 | ||
197 | #ifdef CONFIG_ARCH_OMAP_OTG | |
198 | if (need_transceiver) { | |
199 | ohci->transceiver = otg_get_transceiver(); | |
200 | if (ohci->transceiver) { | |
201 | int status = otg_set_host(ohci->transceiver, | |
202 | &ohci_to_hcd(ohci)->self); | |
203 | dev_dbg(&pdev->dev, "init %s transceiver, status %d\n", | |
204 | ohci->transceiver->label, status); | |
205 | if (status) { | |
206 | if (ohci->transceiver) | |
207 | put_device(ohci->transceiver->dev); | |
208 | return status; | |
209 | } | |
210 | } else { | |
211 | dev_err(&pdev->dev, "can't find transceiver\n"); | |
212 | return -ENODEV; | |
213 | } | |
214 | } | |
215 | #endif | |
216 | ||
217 | omap_ohci_clock_power(1); | |
218 | ||
219 | if (cpu_is_omap1510()) { | |
220 | omap_1510_local_bus_power(1); | |
221 | omap_1510_local_bus_init(); | |
222 | } | |
223 | ||
224 | if ((ret = ohci_init(ohci)) < 0) | |
225 | return ret; | |
226 | ||
227 | /* board-specific power switching and overcurrent support */ | |
228 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
229 | u32 rh = roothub_a (ohci); | |
230 | ||
231 | /* power switching (ganged by default) */ | |
232 | rh &= ~RH_A_NPS; | |
233 | ||
234 | /* TPS2045 switch for internal transceiver (port 1) */ | |
235 | if (machine_is_omap_osk()) { | |
bc96c0ad | 236 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
237 | |
238 | rh &= ~RH_A_NOCP; | |
239 | ||
240 | /* gpio9 for overcurrent detction */ | |
241 | omap_cfg_reg(W8_1610_GPIO9); | |
242 | omap_request_gpio(9); | |
243 | omap_set_gpio_direction(9, 1 /* IN */); | |
244 | ||
245 | /* for paranoia's sake: disable USB.PUEN */ | |
246 | omap_cfg_reg(W4_USB_HIGHZ); | |
247 | } | |
248 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
249 | distrust_firmware = 0; | |
250 | } | |
251 | ||
252 | /* FIXME khubd hub requests should manage power switching */ | |
253 | omap_ohci_transceiver_power(1); | |
254 | ||
255 | /* board init will have already handled HMC and mux setup. | |
256 | * any external transceiver should already be initialized | |
257 | * too, so all configured ports use the right signaling now. | |
258 | */ | |
259 | ||
260 | return 0; | |
261 | } | |
262 | ||
263 | static void omap_stop_hc(struct platform_device *pdev) | |
264 | { | |
265 | dev_dbg(&pdev->dev, "stopping USB Controller\n"); | |
266 | omap_ohci_clock_power(0); | |
267 | } | |
268 | ||
269 | ||
270 | /*-------------------------------------------------------------------------*/ | |
271 | ||
272 | void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *); | |
273 | ||
274 | /* configure so an HC device and id are always provided */ | |
275 | /* always called with process context; sleeping is OK */ | |
276 | ||
277 | ||
278 | /** | |
279 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
280 | * Context: !in_interrupt() | |
281 | * | |
282 | * Allocates basic resources for this USB host controller, and | |
283 | * then invokes the start() method for the HCD associated with it | |
284 | * through the hotplug entry's driver_data. | |
285 | */ | |
286 | int usb_hcd_omap_probe (const struct hc_driver *driver, | |
287 | struct platform_device *pdev) | |
288 | { | |
289 | int retval; | |
290 | struct usb_hcd *hcd = 0; | |
291 | struct ohci_hcd *ohci; | |
292 | ||
293 | if (pdev->num_resources != 2) { | |
294 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", | |
295 | pdev->num_resources); | |
296 | return -ENODEV; | |
297 | } | |
298 | ||
299 | if (pdev->resource[0].flags != IORESOURCE_MEM | |
300 | || pdev->resource[1].flags != IORESOURCE_IRQ) { | |
301 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
302 | return -ENODEV; | |
303 | } | |
304 | ||
305 | usb_host_ck = clk_get(0, "usb_hhc_ck"); | |
306 | if (IS_ERR(usb_host_ck)) | |
307 | return PTR_ERR(usb_host_ck); | |
308 | ||
309 | hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id); | |
310 | if (!hcd) { | |
311 | retval = -ENOMEM; | |
312 | goto err0; | |
313 | } | |
314 | hcd->rsrc_start = pdev->resource[0].start; | |
315 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
316 | ||
317 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
318 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
319 | retval = -EBUSY; | |
320 | goto err1; | |
321 | } | |
322 | ||
323 | hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start); | |
324 | ||
325 | ohci = hcd_to_ohci(hcd); | |
326 | ohci_hcd_init(ohci); | |
327 | ||
328 | retval = omap_start_hc(ohci, pdev); | |
329 | if (retval < 0) | |
330 | goto err2; | |
331 | ||
332 | retval = usb_add_hcd(hcd, platform_get_irq(pdev, 0), SA_INTERRUPT); | |
333 | if (retval == 0) | |
334 | return retval; | |
335 | ||
336 | omap_stop_hc(pdev); | |
337 | err2: | |
338 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
339 | err1: | |
340 | usb_put_hcd(hcd); | |
341 | err0: | |
342 | clk_put(usb_host_ck); | |
343 | return retval; | |
344 | } | |
345 | ||
346 | ||
347 | /* may be called with controller, bus, and devices active */ | |
348 | ||
349 | /** | |
350 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
351 | * @dev: USB Host Controller being removed | |
352 | * Context: !in_interrupt() | |
353 | * | |
354 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
355 | * the HCD's stop() method. It is always called from a thread | |
356 | * context, normally "rmmod", "apmd", or something similar. | |
357 | * | |
358 | */ | |
359 | void usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
360 | { | |
361 | usb_remove_hcd(hcd); | |
362 | if (machine_is_omap_osk()) | |
363 | omap_free_gpio(9); | |
364 | omap_stop_hc(pdev); | |
365 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
366 | usb_put_hcd(hcd); | |
367 | clk_put(usb_host_ck); | |
368 | } | |
369 | ||
370 | /*-------------------------------------------------------------------------*/ | |
371 | ||
372 | static int __devinit | |
373 | ohci_omap_start (struct usb_hcd *hcd) | |
374 | { | |
375 | struct omap_usb_config *config; | |
376 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
377 | int ret; | |
378 | ||
379 | config = hcd->self.controller->platform_data; | |
380 | if (config->otg || config->rwc) | |
381 | writel(OHCI_CTRL_RWC, &ohci->regs->control); | |
382 | ||
383 | if ((ret = ohci_run (ohci)) < 0) { | |
384 | dev_err(hcd->self.controller, "can't start\n"); | |
385 | ohci_stop (hcd); | |
386 | return ret; | |
387 | } | |
388 | return 0; | |
389 | } | |
390 | ||
391 | /*-------------------------------------------------------------------------*/ | |
392 | ||
393 | static const struct hc_driver ohci_omap_hc_driver = { | |
394 | .description = hcd_name, | |
395 | .product_desc = "OMAP OHCI", | |
396 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
397 | ||
398 | /* | |
399 | * generic hardware linkage | |
400 | */ | |
401 | .irq = ohci_irq, | |
402 | .flags = HCD_USB11 | HCD_MEMORY, | |
403 | ||
404 | /* | |
405 | * basic lifecycle operations | |
406 | */ | |
407 | .start = ohci_omap_start, | |
408 | .stop = ohci_stop, | |
409 | ||
410 | /* | |
411 | * managing i/o requests and associated device resources | |
412 | */ | |
413 | .urb_enqueue = ohci_urb_enqueue, | |
414 | .urb_dequeue = ohci_urb_dequeue, | |
415 | .endpoint_disable = ohci_endpoint_disable, | |
416 | ||
417 | /* | |
418 | * scheduling support | |
419 | */ | |
420 | .get_frame_number = ohci_get_frame, | |
421 | ||
422 | /* | |
423 | * root hub support | |
424 | */ | |
425 | .hub_status_data = ohci_hub_status_data, | |
426 | .hub_control = ohci_hub_control, | |
8ad7fe16 | 427 | #ifdef CONFIG_PM |
0c0382e3 AS |
428 | .bus_suspend = ohci_bus_suspend, |
429 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
430 | #endif |
431 | .start_port_reset = ohci_start_port_reset, | |
432 | }; | |
433 | ||
434 | /*-------------------------------------------------------------------------*/ | |
435 | ||
3ae5eaec | 436 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 437 | { |
3ae5eaec | 438 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
439 | } |
440 | ||
3ae5eaec | 441 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 442 | { |
3ae5eaec | 443 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
444 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
445 | ||
3ae5eaec | 446 | usb_hcd_omap_remove(hcd, dev); |
1da177e4 LT |
447 | if (ohci->transceiver) { |
448 | (void) otg_set_host(ohci->transceiver, 0); | |
449 | put_device(ohci->transceiver->dev); | |
450 | } | |
3ae5eaec | 451 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
452 | |
453 | return 0; | |
454 | } | |
455 | ||
456 | /*-------------------------------------------------------------------------*/ | |
457 | ||
458 | #ifdef CONFIG_PM | |
459 | ||
3ae5eaec | 460 | static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message) |
1da177e4 | 461 | { |
3ae5eaec | 462 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
f197b2c5 DB |
463 | |
464 | if (time_before(jiffies, ohci->next_statechange)) | |
465 | msleep(5); | |
466 | ohci->next_statechange = jiffies; | |
467 | ||
468 | omap_ohci_clock_power(0); | |
469 | ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED; | |
470 | dev->power.power_state = PMSG_SUSPEND; | |
471 | return 0; | |
1da177e4 LT |
472 | } |
473 | ||
3ae5eaec | 474 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 475 | { |
3ae5eaec | 476 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
1da177e4 | 477 | |
b404a5b0 | 478 | if (time_before(jiffies, ohci->next_statechange)) |
479 | msleep(5); | |
480 | ohci->next_statechange = jiffies; | |
f197b2c5 | 481 | |
b404a5b0 | 482 | omap_ohci_clock_power(1); |
f197b2c5 DB |
483 | dev->power.power_state = PMSG_ON; |
484 | usb_hcd_resume_root_hub(dev_get_drvdata(dev)); | |
485 | return 0; | |
1da177e4 LT |
486 | } |
487 | ||
488 | #endif | |
489 | ||
490 | /*-------------------------------------------------------------------------*/ | |
491 | ||
492 | /* | |
493 | * Driver definition to register with the OMAP bus | |
494 | */ | |
3ae5eaec | 495 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
496 | .probe = ohci_hcd_omap_drv_probe, |
497 | .remove = ohci_hcd_omap_drv_remove, | |
498 | #ifdef CONFIG_PM | |
499 | .suspend = ohci_omap_suspend, | |
500 | .resume = ohci_omap_resume, | |
501 | #endif | |
3ae5eaec RK |
502 | .driver = { |
503 | .owner = THIS_MODULE, | |
504 | .name = "ohci", | |
505 | }, | |
1da177e4 LT |
506 | }; |
507 | ||
508 | static int __init ohci_hcd_omap_init (void) | |
509 | { | |
510 | printk (KERN_DEBUG "%s: " DRIVER_INFO " (OMAP)\n", hcd_name); | |
511 | if (usb_disabled()) | |
512 | return -ENODEV; | |
513 | ||
514 | pr_debug("%s: block sizes: ed %Zd td %Zd\n", hcd_name, | |
515 | sizeof (struct ed), sizeof (struct td)); | |
516 | ||
3ae5eaec | 517 | return platform_driver_register(&ohci_hcd_omap_driver); |
1da177e4 LT |
518 | } |
519 | ||
520 | static void __exit ohci_hcd_omap_cleanup (void) | |
521 | { | |
3ae5eaec | 522 | platform_driver_unregister(&ohci_hcd_omap_driver); |
1da177e4 LT |
523 | } |
524 | ||
525 | module_init (ohci_hcd_omap_init); | |
526 | module_exit (ohci_hcd_omap_cleanup); |